[13:17:17.822] <TB2> INFO: *** Welcome to pxar ***
[13:17:17.822] <TB2> INFO: *** Today: 2015/08/19
[13:17:17.822] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C15.dat
[13:17:17.824] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//tbmParameters_C0b.dat
[13:17:17.824] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//defaultMaskFile.dat
[13:17:17.824] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters_C15.dat
[13:17:17.906] <TB2> INFO: clk: 4
[13:17:17.906] <TB2> INFO: ctr: 4
[13:17:17.906] <TB2> INFO: sda: 19
[13:17:17.906] <TB2> INFO: tin: 9
[13:17:17.906] <TB2> INFO: level: 15
[13:17:17.906] <TB2> INFO: triggerdelay: 0
[13:17:17.906] <TB2> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[13:17:17.906] <TB2> INFO: Log level: INFO
[13:17:17.914] <TB2> INFO: Found DTB DTB_WXC55Z
[13:17:17.921] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[13:17:17.925] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[13:17:17.927] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[13:17:19.492] <TB2> INFO: DUT info:
[13:17:19.492] <TB2> INFO: The DUT currently contains the following objects:
[13:17:19.492] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:17:19.492] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:17:19.492] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:17:19.492] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[13:17:19.492] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:19.492] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:19.492] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:19.492] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:19.492] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:19.492] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:19.492] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:19.493] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:19.493] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:19.493] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:19.493] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:19.493] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:19.493] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:19.493] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:19.493] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:19.493] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:19.894] <TB2> INFO: enter 'restricted' command line mode
[13:17:19.894] <TB2> INFO: enter test to run
[13:17:19.894] <TB2> INFO: test: pretest no parameter change
[13:17:19.894] <TB2> INFO: running: pretest
[13:17:19.899] <TB2> INFO: ######################################################################
[13:17:19.899] <TB2> INFO: PixTestPretest::doTest()
[13:17:19.899] <TB2> INFO: ######################################################################
[13:17:19.900] <TB2> INFO: ----------------------------------------------------------------------
[13:17:19.900] <TB2> INFO: PixTestPretest::programROC()
[13:17:19.900] <TB2> INFO: ----------------------------------------------------------------------
[13:17:37.917] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[13:17:37.917] <TB2> INFO: IA differences per ROC: 18.5 18.5 20.1 19.3 19.3 17.7 19.3 18.5 17.7 19.3 16.9 18.5 20.1 19.3 18.5 17.7
[13:17:38.000] <TB2> INFO: ----------------------------------------------------------------------
[13:17:38.000] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[13:17:38.000] <TB2> INFO: ----------------------------------------------------------------------
[13:17:43.480] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 397.9 mA = 24.8687 mA/ROC
[13:17:43.499] <TB2> INFO: ----------------------------------------------------------------------
[13:17:43.500] <TB2> INFO: PixTestPretest::findWorkingPixel()
[13:17:43.500] <TB2> INFO: ----------------------------------------------------------------------
[13:17:52.074] <TB2> INFO: Test took 8569ms.
[13:17:52.360] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[13:17:52.383] <TB2> INFO: ----------------------------------------------------------------------
[13:17:52.383] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[13:17:52.383] <TB2> INFO: ----------------------------------------------------------------------
[13:18:00.777] <TB2> INFO: Test took 8391ms.
[13:18:01.089] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[13:18:01.089] <TB2> INFO: CalDel: 139 146 148 140 131 121 153 139 109 154 136 144 127 142 143 129
[13:18:01.089] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[13:18:01.093] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C0.dat
[13:18:01.093] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C1.dat
[13:18:01.094] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C2.dat
[13:18:01.094] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C3.dat
[13:18:01.094] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C4.dat
[13:18:01.094] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C5.dat
[13:18:01.095] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C6.dat
[13:18:01.095] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C7.dat
[13:18:01.096] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C8.dat
[13:18:01.096] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C9.dat
[13:18:01.096] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C10.dat
[13:18:01.097] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C11.dat
[13:18:01.097] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C12.dat
[13:18:01.097] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C13.dat
[13:18:01.098] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C14.dat
[13:18:01.098] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C15.dat
[13:18:01.098] <TB2> INFO: PixTestPretest::doTest() done, duration: 41 seconds
[13:18:01.438] <TB2> INFO: enter test to run
[13:18:01.438] <TB2> INFO: test: fulltest no parameter change
[13:18:01.438] <TB2> INFO: running: fulltest
[13:18:01.439] <TB2> INFO: ######################################################################
[13:18:01.439] <TB2> INFO: PixTestFullTest::doTest()
[13:18:01.439] <TB2> INFO: ######################################################################
[13:18:01.440] <TB2> INFO: ######################################################################
[13:18:01.440] <TB2> INFO: PixTestAlive::doTest()
[13:18:01.440] <TB2> INFO: ######################################################################
[13:18:01.442] <TB2> INFO: ----------------------------------------------------------------------
[13:18:01.442] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:18:01.442] <TB2> INFO: ----------------------------------------------------------------------
[13:18:04.910] <TB2> INFO: Test took 3467ms.
[13:18:04.928] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:05.156] <TB2> INFO: PixTestAlive::aliveTest() done
[13:18:05.156] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
[13:18:05.158] <TB2> INFO: ----------------------------------------------------------------------
[13:18:05.158] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:18:05.158] <TB2> INFO: ----------------------------------------------------------------------
[13:18:08.047] <TB2> INFO: Test took 2887ms.
[13:18:08.048] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:08.049] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[13:18:08.274] <TB2> INFO: PixTestAlive::maskTest() done
[13:18:08.274] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:18:08.276] <TB2> INFO: ----------------------------------------------------------------------
[13:18:08.276] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:18:08.276] <TB2> INFO: ----------------------------------------------------------------------
[13:18:11.816] <TB2> INFO: Test took 3538ms.
[13:18:11.837] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:12.056] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[13:18:12.056] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:18:12.056] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[13:18:12.063] <TB2> INFO: ######################################################################
[13:18:12.063] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[13:18:12.064] <TB2> INFO: ######################################################################
[13:18:12.066] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[13:18:12.079] <TB2> INFO: dacScan step from 0 .. 29
[13:18:33.710] <TB2> INFO: Test took 21631ms.
[13:18:33.752] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:33.752] <TB2> INFO: dacScan step from 30 .. 59
[13:18:56.597] <TB2> INFO: Test took 22845ms.
[13:18:56.666] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:56.675] <TB2> INFO: dacScan step from 60 .. 89
[13:19:24.008] <TB2> INFO: Test took 27332ms.
[13:19:24.284] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:24.377] <TB2> INFO: dacScan step from 90 .. 119
[13:19:53.577] <TB2> INFO: Test took 29199ms.
[13:19:53.840] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:53.917] <TB2> INFO: dacScan step from 120 .. 149
[13:20:19.105] <TB2> INFO: Test took 25188ms.
[13:20:19.334] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:44.064] <TB2> INFO: PixTestBBMap::doTest() done, duration: 152 seconds
[13:20:44.065] <TB2> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 4
[13:20:44.065] <TB2> INFO: separation cut (per ROC): 100 100 105 108 104 103 96 94 88 91 90 91 105 100 78 79
[13:20:44.133] <TB2> INFO: ######################################################################
[13:20:44.133] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[13:20:44.133] <TB2> INFO: ######################################################################
[13:20:44.133] <TB2> INFO: ----------------------------------------------------------------------
[13:20:44.133] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[13:20:44.133] <TB2> INFO: ----------------------------------------------------------------------
[13:20:44.133] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[13:20:44.142] <TB2> INFO: dacScan step from 0 .. 3
[13:21:04.942] <TB2> INFO: Test took 20800ms.
[13:21:04.969] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:04.969] <TB2> INFO: dacScan step from 4 .. 7
[13:21:26.409] <TB2> INFO: Test took 21440ms.
[13:21:26.437] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:26.437] <TB2> INFO: dacScan step from 8 .. 11
[13:21:47.573] <TB2> INFO: Test took 21136ms.
[13:21:47.603] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:47.603] <TB2> INFO: dacScan step from 12 .. 15
[13:22:08.489] <TB2> INFO: Test took 20886ms.
[13:22:08.520] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:08.520] <TB2> INFO: dacScan step from 16 .. 19
[13:22:29.410] <TB2> INFO: Test took 20890ms.
[13:22:29.440] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:29.440] <TB2> INFO: dacScan step from 20 .. 23
[13:22:50.410] <TB2> INFO: Test took 20970ms.
[13:22:50.440] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:50.440] <TB2> INFO: dacScan step from 24 .. 27
[13:23:11.707] <TB2> INFO: Test took 21267ms.
[13:23:11.740] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:11.740] <TB2> INFO: dacScan step from 28 .. 31
[13:23:33.041] <TB2> INFO: Test took 21301ms.
[13:23:33.068] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:33.068] <TB2> INFO: dacScan step from 32 .. 35
[13:23:54.338] <TB2> INFO: Test took 21270ms.
[13:23:54.364] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:54.364] <TB2> INFO: dacScan step from 36 .. 39
[13:24:15.705] <TB2> INFO: Test took 21341ms.
[13:24:15.731] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:15.731] <TB2> INFO: dacScan step from 40 .. 43
[13:24:36.705] <TB2> INFO: Test took 20974ms.
[13:24:36.732] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:36.732] <TB2> INFO: dacScan step from 44 .. 47
[13:24:57.922] <TB2> INFO: Test took 21190ms.
[13:24:57.949] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:57.949] <TB2> INFO: dacScan step from 48 .. 51
[13:25:19.002] <TB2> INFO: Test took 21053ms.
[13:25:19.029] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:19.029] <TB2> INFO: dacScan step from 52 .. 55
[13:25:40.064] <TB2> INFO: Test took 21035ms.
[13:25:40.096] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:40.096] <TB2> INFO: dacScan step from 56 .. 59
[13:26:01.261] <TB2> INFO: Test took 21165ms.
[13:26:01.294] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:01.294] <TB2> INFO: dacScan step from 60 .. 63
[13:26:22.357] <TB2> INFO: Test took 21063ms.
[13:26:22.388] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:22.388] <TB2> INFO: dacScan step from 64 .. 67
[13:26:43.443] <TB2> INFO: Test took 21055ms.
[13:26:43.470] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:43.470] <TB2> INFO: dacScan step from 68 .. 71
[13:27:05.061] <TB2> INFO: Test took 21591ms.
[13:27:05.097] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:05.097] <TB2> INFO: dacScan step from 72 .. 75
[13:27:26.287] <TB2> INFO: Test took 21190ms.
[13:27:26.323] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:26.324] <TB2> INFO: dacScan step from 76 .. 79
[13:27:48.466] <TB2> INFO: Test took 22142ms.
[13:27:48.516] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:48.517] <TB2> INFO: dacScan step from 80 .. 83
[13:28:11.782] <TB2> INFO: Test took 23264ms.
[13:28:11.869] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:11.873] <TB2> INFO: dacScan step from 84 .. 87
[13:28:36.508] <TB2> INFO: Test took 24635ms.
[13:28:36.631] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:36.638] <TB2> INFO: dacScan step from 88 .. 91
[13:29:02.340] <TB2> INFO: Test took 25702ms.
[13:29:02.502] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:02.510] <TB2> INFO: dacScan step from 92 .. 95
[13:29:30.371] <TB2> INFO: Test took 27861ms.
[13:29:30.564] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:30.575] <TB2> INFO: dacScan step from 96 .. 99


[13:30:00.562] <TB2> INFO: Test took 29987ms.
[13:30:00.783] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:00.793] <TB2> INFO: dacScan step from 100 .. 103

[13:30:31.565] <TB2> INFO: Test took 30771ms.
[13:30:31.785] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:31.797] <TB2> INFO: dacScan step from 104 .. 107


[13:31:03.224] <TB2> INFO: Test took 31427ms.
[13:31:03.460] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:03.473] <TB2> INFO: dacScan step from 108 .. 111


[13:31:35.575] <TB2> INFO: Test took 32102ms.
[13:31:35.817] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:35.829] <TB2> INFO: dacScan step from 112 .. 115





[13:32:07.771] <TB2> INFO: Test took 31941ms.
[13:32:08.009] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:08.023] <TB2> INFO: dacScan step from 116 .. 119



[13:32:40.287] <TB2> INFO: Test took 32264ms.
[13:32:40.535] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:40.548] <TB2> INFO: dacScan step from 120 .. 123
[13:33:12.736] <TB2> INFO: Test took 32187ms.
[13:33:12.973] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:12.987] <TB2> INFO: dacScan step from 124 .. 127


[13:33:44.816] <TB2> INFO: Test took 31829ms.
[13:33:45.051] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:45.064] <TB2> INFO: dacScan step from 128 .. 131
[13:34:16.837] <TB2> INFO: Test took 31773ms.
[13:34:17.079] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:17.091] <TB2> INFO: dacScan step from 132 .. 135
[13:34:49.333] <TB2> INFO: Test took 32242ms.
[13:34:49.562] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:49.574] <TB2> INFO: dacScan step from 136 .. 139
[13:35:21.885] <TB2> INFO: Test took 32310ms.
[13:35:22.121] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:22.133] <TB2> INFO: dacScan step from 140 .. 143
[13:35:53.078] <TB2> INFO: Test took 30945ms.
[13:35:53.316] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:53.329] <TB2> INFO: dacScan step from 144 .. 147
[13:36:25.454] <TB2> INFO: Test took 32125ms.
[13:36:25.681] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:25.693] <TB2> INFO: dacScan step from 148 .. 149
[13:36:40.214] <TB2> INFO: Test took 14521ms.
[13:36:40.326] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:40.332] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:36:41.785] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:36:43.250] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:36:44.647] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:36:46.020] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:36:47.456] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:36:48.980] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:36:50.468] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:36:52.054] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:36:53.523] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:36:54.992] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:36:56.442] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:36:57.904] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:36:59.332] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:37:00.762] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:37:02.226] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:37:03.819] <TB2> INFO: PixTestScurves::scurves() done
[13:37:03.819] <TB2> INFO: Vcal mean: 97.68 92.79 101.16 97.29 99.08 89.76 103.06 81.52 86.74 89.84 93.75 88.22 96.52 92.16 82.51 85.98
[13:37:03.819] <TB2> INFO: Vcal RMS: 5.16 5.98 5.64 6.13 5.04 5.61 5.49 5.22 4.84 5.33 6.16 5.91 6.19 5.84 4.28 5.50
[13:37:03.819] <TB2> INFO: PixTestScurves::fullTest() done, duration: 979 seconds
[13:37:03.898] <TB2> INFO: ######################################################################
[13:37:03.899] <TB2> INFO: PixTestTrim::doTest()
[13:37:03.899] <TB2> INFO: ######################################################################
[13:37:03.900] <TB2> INFO: ----------------------------------------------------------------------
[13:37:03.900] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:37:03.900] <TB2> INFO: ----------------------------------------------------------------------
[13:37:03.989] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:37:03.989] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:37:03.998] <TB2> INFO: dacScan step from 0 .. 19
[13:37:19.772] <TB2> INFO: Test took 15774ms.
[13:37:19.801] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:19.801] <TB2> INFO: dacScan step from 20 .. 39
[13:37:35.492] <TB2> INFO: Test took 15691ms.
[13:37:35.514] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:35.514] <TB2> INFO: dacScan step from 40 .. 59
[13:37:51.023] <TB2> INFO: Test took 15509ms.
[13:37:51.051] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:51.051] <TB2> INFO: dacScan step from 60 .. 79
[13:38:06.057] <TB2> INFO: Test took 15006ms.
[13:38:06.077] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:06.077] <TB2> INFO: dacScan step from 80 .. 99
[13:38:21.158] <TB2> INFO: Test took 15081ms.
[13:38:21.197] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:21.203] <TB2> INFO: dacScan step from 100 .. 119
[13:38:40.034] <TB2> INFO: Test took 18831ms.
[13:38:40.188] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:40.217] <TB2> INFO: dacScan step from 120 .. 139
[13:39:00.039] <TB2> INFO: Test took 19822ms.
[13:39:00.205] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:00.245] <TB2> INFO: dacScan step from 140 .. 159
[13:39:15.962] <TB2> INFO: Test took 15717ms.
[13:39:16.041] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:37.550] <TB2> INFO: ROC 0 VthrComp = 101
[13:39:37.550] <TB2> INFO: ROC 1 VthrComp = 95
[13:39:37.550] <TB2> INFO: ROC 2 VthrComp = 102
[13:39:37.550] <TB2> INFO: ROC 3 VthrComp = 101
[13:39:37.550] <TB2> INFO: ROC 4 VthrComp = 102
[13:39:37.551] <TB2> INFO: ROC 5 VthrComp = 96
[13:39:37.551] <TB2> INFO: ROC 6 VthrComp = 101
[13:39:37.551] <TB2> INFO: ROC 7 VthrComp = 84
[13:39:37.551] <TB2> INFO: ROC 8 VthrComp = 96
[13:39:37.551] <TB2> INFO: ROC 9 VthrComp = 96
[13:39:37.551] <TB2> INFO: ROC 10 VthrComp = 91
[13:39:37.551] <TB2> INFO: ROC 11 VthrComp = 89
[13:39:37.551] <TB2> INFO: ROC 12 VthrComp = 100
[13:39:37.551] <TB2> INFO: ROC 13 VthrComp = 96
[13:39:37.552] <TB2> INFO: ROC 14 VthrComp = 86
[13:39:37.552] <TB2> INFO: ROC 15 VthrComp = 88
[13:39:37.552] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:39:37.552] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:39:37.561] <TB2> INFO: dacScan step from 0 .. 19
[13:39:52.929] <TB2> INFO: Test took 15368ms.
[13:39:52.953] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:52.953] <TB2> INFO: dacScan step from 20 .. 39
[13:40:08.316] <TB2> INFO: Test took 15363ms.
[13:40:08.353] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:08.356] <TB2> INFO: dacScan step from 40 .. 59
[13:40:27.616] <TB2> INFO: Test took 19260ms.
[13:40:27.781] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:27.827] <TB2> INFO: dacScan step from 60 .. 79
[13:40:48.356] <TB2> INFO: Test took 20529ms.
[13:40:48.519] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:48.575] <TB2> INFO: dacScan step from 80 .. 99
[13:41:07.763] <TB2> INFO: Test took 19188ms.
[13:41:07.927] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:07.985] <TB2> INFO: dacScan step from 100 .. 119
[13:41:28.595] <TB2> INFO: Test took 20610ms.
[13:41:28.758] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:28.815] <TB2> INFO: dacScan step from 120 .. 139
[13:41:49.887] <TB2> INFO: Test took 21073ms.
[13:41:50.063] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:50.116] <TB2> INFO: dacScan step from 140 .. 159
[13:42:09.110] <TB2> INFO: Test took 18994ms.
[13:42:09.270] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:34.666] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 58.433 for pixel 3/79 mean/min/max = 45.1333/31.8325/58.4342
[13:42:34.666] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 60.2269 for pixel 8/47 mean/min/max = 46.2989/32.1511/60.4468
[13:42:34.666] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 59.1657 for pixel 3/77 mean/min/max = 45.7273/32.2129/59.2417
[13:42:34.667] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 60.4844 for pixel 0/63 mean/min/max = 46.1872/31.8735/60.5008
[13:42:34.667] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 57.7028 for pixel 21/78 mean/min/max = 45.2775/32.6806/57.8744
[13:42:34.667] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 58.3157 for pixel 9/70 mean/min/max = 45.1116/31.8887/58.3346
[13:42:34.668] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 59.7783 for pixel 5/48 mean/min/max = 46.1548/32.2134/60.0962
[13:42:34.668] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 60.6887 for pixel 12/1 mean/min/max = 46.3619/32.0005/60.7232
[13:42:34.668] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 55.6176 for pixel 0/16 mean/min/max = 43.9667/32.1257/55.8078
[13:42:34.668] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 57.4812 for pixel 22/67 mean/min/max = 44.7258/31.9135/57.538
[13:42:34.669] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 62.2532 for pixel 0/5 mean/min/max = 47.4426/32.6111/62.274
[13:42:34.669] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 61.4621 for pixel 0/78 mean/min/max = 47.0137/32.4937/61.5336
[13:42:34.669] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 60.9205 for pixel 0/4 mean/min/max = 46.2518/31.4572/61.0465
[13:42:34.669] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 59.3124 for pixel 6/79 mean/min/max = 45.8972/32.3845/59.4099
[13:42:34.670] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 56.5616 for pixel 29/1 mean/min/max = 44.8795/33.197/56.562
[13:42:34.670] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 61.3452 for pixel 6/58 mean/min/max = 47.7639/33.9512/61.5767
[13:42:34.670] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:44:20.909] <TB2> INFO: Test took 106239ms.
[13:44:22.314] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:44:22.323] <TB2> INFO: dacScan step from 0 .. 19
[13:44:45.101] <TB2> INFO: Test took 22778ms.
[13:44:45.147] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:45.149] <TB2> INFO: dacScan step from 20 .. 39
[13:45:14.745] <TB2> INFO: Test took 29596ms.
[13:45:14.985] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:15.019] <TB2> INFO: dacScan step from 40 .. 59





[13:45:50.233] <TB2> INFO: Test took 35214ms.
[13:45:50.519] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:50.572] <TB2> INFO: dacScan step from 60 .. 79
[13:46:25.694] <TB2> INFO: Test took 35122ms.
[13:46:25.994] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:26.046] <TB2> INFO: dacScan step from 80 .. 99
[13:47:01.055] <TB2> INFO: Test took 35009ms.
[13:47:01.335] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:01.388] <TB2> INFO: dacScan step from 100 .. 119



[13:47:36.573] <TB2> INFO: Test took 35185ms.
[13:47:36.880] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:36.935] <TB2> INFO: dacScan step from 120 .. 139


[13:48:12.071] <TB2> INFO: Test took 35135ms.
[13:48:12.527] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:12.643] <TB2> INFO: dacScan step from 140 .. 159
[13:48:45.374] <TB2> INFO: Test took 32731ms.
[13:48:45.653] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:45.706] <TB2> INFO: dacScan step from 160 .. 179





[13:49:18.547] <TB2> INFO: Test took 32841ms.
[13:49:18.838] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:18.895] <TB2> INFO: dacScan step from 180 .. 199


[13:49:52.634] <TB2> INFO: Test took 33738ms.
[13:49:52.895] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:17.064] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.204863 .. 255.000000
[13:50:17.144] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[13:50:17.153] <TB2> INFO: dacScan step from 0 .. 19
[13:50:31.017] <TB2> INFO: Test took 13864ms.
[13:50:31.041] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:31.041] <TB2> INFO: dacScan step from 20 .. 39
[13:50:46.241] <TB2> INFO: Test took 15199ms.
[13:50:46.319] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:46.335] <TB2> INFO: dacScan step from 40 .. 59
[13:51:04.186] <TB2> INFO: Test took 17851ms.
[13:51:04.333] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:04.388] <TB2> INFO: dacScan step from 60 .. 79
[13:51:22.546] <TB2> INFO: Test took 18158ms.
[13:51:22.689] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:22.741] <TB2> INFO: dacScan step from 80 .. 99
[13:51:40.797] <TB2> INFO: Test took 18056ms.
[13:51:40.952] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:41.006] <TB2> INFO: dacScan step from 100 .. 119
[13:51:59.029] <TB2> INFO: Test took 18023ms.
[13:51:59.167] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:59.220] <TB2> INFO: dacScan step from 120 .. 139
[13:52:15.908] <TB2> INFO: Test took 16688ms.
[13:52:16.060] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:16.118] <TB2> INFO: dacScan step from 140 .. 159
[13:52:32.815] <TB2> INFO: Test took 16697ms.
[13:52:33.020] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:33.073] <TB2> INFO: dacScan step from 160 .. 179
[13:52:50.038] <TB2> INFO: Test took 16965ms.
[13:52:50.184] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:50.233] <TB2> INFO: dacScan step from 180 .. 199
[13:53:08.823] <TB2> INFO: Test took 18589ms.
[13:53:08.971] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:53:09.026] <TB2> INFO: dacScan step from 200 .. 219
[13:53:25.992] <TB2> INFO: Test took 16965ms.
[13:53:26.127] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:53:26.181] <TB2> INFO: dacScan step from 220 .. 239
[13:53:43.629] <TB2> INFO: Test took 17447ms.
[13:53:43.773] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:53:43.827] <TB2> INFO: dacScan step from 240 .. 255
[13:53:57.960] <TB2> INFO: Test took 14133ms.
[13:53:58.067] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:30.532] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 13.195764 .. 52.353082
[13:54:30.609] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 3 .. 62 (20) hits flags = 16 (plus default)
[13:54:30.618] <TB2> INFO: dacScan step from 3 .. 22
[13:54:44.116] <TB2> INFO: Test took 13498ms.
[13:54:44.140] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:44.140] <TB2> INFO: dacScan step from 23 .. 42
[13:54:58.806] <TB2> INFO: Test took 14666ms.
[13:54:58.913] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:58.943] <TB2> INFO: dacScan step from 43 .. 62
[13:55:15.579] <TB2> INFO: Test took 16636ms.
[13:55:15.718] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:32.074] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 1.173920 .. 52.353082
[13:55:32.162] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 1 .. 62 (20) hits flags = 16 (plus default)
[13:55:32.172] <TB2> INFO: dacScan step from 1 .. 20
[13:55:46.533] <TB2> INFO: Test took 14361ms.
[13:55:46.551] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:46.551] <TB2> INFO: dacScan step from 21 .. 40
[13:56:01.348] <TB2> INFO: Test took 14797ms.
[13:56:01.462] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:01.494] <TB2> INFO: dacScan step from 41 .. 60
[13:56:18.116] <TB2> INFO: Test took 16622ms.
[13:56:18.257] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:18.307] <TB2> INFO: dacScan step from 61 .. 62
[13:56:22.657] <TB2> INFO: Test took 4350ms.
[13:56:22.677] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:41.022] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 13.494435 .. 52.353082
[13:56:41.099] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 3 .. 62 (20) hits flags = 16 (plus default)
[13:56:41.107] <TB2> INFO: dacScan step from 3 .. 22
[13:56:55.795] <TB2> INFO: Test took 14687ms.
[13:56:55.814] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:55.814] <TB2> INFO: dacScan step from 23 .. 42
[13:57:10.304] <TB2> INFO: Test took 14490ms.
[13:57:10.406] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:10.432] <TB2> INFO: dacScan step from 43 .. 62
[13:57:28.904] <TB2> INFO: Test took 18472ms.
[13:57:29.050] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:47.525] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:57:47.525] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[13:57:47.533] <TB2> INFO: dacScan step from 15 .. 34
[13:58:12.043] <TB2> INFO: Test took 24510ms.
[13:58:12.115] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:12.124] <TB2> INFO: dacScan step from 35 .. 54


[13:58:44.528] <TB2> INFO: Test took 32403ms.
[13:58:44.832] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:44.879] <TB2> INFO: dacScan step from 55 .. 55
[13:58:49.446] <TB2> INFO: Test took 4567ms.
[13:58:49.466] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:03.221] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C0.dat
[13:59:03.222] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C1.dat
[13:59:03.222] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C2.dat
[13:59:03.222] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C3.dat
[13:59:03.222] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C4.dat
[13:59:03.223] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C5.dat
[13:59:03.223] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C6.dat
[13:59:03.223] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C7.dat
[13:59:03.223] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C8.dat
[13:59:03.224] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C9.dat
[13:59:03.224] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C10.dat
[13:59:03.224] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C11.dat
[13:59:03.224] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C12.dat
[13:59:03.224] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C13.dat
[13:59:03.225] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C14.dat
[13:59:03.225] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C15.dat
[13:59:03.225] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C0.dat
[13:59:03.237] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C1.dat
[13:59:03.244] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C2.dat
[13:59:03.250] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C3.dat
[13:59:03.257] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C4.dat
[13:59:03.263] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C5.dat
[13:59:03.270] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C6.dat
[13:59:03.276] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C7.dat
[13:59:03.283] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C8.dat
[13:59:03.289] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C9.dat
[13:59:03.296] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C10.dat
[13:59:03.302] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C11.dat
[13:59:03.309] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C12.dat
[13:59:03.315] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C13.dat
[13:59:03.322] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C14.dat
[13:59:03.328] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C15.dat
[13:59:03.335] <TB2> INFO: PixTestTrim::trimTest() done
[13:59:03.335] <TB2> INFO: vtrim: 112 114 107 119 112 108 118 111 109 112 111 113 116 106 109 118
[13:59:03.335] <TB2> INFO: vthrcomp: 101 95 102 101 102 96 101 84 96 96 91 89 100 96 86 88
[13:59:03.335] <TB2> INFO: vcal mean: 35.34 35.05 35.09 35.02 35.09 35.02 35.14 35.05 35.00 35.05 35.13 35.07 35.09 35.03 35.09 35.12
[13:59:03.335] <TB2> INFO: vcal RMS: 1.04 1.12 1.05 0.98 1.02 1.04 1.23 1.02 1.08 1.09 1.07 1.01 1.05 1.02 1.12 1.07
[13:59:03.335] <TB2> INFO: bits mean: 9.93 9.93 9.67 9.54 10.10 10.16 9.94 9.73 10.06 10.50 9.36 9.22 9.35 9.63 10.43 9.41
[13:59:03.335] <TB2> INFO: bits RMS: 2.60 2.45 2.63 2.64 2.40 2.44 2.48 2.57 2.54 2.30 2.60 2.67 2.80 2.67 2.20 2.41
[13:59:03.341] <TB2> INFO: ----------------------------------------------------------------------
[13:59:03.341] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:59:03.341] <TB2> INFO: ----------------------------------------------------------------------
[13:59:03.344] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:59:03.355] <TB2> INFO: dacScan step from 0 .. 19
[13:59:26.205] <TB2> INFO: Test took 22850ms.
[13:59:26.246] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:26.246] <TB2> INFO: dacScan step from 20 .. 39
[13:59:48.821] <TB2> INFO: Test took 22575ms.
[13:59:48.857] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:48.857] <TB2> INFO: dacScan step from 40 .. 59
[14:00:11.640] <TB2> INFO: Test took 22783ms.
[14:00:11.677] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:11.677] <TB2> INFO: dacScan step from 60 .. 79
[14:00:34.805] <TB2> INFO: Test took 23128ms.
[14:00:34.845] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:34.845] <TB2> INFO: dacScan step from 80 .. 99
[14:00:56.908] <TB2> INFO: Test took 22063ms.
[14:00:56.951] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:56.951] <TB2> INFO: dacScan step from 100 .. 119
[14:01:22.890] <TB2> INFO: Test took 25939ms.
[14:01:23.048] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:23.061] <TB2> INFO: dacScan step from 120 .. 139





[14:01:57.262] <TB2> INFO: Test took 34201ms.
[14:01:57.558] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:57.604] <TB2> INFO: dacScan step from 140 .. 159


[14:02:33.414] <TB2> INFO: Test took 35810ms.
[14:02:33.760] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:33.811] <TB2> INFO: dacScan step from 160 .. 179
[14:03:11.443] <TB2> INFO: Test took 37632ms.
[14:03:11.721] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:11.771] <TB2> INFO: dacScan step from 180 .. 199
[14:03:43.337] <TB2> INFO: Test took 31566ms.
[14:03:43.602] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:09.240] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 169 (20) hits flags = 16 (plus default)
[14:04:09.256] <TB2> INFO: dacScan step from 0 .. 19
[14:04:33.006] <TB2> INFO: Test took 23750ms.
[14:04:33.039] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:33.039] <TB2> INFO: dacScan step from 20 .. 39
[14:04:54.810] <TB2> INFO: Test took 21771ms.
[14:04:54.843] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:54.843] <TB2> INFO: dacScan step from 40 .. 59
[14:05:18.131] <TB2> INFO: Test took 23288ms.
[14:05:18.166] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:18.167] <TB2> INFO: dacScan step from 60 .. 79
[14:05:41.784] <TB2> INFO: Test took 23617ms.
[14:05:41.819] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:41.819] <TB2> INFO: dacScan step from 80 .. 99
[14:06:07.025] <TB2> INFO: Test took 25206ms.
[14:06:07.091] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:07.095] <TB2> INFO: dacScan step from 100 .. 119
[14:06:38.177] <TB2> INFO: Test took 31082ms.
[14:06:38.409] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:38.436] <TB2> INFO: dacScan step from 120 .. 139


[14:07:15.019] <TB2> INFO: Test took 36583ms.
[14:07:15.308] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:15.364] <TB2> INFO: dacScan step from 140 .. 159


[14:07:50.391] <TB2> INFO: Test took 35027ms.
[14:07:50.676] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:50.727] <TB2> INFO: dacScan step from 160 .. 169
[14:08:07.592] <TB2> INFO: Test took 16865ms.
[14:08:07.738] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:33.636] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 157 (20) hits flags = 16 (plus default)
[14:08:33.645] <TB2> INFO: dacScan step from 0 .. 19
[14:08:57.011] <TB2> INFO: Test took 23366ms.
[14:08:57.052] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:57.052] <TB2> INFO: dacScan step from 20 .. 39
[14:09:20.712] <TB2> INFO: Test took 23660ms.
[14:09:20.749] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:20.749] <TB2> INFO: dacScan step from 40 .. 59
[14:09:44.058] <TB2> INFO: Test took 23309ms.
[14:09:44.101] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:44.101] <TB2> INFO: dacScan step from 60 .. 79
[14:10:07.804] <TB2> INFO: Test took 23703ms.
[14:10:07.842] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:07.842] <TB2> INFO: dacScan step from 80 .. 99
[14:10:31.293] <TB2> INFO: Test took 23451ms.
[14:10:31.360] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:31.365] <TB2> INFO: dacScan step from 100 .. 119
[14:11:03.874] <TB2> INFO: Test took 32509ms.
[14:11:04.102] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:04.129] <TB2> INFO: dacScan step from 120 .. 139


[14:11:41.191] <TB2> INFO: Test took 37062ms.
[14:11:41.487] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:41.540] <TB2> INFO: dacScan step from 140 .. 157
[14:12:09.739] <TB2> INFO: Test took 28199ms.
[14:12:09.982] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:32.825] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 158 (20) hits flags = 16 (plus default)
[14:12:32.838] <TB2> INFO: dacScan step from 0 .. 19
[14:12:56.927] <TB2> INFO: Test took 24089ms.
[14:12:56.969] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:56.969] <TB2> INFO: dacScan step from 20 .. 39
[14:13:20.832] <TB2> INFO: Test took 23863ms.
[14:13:20.877] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:20.877] <TB2> INFO: dacScan step from 40 .. 59
[14:13:44.573] <TB2> INFO: Test took 23696ms.
[14:13:44.613] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:44.613] <TB2> INFO: dacScan step from 60 .. 79
[14:14:08.298] <TB2> INFO: Test took 23685ms.
[14:14:08.336] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:08.336] <TB2> INFO: dacScan step from 80 .. 99
[14:14:32.157] <TB2> INFO: Test took 23821ms.
[14:14:32.223] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:32.229] <TB2> INFO: dacScan step from 100 .. 119
[14:15:05.513] <TB2> INFO: Test took 33284ms.
[14:15:05.747] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:05.774] <TB2> INFO: dacScan step from 120 .. 139



[14:15:41.530] <TB2> INFO: Test took 35756ms.
[14:15:41.906] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:41.958] <TB2> INFO: dacScan step from 140 .. 158





[14:16:11.975] <TB2> INFO: Test took 30017ms.
[14:16:12.233] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:35.510] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 158 (20) hits flags = 16 (plus default)
[14:16:35.519] <TB2> INFO: dacScan step from 0 .. 19
[14:16:58.310] <TB2> INFO: Test took 22791ms.
[14:16:58.345] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:58.345] <TB2> INFO: dacScan step from 20 .. 39
[14:17:21.534] <TB2> INFO: Test took 23189ms.
[14:17:21.574] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:21.574] <TB2> INFO: dacScan step from 40 .. 59
[14:17:44.554] <TB2> INFO: Test took 22980ms.
[14:17:44.590] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:44.590] <TB2> INFO: dacScan step from 60 .. 79
[14:18:07.304] <TB2> INFO: Test took 22713ms.
[14:18:07.337] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:07.337] <TB2> INFO: dacScan step from 80 .. 99
[14:18:31.170] <TB2> INFO: Test took 23832ms.
[14:18:31.244] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:31.248] <TB2> INFO: dacScan step from 100 .. 119
[14:19:01.530] <TB2> INFO: Test took 30282ms.
[14:19:01.762] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:01.797] <TB2> INFO: dacScan step from 120 .. 139


[14:19:36.585] <TB2> INFO: Test took 34787ms.
[14:19:36.886] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:36.942] <TB2> INFO: dacScan step from 140 .. 158

[14:20:07.234] <TB2> INFO: Test took 30291ms.
[14:20:07.503] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:32.859] <TB2> INFO: PixTestTrim::trimBitTest() done
[14:20:32.860] <TB2> INFO: PixTestTrim::doTest() done, duration: 2608 seconds
[14:20:33.547] <TB2> INFO: ######################################################################
[14:20:33.547] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:20:33.547] <TB2> INFO: ######################################################################
[14:20:37.201] <TB2> INFO: Test took 3652ms.
[14:20:37.229] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:41.159] <TB2> INFO: Test took 3732ms.
[14:20:41.236] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:44.694] <TB2> INFO: Test took 3446ms.
[14:20:44.764] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:44.772] <TB2> INFO: The DUT currently contains the following objects:
[14:20:44.772] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:44.772] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:20:44.772] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:20:44.772] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:44.772] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:44.772] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:44.772] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:44.772] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:44.772] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:44.772] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:44.772] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:44.772] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:44.772] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:44.772] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:44.772] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:44.772] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:44.772] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:44.772] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:44.772] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:44.772] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:45.879] <TB2> INFO: Test took 1107ms.
[14:20:45.880] <TB2> INFO: The DUT currently contains the following objects:
[14:20:45.882] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:45.883] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:20:45.883] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:20:45.883] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:45.883] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:45.883] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:45.883] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:45.883] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:45.883] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:45.884] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:45.884] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:45.884] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:45.884] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:45.884] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:45.884] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:45.884] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:45.884] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:45.884] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:45.884] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:45.884] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:47.002] <TB2> INFO: Test took 1118ms.
[14:20:47.004] <TB2> INFO: The DUT currently contains the following objects:
[14:20:47.004] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:47.004] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:20:47.004] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:20:47.004] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:47.004] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:47.004] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:47.004] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:47.004] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:47.005] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:47.005] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:47.005] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:47.005] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:47.005] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:47.005] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:47.005] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:47.005] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:47.005] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:47.005] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:47.005] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:47.005] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:48.126] <TB2> INFO: Test took 1121ms.
[14:20:48.127] <TB2> INFO: The DUT currently contains the following objects:
[14:20:48.127] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:48.127] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:20:48.127] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:20:48.127] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:48.127] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:48.127] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:48.127] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:48.127] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:48.127] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:48.127] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:48.127] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:48.127] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:48.127] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:48.127] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:48.128] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:48.128] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:48.128] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:48.128] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:48.128] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:48.128] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:49.235] <TB2> INFO: Test took 1107ms.
[14:20:49.236] <TB2> INFO: The DUT currently contains the following objects:
[14:20:49.236] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:49.236] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:20:49.236] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:20:49.236] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:49.236] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:49.236] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:49.236] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:49.236] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:49.236] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:49.236] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:49.236] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:49.237] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:49.237] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:49.237] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:49.237] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:49.237] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:49.237] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:49.237] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:49.237] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:49.237] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:50.361] <TB2> INFO: Test took 1124ms.
[14:20:50.362] <TB2> INFO: The DUT currently contains the following objects:
[14:20:50.362] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:50.362] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:20:50.362] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:20:50.362] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:50.362] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:50.362] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:50.362] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:50.362] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:50.362] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:50.362] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:50.362] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:50.362] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:50.362] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:50.362] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:50.363] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:50.363] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:50.363] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:50.363] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:50.363] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:50.363] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:51.472] <TB2> INFO: Test took 1109ms.
[14:20:51.473] <TB2> INFO: The DUT currently contains the following objects:
[14:20:51.473] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:51.473] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:20:51.473] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:20:51.473] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:51.473] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:51.473] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:51.473] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:51.473] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:51.473] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:51.473] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:51.473] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:51.473] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:51.473] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:51.473] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:51.473] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:51.474] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:51.474] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:51.474] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:51.474] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:51.474] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:52.595] <TB2> INFO: Test took 1121ms.
[14:20:52.597] <TB2> INFO: The DUT currently contains the following objects:
[14:20:52.597] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:52.597] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:20:52.597] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:20:52.597] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:52.597] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:52.597] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:52.597] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:52.597] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:52.597] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:52.597] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:52.597] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:52.597] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:52.597] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:52.597] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:52.597] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:52.597] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:52.597] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:52.597] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:52.597] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:52.598] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:53.707] <TB2> INFO: Test took 1109ms.
[14:20:53.709] <TB2> INFO: The DUT currently contains the following objects:
[14:20:53.709] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:53.709] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:20:53.709] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:20:53.709] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:53.709] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:53.709] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:53.709] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:53.709] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:53.709] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:53.709] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:53.709] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:53.709] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:53.709] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:53.709] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:53.709] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:53.710] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:53.710] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:53.710] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:53.710] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:53.710] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:54.832] <TB2> INFO: Test took 1122ms.
[14:20:54.834] <TB2> INFO: The DUT currently contains the following objects:
[14:20:54.834] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:54.834] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:20:54.834] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:20:54.834] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:54.834] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:54.834] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:54.834] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:54.834] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:54.834] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:54.834] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:54.834] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:54.834] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:54.834] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:54.834] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:54.834] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:54.834] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:54.834] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:54.834] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:54.835] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:54.835] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:55.956] <TB2> INFO: Test took 1121ms.
[14:20:55.957] <TB2> INFO: The DUT currently contains the following objects:
[14:20:55.957] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:55.957] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:20:55.957] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:20:55.957] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:55.957] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:55.958] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:55.958] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:55.958] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:55.958] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:55.958] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:55.958] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:55.958] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:55.958] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:55.958] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:55.958] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:55.958] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:55.958] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:55.958] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:55.958] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:55.958] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:57.065] <TB2> INFO: Test took 1107ms.
[14:20:57.066] <TB2> INFO: The DUT currently contains the following objects:
[14:20:57.066] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:57.067] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:20:57.067] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:20:57.067] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:57.067] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:57.067] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:57.067] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:57.067] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:57.067] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:57.067] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:57.067] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:57.067] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:57.067] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:57.067] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:57.067] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:57.067] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:57.067] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:57.067] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:57.067] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:57.067] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:58.171] <TB2> INFO: Test took 1104ms.
[14:20:58.173] <TB2> INFO: The DUT currently contains the following objects:
[14:20:58.173] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:58.173] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:20:58.173] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:20:58.173] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:58.173] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:58.173] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:58.173] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:58.173] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:58.173] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:58.173] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:58.173] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:58.173] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:58.173] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:58.173] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:58.173] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:58.174] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:58.174] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:58.174] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:58.174] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:58.174] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:59.280] <TB2> INFO: Test took 1106ms.
[14:20:59.281] <TB2> INFO: The DUT currently contains the following objects:
[14:20:59.281] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:59.281] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:20:59.281] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:20:59.281] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:59.281] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:59.281] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:59.281] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:59.281] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:59.281] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:59.281] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:59.281] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:59.281] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:59.281] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:59.281] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:59.281] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:59.281] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:59.281] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:59.281] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:59.281] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:59.282] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:00.389] <TB2> INFO: Test took 1107ms.
[14:21:00.390] <TB2> INFO: The DUT currently contains the following objects:
[14:21:00.390] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:21:00.390] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:21:00.390] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:21:00.390] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:21:00.390] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:00.390] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:00.391] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:00.391] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:00.391] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:00.391] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:00.391] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:00.391] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:00.391] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:00.391] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:00.391] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:00.391] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:00.391] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:00.391] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:00.391] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:00.391] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:01.497] <TB2> INFO: Test took 1106ms.
[14:21:01.499] <TB2> INFO: The DUT currently contains the following objects:
[14:21:01.499] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:21:01.499] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:21:01.499] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:21:01.499] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:21:01.499] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:01.499] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:01.499] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:01.499] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:01.499] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:01.499] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:01.499] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:01.499] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:01.499] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:01.500] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:01.500] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:01.500] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:01.500] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:01.500] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:01.500] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:01.500] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:21:02.650] <TB2> INFO: Test took 1150ms.
[14:21:02.655] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:25:06.006] <TB2> INFO: Test took 243351ms.
[14:25:07.582] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:02.646] <TB2> INFO: Test took 235064ms.
[14:29:04.449] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:29:04.456] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:29:04.466] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:29:04.476] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:29:04.485] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:29:04.495] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:29:04.505] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:29:04.515] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:29:04.524] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:29:04.531] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:29:04.540] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:29:04.546] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:29:04.553] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:29:04.560] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[14:29:04.566] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[14:29:04.573] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[14:29:04.580] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[14:29:04.586] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:29:04.593] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:29:04.600] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:29:04.607] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:29:04.613] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:29:04.620] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:29:04.627] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[14:29:04.634] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[14:29:04.640] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[14:29:04.647] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:29:04.654] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:29:04.661] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:29:04.667] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:29:04.674] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:29:04.681] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:29:04.688] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[14:29:04.726] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C0.dat
[14:29:04.727] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C1.dat
[14:29:04.727] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C2.dat
[14:29:04.727] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C3.dat
[14:29:04.727] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C4.dat
[14:29:04.727] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C5.dat
[14:29:04.727] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C6.dat
[14:29:04.728] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C7.dat
[14:29:04.728] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C8.dat
[14:29:04.728] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C9.dat
[14:29:04.728] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C10.dat
[14:29:04.728] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C11.dat
[14:29:04.728] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C12.dat
[14:29:04.728] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C13.dat
[14:29:04.729] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C14.dat
[14:29:04.729] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C15.dat
[14:29:08.170] <TB2> INFO: Test took 3438ms.
[14:29:11.860] <TB2> INFO: Test took 3424ms.
[14:29:15.616] <TB2> INFO: Test took 3455ms.
[14:29:15.898] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:16.818] <TB2> INFO: Test took 920ms.
[14:29:16.821] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:17.932] <TB2> INFO: Test took 1111ms.
[14:29:17.936] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:19.045] <TB2> INFO: Test took 1110ms.
[14:29:19.048] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:20.157] <TB2> INFO: Test took 1109ms.
[14:29:20.160] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:21.268] <TB2> INFO: Test took 1108ms.
[14:29:21.272] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:22.394] <TB2> INFO: Test took 1122ms.
[14:29:22.398] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:23.519] <TB2> INFO: Test took 1121ms.
[14:29:23.522] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:24.630] <TB2> INFO: Test took 1108ms.
[14:29:24.633] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:25.743] <TB2> INFO: Test took 1110ms.
[14:29:25.746] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:26.853] <TB2> INFO: Test took 1107ms.
[14:29:26.857] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:27.965] <TB2> INFO: Test took 1109ms.
[14:29:27.968] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:29.071] <TB2> INFO: Test took 1103ms.
[14:29:29.073] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:30.205] <TB2> INFO: Test took 1132ms.
[14:29:30.207] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:31.308] <TB2> INFO: Test took 1101ms.
[14:29:31.310] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:32.410] <TB2> INFO: Test took 1100ms.
[14:29:32.412] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:33.514] <TB2> INFO: Test took 1102ms.
[14:29:33.517] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:34.618] <TB2> INFO: Test took 1101ms.
[14:29:34.620] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:35.722] <TB2> INFO: Test took 1102ms.
[14:29:35.724] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:36.840] <TB2> INFO: Test took 1116ms.
[14:29:36.842] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:37.943] <TB2> INFO: Test took 1101ms.
[14:29:37.945] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:39.048] <TB2> INFO: Test took 1103ms.
[14:29:39.051] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:40.151] <TB2> INFO: Test took 1100ms.
[14:29:40.153] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:41.254] <TB2> INFO: Test took 1101ms.
[14:29:41.257] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:42.356] <TB2> INFO: Test took 1099ms.
[14:29:42.359] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:43.472] <TB2> INFO: Test took 1113ms.
[14:29:43.475] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:44.575] <TB2> INFO: Test took 1100ms.
[14:29:44.577] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:45.677] <TB2> INFO: Test took 1100ms.
[14:29:45.679] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:46.780] <TB2> INFO: Test took 1101ms.
[14:29:46.782] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:47.883] <TB2> INFO: Test took 1101ms.
[14:29:47.885] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:48.984] <TB2> INFO: Test took 1099ms.
[14:29:48.986] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:50.088] <TB2> INFO: Test took 1102ms.
[14:29:50.090] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:51.219] <TB2> INFO: Test took 1129ms.
[14:29:51.730] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 558 seconds
[14:29:51.730] <TB2> INFO: PH scale (per ROC): 74 76 69 65 78 78 63 76 89 80 76 71 70 70 81 80
[14:29:51.730] <TB2> INFO: PH offset (per ROC): 198 175 178 175 177 176 188 173 144 179 172 176 190 165 163 173
[14:29:51.939] <TB2> INFO: ######################################################################
[14:29:51.939] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:29:51.939] <TB2> INFO: ######################################################################
[14:29:51.949] <TB2> INFO: scanning low vcal = 10
[14:29:55.897] <TB2> INFO: Test took 3948ms.
[14:29:55.901] <TB2> INFO: scanning low vcal = 20
[14:29:59.780] <TB2> INFO: Test took 3879ms.
[14:29:59.783] <TB2> INFO: scanning low vcal = 30
[14:30:03.595] <TB2> INFO: Test took 3812ms.
[14:30:03.621] <TB2> INFO: scanning low vcal = 40
[14:30:08.112] <TB2> INFO: Test took 4491ms.
[14:30:08.176] <TB2> INFO: scanning low vcal = 50
[14:30:12.573] <TB2> INFO: Test took 4397ms.
[14:30:12.636] <TB2> INFO: scanning low vcal = 60
[14:30:17.008] <TB2> INFO: Test took 4372ms.
[14:30:17.068] <TB2> INFO: scanning low vcal = 70
[14:30:21.606] <TB2> INFO: Test took 4538ms.
[14:30:21.710] <TB2> INFO: scanning low vcal = 80
[14:30:26.067] <TB2> INFO: Test took 4357ms.
[14:30:26.148] <TB2> INFO: scanning low vcal = 90
[14:30:30.668] <TB2> INFO: Test took 4520ms.
[14:30:30.764] <TB2> INFO: scanning low vcal = 100
[14:30:35.328] <TB2> INFO: Test took 4564ms.
[14:30:35.421] <TB2> INFO: scanning low vcal = 110
[14:30:39.876] <TB2> INFO: Test took 4455ms.
[14:30:39.959] <TB2> INFO: scanning low vcal = 120
[14:30:44.518] <TB2> INFO: Test took 4559ms.
[14:30:44.578] <TB2> INFO: scanning low vcal = 130
[14:30:49.169] <TB2> INFO: Test took 4591ms.
[14:30:49.227] <TB2> INFO: scanning low vcal = 140
[14:30:53.800] <TB2> INFO: Test took 4573ms.
[14:30:53.865] <TB2> INFO: scanning low vcal = 150
[14:30:58.443] <TB2> INFO: Test took 4578ms.
[14:30:58.545] <TB2> INFO: scanning low vcal = 160
[14:31:03.074] <TB2> INFO: Test took 4529ms.
[14:31:03.135] <TB2> INFO: scanning low vcal = 170
[14:31:07.600] <TB2> INFO: Test took 4465ms.
[14:31:07.661] <TB2> INFO: scanning low vcal = 180
[14:31:12.321] <TB2> INFO: Test took 4660ms.
[14:31:12.398] <TB2> INFO: scanning low vcal = 190
[14:31:17.193] <TB2> INFO: Test took 4795ms.
[14:31:17.280] <TB2> INFO: scanning low vcal = 200
[14:31:21.949] <TB2> INFO: Test took 4669ms.
[14:31:22.018] <TB2> INFO: scanning low vcal = 210
[14:31:26.597] <TB2> INFO: Test took 4579ms.
[14:31:26.658] <TB2> INFO: scanning low vcal = 220
[14:31:31.414] <TB2> INFO: Test took 4756ms.
[14:31:31.518] <TB2> INFO: scanning low vcal = 230
[14:31:35.808] <TB2> INFO: Test took 4290ms.
[14:31:35.864] <TB2> INFO: scanning low vcal = 240
[14:31:40.135] <TB2> INFO: Test took 4271ms.
[14:31:40.202] <TB2> INFO: scanning low vcal = 250
[14:31:44.434] <TB2> INFO: Test took 4232ms.
[14:31:44.491] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[14:31:48.717] <TB2> INFO: Test took 4226ms.
[14:31:48.774] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[14:31:52.991] <TB2> INFO: Test took 4217ms.
[14:31:53.048] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[14:31:57.278] <TB2> INFO: Test took 4230ms.
[14:31:57.333] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[14:32:01.601] <TB2> INFO: Test took 4268ms.
[14:32:01.676] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:32:05.875] <TB2> INFO: Test took 4199ms.
[14:32:06.353] <TB2> INFO: PixTestGainPedestal::measure() done
[14:32:37.355] <TB2> INFO: PixTestGainPedestal::fit() done
[14:32:37.355] <TB2> INFO: non-linearity mean: 0.964 0.962 0.957 0.959 0.958 0.961 0.960 0.956 0.967 0.963 0.959 0.961 0.954 0.953 0.961 0.963
[14:32:37.355] <TB2> INFO: non-linearity RMS: 0.006 0.004 0.006 0.006 0.007 0.006 0.007 0.005 0.004 0.005 0.005 0.004 0.008 0.007 0.005 0.005
[14:32:37.355] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[14:32:37.374] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[14:32:37.392] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[14:32:37.410] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[14:32:37.429] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[14:32:37.447] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[14:32:37.465] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[14:32:37.484] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[14:32:37.502] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[14:32:37.520] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[14:32:37.538] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[14:32:37.557] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[14:32:37.575] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[14:32:37.593] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[14:32:37.611] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[14:32:37.630] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[14:32:37.648] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 165 seconds
[14:32:37.654] <TB2> INFO: enter test to run
[14:32:37.654] <TB2> INFO: test: exit no parameter change
[14:32:38.088] <TB2> QUIET: Connection to board 156 closed.
[14:32:38.168] <TB2> INFO: pXar: this is the end, my friend