[08:37:58.084] <TB2> INFO: *** Welcome to pxar ***
[08:37:58.084] <TB2> INFO: *** Today: 2015/08/19
[08:37:58.085] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C15.dat
[08:37:58.086] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//tbmParameters_C0b.dat
[08:37:58.086] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//defaultMaskFile.dat
[08:37:58.086] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters_C15.dat
[08:37:58.181] <TB2> INFO: clk: 4
[08:37:58.181] <TB2> INFO: ctr: 4
[08:37:58.181] <TB2> INFO: sda: 19
[08:37:58.181] <TB2> INFO: tin: 9
[08:37:58.181] <TB2> INFO: level: 15
[08:37:58.181] <TB2> INFO: triggerdelay: 0
[08:37:58.181] <TB2> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[08:37:58.181] <TB2> INFO: Log level: INFO
[08:37:58.188] <TB2> INFO: Found DTB DTB_WXC55Z
[08:37:58.196] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[08:37:58.199] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[08:37:58.202] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[08:37:59.726] <TB2> INFO: DUT info:
[08:37:59.726] <TB2> INFO: The DUT currently contains the following objects:
[08:37:59.726] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:37:59.726] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:37:59.726] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:37:59.726] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[08:37:59.726] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:59.726] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:59.726] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:59.726] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:59.726] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:59.726] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:59.726] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:59.726] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:59.726] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:59.726] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:59.726] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:59.726] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:59.727] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:59.727] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:59.727] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:59.727] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[08:38:00.128] <TB2> INFO: enter 'restricted' command line mode
[08:38:00.128] <TB2> INFO: enter test to run
[08:38:00.128] <TB2> INFO: test: pretest no parameter change
[08:38:00.128] <TB2> INFO: running: pretest
[08:38:00.135] <TB2> INFO: ######################################################################
[08:38:00.135] <TB2> INFO: PixTestPretest::doTest()
[08:38:00.135] <TB2> INFO: ######################################################################
[08:38:00.137] <TB2> INFO: ----------------------------------------------------------------------
[08:38:00.137] <TB2> INFO: PixTestPretest::programROC()
[08:38:00.137] <TB2> INFO: ----------------------------------------------------------------------
[08:38:18.155] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[08:38:18.155] <TB2> INFO: IA differences per ROC: 18.5 19.3 20.1 20.1 19.3 17.7 20.1 18.5 18.5 20.1 16.9 19.3 20.9 19.3 18.5 17.7
[08:38:18.223] <TB2> INFO: ----------------------------------------------------------------------
[08:38:18.223] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[08:38:18.223] <TB2> INFO: ----------------------------------------------------------------------
[08:38:22.699] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 391.5 mA = 24.4688 mA/ROC
[08:38:22.702] <TB2> INFO: ----------------------------------------------------------------------
[08:38:22.702] <TB2> INFO: PixTestPretest::findWorkingPixel()
[08:38:22.702] <TB2> INFO: ----------------------------------------------------------------------
[08:38:31.533] <TB2> INFO: Test took 8825ms.
[08:38:31.824] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[08:38:31.858] <TB2> INFO: ----------------------------------------------------------------------
[08:38:31.858] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[08:38:31.858] <TB2> INFO: ----------------------------------------------------------------------
[08:38:40.252] <TB2> INFO: Test took 8390ms.
[08:38:40.571] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[08:38:40.571] <TB2> INFO: CalDel: 146 154 157 144 137 127 162 143 114 162 143 150 136 148 149 137
[08:38:40.571] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[08:38:40.575] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C0.dat
[08:38:40.576] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C1.dat
[08:38:40.576] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C2.dat
[08:38:40.576] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C3.dat
[08:38:40.577] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C4.dat
[08:38:40.577] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C5.dat
[08:38:40.577] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C6.dat
[08:38:40.578] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C7.dat
[08:38:40.578] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C8.dat
[08:38:40.578] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C9.dat
[08:38:40.578] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C10.dat
[08:38:40.579] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C11.dat
[08:38:40.579] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C12.dat
[08:38:40.579] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C13.dat
[08:38:40.580] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C14.dat
[08:38:40.580] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C15.dat
[08:38:40.580] <TB2> INFO: PixTestPretest::doTest() done, duration: 40 seconds
[08:38:40.693] <TB2> INFO: enter test to run
[08:38:40.693] <TB2> INFO: test: fulltest no parameter change
[08:38:40.693] <TB2> INFO: running: fulltest
[08:38:40.693] <TB2> INFO: ######################################################################
[08:38:40.693] <TB2> INFO: PixTestFullTest::doTest()
[08:38:40.693] <TB2> INFO: ######################################################################
[08:38:40.695] <TB2> INFO: ######################################################################
[08:38:40.695] <TB2> INFO: PixTestAlive::doTest()
[08:38:40.695] <TB2> INFO: ######################################################################
[08:38:40.697] <TB2> INFO: ----------------------------------------------------------------------
[08:38:40.697] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:38:40.697] <TB2> INFO: ----------------------------------------------------------------------
[08:38:44.202] <TB2> INFO: Test took 3504ms.
[08:38:44.229] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:44.450] <TB2> INFO: PixTestAlive::aliveTest() done
[08:38:44.450] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
[08:38:44.452] <TB2> INFO: ----------------------------------------------------------------------
[08:38:44.452] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:38:44.452] <TB2> INFO: ----------------------------------------------------------------------
[08:38:47.237] <TB2> INFO: Test took 2784ms.
[08:38:47.240] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:47.241] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[08:38:47.470] <TB2> INFO: PixTestAlive::maskTest() done
[08:38:47.470] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:38:47.471] <TB2> INFO: ----------------------------------------------------------------------
[08:38:47.472] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:38:47.472] <TB2> INFO: ----------------------------------------------------------------------
[08:38:51.088] <TB2> INFO: Test took 3614ms.
[08:38:51.110] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:51.340] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[08:38:51.340] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:38:51.340] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[08:38:51.351] <TB2> INFO: ######################################################################
[08:38:51.351] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[08:38:51.351] <TB2> INFO: ######################################################################
[08:38:51.354] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[08:38:51.432] <TB2> INFO: dacScan step from 0 .. 29
[08:39:14.250] <TB2> INFO: Test took 22818ms.
[08:39:14.282] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:39:14.285] <TB2> INFO: dacScan step from 30 .. 59
[08:39:38.865] <TB2> INFO: Test took 24580ms.
[08:39:38.980] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:39:38.997] <TB2> INFO: dacScan step from 60 .. 89
[08:40:09.549] <TB2> INFO: Test took 30551ms.
[08:40:09.821] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:09.894] <TB2> INFO: dacScan step from 90 .. 119
[08:40:40.274] <TB2> INFO: Test took 30380ms.
[08:40:40.537] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:40.618] <TB2> INFO: dacScan step from 120 .. 149
[08:41:04.779] <TB2> INFO: Test took 24161ms.
[08:41:04.964] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:29.872] <TB2> INFO: PixTestBBMap::doTest() done, duration: 158 seconds
[08:41:29.872] <TB2> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 4
[08:41:29.872] <TB2> INFO: separation cut (per ROC): 91 91 99 103 98 101 93 76 75 82 85 82 97 92 68 73
[08:41:29.942] <TB2> INFO: ######################################################################
[08:41:29.942] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[08:41:29.942] <TB2> INFO: ######################################################################
[08:41:29.943] <TB2> INFO: ----------------------------------------------------------------------
[08:41:29.943] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[08:41:29.943] <TB2> INFO: ----------------------------------------------------------------------
[08:41:29.943] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[08:41:29.951] <TB2> INFO: dacScan step from 0 .. 3
[08:41:51.283] <TB2> INFO: Test took 21332ms.
[08:41:51.307] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:51.310] <TB2> INFO: dacScan step from 4 .. 7
[08:42:12.641] <TB2> INFO: Test took 21331ms.
[08:42:12.665] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:12.667] <TB2> INFO: dacScan step from 8 .. 11
[08:42:33.736] <TB2> INFO: Test took 21069ms.
[08:42:33.761] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:33.761] <TB2> INFO: dacScan step from 12 .. 15
[08:42:54.990] <TB2> INFO: Test took 21229ms.
[08:42:55.021] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:55.021] <TB2> INFO: dacScan step from 16 .. 19
[08:43:15.922] <TB2> INFO: Test took 20901ms.
[08:43:15.949] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:15.950] <TB2> INFO: dacScan step from 20 .. 23
[08:43:36.928] <TB2> INFO: Test took 20978ms.
[08:43:36.955] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:36.955] <TB2> INFO: dacScan step from 24 .. 27
[08:43:57.824] <TB2> INFO: Test took 20869ms.
[08:43:57.849] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:57.849] <TB2> INFO: dacScan step from 28 .. 31
[08:44:19.159] <TB2> INFO: Test took 21310ms.
[08:44:19.190] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:19.190] <TB2> INFO: dacScan step from 32 .. 35
[08:44:40.681] <TB2> INFO: Test took 21491ms.
[08:44:40.709] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:40.709] <TB2> INFO: dacScan step from 36 .. 39
[08:45:01.852] <TB2> INFO: Test took 21143ms.
[08:45:01.878] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:01.878] <TB2> INFO: dacScan step from 40 .. 43
[08:45:23.412] <TB2> INFO: Test took 21534ms.
[08:45:23.440] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:23.440] <TB2> INFO: dacScan step from 44 .. 47
[08:45:44.074] <TB2> INFO: Test took 20634ms.
[08:45:44.100] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:44.100] <TB2> INFO: dacScan step from 48 .. 51
[08:46:05.164] <TB2> INFO: Test took 21064ms.
[08:46:05.196] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:46:05.196] <TB2> INFO: dacScan step from 52 .. 55
[08:46:26.619] <TB2> INFO: Test took 21423ms.
[08:46:26.647] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:46:26.647] <TB2> INFO: dacScan step from 56 .. 59
[08:46:47.546] <TB2> INFO: Test took 20899ms.
[08:46:47.575] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:46:47.575] <TB2> INFO: dacScan step from 60 .. 63
[08:47:08.066] <TB2> INFO: Test took 20491ms.
[08:47:08.098] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:47:08.098] <TB2> INFO: dacScan step from 64 .. 67
[08:47:29.671] <TB2> INFO: Test took 21573ms.
[08:47:29.724] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:47:29.726] <TB2> INFO: dacScan step from 68 .. 71
[08:47:51.927] <TB2> INFO: Test took 22201ms.
[08:47:51.996] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:47:51.999] <TB2> INFO: dacScan step from 72 .. 75
[08:48:13.960] <TB2> INFO: Test took 21961ms.
[08:48:14.057] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:48:14.061] <TB2> INFO: dacScan step from 76 .. 79
[08:48:36.840] <TB2> INFO: Test took 22779ms.
[08:48:36.968] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:48:36.976] <TB2> INFO: dacScan step from 80 .. 83
[08:49:02.361] <TB2> INFO: Test took 25385ms.
[08:49:02.534] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:49:02.545] <TB2> INFO: dacScan step from 84 .. 87





[08:49:28.909] <TB2> INFO: Test took 26363ms.
[08:49:29.114] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:49:29.127] <TB2> INFO: dacScan step from 88 .. 91

[08:49:58.974] <TB2> INFO: Test took 29847ms.
[08:49:59.186] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:49:59.196] <TB2> INFO: dacScan step from 92 .. 95


[08:50:30.262] <TB2> INFO: Test took 31066ms.
[08:50:30.510] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:50:30.524] <TB2> INFO: dacScan step from 96 .. 99
[08:51:01.816] <TB2> INFO: Test took 31292ms.
[08:51:02.050] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:51:02.064] <TB2> INFO: dacScan step from 100 .. 103

[08:51:34.258] <TB2> INFO: Test took 32194ms.
[08:51:34.505] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:51:34.517] <TB2> INFO: dacScan step from 104 .. 107


[08:52:06.598] <TB2> INFO: Test took 32081ms.
[08:52:06.857] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:52:06.870] <TB2> INFO: dacScan step from 108 .. 111

[08:52:38.584] <TB2> INFO: Test took 31714ms.
[08:52:38.841] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:52:38.853] <TB2> INFO: dacScan step from 112 .. 115

[08:53:11.344] <TB2> INFO: Test took 32490ms.
[08:53:11.585] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:53:11.600] <TB2> INFO: dacScan step from 116 .. 119





[08:53:43.729] <TB2> INFO: Test took 32129ms.
[08:53:43.960] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:53:43.973] <TB2> INFO: dacScan step from 120 .. 123
[08:54:16.928] <TB2> INFO: Test took 32954ms.
[08:54:17.178] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:54:17.191] <TB2> INFO: dacScan step from 124 .. 127
[08:54:49.874] <TB2> INFO: Test took 32683ms.
[08:54:50.103] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:54:50.115] <TB2> INFO: dacScan step from 128 .. 131
[08:55:22.023] <TB2> INFO: Test took 31908ms.
[08:55:22.268] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:55:22.279] <TB2> INFO: dacScan step from 132 .. 135
[08:55:54.565] <TB2> INFO: Test took 32286ms.
[08:55:54.811] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:55:54.824] <TB2> INFO: dacScan step from 136 .. 139
[08:56:27.237] <TB2> INFO: Test took 32412ms.
[08:56:27.492] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:27.505] <TB2> INFO: dacScan step from 140 .. 143
[08:56:58.042] <TB2> INFO: Test took 30537ms.
[08:56:58.279] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:58.292] <TB2> INFO: dacScan step from 144 .. 147
[08:57:29.522] <TB2> INFO: Test took 31230ms.
[08:57:29.745] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:57:29.760] <TB2> INFO: dacScan step from 148 .. 149
[08:57:44.286] <TB2> INFO: Test took 14526ms.
[08:57:44.408] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:57:44.416] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:57:45.912] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:57:47.296] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:57:48.748] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:57:50.187] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:57:51.587] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:57:52.996] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:57:54.406] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:57:55.853] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:57:57.268] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:57:58.659] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:58:00.043] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:58:01.475] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:58:02.868] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:58:04.288] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:58:05.772] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:58:07.259] <TB2> INFO: PixTestScurves::scurves() done
[08:58:07.259] <TB2> INFO: Vcal mean: 86.05 80.65 91.21 84.63 89.33 82.64 95.60 69.99 76.15 81.57 84.58 78.07 87.47 79.93 72.84 73.52
[08:58:07.259] <TB2> INFO: Vcal RMS: 5.25 4.99 5.77 5.54 5.06 5.00 5.64 5.25 4.13 4.73 5.73 5.12 6.03 4.60 4.36 5.05
[08:58:07.259] <TB2> INFO: PixTestScurves::fullTest() done, duration: 997 seconds
[08:58:07.344] <TB2> INFO: ######################################################################
[08:58:07.344] <TB2> INFO: PixTestTrim::doTest()
[08:58:07.344] <TB2> INFO: ######################################################################
[08:58:07.346] <TB2> INFO: ----------------------------------------------------------------------
[08:58:07.346] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[08:58:07.346] <TB2> INFO: ----------------------------------------------------------------------
[08:58:07.446] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[08:58:07.446] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[08:58:07.456] <TB2> INFO: dacScan step from 0 .. 19
[08:58:23.122] <TB2> INFO: Test took 15666ms.
[08:58:23.144] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:58:23.144] <TB2> INFO: dacScan step from 20 .. 39
[08:58:38.794] <TB2> INFO: Test took 15650ms.
[08:58:38.823] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:58:38.823] <TB2> INFO: dacScan step from 40 .. 59
[08:58:54.617] <TB2> INFO: Test took 15793ms.
[08:58:54.642] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:58:54.642] <TB2> INFO: dacScan step from 60 .. 79
[08:59:10.044] <TB2> INFO: Test took 15402ms.
[08:59:10.073] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:59:10.074] <TB2> INFO: dacScan step from 80 .. 99
[08:59:27.299] <TB2> INFO: Test took 17225ms.
[08:59:27.406] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:59:27.424] <TB2> INFO: dacScan step from 100 .. 119
[08:59:48.674] <TB2> INFO: Test took 21250ms.
[08:59:48.832] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:59:48.870] <TB2> INFO: dacScan step from 120 .. 139
[09:00:08.978] <TB2> INFO: Test took 20108ms.
[09:00:09.189] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:00:09.242] <TB2> INFO: dacScan step from 140 .. 159
[09:00:24.540] <TB2> INFO: Test took 15298ms.
[09:00:24.602] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:00:49.556] <TB2> INFO: ROC 0 VthrComp = 91
[09:00:49.556] <TB2> INFO: ROC 1 VthrComp = 86
[09:00:49.556] <TB2> INFO: ROC 2 VthrComp = 96
[09:00:49.556] <TB2> INFO: ROC 3 VthrComp = 93
[09:00:49.557] <TB2> INFO: ROC 4 VthrComp = 97
[09:00:49.557] <TB2> INFO: ROC 5 VthrComp = 92
[09:00:49.557] <TB2> INFO: ROC 6 VthrComp = 97
[09:00:49.557] <TB2> INFO: ROC 7 VthrComp = 75
[09:00:49.557] <TB2> INFO: ROC 8 VthrComp = 84
[09:00:49.557] <TB2> INFO: ROC 9 VthrComp = 90
[09:00:49.557] <TB2> INFO: ROC 10 VthrComp = 85
[09:00:49.557] <TB2> INFO: ROC 11 VthrComp = 81
[09:00:49.557] <TB2> INFO: ROC 12 VthrComp = 94
[09:00:49.557] <TB2> INFO: ROC 13 VthrComp = 87
[09:00:49.558] <TB2> INFO: ROC 14 VthrComp = 79
[09:00:49.558] <TB2> INFO: ROC 15 VthrComp = 77
[09:00:49.558] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:00:49.558] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:00:49.567] <TB2> INFO: dacScan step from 0 .. 19
[09:01:04.934] <TB2> INFO: Test took 15367ms.
[09:01:04.960] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:04.960] <TB2> INFO: dacScan step from 20 .. 39
[09:01:21.139] <TB2> INFO: Test took 16179ms.
[09:01:21.171] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:21.174] <TB2> INFO: dacScan step from 40 .. 59
[09:01:42.537] <TB2> INFO: Test took 21363ms.
[09:01:42.689] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:42.726] <TB2> INFO: dacScan step from 60 .. 79
[09:02:04.171] <TB2> INFO: Test took 21445ms.
[09:02:04.329] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:04.383] <TB2> INFO: dacScan step from 80 .. 99
[09:02:26.278] <TB2> INFO: Test took 21895ms.
[09:02:26.455] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:26.509] <TB2> INFO: dacScan step from 100 .. 119
[09:02:48.964] <TB2> INFO: Test took 22455ms.
[09:02:49.121] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:49.169] <TB2> INFO: dacScan step from 120 .. 139
[09:03:11.462] <TB2> INFO: Test took 22293ms.
[09:03:11.631] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:03:11.681] <TB2> INFO: dacScan step from 140 .. 159
[09:03:30.646] <TB2> INFO: Test took 18965ms.
[09:03:30.801] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:03:54.939] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 59.0829 for pixel 0/19 mean/min/max = 45.6536/32.1971/59.1101
[09:03:54.939] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 59.1043 for pixel 8/47 mean/min/max = 45.4919/31.5921/59.3916
[09:03:54.939] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 59.3548 for pixel 17/2 mean/min/max = 45.4342/31.4913/59.3771
[09:03:54.940] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.5746 for pixel 0/63 mean/min/max = 45.4083/31.2346/59.582
[09:03:54.940] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 57.2384 for pixel 0/73 mean/min/max = 44.2993/31.2853/57.3132
[09:03:54.940] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 58.3528 for pixel 35/78 mean/min/max = 45.543/32.651/58.4351
[09:03:54.941] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 60.268 for pixel 0/44 mean/min/max = 46.2008/32.0757/60.3258
[09:03:54.941] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 61.6798 for pixel 0/58 mean/min/max = 48.0597/34.3437/61.7757
[09:03:54.942] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 55.7313 for pixel 8/8 mean/min/max = 44.3557/32.8527/55.8586
[09:03:54.942] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 58.0032 for pixel 1/78 mean/min/max = 45.2511/32.3535/58.1486
[09:03:54.943] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 61.199 for pixel 18/3 mean/min/max = 46.2522/31.2465/61.2579
[09:03:54.943] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 60.6828 for pixel 5/42 mean/min/max = 46.3869/32.0041/60.7697
[09:03:54.943] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 60.6899 for pixel 0/17 mean/min/max = 45.8784/30.9948/60.7621
[09:03:54.944] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 58.049 for pixel 42/0 mean/min/max = 44.8077/31.549/58.0663
[09:03:54.944] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 57.023 for pixel 0/17 mean/min/max = 45.9687/34.9142/57.0232
[09:03:54.944] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 61.4334 for pixel 0/12 mean/min/max = 47.9403/34.3922/61.4884
[09:03:54.945] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:05:35.996] <TB2> INFO: Test took 101051ms.
[09:05:37.509] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:05:37.518] <TB2> INFO: dacScan step from 0 .. 19
[09:06:02.060] <TB2> INFO: Test took 24542ms.
[09:06:02.113] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:02.116] <TB2> INFO: dacScan step from 20 .. 39
[09:06:33.052] <TB2> INFO: Test took 30936ms.
[09:06:33.278] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:33.309] <TB2> INFO: dacScan step from 40 .. 59


[09:07:08.808] <TB2> INFO: Test took 35499ms.
[09:07:09.077] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:09.124] <TB2> INFO: dacScan step from 60 .. 79


[09:07:44.015] <TB2> INFO: Test took 34891ms.
[09:07:44.286] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:44.335] <TB2> INFO: dacScan step from 80 .. 99





[09:08:19.263] <TB2> INFO: Test took 34928ms.
[09:08:19.542] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:19.592] <TB2> INFO: dacScan step from 100 .. 119
[09:08:54.934] <TB2> INFO: Test took 35342ms.
[09:08:55.235] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:55.288] <TB2> INFO: dacScan step from 120 .. 139


[09:09:29.195] <TB2> INFO: Test took 33907ms.
[09:09:29.463] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:09:29.517] <TB2> INFO: dacScan step from 140 .. 159


[09:10:04.223] <TB2> INFO: Test took 34706ms.
[09:10:04.517] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:10:04.567] <TB2> INFO: dacScan step from 160 .. 179


[09:10:40.154] <TB2> INFO: Test took 35587ms.
[09:10:40.422] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:10:40.473] <TB2> INFO: dacScan step from 180 .. 199


[09:11:12.566] <TB2> INFO: Test took 32093ms.
[09:11:12.841] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:38.943] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.016896 .. 255.000000
[09:11:39.024] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[09:11:39.033] <TB2> INFO: dacScan step from 0 .. 19
[09:11:52.806] <TB2> INFO: Test took 13773ms.
[09:11:52.831] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:52.831] <TB2> INFO: dacScan step from 20 .. 39
[09:12:08.917] <TB2> INFO: Test took 16086ms.
[09:12:08.998] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:09.013] <TB2> INFO: dacScan step from 40 .. 59
[09:12:28.473] <TB2> INFO: Test took 19460ms.
[09:12:28.623] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:28.692] <TB2> INFO: dacScan step from 60 .. 79
[09:12:48.460] <TB2> INFO: Test took 19767ms.
[09:12:48.611] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:48.670] <TB2> INFO: dacScan step from 80 .. 99
[09:13:08.058] <TB2> INFO: Test took 19387ms.
[09:13:08.206] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:08.277] <TB2> INFO: dacScan step from 100 .. 119
[09:13:27.489] <TB2> INFO: Test took 19212ms.
[09:13:27.720] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:27.806] <TB2> INFO: dacScan step from 120 .. 139
[09:13:46.393] <TB2> INFO: Test took 18586ms.
[09:13:46.529] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:46.591] <TB2> INFO: dacScan step from 140 .. 159
[09:14:05.962] <TB2> INFO: Test took 19371ms.
[09:14:06.131] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:06.189] <TB2> INFO: dacScan step from 160 .. 179
[09:14:25.482] <TB2> INFO: Test took 19293ms.
[09:14:25.640] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:25.693] <TB2> INFO: dacScan step from 180 .. 199
[09:14:45.356] <TB2> INFO: Test took 19663ms.
[09:14:45.491] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:45.544] <TB2> INFO: dacScan step from 200 .. 219
[09:15:04.381] <TB2> INFO: Test took 18837ms.
[09:15:04.529] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:15:04.579] <TB2> INFO: dacScan step from 220 .. 239
[09:15:23.585] <TB2> INFO: Test took 19006ms.
[09:15:23.778] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:15:23.836] <TB2> INFO: dacScan step from 240 .. 255
[09:15:37.886] <TB2> INFO: Test took 14050ms.
[09:15:38.068] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:10.642] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 11.523178 .. 68.891358
[09:16:10.720] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 1 .. 78 (20) hits flags = 16 (plus default)
[09:16:10.728] <TB2> INFO: dacScan step from 1 .. 20
[09:16:24.507] <TB2> INFO: Test took 13779ms.
[09:16:24.529] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:24.530] <TB2> INFO: dacScan step from 21 .. 40
[09:16:39.670] <TB2> INFO: Test took 15140ms.
[09:16:39.781] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:39.807] <TB2> INFO: dacScan step from 41 .. 60
[09:16:56.723] <TB2> INFO: Test took 16916ms.
[09:16:56.888] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:56.940] <TB2> INFO: dacScan step from 61 .. 78
[09:17:13.509] <TB2> INFO: Test took 16569ms.
[09:17:13.632] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:34.436] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 18.717332 .. 68.891358
[09:17:34.555] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 8 .. 78 (20) hits flags = 16 (plus default)
[09:17:34.566] <TB2> INFO: dacScan step from 8 .. 27
[09:17:47.866] <TB2> INFO: Test took 13300ms.
[09:17:47.885] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:47.885] <TB2> INFO: dacScan step from 28 .. 47
[09:18:03.617] <TB2> INFO: Test took 15732ms.
[09:18:03.749] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:03.798] <TB2> INFO: dacScan step from 48 .. 67
[09:18:20.919] <TB2> INFO: Test took 17121ms.
[09:18:21.061] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:21.124] <TB2> INFO: dacScan step from 68 .. 78
[09:18:31.634] <TB2> INFO: Test took 10510ms.
[09:18:31.712] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:51.358] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 0.834923 .. 68.891358
[09:18:51.434] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 0 .. 78 (20) hits flags = 16 (plus default)
[09:18:51.443] <TB2> INFO: dacScan step from 0 .. 19
[09:19:04.822] <TB2> INFO: Test took 13378ms.
[09:19:04.841] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:04.841] <TB2> INFO: dacScan step from 20 .. 39
[09:19:19.470] <TB2> INFO: Test took 14629ms.
[09:19:19.542] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:19.564] <TB2> INFO: dacScan step from 40 .. 59
[09:19:37.219] <TB2> INFO: Test took 17655ms.
[09:19:37.397] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:37.451] <TB2> INFO: dacScan step from 60 .. 78
[09:19:53.272] <TB2> INFO: Test took 15821ms.
[09:19:53.403] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:12.851] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[09:20:12.851] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[09:20:12.861] <TB2> INFO: dacScan step from 15 .. 34
[09:20:38.034] <TB2> INFO: Test took 25173ms.
[09:20:38.099] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:38.111] <TB2> INFO: dacScan step from 35 .. 54


[09:21:13.246] <TB2> INFO: Test took 35135ms.
[09:21:13.532] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:13.582] <TB2> INFO: dacScan step from 55 .. 55
[09:21:17.917] <TB2> INFO: Test took 4335ms.
[09:21:17.936] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:31.220] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:21:31.220] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:21:31.220] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:21:31.221] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:21:31.221] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:21:31.221] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:21:31.222] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:21:31.222] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:21:31.222] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:21:31.222] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:21:31.223] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:21:31.223] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:21:31.223] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:21:31.224] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:21:31.224] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:21:31.224] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:21:31.225] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C0.dat
[09:21:31.238] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C1.dat
[09:21:31.244] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C2.dat
[09:21:31.250] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C3.dat
[09:21:31.256] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C4.dat
[09:21:31.262] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C5.dat
[09:21:31.268] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C6.dat
[09:21:31.275] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C7.dat
[09:21:31.281] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C8.dat
[09:21:31.287] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C9.dat
[09:21:31.293] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C10.dat
[09:21:31.299] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C11.dat
[09:21:31.305] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C12.dat
[09:21:31.311] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C13.dat
[09:21:31.317] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C14.dat
[09:21:31.323] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C15.dat
[09:21:31.330] <TB2> INFO: PixTestTrim::trimTest() done
[09:21:31.330] <TB2> INFO: vtrim: 108 111 108 113 106 114 108 105 113 105 173 121 112 99 92 112
[09:21:31.330] <TB2> INFO: vthrcomp: 91 86 96 93 97 92 97 75 84 90 85 81 94 87 79 77
[09:21:31.330] <TB2> INFO: vcal mean: 35.03 34.99 35.00 34.96 35.02 34.98 35.05 35.04 35.02 35.05 35.01 35.01 35.05 35.00 35.06 35.07
[09:21:31.330] <TB2> INFO: vcal RMS: 0.97 0.98 1.04 0.95 1.02 0.98 1.03 0.92 1.06 0.99 4.00 1.00 1.03 1.01 0.94 1.01
[09:21:31.330] <TB2> INFO: bits mean: 9.43 10.09 9.88 9.62 10.26 10.20 9.27 8.56 10.25 9.76 11.68 9.80 9.45 10.04 8.86 9.26
[09:21:31.330] <TB2> INFO: bits RMS: 2.70 2.46 2.61 2.71 2.51 2.25 2.80 2.63 2.33 2.54 1.70 2.51 2.83 2.62 2.57 2.37
[09:21:31.337] <TB2> INFO: ----------------------------------------------------------------------
[09:21:31.337] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[09:21:31.337] <TB2> INFO: ----------------------------------------------------------------------
[09:21:31.340] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:21:31.349] <TB2> INFO: dacScan step from 0 .. 19
[09:21:55.539] <TB2> INFO: Test took 24190ms.
[09:21:55.575] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:55.575] <TB2> INFO: dacScan step from 20 .. 39
[09:22:20.087] <TB2> INFO: Test took 24512ms.
[09:22:20.120] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:20.120] <TB2> INFO: dacScan step from 40 .. 59
[09:22:44.345] <TB2> INFO: Test took 24225ms.
[09:22:44.389] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:44.389] <TB2> INFO: dacScan step from 60 .. 79
[09:23:07.150] <TB2> INFO: Test took 22761ms.
[09:23:07.188] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:23:07.188] <TB2> INFO: dacScan step from 80 .. 99
[09:23:32.853] <TB2> INFO: Test took 25665ms.
[09:23:32.937] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:23:32.945] <TB2> INFO: dacScan step from 100 .. 119
[09:24:07.528] <TB2> INFO: Test took 34583ms.
[09:24:07.773] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:07.802] <TB2> INFO: dacScan step from 120 .. 139


[09:24:44.854] <TB2> INFO: Test took 37052ms.
[09:24:45.155] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:45.207] <TB2> INFO: dacScan step from 140 .. 159

[09:25:15.916] <TB2> INFO: Test took 30709ms.
[09:25:16.182] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:16.234] <TB2> INFO: dacScan step from 160 .. 179
[09:25:52.414] <TB2> INFO: Test took 36180ms.
[09:25:52.671] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:52.718] <TB2> INFO: dacScan step from 180 .. 199
[09:26:26.658] <TB2> INFO: Test took 33940ms.
[09:26:26.925] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:26:53.149] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:26:53.158] <TB2> INFO: dacScan step from 0 .. 19
[09:27:15.911] <TB2> INFO: Test took 22753ms.
[09:27:15.944] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:27:15.944] <TB2> INFO: dacScan step from 20 .. 39
[09:27:41.960] <TB2> INFO: Test took 26016ms.
[09:27:41.996] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:27:41.996] <TB2> INFO: dacScan step from 40 .. 59
[09:28:05.974] <TB2> INFO: Test took 23978ms.
[09:28:06.009] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:06.009] <TB2> INFO: dacScan step from 60 .. 79
[09:28:29.710] <TB2> INFO: Test took 23701ms.
[09:28:29.756] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:29.757] <TB2> INFO: dacScan step from 80 .. 99
[09:28:59.534] <TB2> INFO: Test took 29777ms.
[09:28:59.701] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:59.719] <TB2> INFO: dacScan step from 100 .. 119
[09:29:34.442] <TB2> INFO: Test took 34723ms.
[09:29:34.867] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:34.940] <TB2> INFO: dacScan step from 120 .. 139


[09:30:08.387] <TB2> INFO: Test took 33447ms.
[09:30:08.664] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:08.718] <TB2> INFO: dacScan step from 140 .. 159
[09:30:44.043] <TB2> INFO: Test took 35325ms.
[09:30:44.316] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:06.638] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 149 (20) hits flags = 16 (plus default)
[09:31:06.647] <TB2> INFO: dacScan step from 0 .. 19
[09:31:29.001] <TB2> INFO: Test took 22354ms.
[09:31:29.038] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:29.038] <TB2> INFO: dacScan step from 20 .. 39
[09:31:52.880] <TB2> INFO: Test took 23842ms.
[09:31:52.920] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:52.920] <TB2> INFO: dacScan step from 40 .. 59
[09:32:18.213] <TB2> INFO: Test took 25293ms.
[09:32:18.247] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:18.247] <TB2> INFO: dacScan step from 60 .. 79
[09:32:43.129] <TB2> INFO: Test took 24882ms.
[09:32:43.174] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:43.174] <TB2> INFO: dacScan step from 80 .. 99
[09:33:08.301] <TB2> INFO: Test took 25127ms.
[09:33:08.461] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:08.477] <TB2> INFO: dacScan step from 100 .. 119





[09:33:39.312] <TB2> INFO: Test took 30835ms.
[09:33:39.575] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:39.619] <TB2> INFO: dacScan step from 120 .. 139





[09:34:14.720] <TB2> INFO: Test took 35101ms.
[09:34:15.057] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:15.108] <TB2> INFO: dacScan step from 140 .. 149
[09:34:34.807] <TB2> INFO: Test took 19699ms.
[09:34:34.943] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:59.038] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 148 (20) hits flags = 16 (plus default)
[09:34:59.046] <TB2> INFO: dacScan step from 0 .. 19
[09:35:22.272] <TB2> INFO: Test took 23226ms.
[09:35:22.304] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:22.304] <TB2> INFO: dacScan step from 20 .. 39
[09:35:47.306] <TB2> INFO: Test took 25002ms.
[09:35:47.339] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:47.339] <TB2> INFO: dacScan step from 40 .. 59
[09:36:12.234] <TB2> INFO: Test took 24895ms.
[09:36:12.267] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:12.267] <TB2> INFO: dacScan step from 60 .. 79
[09:36:33.781] <TB2> INFO: Test took 21514ms.
[09:36:33.819] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:33.819] <TB2> INFO: dacScan step from 80 .. 99
[09:37:02.051] <TB2> INFO: Test took 28232ms.
[09:37:02.211] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:02.228] <TB2> INFO: dacScan step from 100 .. 119



[09:37:36.046] <TB2> INFO: Test took 33818ms.
[09:37:36.446] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:36.492] <TB2> INFO: dacScan step from 120 .. 139
[09:38:09.908] <TB2> INFO: Test took 33415ms.
[09:38:10.212] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:10.265] <TB2> INFO: dacScan step from 140 .. 148
[09:38:26.806] <TB2> INFO: Test took 16541ms.
[09:38:26.930] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:50.516] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 149 (20) hits flags = 16 (plus default)
[09:38:50.526] <TB2> INFO: dacScan step from 0 .. 19
[09:39:12.053] <TB2> INFO: Test took 21527ms.
[09:39:12.090] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:12.090] <TB2> INFO: dacScan step from 20 .. 39
[09:39:35.640] <TB2> INFO: Test took 23550ms.
[09:39:35.678] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:35.678] <TB2> INFO: dacScan step from 40 .. 59
[09:39:58.814] <TB2> INFO: Test took 23136ms.
[09:39:58.855] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:58.855] <TB2> INFO: dacScan step from 60 .. 79
[09:40:22.597] <TB2> INFO: Test took 23742ms.
[09:40:22.645] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:22.645] <TB2> INFO: dacScan step from 80 .. 99
[09:40:52.273] <TB2> INFO: Test took 29627ms.
[09:40:52.449] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:52.466] <TB2> INFO: dacScan step from 100 .. 119



[09:41:28.136] <TB2> INFO: Test took 35670ms.
[09:41:28.420] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:28.465] <TB2> INFO: dacScan step from 120 .. 139

[09:42:00.919] <TB2> INFO: Test took 32454ms.
[09:42:01.213] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:01.265] <TB2> INFO: dacScan step from 140 .. 149
[09:42:19.393] <TB2> INFO: Test took 18128ms.
[09:42:19.534] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:43.116] <TB2> INFO: PixTestTrim::trimBitTest() done
[09:42:43.118] <TB2> INFO: PixTestTrim::doTest() done, duration: 2675 seconds
[09:42:43.802] <TB2> INFO: ######################################################################
[09:42:43.802] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[09:42:43.802] <TB2> INFO: ######################################################################
[09:42:47.320] <TB2> INFO: Test took 3516ms.
[09:42:47.348] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:51.285] <TB2> INFO: Test took 3740ms.
[09:42:51.368] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:55.040] <TB2> INFO: Test took 3659ms.
[09:42:55.124] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:55.132] <TB2> INFO: The DUT currently contains the following objects:
[09:42:55.132] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:42:55.132] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:42:55.132] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:42:55.132] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:42:55.132] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:55.132] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:55.132] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:55.132] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:55.132] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:55.133] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:55.133] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:55.133] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:55.133] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:55.133] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:55.133] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:55.133] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:55.133] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:55.133] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:55.133] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:55.133] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:56.270] <TB2> INFO: Test took 1137ms.
[09:42:56.271] <TB2> INFO: The DUT currently contains the following objects:
[09:42:56.271] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:42:56.271] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:42:56.271] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:42:56.271] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:42:56.271] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:56.271] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:56.271] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:56.271] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:56.271] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:56.271] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:56.271] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:56.271] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:56.271] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:56.271] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:56.271] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:56.271] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:56.272] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:56.272] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:56.272] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:56.272] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:57.380] <TB2> INFO: Test took 1108ms.
[09:42:57.381] <TB2> INFO: The DUT currently contains the following objects:
[09:42:57.381] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:42:57.381] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:42:57.381] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:42:57.381] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:42:57.381] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:57.381] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:57.381] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:57.381] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:57.381] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:57.381] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:57.381] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:57.381] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:57.381] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:57.381] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:57.381] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:57.381] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:57.382] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:57.382] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:57.382] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:57.382] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:58.488] <TB2> INFO: Test took 1106ms.
[09:42:58.489] <TB2> INFO: The DUT currently contains the following objects:
[09:42:58.489] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:42:58.489] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:42:58.489] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:42:58.489] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:42:58.489] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:58.489] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:58.489] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:58.489] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:58.489] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:58.489] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:58.489] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:58.489] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:58.489] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:58.490] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:58.490] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:58.490] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:58.490] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:58.490] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:58.490] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:58.490] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:59.595] <TB2> INFO: Test took 1105ms.
[09:42:59.596] <TB2> INFO: The DUT currently contains the following objects:
[09:42:59.596] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:42:59.596] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:42:59.596] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:42:59.596] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:42:59.596] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:59.596] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:59.596] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:59.596] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:59.596] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:59.596] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:59.596] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:59.596] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:59.596] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:59.596] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:59.596] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:59.596] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:59.596] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:59.596] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:59.596] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:42:59.596] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:00.705] <TB2> INFO: Test took 1109ms.
[09:43:00.706] <TB2> INFO: The DUT currently contains the following objects:
[09:43:00.706] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:43:00.706] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:43:00.706] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:43:00.706] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:43:00.706] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:00.706] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:00.706] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:00.706] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:00.706] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:00.706] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:00.706] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:00.706] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:00.706] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:00.706] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:00.707] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:00.707] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:00.707] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:00.707] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:00.707] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:00.707] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:01.814] <TB2> INFO: Test took 1107ms.
[09:43:01.816] <TB2> INFO: The DUT currently contains the following objects:
[09:43:01.816] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:43:01.816] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:43:01.816] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:43:01.816] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:43:01.816] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:01.816] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:01.816] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:01.816] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:01.816] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:01.816] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:01.816] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:01.816] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:01.816] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:01.816] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:01.816] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:01.816] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:01.816] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:01.816] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:01.816] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:01.816] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:02.923] <TB2> INFO: Test took 1107ms.
[09:43:02.925] <TB2> INFO: The DUT currently contains the following objects:
[09:43:02.925] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:43:02.925] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:43:02.925] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:43:02.925] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:43:02.925] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:02.925] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:02.925] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:02.925] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:02.925] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:02.925] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:02.925] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:02.925] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:02.925] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:02.925] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:02.925] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:02.925] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:02.925] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:02.925] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:02.925] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:02.925] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:04.031] <TB2> INFO: Test took 1106ms.
[09:43:04.033] <TB2> INFO: The DUT currently contains the following objects:
[09:43:04.033] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:43:04.033] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:43:04.033] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:43:04.033] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:43:04.033] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:04.033] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:04.033] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:04.033] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:04.033] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:04.034] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:04.034] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:04.034] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:04.034] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:04.034] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:04.034] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:04.034] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:04.034] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:04.034] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:04.034] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:04.034] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:05.142] <TB2> INFO: Test took 1108ms.
[09:43:05.144] <TB2> INFO: The DUT currently contains the following objects:
[09:43:05.144] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:43:05.144] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:43:05.144] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:43:05.144] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:43:05.144] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:05.144] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:05.144] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:05.144] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:05.144] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:05.144] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:05.144] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:05.144] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:05.144] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:05.144] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:05.144] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:05.145] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:05.145] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:05.145] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:05.145] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:05.145] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:06.281] <TB2> INFO: Test took 1136ms.
[09:43:06.282] <TB2> INFO: The DUT currently contains the following objects:
[09:43:06.282] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:43:06.282] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:43:06.282] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:43:06.282] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:43:06.282] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:06.282] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:06.283] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:06.283] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:06.283] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:06.283] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:06.283] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:06.283] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:06.283] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:06.283] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:06.283] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:06.283] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:06.283] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:06.283] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:06.283] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:06.283] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:07.418] <TB2> INFO: Test took 1135ms.
[09:43:07.419] <TB2> INFO: The DUT currently contains the following objects:
[09:43:07.419] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:43:07.419] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:43:07.419] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:43:07.419] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:43:07.419] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:07.419] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:07.420] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:07.420] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:07.420] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:07.420] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:07.420] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:07.420] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:07.420] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:07.420] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:07.420] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:07.420] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:07.420] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:07.420] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:07.420] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:07.420] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:08.543] <TB2> INFO: Test took 1123ms.
[09:43:08.544] <TB2> INFO: The DUT currently contains the following objects:
[09:43:08.544] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:43:08.544] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:43:08.544] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:43:08.544] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:43:08.544] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:08.544] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:08.545] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:08.545] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:08.545] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:08.545] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:08.545] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:08.545] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:08.545] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:08.545] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:08.545] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:08.545] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:08.545] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:08.545] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:08.545] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:08.545] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:09.651] <TB2> INFO: Test took 1106ms.
[09:43:09.653] <TB2> INFO: The DUT currently contains the following objects:
[09:43:09.653] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:43:09.653] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:43:09.653] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:43:09.653] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:43:09.653] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:09.653] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:09.653] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:09.653] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:09.653] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:09.653] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:09.653] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:09.653] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:09.653] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:09.653] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:09.653] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:09.653] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:09.653] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:09.653] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:09.653] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:09.653] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:10.759] <TB2> INFO: Test took 1106ms.
[09:43:10.760] <TB2> INFO: The DUT currently contains the following objects:
[09:43:10.760] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:43:10.760] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:43:10.760] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:43:10.760] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:43:10.760] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:10.761] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:10.761] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:10.761] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:10.761] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:10.761] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:10.761] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:10.761] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:10.761] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:10.761] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:10.761] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:10.761] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:10.761] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:10.761] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:10.761] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:10.761] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:11.869] <TB2> INFO: Test took 1108ms.
[09:43:11.870] <TB2> INFO: The DUT currently contains the following objects:
[09:43:11.870] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:43:11.870] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:43:11.870] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:43:11.870] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:43:11.870] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:11.870] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:11.870] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:11.870] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:11.870] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:11.870] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:11.870] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:11.870] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:11.870] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:11.870] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:11.870] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:11.870] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:11.870] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:11.870] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:11.871] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:11.871] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:43:13.007] <TB2> INFO: Test took 1136ms.
[09:43:13.011] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:26.889] <TB2> INFO: Test took 253878ms.
[09:47:28.640] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:22.494] <TB2> INFO: Test took 233854ms.
[09:51:23.952] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:51:23.959] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:51:23.965] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:51:23.972] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:51:23.979] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:51:23.986] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:51:23.993] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:51:23.999] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:51:24.006] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:51:24.013] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:51:24.020] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[09:51:24.027] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:51:24.033] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:51:24.040] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:51:24.047] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:51:24.053] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[09:51:24.060] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[09:51:24.067] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[09:51:24.074] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[09:51:24.081] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[09:51:24.087] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[09:51:24.094] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:51:24.101] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:51:24.140] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:51:24.140] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:51:24.140] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:51:24.140] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:51:24.141] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:51:24.141] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:51:24.141] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:51:24.142] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:51:24.142] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:51:24.142] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:51:24.142] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:51:24.143] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:51:24.143] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:51:24.143] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:51:24.143] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:51:24.144] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:51:27.537] <TB2> INFO: Test took 3390ms.
[09:51:31.252] <TB2> INFO: Test took 3445ms.
[09:51:35.025] <TB2> INFO: Test took 3498ms.
[09:51:35.340] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:36.259] <TB2> INFO: Test took 919ms.
[09:51:36.262] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:37.368] <TB2> INFO: Test took 1106ms.
[09:51:37.372] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:38.493] <TB2> INFO: Test took 1121ms.
[09:51:38.496] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:39.606] <TB2> INFO: Test took 1110ms.
[09:51:39.609] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:40.715] <TB2> INFO: Test took 1106ms.
[09:51:40.718] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:41.824] <TB2> INFO: Test took 1106ms.
[09:51:41.827] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:42.947] <TB2> INFO: Test took 1120ms.
[09:51:42.950] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:44.055] <TB2> INFO: Test took 1105ms.
[09:51:44.057] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:45.180] <TB2> INFO: Test took 1123ms.
[09:51:45.184] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:46.296] <TB2> INFO: Test took 1112ms.
[09:51:46.300] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:47.408] <TB2> INFO: Test took 1108ms.
[09:51:47.412] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:48.517] <TB2> INFO: Test took 1105ms.
[09:51:48.521] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:49.628] <TB2> INFO: Test took 1107ms.
[09:51:49.632] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:50.739] <TB2> INFO: Test took 1107ms.
[09:51:50.743] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:51.892] <TB2> INFO: Test took 1149ms.
[09:51:51.896] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:52.999] <TB2> INFO: Test took 1104ms.
[09:51:53.001] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:54.112] <TB2> INFO: Test took 1111ms.
[09:51:54.117] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:55.228] <TB2> INFO: Test took 1112ms.
[09:51:55.233] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:56.339] <TB2> INFO: Test took 1107ms.
[09:51:56.343] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:57.468] <TB2> INFO: Test took 1125ms.
[09:51:57.471] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:58.580] <TB2> INFO: Test took 1109ms.
[09:51:58.585] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:51:59.697] <TB2> INFO: Test took 1112ms.
[09:51:59.702] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:52:00.813] <TB2> INFO: Test took 1112ms.
[09:52:00.818] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:52:01.929] <TB2> INFO: Test took 1111ms.
[09:52:01.933] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:52:03.045] <TB2> INFO: Test took 1112ms.
[09:52:03.049] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:52:04.156] <TB2> INFO: Test took 1107ms.
[09:52:04.160] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:52:05.311] <TB2> INFO: Test took 1152ms.
[09:52:05.315] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:52:06.422] <TB2> INFO: Test took 1107ms.
[09:52:06.426] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:52:07.532] <TB2> INFO: Test took 1107ms.
[09:52:07.537] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:52:08.647] <TB2> INFO: Test took 1110ms.
[09:52:08.651] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:52:09.776] <TB2> INFO: Test took 1125ms.
[09:52:09.781] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:52:10.889] <TB2> INFO: Test took 1109ms.
[09:52:11.420] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 567 seconds
[09:52:11.420] <TB2> INFO: PH scale (per ROC): 81 84 76 76 90 87 73 86 101 91 84 80 78 81 95 92
[09:52:11.420] <TB2> INFO: PH offset (per ROC): 178 154 161 153 157 156 169 148 121 160 148 155 172 144 143 150
[09:52:11.686] <TB2> INFO: ######################################################################
[09:52:11.686] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[09:52:11.686] <TB2> INFO: ######################################################################
[09:52:11.696] <TB2> INFO: scanning low vcal = 10
[09:52:15.544] <TB2> INFO: Test took 3848ms.
[09:52:15.548] <TB2> INFO: scanning low vcal = 20
[09:52:19.486] <TB2> INFO: Test took 3938ms.
[09:52:19.490] <TB2> INFO: scanning low vcal = 30
[09:52:23.526] <TB2> INFO: Test took 4036ms.
[09:52:23.539] <TB2> INFO: scanning low vcal = 40
[09:52:28.049] <TB2> INFO: Test took 4510ms.
[09:52:28.107] <TB2> INFO: scanning low vcal = 50
[09:52:32.676] <TB2> INFO: Test took 4569ms.
[09:52:32.784] <TB2> INFO: scanning low vcal = 60
[09:52:37.372] <TB2> INFO: Test took 4588ms.
[09:52:37.430] <TB2> INFO: scanning low vcal = 70
[09:52:42.027] <TB2> INFO: Test took 4597ms.
[09:52:42.102] <TB2> INFO: scanning low vcal = 80
[09:52:46.606] <TB2> INFO: Test took 4504ms.
[09:52:46.666] <TB2> INFO: scanning low vcal = 90
[09:52:51.238] <TB2> INFO: Test took 4572ms.
[09:52:51.297] <TB2> INFO: scanning low vcal = 100
[09:52:55.790] <TB2> INFO: Test took 4493ms.
[09:52:55.879] <TB2> INFO: scanning low vcal = 110
[09:53:00.335] <TB2> INFO: Test took 4457ms.
[09:53:00.398] <TB2> INFO: scanning low vcal = 120
[09:53:04.993] <TB2> INFO: Test took 4595ms.
[09:53:05.058] <TB2> INFO: scanning low vcal = 130
[09:53:09.617] <TB2> INFO: Test took 4559ms.
[09:53:09.687] <TB2> INFO: scanning low vcal = 140
[09:53:14.186] <TB2> INFO: Test took 4499ms.
[09:53:14.246] <TB2> INFO: scanning low vcal = 150
[09:53:18.746] <TB2> INFO: Test took 4500ms.
[09:53:18.807] <TB2> INFO: scanning low vcal = 160
[09:53:23.322] <TB2> INFO: Test took 4515ms.
[09:53:23.384] <TB2> INFO: scanning low vcal = 170
[09:53:27.962] <TB2> INFO: Test took 4578ms.
[09:53:28.020] <TB2> INFO: scanning low vcal = 180
[09:53:32.534] <TB2> INFO: Test took 4514ms.
[09:53:32.607] <TB2> INFO: scanning low vcal = 190
[09:53:36.965] <TB2> INFO: Test took 4358ms.
[09:53:37.026] <TB2> INFO: scanning low vcal = 200
[09:53:41.232] <TB2> INFO: Test took 4206ms.
[09:53:41.287] <TB2> INFO: scanning low vcal = 210
[09:53:45.537] <TB2> INFO: Test took 4250ms.
[09:53:45.591] <TB2> INFO: scanning low vcal = 220
[09:53:49.806] <TB2> INFO: Test took 4215ms.
[09:53:49.861] <TB2> INFO: scanning low vcal = 230
[09:53:54.051] <TB2> INFO: Test took 4190ms.
[09:53:54.106] <TB2> INFO: scanning low vcal = 240
[09:53:58.366] <TB2> INFO: Test took 4260ms.
[09:53:58.420] <TB2> INFO: scanning low vcal = 250
[09:54:02.684] <TB2> INFO: Test took 4264ms.
[09:54:02.766] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[09:54:07.026] <TB2> INFO: Test took 4260ms.
[09:54:07.079] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[09:54:11.275] <TB2> INFO: Test took 4196ms.
[09:54:11.328] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[09:54:15.545] <TB2> INFO: Test took 4217ms.
[09:54:15.599] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[09:54:19.787] <TB2> INFO: Test took 4188ms.
[09:54:19.841] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[09:54:24.044] <TB2> INFO: Test took 4203ms.
[09:54:24.515] <TB2> INFO: PixTestGainPedestal::measure() done
[09:54:54.942] <TB2> INFO: PixTestGainPedestal::fit() done
[09:54:54.942] <TB2> INFO: non-linearity mean: 0.961 0.958 0.950 0.956 0.958 0.958 0.962 0.951 0.962 0.960 0.954 0.956 0.951 0.957 0.959 0.958
[09:54:54.942] <TB2> INFO: non-linearity RMS: 0.006 0.004 0.006 0.006 0.005 0.007 0.006 0.005 0.004 0.005 0.010 0.005 0.007 0.004 0.005 0.005
[09:54:54.942] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[09:54:54.960] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[09:54:54.978] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[09:54:54.996] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[09:54:55.015] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[09:54:55.033] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[09:54:55.051] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[09:54:55.069] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[09:54:55.087] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[09:54:55.105] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[09:54:55.122] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[09:54:55.140] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[09:54:55.158] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[09:54:55.176] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[09:54:55.194] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[09:54:55.212] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2045_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[09:54:55.230] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 163 seconds
[09:54:55.236] <TB2> INFO: enter test to run
[09:54:55.236] <TB2> INFO: test: exit no parameter change
[09:54:55.792] <TB2> QUIET: Connection to board 156 closed.
[09:54:55.872] <TB2> INFO: pXar: this is the end, my friend