Test Date: 2015-08-19 10:30
Analysis date: 2016-05-25 22:50
Logfile
LogfileView
[11:19:27.551] <TB1> INFO: *** Welcome to pxar ***
[11:19:27.551] <TB1> INFO: *** Today: 2015/08/19
[11:19:27.551] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C15.dat
[11:19:27.552] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//tbmParameters_C0b.dat
[11:19:27.552] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//defaultMaskFile.dat
[11:19:27.552] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters_C15.dat
[11:19:27.620] <TB1> INFO: clk: 4
[11:19:27.620] <TB1> INFO: ctr: 4
[11:19:27.621] <TB1> INFO: sda: 19
[11:19:27.621] <TB1> INFO: tin: 9
[11:19:27.621] <TB1> INFO: level: 15
[11:19:27.621] <TB1> INFO: triggerdelay: 0
[11:19:27.621] <TB1> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[11:19:27.621] <TB1> INFO: Log level: INFO
[11:19:27.628] <TB1> INFO: Found DTB DTB_WXBYFL
[11:19:27.642] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[11:19:27.645] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[11:19:27.649] <TB1> INFO: RPC call hashes of host and DTB match: 447413373
[11:19:29.184] <TB1> INFO: DUT info:
[11:19:29.185] <TB1> INFO: The DUT currently contains the following objects:
[11:19:29.185] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[11:19:29.185] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:19:29.185] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:19:29.185] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[11:19:29.185] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:29.185] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:29.185] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:29.185] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:29.185] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:29.185] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:29.185] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:29.185] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:29.185] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:29.185] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:29.185] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:29.185] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:29.185] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:29.185] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:29.185] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:29.185] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:29.587] <TB1> INFO: enter 'restricted' command line mode
[11:19:29.587] <TB1> INFO: enter test to run
[11:19:29.587] <TB1> INFO: test: pretest no parameter change
[11:19:29.587] <TB1> INFO: running: pretest
[11:19:29.597] <TB1> INFO: ######################################################################
[11:19:29.597] <TB1> INFO: PixTestPretest::doTest()
[11:19:29.597] <TB1> INFO: ######################################################################
[11:19:29.599] <TB1> INFO: ----------------------------------------------------------------------
[11:19:29.599] <TB1> INFO: PixTestPretest::programROC()
[11:19:29.599] <TB1> INFO: ----------------------------------------------------------------------
[11:19:47.621] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:19:47.621] <TB1> INFO: IA differences per ROC: 20.1 19.3 18.5 18.5 18.5 17.7 17.7 18.5 19.3 18.5 19.3 18.5 20.1 18.5 19.3 17.7
[11:19:47.727] <TB1> INFO: ----------------------------------------------------------------------
[11:19:47.727] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:19:47.727] <TB1> INFO: ----------------------------------------------------------------------
[11:20:07.325] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 382.7 mA = 23.9187 mA/ROC
[11:20:07.329] <TB1> INFO: ----------------------------------------------------------------------
[11:20:07.329] <TB1> INFO: PixTestPretest::findWorkingPixel()
[11:20:07.329] <TB1> INFO: ----------------------------------------------------------------------
[11:20:15.727] <TB1> INFO: Test took 8392ms.
[11:20:16.041] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:20:16.096] <TB1> INFO: ----------------------------------------------------------------------
[11:20:16.096] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[11:20:16.096] <TB1> INFO: ----------------------------------------------------------------------
[11:20:24.478] <TB1> INFO: Test took 8375ms.
[11:20:24.807] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[11:20:24.807] <TB1> INFO: CalDel: 128 137 154 152 137 111 121 133 137 143 132 138 143 139 132 137
[11:20:24.807] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[11:20:24.811] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C0.dat
[11:20:24.812] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C1.dat
[11:20:24.812] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C2.dat
[11:20:24.812] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C3.dat
[11:20:24.813] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C4.dat
[11:20:24.813] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C5.dat
[11:20:24.813] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C6.dat
[11:20:24.813] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C7.dat
[11:20:24.814] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C8.dat
[11:20:24.814] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C9.dat
[11:20:24.814] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C10.dat
[11:20:24.814] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C11.dat
[11:20:24.815] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C12.dat
[11:20:24.815] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C13.dat
[11:20:24.815] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C14.dat
[11:20:24.815] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C15.dat
[11:20:24.815] <TB1> INFO: PixTestPretest::doTest() done, duration: 55 seconds
[11:20:24.911] <TB1> INFO: enter test to run
[11:20:24.911] <TB1> INFO: test: fulltest no parameter change
[11:20:24.911] <TB1> INFO: running: fulltest
[11:20:24.911] <TB1> INFO: ######################################################################
[11:20:24.911] <TB1> INFO: PixTestFullTest::doTest()
[11:20:24.911] <TB1> INFO: ######################################################################
[11:20:24.912] <TB1> INFO: ######################################################################
[11:20:24.912] <TB1> INFO: PixTestAlive::doTest()
[11:20:24.912] <TB1> INFO: ######################################################################
[11:20:24.914] <TB1> INFO: ----------------------------------------------------------------------
[11:20:24.914] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:20:24.914] <TB1> INFO: ----------------------------------------------------------------------
[11:20:28.327] <TB1> INFO: Test took 3411ms.
[11:20:28.350] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:28.590] <TB1> INFO: PixTestAlive::aliveTest() done
[11:20:28.590] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2
[11:20:28.594] <TB1> INFO: ----------------------------------------------------------------------
[11:20:28.594] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:20:28.594] <TB1> INFO: ----------------------------------------------------------------------
[11:20:31.335] <TB1> INFO: Test took 2738ms.
[11:20:31.339] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:31.339] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:20:31.581] <TB1> INFO: PixTestAlive::maskTest() done
[11:20:31.581] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:20:31.582] <TB1> INFO: ----------------------------------------------------------------------
[11:20:31.582] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:20:31.582] <TB1> INFO: ----------------------------------------------------------------------
[11:20:35.052] <TB1> INFO: Test took 3467ms.
[11:20:35.079] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:35.322] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[11:20:35.322] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:20:35.322] <TB1> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[11:20:35.331] <TB1> INFO: ######################################################################
[11:20:35.331] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:20:35.331] <TB1> INFO: ######################################################################
[11:20:35.336] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[11:20:35.351] <TB1> INFO: dacScan step from 0 .. 29
[11:20:56.796] <TB1> INFO: Test took 21445ms.
[11:20:56.834] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:56.834] <TB1> INFO: dacScan step from 30 .. 59
[11:21:20.757] <TB1> INFO: Test took 23923ms.
[11:21:20.910] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:20.931] <TB1> INFO: dacScan step from 60 .. 89
[11:21:50.288] <TB1> INFO: Test took 29356ms.
[11:21:50.558] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:50.641] <TB1> INFO: dacScan step from 90 .. 119
[11:22:20.003] <TB1> INFO: Test took 29362ms.
[11:22:20.284] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:20.376] <TB1> INFO: dacScan step from 120 .. 149
[11:22:44.754] <TB1> INFO: Test took 24378ms.
[11:22:44.987] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:09.139] <TB1> INFO: PixTestBBMap::doTest() done, duration: 153 seconds
[11:23:09.139] <TB1> INFO: number of dead bumps (per ROC): 0 0 0 0 3 0 0 0 0 0 1 0 0 0 0 1
[11:23:09.139] <TB1> INFO: separation cut (per ROC): 83 91 93 75 67 96 78 92 76 85 87 88 76 78 79 70
[11:23:09.226] <TB1> INFO: ######################################################################
[11:23:09.226] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50
[11:23:09.226] <TB1> INFO: ######################################################################
[11:23:09.226] <TB1> INFO: ----------------------------------------------------------------------
[11:23:09.226] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[11:23:09.226] <TB1> INFO: ----------------------------------------------------------------------
[11:23:09.226] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[11:23:09.235] <TB1> INFO: dacScan step from 0 .. 3
[11:23:27.452] <TB1> INFO: Test took 18217ms.
[11:23:27.480] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:27.482] <TB1> INFO: dacScan step from 4 .. 7
[11:23:46.645] <TB1> INFO: Test took 19163ms.
[11:23:46.676] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:46.676] <TB1> INFO: dacScan step from 8 .. 11
[11:24:05.908] <TB1> INFO: Test took 19232ms.
[11:24:05.938] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:05.938] <TB1> INFO: dacScan step from 12 .. 15
[11:24:25.157] <TB1> INFO: Test took 19219ms.
[11:24:25.186] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:25.186] <TB1> INFO: dacScan step from 16 .. 19
[11:24:44.538] <TB1> INFO: Test took 19352ms.
[11:24:44.566] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:44.566] <TB1> INFO: dacScan step from 20 .. 23
[11:25:03.817] <TB1> INFO: Test took 19250ms.
[11:25:03.844] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:03.844] <TB1> INFO: dacScan step from 24 .. 27
[11:25:23.045] <TB1> INFO: Test took 19200ms.
[11:25:23.073] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:23.073] <TB1> INFO: dacScan step from 28 .. 31
[11:25:42.345] <TB1> INFO: Test took 19272ms.
[11:25:42.375] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:42.375] <TB1> INFO: dacScan step from 32 .. 35
[11:26:01.567] <TB1> INFO: Test took 19192ms.
[11:26:01.594] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:01.594] <TB1> INFO: dacScan step from 36 .. 39
[11:26:20.748] <TB1> INFO: Test took 19154ms.
[11:26:20.780] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:20.780] <TB1> INFO: dacScan step from 40 .. 43
[11:26:39.915] <TB1> INFO: Test took 19135ms.
[11:26:39.945] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:39.945] <TB1> INFO: dacScan step from 44 .. 47
[11:26:59.063] <TB1> INFO: Test took 19118ms.
[11:26:59.092] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:59.094] <TB1> INFO: dacScan step from 48 .. 51
[11:27:18.125] <TB1> INFO: Test took 19031ms.
[11:27:18.156] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:18.156] <TB1> INFO: dacScan step from 52 .. 55
[11:27:37.318] <TB1> INFO: Test took 19162ms.
[11:27:37.351] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:37.351] <TB1> INFO: dacScan step from 56 .. 59
[11:27:56.507] <TB1> INFO: Test took 19156ms.
[11:27:56.539] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:56.539] <TB1> INFO: dacScan step from 60 .. 63
[11:28:15.746] <TB1> INFO: Test took 19207ms.
[11:28:15.785] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:15.786] <TB1> INFO: dacScan step from 64 .. 67
[11:28:35.517] <TB1> INFO: Test took 19731ms.
[11:28:35.566] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:35.566] <TB1> INFO: dacScan step from 68 .. 71
[11:28:55.886] <TB1> INFO: Test took 20319ms.
[11:28:55.950] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:55.953] <TB1> INFO: dacScan step from 72 .. 75
[11:29:17.154] <TB1> INFO: Test took 21201ms.
[11:29:17.228] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:29:17.231] <TB1> INFO: dacScan step from 76 .. 79
[11:29:39.768] <TB1> INFO: Test took 22537ms.
[11:29:39.870] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:29:39.875] <TB1> INFO: dacScan step from 80 .. 83
[11:30:05.396] <TB1> INFO: Test took 25520ms.
[11:30:05.552] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:30:05.560] <TB1> INFO: dacScan step from 84 .. 87
[11:30:32.192] <TB1> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (116) != TBM ID (0)

[11:30:32.192] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[11:30:32.192] <TB1> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (117)

[11:30:32.371] <TB1> INFO: Test took 26811ms.
[11:30:32.565] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:30:32.574] <TB1> INFO: dacScan step from 88 .. 91
[11:31:00.548] <TB1> INFO: Test took 27974ms.
[11:31:00.766] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:31:00.776] <TB1> INFO: dacScan step from 92 .. 95
[11:31:28.686] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[11:31:28.686] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[11:31:29.870] <TB1> INFO: Test took 29094ms.
[11:31:30.108] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:31:30.119] <TB1> INFO: dacScan step from 96 .. 99
[11:31:58.502] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[11:31:58.502] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[11:31:59.754] <TB1> INFO: Test took 29634ms.
[11:31:59.998] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:00.010] <TB1> INFO: dacScan step from 100 .. 103
[11:32:28.275] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[11:32:29.522] <TB1> INFO: Test took 29512ms.
[11:32:29.758] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:29.771] <TB1> INFO: dacScan step from 104 .. 107
[11:32:58.113] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[11:32:59.386] <TB1> INFO: Test took 29615ms.
[11:32:59.615] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:59.627] <TB1> INFO: dacScan step from 108 .. 111
[11:33:28.161] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[11:33:29.440] <TB1> INFO: Test took 29813ms.
[11:33:29.737] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:33:29.751] <TB1> INFO: dacScan step from 112 .. 115
[11:33:59.632] <TB1> INFO: Test took 29881ms.
[11:33:59.857] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:33:59.869] <TB1> INFO: dacScan step from 116 .. 119
[11:34:29.802] <TB1> INFO: Test took 29933ms.
[11:34:30.048] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:30.060] <TB1> INFO: dacScan step from 120 .. 123
[11:34:59.978] <TB1> INFO: Test took 29918ms.
[11:35:00.223] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:00.236] <TB1> INFO: dacScan step from 124 .. 127
[11:35:29.888] <TB1> INFO: Test took 29652ms.
[11:35:30.156] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:30.169] <TB1> INFO: dacScan step from 128 .. 131
[11:35:59.864] <TB1> INFO: Test took 29695ms.
[11:36:00.166] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:36:00.183] <TB1> INFO: dacScan step from 132 .. 135
[11:36:29.817] <TB1> INFO: Test took 29634ms.
[11:36:30.099] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:36:30.114] <TB1> INFO: dacScan step from 136 .. 139
[11:36:59.724] <TB1> INFO: Test took 29609ms.
[11:37:00.013] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:00.025] <TB1> INFO: dacScan step from 140 .. 143
[11:37:29.578] <TB1> INFO: Test took 29553ms.
[11:37:29.881] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:29.897] <TB1> INFO: dacScan step from 144 .. 147
[11:37:59.447] <TB1> INFO: Test took 29550ms.
[11:37:59.755] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:59.771] <TB1> INFO: dacScan step from 148 .. 149
[11:38:16.110] <TB1> INFO: Test took 16338ms.
[11:38:16.223] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:16.230] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:38:17.826] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:38:19.402] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:38:20.966] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:38:22.735] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:38:24.593] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:38:26.148] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:38:27.721] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:38:29.172] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:38:30.633] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:38:32.082] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:38:33.541] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:38:35.031] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:38:36.581] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:38:38.107] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:38:39.694] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[11:38:41.297] <TB1> INFO: PixTestScurves::scurves() done
[11:38:41.297] <TB1> INFO: Vcal mean: 87.15 87.22 99.60 79.22 67.93 89.30 84.10 92.73 88.16 83.67 86.17 85.36 80.53 73.13 79.49 79.51
[11:38:41.297] <TB1> INFO: Vcal RMS: 5.20 5.94 6.00 4.54 4.47 6.03 5.51 5.41 6.43 4.76 5.47 5.06 4.61 4.88 4.40 4.94
[11:38:41.297] <TB1> INFO: PixTestScurves::fullTest() done, duration: 932 seconds
[11:38:41.369] <TB1> INFO: ######################################################################
[11:38:41.369] <TB1> INFO: PixTestTrim::doTest()
[11:38:41.369] <TB1> INFO: ######################################################################
[11:38:41.371] <TB1> INFO: ----------------------------------------------------------------------
[11:38:41.371] <TB1> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[11:38:41.371] <TB1> INFO: ----------------------------------------------------------------------
[11:38:41.453] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:38:41.453] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:38:41.461] <TB1> INFO: dacScan step from 0 .. 19
[11:38:55.819] <TB1> INFO: Test took 14357ms.
[11:38:55.842] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:55.842] <TB1> INFO: dacScan step from 20 .. 39
[11:39:10.710] <TB1> INFO: Test took 14868ms.
[11:39:10.733] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:10.733] <TB1> INFO: dacScan step from 40 .. 59
[11:39:25.149] <TB1> INFO: Test took 14416ms.
[11:39:25.173] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:25.173] <TB1> INFO: dacScan step from 60 .. 79
[11:39:40.404] <TB1> INFO: Test took 15231ms.
[11:39:40.436] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:40.436] <TB1> INFO: dacScan step from 80 .. 99
[11:39:55.888] <TB1> INFO: Test took 15452ms.
[11:39:55.970] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:55.981] <TB1> INFO: dacScan step from 100 .. 119
[11:40:15.339] <TB1> INFO: Test took 19357ms.
[11:40:15.550] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:15.586] <TB1> INFO: dacScan step from 120 .. 139
[11:40:34.601] <TB1> INFO: Test took 19015ms.
[11:40:34.743] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:34.768] <TB1> INFO: dacScan step from 140 .. 159
[11:40:50.857] <TB1> INFO: Test took 16088ms.
[11:40:50.921] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:16.041] <TB1> INFO: ROC 0 VthrComp = 93
[11:41:16.041] <TB1> INFO: ROC 1 VthrComp = 92
[11:41:16.041] <TB1> INFO: ROC 2 VthrComp = 99
[11:41:16.041] <TB1> INFO: ROC 3 VthrComp = 85
[11:41:16.042] <TB1> INFO: ROC 4 VthrComp = 74
[11:41:16.042] <TB1> INFO: ROC 5 VthrComp = 93
[11:41:16.042] <TB1> INFO: ROC 6 VthrComp = 88
[11:41:16.042] <TB1> INFO: ROC 7 VthrComp = 95
[11:41:16.042] <TB1> INFO: ROC 8 VthrComp = 93
[11:41:16.042] <TB1> INFO: ROC 9 VthrComp = 87
[11:41:16.042] <TB1> INFO: ROC 10 VthrComp = 90
[11:41:16.042] <TB1> INFO: ROC 11 VthrComp = 93
[11:41:16.043] <TB1> INFO: ROC 12 VthrComp = 87
[11:41:16.043] <TB1> INFO: ROC 13 VthrComp = 79
[11:41:16.043] <TB1> INFO: ROC 14 VthrComp = 86
[11:41:16.043] <TB1> INFO: ROC 15 VthrComp = 84
[11:41:16.043] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:41:16.043] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:41:16.053] <TB1> INFO: dacScan step from 0 .. 19
[11:41:30.683] <TB1> INFO: Test took 14630ms.
[11:41:30.708] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:30.708] <TB1> INFO: dacScan step from 20 .. 39
[11:41:45.611] <TB1> INFO: Test took 14903ms.
[11:41:45.644] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:45.647] <TB1> INFO: dacScan step from 40 .. 59
[11:42:03.347] <TB1> INFO: Test took 17700ms.
[11:42:03.503] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:03.550] <TB1> INFO: dacScan step from 60 .. 79
[11:42:23.418] <TB1> INFO: Test took 19868ms.
[11:42:23.650] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:23.705] <TB1> INFO: dacScan step from 80 .. 99
[11:42:42.654] <TB1> INFO: Test took 18949ms.
[11:42:42.852] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:42.906] <TB1> INFO: dacScan step from 100 .. 119
[11:43:03.332] <TB1> INFO: Test took 20426ms.
[11:43:03.547] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:03.594] <TB1> INFO: dacScan step from 120 .. 139
[11:43:23.949] <TB1> INFO: Test took 20355ms.
[11:43:24.117] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:24.159] <TB1> INFO: dacScan step from 140 .. 159
[11:43:44.363] <TB1> INFO: Test took 20204ms.
[11:43:44.532] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:09.671] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 57.9873 for pixel 7/13 mean/min/max = 45.05/32.0729/58.0271
[11:44:09.672] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 58.9405 for pixel 21/76 mean/min/max = 45.5269/32.0738/58.9801
[11:44:09.672] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 60.6899 for pixel 1/79 mean/min/max = 45.8002/30.8903/60.7101
[11:44:09.672] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 57.6745 for pixel 0/71 mean/min/max = 45.2442/32.491/57.9973
[11:44:09.672] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 56.7572 for pixel 8/11 mean/min/max = 45.7112/34.5751/56.8473
[11:44:09.673] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 59.4359 for pixel 17/1 mean/min/max = 45.3562/31.2731/59.4394
[11:44:09.673] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 60.2691 for pixel 12/79 mean/min/max = 46.3209/32.1716/60.4701
[11:44:09.673] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 59.1029 for pixel 1/3 mean/min/max = 45.6765/32.1834/59.1697
[11:44:09.673] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 61.6728 for pixel 6/0 mean/min/max = 46.5232/31.1653/61.8811
[11:44:09.674] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 57.7481 for pixel 0/5 mean/min/max = 45.3739/32.8139/57.9339
[11:44:09.674] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 59.997 for pixel 13/13 mean/min/max = 46.2095/32.3574/60.0615
[11:44:09.674] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 57.5995 for pixel 17/3 mean/min/max = 44.8223/31.8884/57.7562
[11:44:09.674] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 57.0488 for pixel 0/61 mean/min/max = 44.4995/31.8842/57.1148
[11:44:09.675] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 58.307 for pixel 0/23 mean/min/max = 46.4994/34.6585/58.3403
[11:44:09.675] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 56.9899 for pixel 51/74 mean/min/max = 44.6275/31.9447/57.3102
[11:44:09.675] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 58.4347 for pixel 20/2 mean/min/max = 45.4121/32.3771/58.447
[11:44:09.675] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:45:40.311] <TB1> INFO: Test took 90636ms.
[11:45:41.759] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[11:45:41.769] <TB1> INFO: dacScan step from 0 .. 19
[11:46:04.677] <TB1> INFO: Test took 22908ms.
[11:46:04.729] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:46:04.732] <TB1> INFO: dacScan step from 20 .. 39
[11:46:33.810] <TB1> INFO: Test took 29078ms.
[11:46:34.035] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:46:34.063] <TB1> INFO: dacScan step from 40 .. 59
[11:47:06.189] <TB1> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (232) != TBM ID (0)

[11:47:06.190] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[11:47:06.190] <TB1> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (233)

[11:47:07.494] <TB1> INFO: Test took 33431ms.
[11:47:07.801] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:07.852] <TB1> INFO: dacScan step from 60 .. 79
[11:47:39.716] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[11:47:39.716] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[11:47:41.032] <TB1> INFO: Test took 33180ms.
[11:47:41.305] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:41.357] <TB1> INFO: dacScan step from 80 .. 99
[11:48:12.579] <TB1> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (209) != TBM ID (0)

[11:48:12.579] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[11:48:12.579] <TB1> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (210)

[11:48:13.684] <TB1> INFO: Test took 32327ms.
[11:48:13.970] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:14.035] <TB1> INFO: dacScan step from 100 .. 119
[11:48:43.734] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[11:48:43.734] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[11:48:44.872] <TB1> INFO: Test took 30837ms.
[11:48:45.157] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:45.226] <TB1> INFO: dacScan step from 120 .. 139
[11:49:14.843] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[11:49:14.843] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[11:49:15.945] <TB1> INFO: Test took 30719ms.
[11:49:16.291] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:16.353] <TB1> INFO: dacScan step from 140 .. 159
[11:49:47.159] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[11:49:47.159] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[11:49:48.454] <TB1> INFO: Test took 32101ms.
[11:49:48.730] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:48.782] <TB1> INFO: dacScan step from 160 .. 179
[11:50:21.065] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[11:50:21.065] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[11:50:22.398] <TB1> INFO: Test took 33616ms.
[11:50:22.680] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:22.733] <TB1> INFO: dacScan step from 180 .. 199
[11:50:55.518] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[11:50:55.518] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[11:50:56.780] <TB1> INFO: Test took 34047ms.
[11:50:57.057] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:23.079] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.018658 .. 255.000000
[11:51:23.173] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[11:51:23.183] <TB1> INFO: dacScan step from 0 .. 19
[11:51:36.850] <TB1> INFO: Test took 13667ms.
[11:51:36.873] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:36.873] <TB1> INFO: dacScan step from 20 .. 39
[11:51:51.855] <TB1> INFO: Test took 14982ms.
[11:51:51.940] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:51.958] <TB1> INFO: dacScan step from 40 .. 59
[11:52:09.683] <TB1> INFO: Test took 17725ms.
[11:52:09.834] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:09.880] <TB1> INFO: dacScan step from 60 .. 79
[11:52:27.632] <TB1> INFO: Test took 17752ms.
[11:52:27.777] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:27.825] <TB1> INFO: dacScan step from 80 .. 99
[11:52:44.459] <TB1> INFO: Test took 16634ms.
[11:52:44.601] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:44.654] <TB1> INFO: dacScan step from 100 .. 119
[11:53:01.668] <TB1> INFO: Test took 17014ms.
[11:53:01.814] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:01.861] <TB1> INFO: dacScan step from 120 .. 139
[11:53:18.406] <TB1> INFO: Test took 16545ms.
[11:53:18.550] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:18.600] <TB1> INFO: dacScan step from 140 .. 159
[11:53:35.108] <TB1> INFO: Test took 16508ms.
[11:53:35.262] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:35.314] <TB1> INFO: dacScan step from 160 .. 179
[11:53:53.204] <TB1> INFO: Test took 17890ms.
[11:53:53.351] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:53.399] <TB1> INFO: dacScan step from 180 .. 199
[11:54:11.940] <TB1> INFO: Test took 18541ms.
[11:54:12.102] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:12.159] <TB1> INFO: dacScan step from 200 .. 219
[11:54:29.868] <TB1> INFO: Test took 17709ms.
[11:54:30.047] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:30.094] <TB1> INFO: dacScan step from 220 .. 239
[11:54:47.728] <TB1> INFO: Test took 17633ms.
[11:54:47.879] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:47.931] <TB1> INFO: dacScan step from 240 .. 255
[11:55:02.619] <TB1> INFO: Test took 14688ms.
[11:55:02.761] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:55:35.619] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 0.342904 .. 47.468129
[11:55:35.696] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 0 .. 57 (20) hits flags = 16 (plus default)
[11:55:35.704] <TB1> INFO: dacScan step from 0 .. 19
[11:55:49.324] <TB1> INFO: Test took 13619ms.
[11:55:49.350] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:55:49.350] <TB1> INFO: dacScan step from 20 .. 39
[11:56:04.167] <TB1> INFO: Test took 14817ms.
[11:56:04.248] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:56:04.266] <TB1> INFO: dacScan step from 40 .. 57
[11:56:20.502] <TB1> INFO: Test took 16236ms.
[11:56:20.648] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:56:36.769] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 0.338890 .. 44.708156
[11:56:36.844] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 0 .. 54 (20) hits flags = 16 (plus default)
[11:56:36.853] <TB1> INFO: dacScan step from 0 .. 19
[11:56:50.422] <TB1> INFO: Test took 13569ms.
[11:56:50.443] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:56:50.443] <TB1> INFO: dacScan step from 20 .. 39
[11:57:04.393] <TB1> INFO: Test took 13950ms.
[11:57:04.464] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:04.483] <TB1> INFO: dacScan step from 40 .. 54
[11:57:17.773] <TB1> INFO: Test took 13290ms.
[11:57:17.887] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:33.438] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 1.500000 .. 43.212759
[11:57:33.520] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 53 (20) hits flags = 16 (plus default)
[11:57:33.529] <TB1> INFO: dacScan step from 1 .. 20
[11:57:46.562] <TB1> INFO: Test took 13033ms.
[11:57:46.583] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:46.583] <TB1> INFO: dacScan step from 21 .. 40
[11:58:00.722] <TB1> INFO: Test took 14138ms.
[11:58:00.800] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:58:00.820] <TB1> INFO: dacScan step from 41 .. 53
[11:58:12.596] <TB1> INFO: Test took 11776ms.
[11:58:12.695] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:58:27.648] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:58:27.648] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[11:58:27.657] <TB1> INFO: dacScan step from 15 .. 34
[11:58:49.607] <TB1> INFO: Test took 21950ms.
[11:58:49.676] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:58:49.687] <TB1> INFO: dacScan step from 35 .. 54
[11:59:20.081] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[11:59:20.081] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[11:59:20.825] <TB1> INFO: Test took 31138ms.
[11:59:21.147] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:59:21.198] <TB1> INFO: dacScan step from 55 .. 55
[11:59:25.601] <TB1> INFO: Test took 4403ms.
[11:59:25.627] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:59:40.400] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C0.dat
[11:59:40.401] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C1.dat
[11:59:40.401] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C2.dat
[11:59:40.401] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C3.dat
[11:59:40.401] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C4.dat
[11:59:40.401] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C5.dat
[11:59:40.401] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C6.dat
[11:59:40.401] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C7.dat
[11:59:40.401] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C8.dat
[11:59:40.401] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C9.dat
[11:59:40.402] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C10.dat
[11:59:40.402] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C11.dat
[11:59:40.402] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C12.dat
[11:59:40.402] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C13.dat
[11:59:40.402] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C14.dat
[11:59:40.402] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C15.dat
[11:59:40.402] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C0.dat
[11:59:40.411] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C1.dat
[11:59:40.417] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C2.dat
[11:59:40.424] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C3.dat
[11:59:40.430] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C4.dat
[11:59:40.437] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C5.dat
[11:59:40.443] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C6.dat
[11:59:40.450] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C7.dat
[11:59:40.456] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C8.dat
[11:59:40.463] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C9.dat
[11:59:40.469] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C10.dat
[11:59:40.476] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C11.dat
[11:59:40.482] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C12.dat
[11:59:40.489] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C13.dat
[11:59:40.495] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C14.dat
[11:59:40.502] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C15.dat
[11:59:40.508] <TB1> INFO: PixTestTrim::trimTest() done
[11:59:40.508] <TB1> INFO: vtrim: 116 91 83 104 186 108 99 108 132 103 117 108 99 101 87 102
[11:59:40.508] <TB1> INFO: vthrcomp: 93 92 99 85 74 93 88 95 93 87 90 93 87 79 86 84
[11:59:40.508] <TB1> INFO: vcal mean: 35.01 35.03 35.01 35.04 34.98 35.05 35.05 35.02 35.02 35.03 35.05 35.03 35.04 35.05 34.99 35.02
[11:59:40.508] <TB1> INFO: vcal RMS: 1.02 1.00 1.29 1.03 2.05 1.00 1.02 1.08 1.18 1.14 1.31 1.03 1.02 0.97 1.01 1.24
[11:59:40.508] <TB1> INFO: bits mean: 10.31 8.99 8.67 9.44 11.91 10.00 8.92 9.71 9.91 9.71 10.08 10.09 9.93 9.20 9.24 10.13
[11:59:40.508] <TB1> INFO: bits RMS: 2.39 2.82 3.23 2.73 1.36 2.54 2.86 2.54 2.55 2.56 2.39 2.45 2.57 2.46 2.87 2.37
[11:59:40.518] <TB1> INFO: ----------------------------------------------------------------------
[11:59:40.518] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[11:59:40.518] <TB1> INFO: ----------------------------------------------------------------------
[11:59:40.522] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[11:59:40.531] <TB1> INFO: dacScan step from 0 .. 19
[12:00:01.848] <TB1> INFO: Test took 21317ms.
[12:00:01.892] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:01.892] <TB1> INFO: dacScan step from 20 .. 39
[12:00:24.823] <TB1> INFO: Test took 22931ms.
[12:00:24.860] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:24.860] <TB1> INFO: dacScan step from 40 .. 59
[12:00:46.209] <TB1> INFO: Test took 21349ms.
[12:00:46.246] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:46.246] <TB1> INFO: dacScan step from 60 .. 79
[12:01:08.721] <TB1> INFO: Test took 22475ms.
[12:01:08.761] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:01:08.761] <TB1> INFO: dacScan step from 80 .. 99
[12:01:32.600] <TB1> INFO: Test took 23839ms.
[12:01:32.677] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:01:32.682] <TB1> INFO: dacScan step from 100 .. 119
[12:02:00.625] <TB1> INFO: Test took 27943ms.
[12:02:00.866] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:02:00.892] <TB1> INFO: dacScan step from 120 .. 139
[12:02:33.132] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[12:02:33.132] <TB1> WARNING: Channel 3 ROC 0: Readback start marker after 32 readouts!

[12:02:33.133] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 31 readouts!

[12:02:34.409] <TB1> INFO: Test took 33516ms.
[12:02:34.715] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:02:34.758] <TB1> INFO: dacScan step from 140 .. 159
[12:03:08.440] <TB1> INFO: Test took 33682ms.
[12:03:08.749] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:03:08.802] <TB1> INFO: dacScan step from 160 .. 179
[12:03:42.438] <TB1> INFO: Test took 33636ms.
[12:03:42.761] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:03:42.817] <TB1> INFO: dacScan step from 180 .. 199
[12:04:14.416] <TB1> INFO: Test took 31598ms.
[12:04:14.864] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:04:40.718] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 175 (20) hits flags = 16 (plus default)
[12:04:40.727] <TB1> INFO: dacScan step from 0 .. 19
[12:05:03.527] <TB1> INFO: Test took 22800ms.
[12:05:03.562] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:03.562] <TB1> INFO: dacScan step from 20 .. 39
[12:05:26.535] <TB1> INFO: Test took 22973ms.
[12:05:26.576] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:26.576] <TB1> INFO: dacScan step from 40 .. 59
[12:05:49.488] <TB1> INFO: Test took 22912ms.
[12:05:49.528] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:49.528] <TB1> INFO: dacScan step from 60 .. 79
[12:06:12.394] <TB1> INFO: Test took 22866ms.
[12:06:12.434] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:06:12.434] <TB1> INFO: dacScan step from 80 .. 99
[12:06:36.508] <TB1> INFO: Test took 24074ms.
[12:06:36.660] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:06:36.676] <TB1> INFO: dacScan step from 100 .. 119
[12:07:06.085] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[12:07:06.085] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[12:07:06.878] <TB1> INFO: Test took 30202ms.
[12:07:07.169] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:07.210] <TB1> INFO: dacScan step from 120 .. 139
[12:07:38.325] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[12:07:38.325] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[12:07:39.435] <TB1> INFO: Test took 32225ms.
[12:07:39.760] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:39.811] <TB1> INFO: dacScan step from 140 .. 159
[12:08:11.329] <TB1> INFO: Test took 31518ms.
[12:08:11.662] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:11.717] <TB1> INFO: dacScan step from 160 .. 175
[12:08:39.122] <TB1> INFO: Test took 27405ms.
[12:08:39.371] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:09:07.888] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 158 (20) hits flags = 16 (plus default)
[12:09:07.897] <TB1> INFO: dacScan step from 0 .. 19
[12:09:30.802] <TB1> INFO: Test took 22905ms.
[12:09:30.843] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:09:30.843] <TB1> INFO: dacScan step from 20 .. 39
[12:09:53.668] <TB1> INFO: Test took 22825ms.
[12:09:53.706] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:09:53.706] <TB1> INFO: dacScan step from 40 .. 59
[12:10:16.706] <TB1> INFO: Test took 23000ms.
[12:10:16.741] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:16.741] <TB1> INFO: dacScan step from 60 .. 79
[12:10:39.068] <TB1> INFO: Test took 22327ms.
[12:10:39.113] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:39.113] <TB1> INFO: dacScan step from 80 .. 99
[12:11:03.326] <TB1> INFO: Test took 24213ms.
[12:11:03.463] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:03.476] <TB1> INFO: dacScan step from 100 .. 119
[12:11:33.014] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[12:11:33.014] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[12:11:33.942] <TB1> INFO: Test took 30466ms.
[12:11:34.257] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:34.295] <TB1> INFO: dacScan step from 120 .. 139
[12:12:06.308] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[12:12:06.308] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[12:12:07.598] <TB1> INFO: Test took 33303ms.
[12:12:07.884] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:07.933] <TB1> INFO: dacScan step from 140 .. 158
[12:12:39.734] <TB1> INFO: Test took 31801ms.
[12:12:40.016] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:02.093] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 158 (20) hits flags = 16 (plus default)
[12:13:02.102] <TB1> INFO: dacScan step from 0 .. 19
[12:13:25.042] <TB1> INFO: Test took 22940ms.
[12:13:25.082] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:25.082] <TB1> INFO: dacScan step from 20 .. 39
[12:13:47.993] <TB1> INFO: Test took 22911ms.
[12:13:48.032] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:48.033] <TB1> INFO: dacScan step from 40 .. 59
[12:14:10.915] <TB1> INFO: Test took 22882ms.
[12:14:10.951] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:14:10.951] <TB1> INFO: dacScan step from 60 .. 79
[12:14:32.814] <TB1> INFO: Test took 21863ms.
[12:14:32.855] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:14:32.855] <TB1> INFO: dacScan step from 80 .. 99
[12:14:56.947] <TB1> INFO: Test took 24092ms.
[12:14:57.109] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:14:57.122] <TB1> INFO: dacScan step from 100 .. 119
[12:15:27.314] <TB1> INFO: Test took 30191ms.
[12:15:27.645] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:27.688] <TB1> INFO: dacScan step from 120 .. 139
[12:16:00.007] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[12:16:00.007] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[12:16:01.317] <TB1> INFO: Test took 33629ms.
[12:16:01.679] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:01.733] <TB1> INFO: dacScan step from 140 .. 158
[12:16:33.647] <TB1> INFO: Test took 31915ms.
[12:16:33.939] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:57.074] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 155 (20) hits flags = 16 (plus default)
[12:16:57.083] <TB1> INFO: dacScan step from 0 .. 19
[12:17:19.944] <TB1> INFO: Test took 22860ms.
[12:17:19.987] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:19.987] <TB1> INFO: dacScan step from 20 .. 39
[12:17:42.978] <TB1> INFO: Test took 22991ms.
[12:17:43.020] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:43.020] <TB1> INFO: dacScan step from 40 .. 59
[12:18:04.498] <TB1> INFO: Test took 21478ms.
[12:18:04.534] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:04.534] <TB1> INFO: dacScan step from 60 .. 79
[12:18:26.145] <TB1> INFO: Test took 21611ms.
[12:18:26.186] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:26.186] <TB1> INFO: dacScan step from 80 .. 99
[12:18:51.101] <TB1> INFO: Test took 24915ms.
[12:18:51.299] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:51.318] <TB1> INFO: dacScan step from 100 .. 119
[12:19:20.482] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[12:19:20.482] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 31 readouts!

[12:19:21.361] <TB1> INFO: Test took 30042ms.
[12:19:21.641] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:21.694] <TB1> INFO: dacScan step from 120 .. 139
[12:19:52.877] <TB1> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (69) != TBM ID (0)

[12:19:52.877] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[12:19:52.877] <TB1> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (70)

[12:19:54.194] <TB1> INFO: Test took 32500ms.
[12:19:54.477] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:54.526] <TB1> INFO: dacScan step from 140 .. 155
[12:20:21.923] <TB1> INFO: Test took 27397ms.
[12:20:22.151] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:47.134] <TB1> INFO: PixTestTrim::trimBitTest() done
[12:20:47.136] <TB1> INFO: PixTestTrim::doTest() done, duration: 2525 seconds
[12:20:47.868] <TB1> INFO: ######################################################################
[12:20:47.868] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:20:47.868] <TB1> INFO: ######################################################################
[12:20:51.335] <TB1> INFO: Test took 3465ms.
[12:20:51.363] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:55.088] <TB1> INFO: Test took 3525ms.
[12:20:55.162] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:58.650] <TB1> INFO: Test took 3472ms.
[12:20:58.712] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:58.720] <TB1> INFO: The DUT currently contains the following objects:
[12:20:58.720] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:20:58.720] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:20:58.720] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:20:58.720] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:20:58.720] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:58.720] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:58.720] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:58.720] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:58.720] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:58.720] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:58.720] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:58.720] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:58.720] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:58.720] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:58.720] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:58.720] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:58.720] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:58.720] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:58.720] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:58.720] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:59.833] <TB1> INFO: Test took 1113ms.
[12:20:59.834] <TB1> INFO: The DUT currently contains the following objects:
[12:20:59.834] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:20:59.834] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:20:59.834] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:20:59.834] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:20:59.834] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:59.834] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:59.834] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:59.834] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:59.834] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:59.834] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:59.834] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:59.835] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:59.835] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:59.835] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:59.835] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:59.835] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:59.835] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:59.835] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:59.835] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:20:59.835] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:00.947] <TB1> INFO: Test took 1112ms.
[12:21:00.949] <TB1> INFO: The DUT currently contains the following objects:
[12:21:00.949] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:21:00.949] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:21:00.949] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:21:00.949] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:21:00.949] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:00.949] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:00.950] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:00.950] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:00.950] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:00.950] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:00.950] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:00.950] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:00.950] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:00.950] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:00.950] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:00.950] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:00.950] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:00.950] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:00.950] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:00.950] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:02.060] <TB1> INFO: Test took 1110ms.
[12:21:02.061] <TB1> INFO: The DUT currently contains the following objects:
[12:21:02.061] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:21:02.061] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:21:02.061] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:21:02.062] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:21:02.062] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:02.062] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:02.062] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:02.062] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:02.062] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:02.062] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:02.062] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:02.062] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:02.062] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:02.062] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:02.062] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:02.062] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:02.062] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:02.062] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:02.062] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:02.062] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:03.172] <TB1> INFO: Test took 1110ms.
[12:21:03.174] <TB1> INFO: The DUT currently contains the following objects:
[12:21:03.174] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:21:03.174] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:21:03.174] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:21:03.174] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:21:03.174] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:03.174] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:03.174] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:03.174] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:03.174] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:03.174] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:03.174] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:03.174] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:03.174] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:03.174] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:03.174] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:03.174] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:03.174] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:03.175] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:03.175] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:03.175] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:04.287] <TB1> INFO: Test took 1112ms.
[12:21:04.288] <TB1> INFO: The DUT currently contains the following objects:
[12:21:04.288] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:21:04.288] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:21:04.288] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:21:04.288] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:21:04.288] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:04.288] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:04.288] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:04.288] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:04.288] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:04.288] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:04.288] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:04.289] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:04.289] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:04.289] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:04.289] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:04.289] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:04.289] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:04.289] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:04.289] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:04.289] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:05.400] <TB1> INFO: Test took 1111ms.
[12:21:05.404] <TB1> INFO: The DUT currently contains the following objects:
[12:21:05.404] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:21:05.404] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:21:05.404] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:21:05.404] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:21:05.404] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:05.404] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:05.404] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:05.404] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:05.404] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:05.404] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:05.404] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:05.404] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:05.404] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:05.410] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:05.410] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:05.411] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:05.411] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:05.411] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:05.411] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:05.411] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:06.514] <TB1> INFO: Test took 1103ms.
[12:21:06.516] <TB1> INFO: The DUT currently contains the following objects:
[12:21:06.516] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:21:06.516] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:21:06.516] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:21:06.516] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:21:06.516] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:06.516] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:06.516] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:06.516] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:06.516] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:06.516] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:06.516] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:06.516] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:06.516] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:06.516] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:06.517] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:06.517] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:06.517] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:06.517] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:06.517] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:06.517] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:07.628] <TB1> INFO: Test took 1111ms.
[12:21:07.630] <TB1> INFO: The DUT currently contains the following objects:
[12:21:07.630] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:21:07.630] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:21:07.630] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:21:07.630] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:21:07.630] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:07.630] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:07.630] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:07.630] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:07.630] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:07.630] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:07.630] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:07.631] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:07.631] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:07.631] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:07.631] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:07.631] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:07.631] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:07.631] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:07.631] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:07.631] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:08.741] <TB1> INFO: Test took 1110ms.
[12:21:08.743] <TB1> INFO: The DUT currently contains the following objects:
[12:21:08.743] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:21:08.743] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:21:08.743] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:21:08.743] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:21:08.743] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:08.743] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:08.743] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:08.744] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:08.744] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:08.744] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:08.744] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:08.744] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:08.744] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:08.744] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:08.744] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:08.744] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:08.744] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:08.744] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:08.744] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:08.744] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:09.854] <TB1> INFO: Test took 1110ms.
[12:21:09.856] <TB1> INFO: The DUT currently contains the following objects:
[12:21:09.856] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:21:09.856] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:21:09.856] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:21:09.856] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:21:09.856] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:09.856] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:09.856] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:09.856] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:09.856] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:09.856] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:09.856] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:09.856] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:09.856] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:09.856] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:09.856] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:09.856] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:09.857] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:09.857] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:09.857] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:09.857] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:10.967] <TB1> INFO: Test took 1110ms.
[12:21:10.968] <TB1> INFO: The DUT currently contains the following objects:
[12:21:10.968] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:21:10.968] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:21:10.968] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:21:10.968] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:21:10.968] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:10.968] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:10.969] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:10.969] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:10.969] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:10.969] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:10.969] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:10.969] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:10.969] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:10.969] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:10.969] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:10.969] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:10.969] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:10.969] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:10.969] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:10.969] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:12.080] <TB1> INFO: Test took 1111ms.
[12:21:12.082] <TB1> INFO: The DUT currently contains the following objects:
[12:21:12.082] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:21:12.082] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:21:12.082] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:21:12.082] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:21:12.082] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:12.082] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:12.082] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:12.082] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:12.082] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:12.082] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:12.082] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:12.082] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:12.083] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:12.083] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:12.083] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:12.083] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:12.083] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:12.083] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:12.083] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:12.083] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:13.193] <TB1> INFO: Test took 1110ms.
[12:21:13.194] <TB1> INFO: The DUT currently contains the following objects:
[12:21:13.194] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:21:13.194] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:21:13.194] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:21:13.194] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:21:13.194] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:13.194] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:13.194] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:13.194] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:13.194] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:13.194] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:13.194] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:13.194] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:13.194] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:13.194] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:13.194] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:13.194] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:13.194] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:13.195] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:13.195] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:13.195] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:14.305] <TB1> INFO: Test took 1110ms.
[12:21:14.307] <TB1> INFO: The DUT currently contains the following objects:
[12:21:14.307] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:21:14.307] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:21:14.307] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:21:14.307] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:21:14.307] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:14.307] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:14.307] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:14.307] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:14.307] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:14.307] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:14.307] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:14.307] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:14.307] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:14.307] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:14.307] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:14.307] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:14.307] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:14.307] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:14.308] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:14.308] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:15.417] <TB1> INFO: Test took 1109ms.
[12:21:15.419] <TB1> INFO: The DUT currently contains the following objects:
[12:21:15.419] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[12:21:15.419] <TB1> INFO: TBM Core alpha (0): 7 registers set
[12:21:15.419] <TB1> INFO: TBM Core beta (1): 7 registers set
[12:21:15.419] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:21:15.419] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:15.419] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:15.419] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:15.419] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:15.419] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:15.419] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:15.419] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:15.419] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:15.420] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:15.420] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:15.420] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:15.420] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:15.420] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:15.420] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:15.420] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:15.420] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:21:16.531] <TB1> INFO: Test took 1111ms.
[12:21:16.537] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:25:03.628] <TB1> INFO: Test took 227091ms.
[12:25:05.212] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:28:53.109] <TB1> INFO: Test took 227897ms.
[12:28:55.073] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:28:55.081] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:28:55.089] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:28:55.097] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:28:55.104] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:28:55.111] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:28:55.119] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:28:55.127] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:28:55.134] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:28:55.142] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:28:55.150] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:28:55.157] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:28:55.164] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:28:55.172] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:28:55.180] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:28:55.187] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:28:55.246] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C0.dat
[12:28:55.246] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C1.dat
[12:28:55.247] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C2.dat
[12:28:55.247] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C3.dat
[12:28:55.247] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C4.dat
[12:28:55.248] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C5.dat
[12:28:55.248] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C6.dat
[12:28:55.248] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C7.dat
[12:28:55.248] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C8.dat
[12:28:55.248] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C9.dat
[12:28:55.249] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C10.dat
[12:28:55.249] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C11.dat
[12:28:55.249] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C12.dat
[12:28:55.249] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C13.dat
[12:28:55.250] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C14.dat
[12:28:55.250] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C15.dat
[12:28:58.722] <TB1> INFO: Test took 3467ms.
[12:29:02.511] <TB1> INFO: Test took 3490ms.
[12:29:06.307] <TB1> INFO: Test took 3491ms.
[12:29:06.610] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:07.534] <TB1> INFO: Test took 924ms.
[12:29:07.538] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:08.651] <TB1> INFO: Test took 1113ms.
[12:29:08.655] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:09.760] <TB1> INFO: Test took 1105ms.
[12:29:09.764] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:10.869] <TB1> INFO: Test took 1105ms.
[12:29:10.872] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:11.976] <TB1> INFO: Test took 1104ms.
[12:29:11.979] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:13.085] <TB1> INFO: Test took 1106ms.
[12:29:13.088] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:14.194] <TB1> INFO: Test took 1106ms.
[12:29:14.197] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:15.302] <TB1> INFO: Test took 1105ms.
[12:29:15.305] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:16.410] <TB1> INFO: Test took 1105ms.
[12:29:16.413] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:17.517] <TB1> INFO: Test took 1104ms.
[12:29:17.520] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:18.624] <TB1> INFO: Test took 1104ms.
[12:29:18.627] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:19.731] <TB1> INFO: Test took 1104ms.
[12:29:19.735] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:20.838] <TB1> INFO: Test took 1104ms.
[12:29:20.842] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:21.946] <TB1> INFO: Test took 1104ms.
[12:29:21.949] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:23.054] <TB1> INFO: Test took 1105ms.
[12:29:23.058] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:24.160] <TB1> INFO: Test took 1102ms.
[12:29:24.163] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:25.267] <TB1> INFO: Test took 1104ms.
[12:29:25.271] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:26.375] <TB1> INFO: Test took 1105ms.
[12:29:26.378] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:27.484] <TB1> INFO: Test took 1106ms.
[12:29:27.487] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:28.593] <TB1> INFO: Test took 1106ms.
[12:29:28.597] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:29.703] <TB1> INFO: Test took 1106ms.
[12:29:29.707] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:30.813] <TB1> INFO: Test took 1106ms.
[12:29:30.816] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:31.922] <TB1> INFO: Test took 1106ms.
[12:29:31.926] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:33.031] <TB1> INFO: Test took 1106ms.
[12:29:33.034] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:34.140] <TB1> INFO: Test took 1106ms.
[12:29:34.143] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:35.249] <TB1> INFO: Test took 1106ms.
[12:29:35.254] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:36.356] <TB1> INFO: Test took 1103ms.
[12:29:36.359] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:37.464] <TB1> INFO: Test took 1105ms.
[12:29:37.467] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:38.571] <TB1> INFO: Test took 1104ms.
[12:29:38.575] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:39.679] <TB1> INFO: Test took 1104ms.
[12:29:39.682] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:40.786] <TB1> INFO: Test took 1104ms.
[12:29:40.789] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:29:41.894] <TB1> INFO: Test took 1105ms.
[12:29:42.457] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 534 seconds
[12:29:42.457] <TB1> INFO: PH scale (per ROC): 94 87 83 93 93 84 87 80 92 76 83 79 80 95 97 88
[12:29:42.457] <TB1> INFO: PH offset (per ROC): 144 153 157 149 148 161 167 164 163 169 158 167 151 145 149 154
[12:29:42.681] <TB1> INFO: ######################################################################
[12:29:42.681] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:29:42.681] <TB1> INFO: ######################################################################
[12:29:42.693] <TB1> INFO: scanning low vcal = 10
[12:29:46.496] <TB1> INFO: Test took 3803ms.
[12:29:46.500] <TB1> INFO: scanning low vcal = 20
[12:29:50.297] <TB1> INFO: Test took 3797ms.
[12:29:50.301] <TB1> INFO: scanning low vcal = 30
[12:29:54.215] <TB1> INFO: Test took 3914ms.
[12:29:54.229] <TB1> INFO: scanning low vcal = 40
[12:29:58.615] <TB1> INFO: Test took 4386ms.
[12:29:58.684] <TB1> INFO: scanning low vcal = 50
[12:30:03.056] <TB1> INFO: Test took 4372ms.
[12:30:03.118] <TB1> INFO: scanning low vcal = 60
[12:30:07.528] <TB1> INFO: Test took 4410ms.
[12:30:07.587] <TB1> INFO: scanning low vcal = 70
[12:30:11.933] <TB1> INFO: Test took 4346ms.
[12:30:11.998] <TB1> INFO: scanning low vcal = 80
[12:30:16.375] <TB1> INFO: Test took 4377ms.
[12:30:16.438] <TB1> INFO: scanning low vcal = 90
[12:30:20.786] <TB1> INFO: Test took 4348ms.
[12:30:20.851] <TB1> INFO: scanning low vcal = 100
[12:30:25.261] <TB1> INFO: Test took 4410ms.
[12:30:25.325] <TB1> INFO: scanning low vcal = 110
[12:30:29.751] <TB1> INFO: Test took 4425ms.
[12:30:29.843] <TB1> INFO: scanning low vcal = 120
[12:30:34.228] <TB1> INFO: Test took 4385ms.
[12:30:34.293] <TB1> INFO: scanning low vcal = 130
[12:30:38.691] <TB1> INFO: Test took 4398ms.
[12:30:38.756] <TB1> INFO: scanning low vcal = 140
[12:30:43.139] <TB1> INFO: Test took 4383ms.
[12:30:43.203] <TB1> INFO: scanning low vcal = 150
[12:30:47.599] <TB1> INFO: Test took 4396ms.
[12:30:47.674] <TB1> INFO: scanning low vcal = 160
[12:30:52.050] <TB1> INFO: Test took 4376ms.
[12:30:52.109] <TB1> INFO: scanning low vcal = 170
[12:30:56.497] <TB1> INFO: Test took 4388ms.
[12:30:56.563] <TB1> INFO: scanning low vcal = 180
[12:31:00.960] <TB1> INFO: Test took 4397ms.
[12:31:01.033] <TB1> INFO: scanning low vcal = 190
[12:31:05.569] <TB1> INFO: Test took 4536ms.
[12:31:05.641] <TB1> INFO: scanning low vcal = 200
[12:31:10.031] <TB1> INFO: Test took 4390ms.
[12:31:10.096] <TB1> INFO: scanning low vcal = 210
[12:31:14.365] <TB1> INFO: Test took 4269ms.
[12:31:14.427] <TB1> INFO: scanning low vcal = 220
[12:31:18.751] <TB1> INFO: Test took 4324ms.
[12:31:18.820] <TB1> INFO: scanning low vcal = 230
[12:31:23.150] <TB1> INFO: Test took 4330ms.
[12:31:23.231] <TB1> INFO: scanning low vcal = 240
[12:31:27.616] <TB1> INFO: Test took 4384ms.
[12:31:27.694] <TB1> INFO: scanning low vcal = 250
[12:31:32.100] <TB1> INFO: Test took 4406ms.
[12:31:32.162] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[12:31:36.541] <TB1> INFO: Test took 4379ms.
[12:31:36.614] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[12:31:41.038] <TB1> INFO: Test took 4424ms.
[12:31:41.102] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[12:31:45.527] <TB1> INFO: Test took 4425ms.
[12:31:45.594] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[12:31:50.016] <TB1> INFO: Test took 4422ms.
[12:31:50.077] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:31:54.482] <TB1> INFO: Test took 4405ms.
[12:31:55.137] <TB1> INFO: PixTestGainPedestal::measure() done
[12:32:27.229] <TB1> INFO: PixTestGainPedestal::fit() done
[12:32:27.229] <TB1> INFO: non-linearity mean: 0.959 0.955 0.956 0.949 0.954 0.954 0.953 0.955 0.954 0.954 0.959 0.956 0.954 0.959 0.954 0.956
[12:32:27.229] <TB1> INFO: non-linearity RMS: 0.005 0.007 0.007 0.006 0.011 0.005 0.006 0.006 0.006 0.007 0.005 0.005 0.006 0.005 0.005 0.007
[12:32:27.229] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[12:32:27.248] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[12:32:27.266] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[12:32:27.284] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[12:32:27.302] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[12:32:27.320] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[12:32:27.338] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[12:32:27.356] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[12:32:27.374] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[12:32:27.392] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[12:32:27.410] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[12:32:27.429] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[12:32:27.447] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[12:32:27.465] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[12:32:27.483] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[12:32:27.501] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[12:32:27.519] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 164 seconds
[12:32:27.525] <TB1> INFO: enter test to run
[12:32:27.526] <TB1> INFO: test: exit no parameter change
[12:32:28.119] <TB1> QUIET: Connection to board 153 closed.
[12:32:28.199] <TB1> INFO: pXar: this is the end, my friend
MoReWeb-v1.0.0-5-g82d9ff6 on branch psi46master