[08:37:48.067] <TB1> INFO: *** Welcome to pxar ***
[08:37:48.067] <TB1> INFO: *** Today: 2015/08/19
[08:37:48.067] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C15.dat
[08:37:48.068] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//tbmParameters_C0b.dat
[08:37:48.068] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//defaultMaskFile.dat
[08:37:48.068] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters_C15.dat
[08:37:48.167] <TB1> INFO: clk: 4
[08:37:48.167] <TB1> INFO: ctr: 4
[08:37:48.167] <TB1> INFO: sda: 19
[08:37:48.167] <TB1> INFO: tin: 9
[08:37:48.167] <TB1> INFO: level: 15
[08:37:48.167] <TB1> INFO: triggerdelay: 0
[08:37:48.167] <TB1> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[08:37:48.168] <TB1> INFO: Log level: INFO
[08:37:48.175] <TB1> INFO: Found DTB DTB_WXBYFL
[08:37:48.188] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[08:37:48.191] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[08:37:48.194] <TB1> INFO: RPC call hashes of host and DTB match: 447413373
[08:37:49.769] <TB1> INFO: DUT info:
[08:37:49.770] <TB1> INFO: The DUT currently contains the following objects:
[08:37:49.770] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[08:37:49.770] <TB1> INFO: TBM Core alpha (0): 7 registers set
[08:37:49.770] <TB1> INFO: TBM Core beta (1): 7 registers set
[08:37:49.770] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[08:37:49.770] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:49.770] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:49.770] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:49.770] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:49.770] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:49.770] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:49.770] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:49.770] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:49.770] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:49.770] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:49.770] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:49.770] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:49.770] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:49.770] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:49.771] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:49.771] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[08:37:50.172] <TB1> INFO: enter 'restricted' command line mode
[08:37:50.172] <TB1> INFO: enter test to run
[08:37:50.172] <TB1> INFO: test: pretest no parameter change
[08:37:50.172] <TB1> INFO: running: pretest
[08:37:50.179] <TB1> INFO: ######################################################################
[08:37:50.179] <TB1> INFO: PixTestPretest::doTest()
[08:37:50.179] <TB1> INFO: ######################################################################
[08:37:50.181] <TB1> INFO: ----------------------------------------------------------------------
[08:37:50.181] <TB1> INFO: PixTestPretest::programROC()
[08:37:50.181] <TB1> INFO: ----------------------------------------------------------------------
[08:38:08.202] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[08:38:08.202] <TB1> INFO: IA differences per ROC: 19.3 18.5 17.7 19.3 18.5 17.7 17.7 18.5 19.3 18.5 19.3 18.5 20.1 18.5 19.3 17.7
[08:38:08.286] <TB1> INFO: ----------------------------------------------------------------------
[08:38:08.286] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[08:38:08.286] <TB1> INFO: ----------------------------------------------------------------------
[08:38:27.887] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 385.1 mA = 24.0688 mA/ROC
[08:38:27.891] <TB1> INFO: ----------------------------------------------------------------------
[08:38:27.891] <TB1> INFO: PixTestPretest::findWorkingPixel()
[08:38:27.891] <TB1> INFO: ----------------------------------------------------------------------
[08:38:36.328] <TB1> INFO: Test took 8431ms.
[08:38:36.632] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[08:38:36.683] <TB1> INFO: ----------------------------------------------------------------------
[08:38:36.683] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[08:38:36.683] <TB1> INFO: ----------------------------------------------------------------------
[08:38:44.999] <TB1> INFO: Test took 8307ms.
[08:38:45.329] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[08:38:45.329] <TB1> INFO: CalDel: 128 136 154 152 137 111 121 134 137 142 133 139 143 140 131 138
[08:38:45.329] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[08:38:45.334] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C0.dat
[08:38:45.334] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C1.dat
[08:38:45.334] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C2.dat
[08:38:45.335] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C3.dat
[08:38:45.335] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C4.dat
[08:38:45.335] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C5.dat
[08:38:45.335] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C6.dat
[08:38:45.336] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C7.dat
[08:38:45.336] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C8.dat
[08:38:45.336] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C9.dat
[08:38:45.336] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C10.dat
[08:38:45.337] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C11.dat
[08:38:45.337] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C12.dat
[08:38:45.337] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C13.dat
[08:38:45.337] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C14.dat
[08:38:45.338] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters_C15.dat
[08:38:45.338] <TB1> INFO: PixTestPretest::doTest() done, duration: 55 seconds
[08:38:45.444] <TB1> INFO: enter test to run
[08:38:45.445] <TB1> INFO: test: fulltest no parameter change
[08:38:45.445] <TB1> INFO: running: fulltest
[08:38:45.445] <TB1> INFO: ######################################################################
[08:38:45.445] <TB1> INFO: PixTestFullTest::doTest()
[08:38:45.445] <TB1> INFO: ######################################################################
[08:38:45.446] <TB1> INFO: ######################################################################
[08:38:45.446] <TB1> INFO: PixTestAlive::doTest()
[08:38:45.446] <TB1> INFO: ######################################################################
[08:38:45.448] <TB1> INFO: ----------------------------------------------------------------------
[08:38:45.448] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:38:45.448] <TB1> INFO: ----------------------------------------------------------------------
[08:38:48.988] <TB1> INFO: Test took 3538ms.
[08:38:49.012] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:49.261] <TB1> INFO: PixTestAlive::aliveTest() done
[08:38:49.261] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2
[08:38:49.264] <TB1> INFO: ----------------------------------------------------------------------
[08:38:49.264] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:38:49.264] <TB1> INFO: ----------------------------------------------------------------------
[08:38:52.014] <TB1> INFO: Test took 2748ms.
[08:38:52.018] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:52.018] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[08:38:52.260] <TB1> INFO: PixTestAlive::maskTest() done
[08:38:52.260] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:38:52.262] <TB1> INFO: ----------------------------------------------------------------------
[08:38:52.262] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:38:52.262] <TB1> INFO: ----------------------------------------------------------------------
[08:38:55.710] <TB1> INFO: Test took 3446ms.
[08:38:55.737] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:55.980] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[08:38:55.980] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:38:55.980] <TB1> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[08:38:55.994] <TB1> INFO: ######################################################################
[08:38:55.994] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[08:38:55.995] <TB1> INFO: ######################################################################
[08:38:56.000] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[08:38:56.086] <TB1> INFO: dacScan step from 0 .. 29
[08:39:17.662] <TB1> INFO: Test took 21576ms.
[08:39:17.701] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:39:17.701] <TB1> INFO: dacScan step from 30 .. 59
[08:39:41.616] <TB1> INFO: Test took 23914ms.
[08:39:41.754] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:39:41.775] <TB1> INFO: dacScan step from 60 .. 89
[08:40:11.216] <TB1> INFO: Test took 29440ms.
[08:40:11.503] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:11.591] <TB1> INFO: dacScan step from 90 .. 119
[08:40:40.926] <TB1> INFO: Test took 29335ms.
[08:40:41.169] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:41.236] <TB1> INFO: dacScan step from 120 .. 149
[08:41:05.782] <TB1> INFO: Test took 24546ms.
[08:41:05.961] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:30.701] <TB1> INFO: PixTestBBMap::doTest() done, duration: 154 seconds
[08:41:30.701] <TB1> INFO: number of dead bumps (per ROC): 0 0 0 0 3 0 0 0 0 0 1 0 0 0 0 1
[08:41:30.701] <TB1> INFO: separation cut (per ROC): 83 102 96 76 68 97 76 93 78 89 79 91 76 77 78 72
[08:41:30.773] <TB1> INFO: ######################################################################
[08:41:30.773] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50
[08:41:30.773] <TB1> INFO: ######################################################################
[08:41:30.773] <TB1> INFO: ----------------------------------------------------------------------
[08:41:30.773] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[08:41:30.773] <TB1> INFO: ----------------------------------------------------------------------
[08:41:30.773] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[08:41:30.781] <TB1> INFO: dacScan step from 0 .. 3
[08:41:49.948] <TB1> INFO: Test took 19166ms.
[08:41:49.975] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:49.975] <TB1> INFO: dacScan step from 4 .. 7
[08:42:09.175] <TB1> INFO: Test took 19200ms.
[08:42:09.201] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:09.201] <TB1> INFO: dacScan step from 8 .. 11
[08:42:28.463] <TB1> INFO: Test took 19262ms.
[08:42:28.491] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:28.491] <TB1> INFO: dacScan step from 12 .. 15
[08:42:47.665] <TB1> INFO: Test took 19174ms.
[08:42:47.698] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:47.698] <TB1> INFO: dacScan step from 16 .. 19
[08:43:06.889] <TB1> INFO: Test took 19191ms.
[08:43:06.914] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:06.919] <TB1> INFO: dacScan step from 20 .. 23
[08:43:26.082] <TB1> INFO: Test took 19163ms.
[08:43:26.118] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:26.118] <TB1> INFO: dacScan step from 24 .. 27
[08:43:45.250] <TB1> INFO: Test took 19132ms.
[08:43:45.281] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:45.281] <TB1> INFO: dacScan step from 28 .. 31
[08:44:04.425] <TB1> INFO: Test took 19144ms.
[08:44:04.450] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:04.456] <TB1> INFO: dacScan step from 32 .. 35
[08:44:23.581] <TB1> INFO: Test took 19125ms.
[08:44:23.612] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:23.612] <TB1> INFO: dacScan step from 36 .. 39
[08:44:42.874] <TB1> INFO: Test took 19262ms.
[08:44:42.902] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:42.902] <TB1> INFO: dacScan step from 40 .. 43
[08:45:02.089] <TB1> INFO: Test took 19187ms.
[08:45:02.121] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:02.122] <TB1> INFO: dacScan step from 44 .. 47
[08:45:21.443] <TB1> INFO: Test took 19321ms.
[08:45:21.470] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:21.470] <TB1> INFO: dacScan step from 48 .. 51
[08:45:40.640] <TB1> INFO: Test took 19169ms.
[08:45:40.669] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:40.670] <TB1> INFO: dacScan step from 52 .. 55
[08:46:00.030] <TB1> INFO: Test took 19360ms.
[08:46:00.060] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:46:00.060] <TB1> INFO: dacScan step from 56 .. 59
[08:46:19.460] <TB1> INFO: Test took 19400ms.
[08:46:19.492] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:46:19.492] <TB1> INFO: dacScan step from 60 .. 63
[08:46:38.963] <TB1> INFO: Test took 19470ms.
[08:46:39.002] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:46:39.002] <TB1> INFO: dacScan step from 64 .. 67
[08:46:58.829] <TB1> INFO: Test took 19827ms.
[08:46:58.877] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:46:58.878] <TB1> INFO: dacScan step from 68 .. 71
[08:47:19.342] <TB1> INFO: Test took 20464ms.
[08:47:19.405] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:47:19.407] <TB1> INFO: dacScan step from 72 .. 75
[08:47:40.650] <TB1> INFO: Test took 21243ms.
[08:47:40.736] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:47:40.740] <TB1> INFO: dacScan step from 76 .. 79
[08:48:03.315] <TB1> INFO: Test took 22575ms.
[08:48:03.423] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:48:03.429] <TB1> INFO: dacScan step from 80 .. 83
[08:48:26.337] <TB1> INFO: Test took 22908ms.
[08:48:26.497] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:48:26.510] <TB1> INFO: dacScan step from 84 .. 87
[08:48:51.048] <TB1> INFO: Test took 24537ms.
[08:48:51.240] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:48:51.251] <TB1> INFO: dacScan step from 88 .. 91





[08:49:16.617] <TB1> INFO: Test took 25366ms.
[08:49:16.900] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:49:16.914] <TB1> INFO: dacScan step from 92 .. 95
[08:49:44.200] <TB1> INFO: Test took 27286ms.
[08:49:44.436] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:49:44.447] <TB1> INFO: dacScan step from 96 .. 99


[08:50:13.694] <TB1> INFO: Test took 29247ms.
[08:50:13.963] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:50:13.977] <TB1> INFO: dacScan step from 100 .. 103



[08:50:43.627] <TB1> INFO: Test took 29650ms.
[08:50:43.895] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:50:43.909] <TB1> INFO: dacScan step from 104 .. 107





[08:51:13.531] <TB1> INFO: Test took 29622ms.
[08:51:13.775] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:51:13.789] <TB1> INFO: dacScan step from 108 .. 111


[08:51:43.787] <TB1> INFO: Test took 29998ms.
[08:51:44.021] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:51:44.036] <TB1> INFO: dacScan step from 112 .. 115
[08:52:14.015] <TB1> INFO: Test took 29979ms.
[08:52:14.283] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:52:14.297] <TB1> INFO: dacScan step from 116 .. 119
[08:52:44.129] <TB1> INFO: Test took 29832ms.
[08:52:44.398] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:52:44.410] <TB1> INFO: dacScan step from 120 .. 123
[08:53:14.244] <TB1> INFO: Test took 29834ms.
[08:53:14.492] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:53:14.503] <TB1> INFO: dacScan step from 124 .. 127
[08:53:44.239] <TB1> INFO: Test took 29736ms.
[08:53:44.533] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:53:44.547] <TB1> INFO: dacScan step from 128 .. 131
[08:54:14.378] <TB1> INFO: Test took 29830ms.
[08:54:14.680] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:54:14.695] <TB1> INFO: dacScan step from 132 .. 135
[08:54:44.406] <TB1> INFO: Test took 29711ms.
[08:54:44.673] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:54:44.685] <TB1> INFO: dacScan step from 136 .. 139
[08:55:14.367] <TB1> INFO: Test took 29682ms.
[08:55:14.662] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:55:14.677] <TB1> INFO: dacScan step from 140 .. 143
[08:55:44.384] <TB1> INFO: Test took 29707ms.
[08:55:44.622] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:55:44.634] <TB1> INFO: dacScan step from 144 .. 147
[08:56:14.109] <TB1> INFO: Test took 29475ms.
[08:56:14.363] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:14.375] <TB1> INFO: dacScan step from 148 .. 149
[08:56:30.469] <TB1> INFO: Test took 16094ms.
[08:56:30.589] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:30.596] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:56:32.049] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:56:33.487] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:56:34.922] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:56:36.429] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:56:38.036] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:56:39.523] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:56:41.046] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:56:42.487] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:56:43.986] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:56:45.481] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:56:47.017] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:56:48.511] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:56:50.010] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:56:51.621] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:56:53.227] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[08:56:54.831] <TB1> INFO: PixTestScurves::scurves() done
[08:56:54.831] <TB1> INFO: Vcal mean: 87.22 94.19 102.01 79.28 67.90 90.49 83.22 92.88 89.21 87.83 81.73 86.55 80.59 73.64 79.32 80.07
[08:56:54.831] <TB1> INFO: Vcal RMS: 5.20 6.37 5.99 4.56 4.49 6.07 5.40 5.40 6.52 5.16 4.96 5.15 4.61 4.88 4.40 4.99
[08:56:54.831] <TB1> INFO: PixTestScurves::fullTest() done, duration: 924 seconds
[08:56:54.903] <TB1> INFO: ######################################################################
[08:56:54.903] <TB1> INFO: PixTestTrim::doTest()
[08:56:54.903] <TB1> INFO: ######################################################################
[08:56:54.904] <TB1> INFO: ----------------------------------------------------------------------
[08:56:54.904] <TB1> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[08:56:54.904] <TB1> INFO: ----------------------------------------------------------------------
[08:56:54.989] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[08:56:54.989] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[08:56:54.998] <TB1> INFO: dacScan step from 0 .. 19
[08:57:10.146] <TB1> INFO: Test took 15148ms.
[08:57:10.172] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:57:10.172] <TB1> INFO: dacScan step from 20 .. 39
[08:57:25.456] <TB1> INFO: Test took 15284ms.
[08:57:25.483] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:57:25.483] <TB1> INFO: dacScan step from 40 .. 59
[08:57:39.978] <TB1> INFO: Test took 14494ms.
[08:57:39.999] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:57:39.999] <TB1> INFO: dacScan step from 60 .. 79
[08:57:54.401] <TB1> INFO: Test took 14402ms.
[08:57:54.425] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:57:54.425] <TB1> INFO: dacScan step from 80 .. 99
[08:58:10.328] <TB1> INFO: Test took 15903ms.
[08:58:10.407] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:58:10.418] <TB1> INFO: dacScan step from 100 .. 119
[08:58:29.869] <TB1> INFO: Test took 19451ms.
[08:58:30.042] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:58:30.074] <TB1> INFO: dacScan step from 120 .. 139
[08:58:49.211] <TB1> INFO: Test took 19137ms.
[08:58:49.380] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:58:49.411] <TB1> INFO: dacScan step from 140 .. 159
[08:59:05.619] <TB1> INFO: Test took 16208ms.
[08:59:05.685] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:59:27.624] <TB1> INFO: ROC 0 VthrComp = 93
[08:59:27.624] <TB1> INFO: ROC 1 VthrComp = 100
[08:59:27.624] <TB1> INFO: ROC 2 VthrComp = 101
[08:59:27.624] <TB1> INFO: ROC 3 VthrComp = 85
[08:59:27.624] <TB1> INFO: ROC 4 VthrComp = 74
[08:59:27.624] <TB1> INFO: ROC 5 VthrComp = 95
[08:59:27.625] <TB1> INFO: ROC 6 VthrComp = 87
[08:59:27.625] <TB1> INFO: ROC 7 VthrComp = 95
[08:59:27.625] <TB1> INFO: ROC 8 VthrComp = 95
[08:59:27.625] <TB1> INFO: ROC 9 VthrComp = 94
[08:59:27.625] <TB1> INFO: ROC 10 VthrComp = 84
[08:59:27.625] <TB1> INFO: ROC 11 VthrComp = 95
[08:59:27.625] <TB1> INFO: ROC 12 VthrComp = 87
[08:59:27.626] <TB1> INFO: ROC 13 VthrComp = 79
[08:59:27.626] <TB1> INFO: ROC 14 VthrComp = 86
[08:59:27.626] <TB1> INFO: ROC 15 VthrComp = 84
[08:59:27.626] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[08:59:27.626] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[08:59:27.636] <TB1> INFO: dacScan step from 0 .. 19
[08:59:42.845] <TB1> INFO: Test took 15209ms.
[08:59:42.873] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:59:42.873] <TB1> INFO: dacScan step from 20 .. 39
[08:59:58.266] <TB1> INFO: Test took 15393ms.
[08:59:58.306] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:59:58.312] <TB1> INFO: dacScan step from 40 .. 59
[09:00:16.013] <TB1> INFO: Test took 17700ms.
[09:00:16.167] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:00:16.205] <TB1> INFO: dacScan step from 60 .. 79
[09:00:35.222] <TB1> INFO: Test took 19016ms.
[09:00:35.407] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:00:35.465] <TB1> INFO: dacScan step from 80 .. 99
[09:00:55.134] <TB1> INFO: Test took 19669ms.
[09:00:55.346] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:00:55.406] <TB1> INFO: dacScan step from 100 .. 119
[09:01:15.815] <TB1> INFO: Test took 20409ms.
[09:01:16.001] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:16.055] <TB1> INFO: dacScan step from 120 .. 139
[09:01:36.459] <TB1> INFO: Test took 20404ms.
[09:01:36.640] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:36.692] <TB1> INFO: dacScan step from 140 .. 159
[09:01:57.140] <TB1> INFO: Test took 20447ms.
[09:01:57.316] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:24.765] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 58.033 for pixel 1/2 mean/min/max = 45.065/32.0596/58.0704
[09:02:24.766] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 59.0698 for pixel 11/78 mean/min/max = 45.479/31.8104/59.1476
[09:02:24.766] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 60.9316 for pixel 24/38 mean/min/max = 46.1354/31.1818/61.0891
[09:02:24.767] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 58.0305 for pixel 3/13 mean/min/max = 45.2669/32.4588/58.075
[09:02:24.767] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 56.5966 for pixel 51/9 mean/min/max = 45.6668/34.4865/56.8471
[09:02:24.767] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 58.9405 for pixel 1/76 mean/min/max = 44.6552/30.3568/58.9535
[09:02:24.768] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 59.5198 for pixel 13/6 mean/min/max = 45.4176/31.218/59.6173
[09:02:24.768] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 59.1003 for pixel 0/4 mean/min/max = 45.7526/32.3124/59.1928
[09:02:24.769] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 61.1116 for pixel 1/74 mean/min/max = 45.8652/30.4245/61.3059
[09:02:24.769] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 57.5676 for pixel 11/0 mean/min/max = 44.7331/31.8354/57.6308
[09:02:24.769] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 59.6207 for pixel 2/62 mean/min/max = 45.9368/32.1883/59.6854
[09:02:24.770] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 57.0864 for pixel 1/8 mean/min/max = 44.2687/31.1707/57.3668
[09:02:24.770] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 57.0281 for pixel 11/77 mean/min/max = 44.5309/31.8855/57.1762
[09:02:24.771] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 58.4827 for pixel 1/75 mean/min/max = 46.7407/34.8965/58.5849
[09:02:24.771] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 57.1658 for pixel 28/79 mean/min/max = 44.5519/31.822/57.2818
[09:02:24.771] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 58.5644 for pixel 1/3 mean/min/max = 45.7124/32.7698/58.655
[09:02:24.772] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:03:56.848] <TB1> INFO: Test took 92076ms.
[09:03:58.292] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:03:58.301] <TB1> INFO: dacScan step from 0 .. 19
[09:04:21.233] <TB1> INFO: Test took 22932ms.
[09:04:21.290] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:21.292] <TB1> INFO: dacScan step from 20 .. 39
[09:04:49.806] <TB1> INFO: Test took 28514ms.
[09:04:50.025] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:50.062] <TB1> INFO: dacScan step from 40 .. 59


[09:05:23.348] <TB1> INFO: Test took 33286ms.
[09:05:23.690] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:05:23.745] <TB1> INFO: dacScan step from 60 .. 79

[09:05:56.756] <TB1> INFO: Test took 33011ms.
[09:05:57.050] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:05:57.102] <TB1> INFO: dacScan step from 80 .. 99





[09:06:30.214] <TB1> INFO: Test took 33112ms.
[09:06:30.521] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:30.577] <TB1> INFO: dacScan step from 100 .. 119


[09:07:03.988] <TB1> INFO: Test took 33411ms.
[09:07:04.290] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:04.346] <TB1> INFO: dacScan step from 120 .. 139

[09:07:37.638] <TB1> INFO: Test took 33292ms.
[09:07:37.945] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:37.997] <TB1> INFO: dacScan step from 140 .. 159

[09:08:11.383] <TB1> INFO: Test took 33386ms.
[09:08:11.665] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:11.719] <TB1> INFO: dacScan step from 160 .. 179





[09:08:45.065] <TB1> INFO: Test took 33346ms.
[09:08:45.355] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:45.407] <TB1> INFO: dacScan step from 180 .. 199

[09:09:19.257] <TB1> INFO: Test took 33850ms.
[09:09:19.671] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:09:45.221] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.017557 .. 255.000000
[09:09:45.299] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[09:09:45.308] <TB1> INFO: dacScan step from 0 .. 19
[09:09:58.958] <TB1> INFO: Test took 13650ms.
[09:09:58.984] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:09:58.984] <TB1> INFO: dacScan step from 20 .. 39
[09:10:13.901] <TB1> INFO: Test took 14917ms.
[09:10:13.992] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:10:14.011] <TB1> INFO: dacScan step from 40 .. 59
[09:10:31.797] <TB1> INFO: Test took 17786ms.
[09:10:31.961] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:10:32.013] <TB1> INFO: dacScan step from 60 .. 79
[09:10:49.722] <TB1> INFO: Test took 17709ms.
[09:10:49.895] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:10:49.948] <TB1> INFO: dacScan step from 80 .. 99
[09:11:06.637] <TB1> INFO: Test took 16689ms.
[09:11:06.782] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:06.838] <TB1> INFO: dacScan step from 100 .. 119
[09:11:23.468] <TB1> INFO: Test took 16630ms.
[09:11:23.613] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:23.668] <TB1> INFO: dacScan step from 120 .. 139
[09:11:40.548] <TB1> INFO: Test took 16880ms.
[09:11:40.709] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:40.763] <TB1> INFO: dacScan step from 140 .. 159
[09:11:58.447] <TB1> INFO: Test took 17684ms.
[09:11:58.630] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:58.686] <TB1> INFO: dacScan step from 160 .. 179
[09:12:16.447] <TB1> INFO: Test took 17761ms.
[09:12:16.613] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:16.663] <TB1> INFO: dacScan step from 180 .. 199
[09:12:35.200] <TB1> INFO: Test took 18537ms.
[09:12:35.377] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:35.436] <TB1> INFO: dacScan step from 200 .. 219
[09:12:53.107] <TB1> INFO: Test took 17671ms.
[09:12:53.276] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:53.332] <TB1> INFO: dacScan step from 220 .. 239
[09:13:10.991] <TB1> INFO: Test took 17659ms.
[09:13:11.164] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:11.221] <TB1> INFO: dacScan step from 240 .. 255
[09:13:25.382] <TB1> INFO: Test took 14161ms.
[09:13:25.503] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:57.402] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 0.218738 .. 47.983180
[09:13:57.482] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 0 .. 57 (20) hits flags = 16 (plus default)
[09:13:57.491] <TB1> INFO: dacScan step from 0 .. 19
[09:14:11.097] <TB1> INFO: Test took 13606ms.
[09:14:11.122] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:11.122] <TB1> INFO: dacScan step from 20 .. 39
[09:14:25.822] <TB1> INFO: Test took 14700ms.
[09:14:25.897] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:25.912] <TB1> INFO: dacScan step from 40 .. 57
[09:14:41.257] <TB1> INFO: Test took 15345ms.
[09:14:41.392] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:57.579] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 8.734983 .. 46.651974
[09:14:57.657] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 8 .. 56 (20) hits flags = 16 (plus default)
[09:14:57.666] <TB1> INFO: dacScan step from 8 .. 27
[09:15:11.272] <TB1> INFO: Test took 13606ms.
[09:15:11.300] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:15:11.300] <TB1> INFO: dacScan step from 28 .. 47
[09:15:27.028] <TB1> INFO: Test took 15728ms.
[09:15:27.216] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:15:27.256] <TB1> INFO: dacScan step from 48 .. 56
[09:15:36.424] <TB1> INFO: Test took 9168ms.
[09:15:36.528] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:15:54.208] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 7.500000 .. 46.651974
[09:15:54.284] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 7 .. 56 (20) hits flags = 16 (plus default)
[09:15:54.292] <TB1> INFO: dacScan step from 7 .. 26
[09:16:07.316] <TB1> INFO: Test took 13024ms.
[09:16:07.337] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:07.338] <TB1> INFO: dacScan step from 27 .. 46
[09:16:22.616] <TB1> INFO: Test took 15278ms.
[09:16:22.794] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:22.847] <TB1> INFO: dacScan step from 47 .. 56
[09:16:32.626] <TB1> INFO: Test took 9778ms.
[09:16:32.696] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:48.426] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[09:16:48.426] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[09:16:48.435] <TB1> INFO: dacScan step from 15 .. 34
[09:17:11.854] <TB1> INFO: Test took 23418ms.
[09:17:11.932] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:11.943] <TB1> INFO: dacScan step from 35 .. 54

[09:17:42.051] <TB1> INFO: Test took 30108ms.
[09:17:42.344] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:42.398] <TB1> INFO: dacScan step from 55 .. 55
[09:17:46.613] <TB1> INFO: Test took 4215ms.
[09:17:46.630] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:02.048] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:18:02.049] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:18:02.049] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:18:02.049] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:18:02.049] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:18:02.049] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:18:02.050] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:18:02.050] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:18:02.050] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:18:02.050] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:18:02.051] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:18:02.051] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:18:02.051] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:18:02.051] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:18:02.052] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:18:02.052] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:18:02.052] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C0.dat
[09:18:02.061] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C1.dat
[09:18:02.067] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C2.dat
[09:18:02.074] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C3.dat
[09:18:02.082] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C4.dat
[09:18:02.089] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C5.dat
[09:18:02.096] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C6.dat
[09:18:02.103] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C7.dat
[09:18:02.109] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C8.dat
[09:18:02.116] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C9.dat
[09:18:02.123] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C10.dat
[09:18:02.129] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C11.dat
[09:18:02.136] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C12.dat
[09:18:02.143] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C13.dat
[09:18:02.149] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C14.dat
[09:18:02.155] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//trimParameters35_C15.dat
[09:18:02.161] <TB1> INFO: PixTestTrim::trimTest() done
[09:18:02.161] <TB1> INFO: vtrim: 116 80 111 115 102 100 115 102 128 105 96 103 104 97 88 98
[09:18:02.161] <TB1> INFO: vthrcomp: 93 100 101 85 74 95 87 95 95 94 84 95 87 79 86 84
[09:18:02.161] <TB1> INFO: vcal mean: 35.05 35.07 34.97 35.07 35.06 35.01 35.04 35.01 35.03 34.99 35.06 35.01 35.06 35.06 35.05 35.01
[09:18:02.161] <TB1> INFO: vcal RMS: 1.01 1.08 1.48 1.02 0.98 0.99 1.17 1.09 1.10 1.16 1.03 1.05 1.00 0.99 1.00 1.20
[09:18:02.161] <TB1> INFO: bits mean: 10.29 7.87 9.87 10.05 9.37 9.95 10.29 9.39 10.07 9.89 9.43 10.17 10.11 8.85 9.31 9.76
[09:18:02.161] <TB1> INFO: bits RMS: 2.39 3.33 2.60 2.42 2.43 2.73 2.42 2.66 2.63 2.66 2.73 2.55 2.47 2.54 2.88 2.46
[09:18:02.171] <TB1> INFO: ----------------------------------------------------------------------
[09:18:02.171] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[09:18:02.171] <TB1> INFO: ----------------------------------------------------------------------
[09:18:02.177] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:18:02.186] <TB1> INFO: dacScan step from 0 .. 19
[09:18:23.521] <TB1> INFO: Test took 21335ms.
[09:18:23.557] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:23.557] <TB1> INFO: dacScan step from 20 .. 39
[09:18:45.285] <TB1> INFO: Test took 21727ms.
[09:18:45.334] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:45.334] <TB1> INFO: dacScan step from 40 .. 59
[09:19:06.921] <TB1> INFO: Test took 21587ms.
[09:19:06.956] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:06.956] <TB1> INFO: dacScan step from 60 .. 79
[09:19:28.427] <TB1> INFO: Test took 21471ms.
[09:19:28.465] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:28.465] <TB1> INFO: dacScan step from 80 .. 99
[09:19:50.609] <TB1> INFO: Test took 22144ms.
[09:19:50.712] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:50.719] <TB1> INFO: dacScan step from 100 .. 119
[09:20:18.625] <TB1> INFO: Test took 27906ms.
[09:20:18.854] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:18.879] <TB1> INFO: dacScan step from 120 .. 139
[09:20:52.021] <TB1> INFO: Test took 33142ms.
[09:20:52.312] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:52.359] <TB1> INFO: dacScan step from 140 .. 159
[09:21:24.948] <TB1> INFO: Test took 32589ms.
[09:21:25.234] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:25.289] <TB1> INFO: dacScan step from 160 .. 179
[09:21:58.637] <TB1> INFO: Test took 33348ms.
[09:21:58.914] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:58.966] <TB1> INFO: dacScan step from 180 .. 199
[09:22:31.314] <TB1> INFO: Test took 32348ms.
[09:22:31.610] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:58.386] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 176 (20) hits flags = 16 (plus default)
[09:22:58.395] <TB1> INFO: dacScan step from 0 .. 19
[09:23:21.175] <TB1> INFO: Test took 22780ms.
[09:23:21.212] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:23:21.212] <TB1> INFO: dacScan step from 20 .. 39
[09:23:44.026] <TB1> INFO: Test took 22814ms.
[09:23:44.066] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:23:44.066] <TB1> INFO: dacScan step from 40 .. 59
[09:24:06.817] <TB1> INFO: Test took 22751ms.
[09:24:06.854] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:06.854] <TB1> INFO: dacScan step from 60 .. 79
[09:24:29.750] <TB1> INFO: Test took 22895ms.
[09:24:29.794] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:29.794] <TB1> INFO: dacScan step from 80 .. 99
[09:24:54.376] <TB1> INFO: Test took 24582ms.
[09:24:54.524] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:54.538] <TB1> INFO: dacScan step from 100 .. 119


[09:25:24.813] <TB1> INFO: Test took 30275ms.
[09:25:25.111] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:25.146] <TB1> INFO: dacScan step from 120 .. 139


[09:25:58.587] <TB1> INFO: Test took 33440ms.
[09:25:58.875] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:58.935] <TB1> INFO: dacScan step from 140 .. 159
[09:26:29.362] <TB1> INFO: Test took 30427ms.
[09:26:29.803] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:26:29.866] <TB1> INFO: dacScan step from 160 .. 176
[09:26:56.500] <TB1> INFO: Test took 26634ms.
[09:26:56.783] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:27:20.945] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 161 (20) hits flags = 16 (plus default)
[09:27:20.954] <TB1> INFO: dacScan step from 0 .. 19
[09:27:43.708] <TB1> INFO: Test took 22754ms.
[09:27:43.746] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:27:43.746] <TB1> INFO: dacScan step from 20 .. 39
[09:28:06.563] <TB1> INFO: Test took 22817ms.
[09:28:06.600] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:06.600] <TB1> INFO: dacScan step from 40 .. 59
[09:28:29.289] <TB1> INFO: Test took 22689ms.
[09:28:29.328] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:29.328] <TB1> INFO: dacScan step from 60 .. 79
[09:28:52.341] <TB1> INFO: Test took 23012ms.
[09:28:52.383] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:52.383] <TB1> INFO: dacScan step from 80 .. 99
[09:29:18.576] <TB1> INFO: Test took 26193ms.
[09:29:18.723] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:18.734] <TB1> INFO: dacScan step from 100 .. 119



[09:29:48.207] <TB1> INFO: Test took 29472ms.
[09:29:48.618] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:48.674] <TB1> INFO: dacScan step from 120 .. 139





[09:30:22.252] <TB1> INFO: Test took 33578ms.
[09:30:22.558] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:22.609] <TB1> INFO: dacScan step from 140 .. 159
[09:30:54.421] <TB1> INFO: Test took 31812ms.
[09:30:54.703] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:54.756] <TB1> INFO: dacScan step from 160 .. 161
[09:31:00.328] <TB1> INFO: Test took 5572ms.
[09:31:00.358] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:23.578] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 161 (20) hits flags = 16 (plus default)
[09:31:23.587] <TB1> INFO: dacScan step from 0 .. 19
[09:31:46.590] <TB1> INFO: Test took 23003ms.
[09:31:46.630] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:46.630] <TB1> INFO: dacScan step from 20 .. 39
[09:32:09.579] <TB1> INFO: Test took 22949ms.
[09:32:09.619] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:09.619] <TB1> INFO: dacScan step from 40 .. 59
[09:32:32.281] <TB1> INFO: Test took 22662ms.
[09:32:32.324] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:32.324] <TB1> INFO: dacScan step from 60 .. 79
[09:32:55.187] <TB1> INFO: Test took 22863ms.
[09:32:55.238] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:55.239] <TB1> INFO: dacScan step from 80 .. 99
[09:33:19.744] <TB1> INFO: Test took 24505ms.
[09:33:19.911] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:19.927] <TB1> INFO: dacScan step from 100 .. 119


[09:33:49.496] <TB1> INFO: Test took 29569ms.
[09:33:49.830] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:49.872] <TB1> INFO: dacScan step from 120 .. 139


[09:34:23.372] <TB1> INFO: Test took 33500ms.
[09:34:23.675] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:23.725] <TB1> INFO: dacScan step from 140 .. 159
[09:34:54.214] <TB1> INFO: Test took 30489ms.
[09:34:54.513] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:54.567] <TB1> INFO: dacScan step from 160 .. 161
[09:35:00.324] <TB1> INFO: Test took 5757ms.
[09:35:00.366] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:26.294] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 158 (20) hits flags = 16 (plus default)
[09:35:26.303] <TB1> INFO: dacScan step from 0 .. 19
[09:35:49.042] <TB1> INFO: Test took 22739ms.
[09:35:49.083] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:49.083] <TB1> INFO: dacScan step from 20 .. 39
[09:36:12.072] <TB1> INFO: Test took 22988ms.
[09:36:12.109] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:12.109] <TB1> INFO: dacScan step from 40 .. 59
[09:36:33.503] <TB1> INFO: Test took 21394ms.
[09:36:33.541] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:33.541] <TB1> INFO: dacScan step from 60 .. 79
[09:36:56.444] <TB1> INFO: Test took 22903ms.
[09:36:56.490] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:56.490] <TB1> INFO: dacScan step from 80 .. 99
[09:37:22.901] <TB1> INFO: Test took 26411ms.
[09:37:23.066] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:23.081] <TB1> INFO: dacScan step from 100 .. 119





[09:37:52.720] <TB1> INFO: Test took 29639ms.
[09:37:53.049] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:53.093] <TB1> INFO: dacScan step from 120 .. 139


[09:38:26.754] <TB1> INFO: Test took 33661ms.
[09:38:27.052] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:27.106] <TB1> INFO: dacScan step from 140 .. 158
[09:38:56.598] <TB1> INFO: Test took 29492ms.
[09:38:56.923] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:23.169] <TB1> INFO: PixTestTrim::trimBitTest() done
[09:39:23.171] <TB1> INFO: PixTestTrim::doTest() done, duration: 2548 seconds
[09:39:23.880] <TB1> INFO: ######################################################################
[09:39:23.880] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[09:39:23.880] <TB1> INFO: ######################################################################
[09:39:27.343] <TB1> INFO: Test took 3461ms.
[09:39:27.373] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:31.037] <TB1> INFO: Test took 3464ms.
[09:39:31.117] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:34.585] <TB1> INFO: Test took 3454ms.
[09:39:34.659] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:34.668] <TB1> INFO: The DUT currently contains the following objects:
[09:39:34.668] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:39:34.668] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:39:34.668] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:39:34.668] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:39:34.668] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:34.668] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:34.668] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:34.668] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:34.668] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:34.668] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:34.668] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:34.668] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:34.668] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:34.668] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:34.668] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:34.668] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:34.668] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:34.668] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:34.668] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:34.668] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:35.774] <TB1> INFO: Test took 1106ms.
[09:39:35.775] <TB1> INFO: The DUT currently contains the following objects:
[09:39:35.775] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:39:35.775] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:39:35.775] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:39:35.775] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:39:35.775] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:35.775] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:35.775] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:35.775] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:35.775] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:35.775] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:35.775] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:35.775] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:35.775] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:35.775] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:35.775] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:35.775] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:35.775] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:35.775] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:35.775] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:35.775] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:36.887] <TB1> INFO: Test took 1112ms.
[09:39:36.888] <TB1> INFO: The DUT currently contains the following objects:
[09:39:36.888] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:39:36.888] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:39:36.888] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:39:36.888] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:39:36.888] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:36.888] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:36.888] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:36.888] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:36.888] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:36.888] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:36.888] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:36.888] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:36.888] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:36.888] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:36.888] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:36.889] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:36.889] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:36.889] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:36.889] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:36.889] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:38.001] <TB1> INFO: Test took 1112ms.
[09:39:38.002] <TB1> INFO: The DUT currently contains the following objects:
[09:39:38.002] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:39:38.002] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:39:38.002] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:39:38.002] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:39:38.002] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:38.002] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:38.002] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:38.002] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:38.002] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:38.002] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:38.002] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:38.003] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:38.003] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:38.003] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:38.003] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:38.003] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:38.003] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:38.003] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:38.003] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:38.003] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:39.114] <TB1> INFO: Test took 1111ms.
[09:39:39.115] <TB1> INFO: The DUT currently contains the following objects:
[09:39:39.115] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:39:39.115] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:39:39.115] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:39:39.115] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:39:39.115] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:39.116] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:39.116] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:39.116] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:39.116] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:39.116] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:39.116] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:39.116] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:39.116] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:39.116] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:39.116] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:39.116] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:39.116] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:39.116] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:39.116] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:39.116] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:40.227] <TB1> INFO: Test took 1111ms.
[09:39:40.228] <TB1> INFO: The DUT currently contains the following objects:
[09:39:40.228] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:39:40.228] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:39:40.228] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:39:40.228] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:39:40.228] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:40.228] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:40.228] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:40.228] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:40.228] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:40.228] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:40.228] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:40.228] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:40.228] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:40.228] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:40.228] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:40.228] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:40.228] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:40.228] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:40.228] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:40.228] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:41.340] <TB1> INFO: Test took 1112ms.
[09:39:41.341] <TB1> INFO: The DUT currently contains the following objects:
[09:39:41.341] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:39:41.341] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:39:41.341] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:39:41.341] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:39:41.341] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:41.341] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:41.341] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:41.341] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:41.341] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:41.341] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:41.341] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:41.341] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:41.341] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:41.341] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:41.341] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:41.341] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:41.342] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:41.342] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:41.342] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:41.342] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:42.454] <TB1> INFO: Test took 1112ms.
[09:39:42.455] <TB1> INFO: The DUT currently contains the following objects:
[09:39:42.455] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:39:42.455] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:39:42.455] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:39:42.455] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:39:42.455] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:42.455] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:42.455] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:42.455] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:42.455] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:42.455] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:42.455] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:42.455] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:42.455] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:42.455] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:42.456] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:42.456] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:42.456] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:42.456] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:42.456] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:42.456] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:43.567] <TB1> INFO: Test took 1111ms.
[09:39:43.568] <TB1> INFO: The DUT currently contains the following objects:
[09:39:43.568] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:39:43.568] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:39:43.568] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:39:43.568] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:39:43.568] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:43.568] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:43.568] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:43.568] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:43.568] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:43.568] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:43.568] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:43.568] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:43.568] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:43.569] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:43.569] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:43.569] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:43.569] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:43.569] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:43.569] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:43.569] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:44.679] <TB1> INFO: Test took 1110ms.
[09:39:44.680] <TB1> INFO: The DUT currently contains the following objects:
[09:39:44.685] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:39:44.685] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:39:44.685] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:39:44.685] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:39:44.685] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:44.685] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:44.685] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:44.685] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:44.685] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:44.685] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:44.685] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:44.685] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:44.685] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:44.686] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:44.686] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:44.686] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:44.686] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:44.686] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:44.686] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:44.686] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:45.793] <TB1> INFO: Test took 1107ms.
[09:39:45.794] <TB1> INFO: The DUT currently contains the following objects:
[09:39:45.794] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:39:45.794] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:39:45.794] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:39:45.794] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:39:45.794] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:45.794] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:45.794] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:45.794] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:45.794] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:45.794] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:45.794] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:45.794] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:45.794] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:45.795] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:45.795] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:45.795] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:45.795] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:45.795] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:45.795] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:45.795] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:46.906] <TB1> INFO: Test took 1111ms.
[09:39:46.908] <TB1> INFO: The DUT currently contains the following objects:
[09:39:46.909] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:39:46.909] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:39:46.909] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:39:46.909] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:39:46.909] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:46.909] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:46.909] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:46.909] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:46.909] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:46.909] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:46.909] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:46.909] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:46.909] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:46.909] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:46.909] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:46.909] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:46.909] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:46.909] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:46.909] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:46.909] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:48.020] <TB1> INFO: Test took 1111ms.
[09:39:48.021] <TB1> INFO: The DUT currently contains the following objects:
[09:39:48.021] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:39:48.021] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:39:48.021] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:39:48.021] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:39:48.021] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:48.021] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:48.022] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:48.022] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:48.022] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:48.022] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:48.022] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:48.022] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:48.022] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:48.022] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:48.022] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:48.022] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:48.022] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:48.022] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:48.022] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:48.022] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:49.138] <TB1> INFO: Test took 1116ms.
[09:39:49.140] <TB1> INFO: The DUT currently contains the following objects:
[09:39:49.140] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:39:49.140] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:39:49.140] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:39:49.140] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:39:49.140] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:49.140] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:49.140] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:49.140] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:49.140] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:49.140] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:49.140] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:49.141] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:49.141] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:49.141] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:49.141] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:49.141] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:49.141] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:49.141] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:49.141] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:49.141] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:50.252] <TB1> INFO: Test took 1111ms.
[09:39:50.253] <TB1> INFO: The DUT currently contains the following objects:
[09:39:50.253] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:39:50.253] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:39:50.253] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:39:50.253] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:39:50.253] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:50.253] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:50.253] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:50.253] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:50.253] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:50.253] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:50.253] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:50.253] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:50.253] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:50.253] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:50.253] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:50.253] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:50.254] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:50.254] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:50.254] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:50.254] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:51.366] <TB1> INFO: Test took 1112ms.
[09:39:51.367] <TB1> INFO: The DUT currently contains the following objects:
[09:39:51.367] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:39:51.367] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:39:51.367] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:39:51.367] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:39:51.367] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:51.367] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:51.367] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:51.368] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:51.368] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:51.368] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:51.368] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:51.368] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:51.368] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:51.368] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:51.368] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:51.368] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:51.368] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:51.368] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:51.368] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:51.368] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:39:52.480] <TB1> INFO: Test took 1112ms.
[09:39:52.488] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:43:37.700] <TB1> INFO: Test took 225212ms.
[09:43:39.401] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:27.523] <TB1> INFO: Test took 228122ms.
[09:47:29.355] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:47:29.362] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:47:29.369] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:47:29.376] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:47:29.383] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:47:29.390] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:47:29.397] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:47:29.403] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:47:29.410] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:47:29.417] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:47:29.424] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:47:29.431] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:47:29.438] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:47:29.445] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:47:29.452] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:47:29.458] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[09:47:29.532] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:47:29.542] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:47:29.550] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:47:29.555] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:47:29.555] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:47:29.556] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:47:29.557] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:47:29.557] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:47:29.558] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:47:29.558] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:47:29.558] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:47:29.558] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:47:29.559] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:47:29.559] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:47:29.559] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:47:29.560] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:47:33.018] <TB1> INFO: Test took 3454ms.
[09:47:36.818] <TB1> INFO: Test took 3507ms.
[09:47:40.434] <TB1> INFO: Test took 3323ms.
[09:47:40.713] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:41.629] <TB1> INFO: Test took 916ms.
[09:47:41.632] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:42.737] <TB1> INFO: Test took 1105ms.
[09:47:42.740] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:43.846] <TB1> INFO: Test took 1106ms.
[09:47:43.849] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:44.952] <TB1> INFO: Test took 1103ms.
[09:47:44.955] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:46.058] <TB1> INFO: Test took 1103ms.
[09:47:46.061] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:47.164] <TB1> INFO: Test took 1103ms.
[09:47:47.167] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:48.271] <TB1> INFO: Test took 1104ms.
[09:47:48.274] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:49.379] <TB1> INFO: Test took 1105ms.
[09:47:49.382] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:50.488] <TB1> INFO: Test took 1106ms.
[09:47:50.491] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:51.594] <TB1> INFO: Test took 1103ms.
[09:47:51.597] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:52.701] <TB1> INFO: Test took 1104ms.
[09:47:52.704] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:53.808] <TB1> INFO: Test took 1104ms.
[09:47:53.811] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:54.915] <TB1> INFO: Test took 1104ms.
[09:47:54.918] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:56.021] <TB1> INFO: Test took 1103ms.
[09:47:56.024] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:57.130] <TB1> INFO: Test took 1106ms.
[09:47:57.133] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:58.239] <TB1> INFO: Test took 1106ms.
[09:47:58.242] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:47:59.347] <TB1> INFO: Test took 1105ms.
[09:47:59.350] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:48:00.453] <TB1> INFO: Test took 1103ms.
[09:48:00.456] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:48:01.560] <TB1> INFO: Test took 1104ms.
[09:48:01.563] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:48:02.667] <TB1> INFO: Test took 1104ms.
[09:48:02.670] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:48:03.773] <TB1> INFO: Test took 1103ms.
[09:48:03.777] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:48:04.882] <TB1> INFO: Test took 1106ms.
[09:48:04.886] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:48:05.990] <TB1> INFO: Test took 1104ms.
[09:48:05.993] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:48:07.097] <TB1> INFO: Test took 1104ms.
[09:48:07.101] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:48:08.205] <TB1> INFO: Test took 1105ms.
[09:48:08.208] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:48:09.312] <TB1> INFO: Test took 1104ms.
[09:48:09.315] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:48:10.418] <TB1> INFO: Test took 1103ms.
[09:48:10.422] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:48:11.526] <TB1> INFO: Test took 1104ms.
[09:48:11.529] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:48:12.633] <TB1> INFO: Test took 1105ms.
[09:48:12.637] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:48:13.741] <TB1> INFO: Test took 1104ms.
[09:48:13.744] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:48:14.847] <TB1> INFO: Test took 1103ms.
[09:48:14.851] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:48:15.961] <TB1> INFO: Test took 1110ms.
[09:48:16.561] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 532 seconds
[09:48:16.561] <TB1> INFO: PH scale (per ROC): 94 87 84 93 89 84 89 80 97 76 80 79 80 96 97 86
[09:48:16.561] <TB1> INFO: PH offset (per ROC): 144 153 158 150 151 161 167 165 161 169 160 167 151 145 150 155
[09:48:16.762] <TB1> INFO: ######################################################################
[09:48:16.762] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[09:48:16.762] <TB1> INFO: ######################################################################
[09:48:16.774] <TB1> INFO: scanning low vcal = 10
[09:48:20.586] <TB1> INFO: Test took 3812ms.
[09:48:20.590] <TB1> INFO: scanning low vcal = 20
[09:48:24.389] <TB1> INFO: Test took 3799ms.
[09:48:24.394] <TB1> INFO: scanning low vcal = 30
[09:48:28.195] <TB1> INFO: Test took 3801ms.
[09:48:28.208] <TB1> INFO: scanning low vcal = 40
[09:48:32.439] <TB1> INFO: Test took 4231ms.
[09:48:32.527] <TB1> INFO: scanning low vcal = 50
[09:48:36.772] <TB1> INFO: Test took 4245ms.
[09:48:36.838] <TB1> INFO: scanning low vcal = 60
[09:48:41.058] <TB1> INFO: Test took 4220ms.
[09:48:41.116] <TB1> INFO: scanning low vcal = 70
[09:48:45.338] <TB1> INFO: Test took 4221ms.
[09:48:45.419] <TB1> INFO: scanning low vcal = 80
[09:48:49.808] <TB1> INFO: Test took 4389ms.
[09:48:49.877] <TB1> INFO: scanning low vcal = 90
[09:48:54.200] <TB1> INFO: Test took 4323ms.
[09:48:54.293] <TB1> INFO: scanning low vcal = 100
[09:48:58.561] <TB1> INFO: Test took 4268ms.
[09:48:58.620] <TB1> INFO: scanning low vcal = 110
[09:49:02.881] <TB1> INFO: Test took 4261ms.
[09:49:02.956] <TB1> INFO: scanning low vcal = 120
[09:49:07.202] <TB1> INFO: Test took 4246ms.
[09:49:07.305] <TB1> INFO: scanning low vcal = 130
[09:49:11.553] <TB1> INFO: Test took 4248ms.
[09:49:11.647] <TB1> INFO: scanning low vcal = 140
[09:49:15.922] <TB1> INFO: Test took 4275ms.
[09:49:15.998] <TB1> INFO: scanning low vcal = 150
[09:49:20.259] <TB1> INFO: Test took 4261ms.
[09:49:20.324] <TB1> INFO: scanning low vcal = 160
[09:49:24.556] <TB1> INFO: Test took 4232ms.
[09:49:24.635] <TB1> INFO: scanning low vcal = 170
[09:49:28.892] <TB1> INFO: Test took 4257ms.
[09:49:28.983] <TB1> INFO: scanning low vcal = 180
[09:49:33.223] <TB1> INFO: Test took 4240ms.
[09:49:33.281] <TB1> INFO: scanning low vcal = 190
[09:49:37.681] <TB1> INFO: Test took 4400ms.
[09:49:37.742] <TB1> INFO: scanning low vcal = 200
[09:49:41.970] <TB1> INFO: Test took 4228ms.
[09:49:42.030] <TB1> INFO: scanning low vcal = 210
[09:49:46.286] <TB1> INFO: Test took 4256ms.
[09:49:46.348] <TB1> INFO: scanning low vcal = 220
[09:49:50.712] <TB1> INFO: Test took 4364ms.
[09:49:50.781] <TB1> INFO: scanning low vcal = 230
[09:49:55.101] <TB1> INFO: Test took 4320ms.
[09:49:55.166] <TB1> INFO: scanning low vcal = 240
[09:49:59.532] <TB1> INFO: Test took 4366ms.
[09:49:59.605] <TB1> INFO: scanning low vcal = 250
[09:50:03.989] <TB1> INFO: Test took 4384ms.
[09:50:04.051] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[09:50:08.413] <TB1> INFO: Test took 4362ms.
[09:50:08.476] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[09:50:12.861] <TB1> INFO: Test took 4385ms.
[09:50:12.925] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[09:50:17.338] <TB1> INFO: Test took 4413ms.
[09:50:17.404] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[09:50:21.798] <TB1> INFO: Test took 4394ms.
[09:50:21.862] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[09:50:26.247] <TB1> INFO: Test took 4385ms.
[09:50:26.801] <TB1> INFO: PixTestGainPedestal::measure() done
[09:51:00.287] <TB1> INFO: PixTestGainPedestal::fit() done
[09:51:00.288] <TB1> INFO: non-linearity mean: 0.960 0.954 0.958 0.950 0.951 0.954 0.955 0.956 0.958 0.954 0.957 0.957 0.953 0.960 0.955 0.956
[09:51:00.288] <TB1> INFO: non-linearity RMS: 0.005 0.007 0.007 0.006 0.006 0.005 0.006 0.005 0.006 0.007 0.005 0.005 0.006 0.005 0.005 0.010
[09:51:00.288] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[09:51:00.308] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[09:51:00.327] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[09:51:00.347] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[09:51:00.383] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[09:51:00.403] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[09:51:00.422] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[09:51:00.442] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[09:51:00.462] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[09:51:00.481] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[09:51:00.501] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[09:51:00.521] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[09:51:00.540] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[09:51:00.560] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[09:51:00.580] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[09:51:00.599] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2044_FullQualification_2015-08-19_10h30m_1439973003//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[09:51:00.619] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 163 seconds
[09:51:00.625] <TB1> INFO: enter test to run
[09:51:00.626] <TB1> INFO: test: exit no parameter change
[09:51:01.068] <TB1> QUIET: Connection to board 153 closed.
[09:51:01.148] <TB1> INFO: pXar: this is the end, my friend