[13:05:15.589] <TB3> INFO: *** Welcome to pxar ***
[13:05:15.589] <TB3> INFO: *** Today: 2015/07/23
[13:05:15.589] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C15.dat
[13:05:15.591] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//tbmParameters_C0b.dat
[13:05:15.591] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//defaultMaskFile.dat
[13:05:15.591] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters_C15.dat
[13:05:15.659] <TB3> INFO: clk: 4
[13:05:15.659] <TB3> INFO: ctr: 4
[13:05:15.659] <TB3> INFO: sda: 19
[13:05:15.659] <TB3> INFO: tin: 9
[13:05:15.659] <TB3> INFO: level: 15
[13:05:15.659] <TB3> INFO: triggerdelay: 0
[13:05:15.659] <TB3> QUIET: Instanciating API for pxar v2.2.5+46~gdbe75a1
[13:05:15.659] <TB3> INFO: Log level: INFO
[13:05:15.667] <TB3> INFO: Found DTB DTB_WZ4I6J
[13:05:15.675] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[13:05:15.678] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[13:05:15.681] <TB3> INFO: RPC call hashes of host and DTB match: 447413373
[13:05:17.243] <TB3> INFO: DUT info:
[13:05:17.243] <TB3> INFO: The DUT currently contains the following objects:
[13:05:17.243] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:05:17.243] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:05:17.243] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:05:17.243] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[13:05:17.243] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:17.243] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:17.243] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:17.243] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:17.243] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:17.243] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:17.243] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:17.244] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:17.244] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:17.244] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:17.244] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:17.244] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:17.244] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:17.244] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:17.244] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:17.244] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:17.645] <TB3> INFO: enter 'restricted' command line mode
[13:05:17.645] <TB3> INFO: enter test to run
[13:05:17.645] <TB3> INFO: test: pretest no parameter change
[13:05:17.645] <TB3> INFO: running: pretest
[13:05:17.652] <TB3> INFO: ######################################################################
[13:05:17.652] <TB3> INFO: PixTestPretest::doTest()
[13:05:17.652] <TB3> INFO: ######################################################################
[13:05:17.653] <TB3> INFO: ----------------------------------------------------------------------
[13:05:17.653] <TB3> INFO: PixTestPretest::programROC()
[13:05:17.653] <TB3> INFO: ----------------------------------------------------------------------
[13:05:35.671] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[13:05:35.671] <TB3> INFO: IA differences per ROC: 18.5 18.5 18.5 19.3 20.1 19.3 17.7 19.3 16.1 20.1 17.7 19.3 20.9 18.5 19.3 17.7
[13:05:35.740] <TB3> INFO: ----------------------------------------------------------------------
[13:05:35.740] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[13:05:35.740] <TB3> INFO: ----------------------------------------------------------------------
[13:05:55.293] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 387.5 mA = 24.2188 mA/ROC
[13:05:55.296] <TB3> INFO: ----------------------------------------------------------------------
[13:05:55.296] <TB3> INFO: PixTestPretest::findWorkingPixel()
[13:05:55.296] <TB3> INFO: ----------------------------------------------------------------------
[13:06:03.500] <TB3> INFO: Test took 8198ms.
[13:06:03.786] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[13:06:03.821] <TB3> INFO: ----------------------------------------------------------------------
[13:06:03.821] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[13:06:03.821] <TB3> INFO: ----------------------------------------------------------------------
[13:06:12.055] <TB3> INFO: Test took 8229ms.
[13:06:12.368] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[13:06:12.368] <TB3> INFO: CalDel: 141 143 134 157 157 156 148 150 138 142 145 144 142 147 144 150
[13:06:12.368] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[13:06:12.372] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C0.dat
[13:06:12.373] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C1.dat
[13:06:12.373] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C2.dat
[13:06:12.374] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C3.dat
[13:06:12.374] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C4.dat
[13:06:12.374] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C5.dat
[13:06:12.374] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C6.dat
[13:06:12.375] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C7.dat
[13:06:12.375] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C8.dat
[13:06:12.375] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C9.dat
[13:06:12.376] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C10.dat
[13:06:12.376] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C11.dat
[13:06:12.376] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C12.dat
[13:06:12.376] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C13.dat
[13:06:12.376] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C14.dat
[13:06:12.377] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C15.dat
[13:06:12.377] <TB3> INFO: PixTestPretest::doTest() done, duration: 54 seconds
[13:06:12.490] <TB3> INFO: enter test to run
[13:06:12.490] <TB3> INFO: test: fulltest no parameter change
[13:06:12.490] <TB3> INFO: running: fulltest
[13:06:12.490] <TB3> INFO: ######################################################################
[13:06:12.490] <TB3> INFO: PixTestFullTest::doTest()
[13:06:12.490] <TB3> INFO: ######################################################################
[13:06:12.492] <TB3> INFO: ######################################################################
[13:06:12.492] <TB3> INFO: PixTestAlive::doTest()
[13:06:12.492] <TB3> INFO: ######################################################################
[13:06:12.493] <TB3> INFO: ----------------------------------------------------------------------
[13:06:12.493] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:06:12.493] <TB3> INFO: ----------------------------------------------------------------------
[13:06:15.971] <TB3> INFO: Test took 3476ms.
[13:06:15.998] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:16.226] <TB3> INFO: PixTestAlive::aliveTest() done
[13:06:16.226] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:06:16.227] <TB3> INFO: ----------------------------------------------------------------------
[13:06:16.227] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:06:16.227] <TB3> INFO: ----------------------------------------------------------------------
[13:06:18.951] <TB3> INFO: Test took 2722ms.
[13:06:18.953] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:18.953] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[13:06:19.176] <TB3> INFO: PixTestAlive::maskTest() done
[13:06:19.176] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:06:19.178] <TB3> INFO: ----------------------------------------------------------------------
[13:06:19.178] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:06:19.178] <TB3> INFO: ----------------------------------------------------------------------
[13:06:22.587] <TB3> INFO: Test took 3408ms.
[13:06:22.614] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:22.837] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[13:06:22.838] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:06:22.838] <TB3> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[13:06:22.852] <TB3> INFO: ######################################################################
[13:06:22.852] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[13:06:22.852] <TB3> INFO: ######################################################################
[13:06:22.855] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[13:06:22.868] <TB3> INFO: dacScan step from 0 .. 29
[13:06:44.327] <TB3> INFO: Test took 21458ms.
[13:06:44.368] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:44.368] <TB3> INFO: dacScan step from 30 .. 59
[13:07:08.221] <TB3> INFO: Test took 23853ms.
[13:07:08.353] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:08.375] <TB3> INFO: dacScan step from 60 .. 89
[13:07:37.143] <TB3> INFO: Test took 28767ms.
[13:07:37.500] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:37.600] <TB3> INFO: dacScan step from 90 .. 119
[13:08:04.652] <TB3> INFO: Test took 27052ms.
[13:08:05.011] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:05.088] <TB3> INFO: dacScan step from 120 .. 149
[13:08:28.948] <TB3> INFO: Test took 23860ms.
[13:08:29.135] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:53.224] <TB3> INFO: PixTestBBMap::doTest() done, duration: 150 seconds
[13:08:53.224] <TB3> INFO: number of dead bumps (per ROC): 4 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0
[13:08:53.224] <TB3> INFO: separation cut (per ROC): 91 82 74 76 74 69 67 88 67 76 87 81 89 76 86 79
[13:08:53.300] <TB3> INFO: ######################################################################
[13:08:53.300] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50
[13:08:53.300] <TB3> INFO: ######################################################################
[13:08:53.300] <TB3> INFO: ----------------------------------------------------------------------
[13:08:53.300] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[13:08:53.300] <TB3> INFO: ----------------------------------------------------------------------
[13:08:53.300] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[13:08:53.310] <TB3> INFO: dacScan step from 0 .. 3
[13:09:12.108] <TB3> INFO: Test took 18798ms.
[13:09:12.134] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:12.134] <TB3> INFO: dacScan step from 4 .. 7
[13:09:31.009] <TB3> INFO: Test took 18875ms.
[13:09:31.040] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:31.040] <TB3> INFO: dacScan step from 8 .. 11
[13:09:50.033] <TB3> INFO: Test took 18993ms.
[13:09:50.062] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:50.062] <TB3> INFO: dacScan step from 12 .. 15
[13:10:09.032] <TB3> INFO: Test took 18970ms.
[13:10:09.062] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:09.062] <TB3> INFO: dacScan step from 16 .. 19
[13:10:28.003] <TB3> INFO: Test took 18941ms.
[13:10:28.033] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:28.033] <TB3> INFO: dacScan step from 20 .. 23
[13:10:46.934] <TB3> INFO: Test took 18901ms.
[13:10:46.962] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:46.962] <TB3> INFO: dacScan step from 24 .. 27
[13:11:05.824] <TB3> INFO: Test took 18862ms.
[13:11:05.852] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:05.852] <TB3> INFO: dacScan step from 28 .. 31
[13:11:24.738] <TB3> INFO: Test took 18886ms.
[13:11:24.765] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:24.765] <TB3> INFO: dacScan step from 32 .. 35
[13:11:43.434] <TB3> INFO: Test took 18669ms.
[13:11:43.462] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:43.462] <TB3> INFO: dacScan step from 36 .. 39
[13:12:02.304] <TB3> INFO: Test took 18842ms.
[13:12:02.338] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:02.338] <TB3> INFO: dacScan step from 40 .. 43
[13:12:21.172] <TB3> INFO: Test took 18833ms.
[13:12:21.200] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:21.200] <TB3> INFO: dacScan step from 44 .. 47
[13:12:40.163] <TB3> INFO: Test took 18963ms.
[13:12:40.192] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:40.192] <TB3> INFO: dacScan step from 48 .. 51
[13:12:59.130] <TB3> INFO: Test took 18938ms.
[13:12:59.156] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:59.156] <TB3> INFO: dacScan step from 52 .. 55
[13:13:18.083] <TB3> INFO: Test took 18927ms.
[13:13:18.119] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:18.119] <TB3> INFO: dacScan step from 56 .. 59
[13:13:36.992] <TB3> INFO: Test took 18872ms.
[13:13:37.022] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:37.023] <TB3> INFO: dacScan step from 60 .. 63
[13:13:56.038] <TB3> INFO: Test took 19015ms.
[13:13:56.076] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:56.076] <TB3> INFO: dacScan step from 64 .. 67
[13:14:15.442] <TB3> INFO: Test took 19365ms.
[13:14:15.503] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:15.505] <TB3> INFO: dacScan step from 68 .. 71
[13:14:35.754] <TB3> INFO: Test took 20249ms.
[13:14:35.836] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:35.839] <TB3> INFO: dacScan step from 72 .. 75
[13:14:57.199] <TB3> INFO: Test took 21360ms.
[13:14:57.327] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:57.332] <TB3> INFO: dacScan step from 76 .. 79
[13:15:20.471] <TB3> INFO: Test took 23139ms.
[13:15:20.609] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:20.615] <TB3> INFO: dacScan step from 80 .. 83
[13:15:46.383] <TB3> INFO: Test took 25768ms.
[13:15:46.590] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:46.598] <TB3> INFO: dacScan step from 84 .. 87
[13:16:13.695] <TB3> INFO: Test took 27096ms.
[13:16:13.918] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:13.927] <TB3> INFO: dacScan step from 88 .. 91


[13:16:41.797] <TB3> INFO: Test took 27870ms.
[13:16:42.060] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:42.072] <TB3> INFO: dacScan step from 92 .. 95


[13:17:10.941] <TB3> INFO: Test took 28869ms.
[13:17:11.177] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:11.189] <TB3> INFO: dacScan step from 96 .. 99





[13:17:40.137] <TB3> INFO: Test took 28948ms.
[13:17:40.375] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:40.388] <TB3> INFO: dacScan step from 100 .. 103


[13:18:09.688] <TB3> INFO: Test took 29299ms.
[13:18:09.918] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:09.931] <TB3> INFO: dacScan step from 104 .. 107


[13:18:38.828] <TB3> INFO: Test took 28897ms.
[13:18:39.078] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:39.094] <TB3> INFO: dacScan step from 108 .. 111
[13:19:08.246] <TB3> INFO: Test took 29152ms.
[13:19:08.491] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:08.503] <TB3> INFO: dacScan step from 112 .. 115



[13:19:37.672] <TB3> INFO: Test took 29169ms.
[13:19:37.913] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:37.926] <TB3> INFO: dacScan step from 116 .. 119
[13:20:06.913] <TB3> INFO: Test took 28987ms.
[13:20:07.181] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:07.196] <TB3> INFO: dacScan step from 120 .. 123
[13:20:36.462] <TB3> INFO: Test took 29266ms.
[13:20:36.744] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:36.759] <TB3> INFO: dacScan step from 124 .. 127
[13:21:05.771] <TB3> INFO: Test took 29012ms.
[13:21:05.996] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:06.009] <TB3> INFO: dacScan step from 128 .. 131
[13:21:35.056] <TB3> INFO: Test took 29047ms.
[13:21:35.374] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:35.389] <TB3> INFO: dacScan step from 132 .. 135
[13:22:04.595] <TB3> INFO: Test took 29206ms.
[13:22:04.842] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:04.856] <TB3> INFO: dacScan step from 136 .. 139
[13:22:34.080] <TB3> INFO: Test took 29224ms.
[13:22:34.351] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:34.363] <TB3> INFO: dacScan step from 140 .. 143
[13:23:03.418] <TB3> INFO: Test took 29055ms.
[13:23:03.674] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:03.686] <TB3> INFO: dacScan step from 144 .. 147
[13:23:30.159] <TB3> INFO: Test took 26472ms.
[13:23:30.405] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:30.418] <TB3> INFO: dacScan step from 148 .. 149
[13:23:44.785] <TB3> INFO: Test took 14367ms.
[13:23:44.902] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:44.908] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:46.389] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:48.021] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:49.631] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:51.092] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:52.594] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:54.126] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:55.601] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:56.984] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:58.402] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:23:59.873] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:24:01.335] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:24:02.800] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:24:04.210] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:24:05.641] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:24:07.042] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:24:08.468] <TB3> INFO: PixTestScurves::scurves() done
[13:24:08.468] <TB3> INFO: Vcal mean: 92.27 85.02 69.81 75.06 79.48 77.32 74.39 93.16 80.11 75.17 86.05 78.49 90.25 74.01 81.43 86.00
[13:24:08.468] <TB3> INFO: Vcal RMS: 5.56 5.86 5.13 4.70 4.19 4.59 4.26 5.57 4.40 4.94 5.41 4.39 5.81 4.47 4.70 4.94
[13:24:08.468] <TB3> INFO: PixTestScurves::fullTest() done, duration: 915 seconds
[13:24:08.558] <TB3> INFO: ######################################################################
[13:24:08.558] <TB3> INFO: PixTestTrim::doTest()
[13:24:08.558] <TB3> INFO: ######################################################################
[13:24:08.560] <TB3> INFO: ----------------------------------------------------------------------
[13:24:08.560] <TB3> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:24:08.560] <TB3> INFO: ----------------------------------------------------------------------
[13:24:08.663] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:24:08.663] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:24:08.673] <TB3> INFO: dacScan step from 0 .. 19
[13:24:23.759] <TB3> INFO: Test took 15086ms.
[13:24:23.780] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:23.780] <TB3> INFO: dacScan step from 20 .. 39
[13:24:38.902] <TB3> INFO: Test took 15122ms.
[13:24:38.928] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:38.928] <TB3> INFO: dacScan step from 40 .. 59
[13:24:54.008] <TB3> INFO: Test took 15080ms.
[13:24:54.030] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:54.030] <TB3> INFO: dacScan step from 60 .. 79
[13:25:08.858] <TB3> INFO: Test took 14828ms.
[13:25:08.886] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:08.886] <TB3> INFO: dacScan step from 80 .. 99
[13:25:25.265] <TB3> INFO: Test took 16379ms.
[13:25:25.354] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:25.366] <TB3> INFO: dacScan step from 100 .. 119
[13:25:43.967] <TB3> INFO: Test took 18600ms.
[13:25:44.177] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:44.245] <TB3> INFO: dacScan step from 120 .. 139
[13:26:01.547] <TB3> INFO: Test took 17302ms.
[13:26:01.703] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:01.732] <TB3> INFO: dacScan step from 140 .. 159
[13:26:16.752] <TB3> INFO: Test took 15020ms.
[13:26:16.824] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:37.958] <TB3> INFO: ROC 0 VthrComp = 97
[13:26:37.958] <TB3> INFO: ROC 1 VthrComp = 87
[13:26:37.958] <TB3> INFO: ROC 2 VthrComp = 78
[13:26:37.958] <TB3> INFO: ROC 3 VthrComp = 81
[13:26:37.958] <TB3> INFO: ROC 4 VthrComp = 84
[13:26:37.959] <TB3> INFO: ROC 5 VthrComp = 80
[13:26:37.959] <TB3> INFO: ROC 6 VthrComp = 79
[13:26:37.959] <TB3> INFO: ROC 7 VthrComp = 99
[13:26:37.959] <TB3> INFO: ROC 8 VthrComp = 84
[13:26:37.959] <TB3> INFO: ROC 9 VthrComp = 83
[13:26:37.959] <TB3> INFO: ROC 10 VthrComp = 93
[13:26:37.959] <TB3> INFO: ROC 11 VthrComp = 86
[13:26:37.960] <TB3> INFO: ROC 12 VthrComp = 95
[13:26:37.960] <TB3> INFO: ROC 13 VthrComp = 79
[13:26:37.960] <TB3> INFO: ROC 14 VthrComp = 88
[13:26:37.960] <TB3> INFO: ROC 15 VthrComp = 88
[13:26:37.960] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:26:37.960] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:26:37.970] <TB3> INFO: dacScan step from 0 .. 19
[13:26:52.980] <TB3> INFO: Test took 15010ms.
[13:26:53.006] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:53.006] <TB3> INFO: dacScan step from 20 .. 39
[13:27:08.238] <TB3> INFO: Test took 15232ms.
[13:27:08.277] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:08.280] <TB3> INFO: dacScan step from 40 .. 59
[13:27:27.203] <TB3> INFO: Test took 18923ms.
[13:27:27.357] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:27.397] <TB3> INFO: dacScan step from 60 .. 79
[13:27:47.699] <TB3> INFO: Test took 20302ms.
[13:27:47.854] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:47.909] <TB3> INFO: dacScan step from 80 .. 99
[13:28:07.991] <TB3> INFO: Test took 20082ms.
[13:28:08.180] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:08.272] <TB3> INFO: dacScan step from 100 .. 119
[13:28:28.559] <TB3> INFO: Test took 20287ms.
[13:28:28.726] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:28.786] <TB3> INFO: dacScan step from 120 .. 139
[13:28:47.439] <TB3> INFO: Test took 18653ms.
[13:28:47.606] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:47.662] <TB3> INFO: dacScan step from 140 .. 159
[13:29:06.828] <TB3> INFO: Test took 19166ms.
[13:29:06.987] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:32.426] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 57.6647 for pixel 17/3 mean/min/max = 44.5692/31.4314/57.707
[13:29:32.426] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 61.7659 for pixel 12/77 mean/min/max = 46.6998/31.579/61.8205
[13:29:32.438] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 58.6526 for pixel 0/75 mean/min/max = 46.226/33.7301/58.7219
[13:29:32.439] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 57.6438 for pixel 0/37 mean/min/max = 44.8316/32.0125/57.6506
[13:29:32.439] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 57.4718 for pixel 9/3 mean/min/max = 44.9573/32.332/57.5825
[13:29:32.440] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 58.4299 for pixel 16/79 mean/min/max = 45.485/32.5274/58.4427
[13:29:32.440] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 57.4147 for pixel 0/75 mean/min/max = 46.2457/35.0685/57.4229
[13:29:32.441] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 57.8074 for pixel 8/76 mean/min/max = 44.9559/31.673/58.2388
[13:29:32.441] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 57.9154 for pixel 13/1 mean/min/max = 45.0218/32.0397/58.0039
[13:29:32.441] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 58.1304 for pixel 0/76 mean/min/max = 45.0563/31.9435/58.1691
[13:29:32.442] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 59.4726 for pixel 8/78 mean/min/max = 45.6143/31.5978/59.6309
[13:29:32.442] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 57.3218 for pixel 0/75 mean/min/max = 44.6121/31.8367/57.3874
[13:29:32.442] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 60.3414 for pixel 3/11 mean/min/max = 45.724/31.0109/60.4371
[13:29:32.442] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 57.8989 for pixel 22/3 mean/min/max = 46.231/34.5429/57.9191
[13:29:32.443] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 58.958 for pixel 12/5 mean/min/max = 45.6565/32.3496/58.9635
[13:29:32.443] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 59.6785 for pixel 16/1 mean/min/max = 46.7222/33.7273/59.717
[13:29:32.443] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:31:07.536] <TB3> INFO: Test took 95093ms.
[13:31:09.000] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:31:09.008] <TB3> INFO: dacScan step from 0 .. 19
[13:31:31.565] <TB3> INFO: Test took 22557ms.
[13:31:31.610] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:31.611] <TB3> INFO: dacScan step from 20 .. 39
[13:31:59.253] <TB3> INFO: Test took 27641ms.
[13:31:59.538] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:59.576] <TB3> INFO: dacScan step from 40 .. 59


[13:32:30.591] <TB3> INFO: Test took 31015ms.
[13:32:30.859] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:30.912] <TB3> INFO: dacScan step from 60 .. 79


[13:33:03.753] <TB3> INFO: Test took 32840ms.
[13:33:04.031] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:04.091] <TB3> INFO: dacScan step from 80 .. 99


[13:33:36.838] <TB3> INFO: Test took 32747ms.
[13:33:37.185] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:37.241] <TB3> INFO: dacScan step from 100 .. 119

[13:34:10.245] <TB3> INFO: Test took 33004ms.
[13:34:10.709] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:10.800] <TB3> INFO: dacScan step from 120 .. 139
[13:34:44.088] <TB3> INFO: Test took 33288ms.
[13:34:44.368] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:44.424] <TB3> INFO: dacScan step from 140 .. 159


[13:35:17.401] <TB3> INFO: Test took 32977ms.
[13:35:17.680] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:17.747] <TB3> INFO: dacScan step from 160 .. 179


[13:35:50.892] <TB3> INFO: Test took 33145ms.
[13:35:51.234] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:51.304] <TB3> INFO: dacScan step from 180 .. 199





[13:36:22.439] <TB3> INFO: Test took 31135ms.
[13:36:22.886] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:48.037] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.096505 .. 255.000000
[13:36:48.131] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[13:36:48.140] <TB3> INFO: dacScan step from 0 .. 19
[13:37:01.746] <TB3> INFO: Test took 13606ms.
[13:37:01.773] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:01.773] <TB3> INFO: dacScan step from 20 .. 39
[13:37:16.570] <TB3> INFO: Test took 14797ms.
[13:37:16.671] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:16.690] <TB3> INFO: dacScan step from 40 .. 59
[13:37:34.328] <TB3> INFO: Test took 17638ms.
[13:37:34.534] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:34.602] <TB3> INFO: dacScan step from 60 .. 79
[13:37:52.239] <TB3> INFO: Test took 17637ms.
[13:37:52.383] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:52.440] <TB3> INFO: dacScan step from 80 .. 99
[13:38:10.061] <TB3> INFO: Test took 17621ms.
[13:38:10.235] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:10.297] <TB3> INFO: dacScan step from 100 .. 119
[13:38:27.995] <TB3> INFO: Test took 17698ms.
[13:38:28.192] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:28.260] <TB3> INFO: dacScan step from 120 .. 139
[13:38:45.897] <TB3> INFO: Test took 17636ms.
[13:38:46.092] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:46.162] <TB3> INFO: dacScan step from 140 .. 159
[13:39:03.786] <TB3> INFO: Test took 17624ms.
[13:39:03.945] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:04.003] <TB3> INFO: dacScan step from 160 .. 179
[13:39:21.669] <TB3> INFO: Test took 17666ms.
[13:39:21.821] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:21.890] <TB3> INFO: dacScan step from 180 .. 199
[13:39:40.427] <TB3> INFO: Test took 18537ms.
[13:39:40.620] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:40.692] <TB3> INFO: dacScan step from 200 .. 219
[13:39:58.293] <TB3> INFO: Test took 17601ms.
[13:39:58.478] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:58.552] <TB3> INFO: dacScan step from 220 .. 239
[13:40:15.205] <TB3> INFO: Test took 16653ms.
[13:40:15.352] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:15.414] <TB3> INFO: dacScan step from 240 .. 255
[13:40:29.278] <TB3> INFO: Test took 13864ms.
[13:40:29.455] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:01.907] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 14.752257 .. 44.594579
[13:41:01.992] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 4 .. 54 (20) hits flags = 16 (plus default)
[13:41:02.001] <TB3> INFO: dacScan step from 4 .. 23
[13:41:15.030] <TB3> INFO: Test took 13029ms.
[13:41:15.053] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:15.053] <TB3> INFO: dacScan step from 24 .. 43
[13:41:29.711] <TB3> INFO: Test took 14658ms.
[13:41:29.862] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:29.905] <TB3> INFO: dacScan step from 44 .. 54
[13:41:40.859] <TB3> INFO: Test took 10953ms.
[13:41:40.971] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:57.729] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 20.500000 .. 40.483962
[13:41:57.807] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 10 .. 50 (20) hits flags = 16 (plus default)
[13:41:57.815] <TB3> INFO: dacScan step from 10 .. 29
[13:42:11.134] <TB3> INFO: Test took 13318ms.
[13:42:11.155] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:11.155] <TB3> INFO: dacScan step from 30 .. 49
[13:42:26.989] <TB3> INFO: Test took 15834ms.
[13:42:27.127] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:27.170] <TB3> INFO: dacScan step from 50 .. 50
[13:42:30.764] <TB3> INFO: Test took 3594ms.
[13:42:30.776] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:45.784] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 5.500000 .. 40.483962
[13:42:45.861] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 5 .. 50 (20) hits flags = 16 (plus default)
[13:42:45.869] <TB3> INFO: dacScan step from 5 .. 24
[13:42:59.425] <TB3> INFO: Test took 13556ms.
[13:42:59.452] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:59.452] <TB3> INFO: dacScan step from 25 .. 44
[13:43:14.250] <TB3> INFO: Test took 14798ms.
[13:43:14.362] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:14.394] <TB3> INFO: dacScan step from 45 .. 50
[13:43:21.679] <TB3> INFO: Test took 7285ms.
[13:43:21.720] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:38.767] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:43:38.767] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[13:43:38.776] <TB3> INFO: dacScan step from 15 .. 34
[13:44:01.946] <TB3> INFO: Test took 23170ms.
[13:44:02.019] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:02.028] <TB3> INFO: dacScan step from 35 .. 54

[13:44:32.507] <TB3> INFO: Test took 30479ms.
[13:44:32.792] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:32.837] <TB3> INFO: dacScan step from 55 .. 55
[13:44:37.204] <TB3> INFO: Test took 4367ms.
[13:44:37.222] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:50.928] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:44:50.929] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:44:50.929] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:44:50.929] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:44:50.929] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:44:50.929] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:44:50.929] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:44:50.929] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:44:50.929] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:44:50.930] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:44:50.930] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:44:50.930] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:44:50.930] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:44:50.930] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:44:50.930] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:44:50.930] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:44:50.930] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:44:50.940] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:44:50.950] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:44:50.959] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:44:50.969] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:44:50.979] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:44:50.989] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:44:50.998] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:44:51.008] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:44:51.018] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:44:51.027] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:44:51.037] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:44:51.047] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:44:51.056] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:44:51.066] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:44:51.075] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:44:51.085] <TB3> INFO: PixTestTrim::trimTest() done
[13:44:51.085] <TB3> INFO: vtrim: 108 113 102 110 109 102 96 107 98 97 108 105 124 103 108 104
[13:44:51.085] <TB3> INFO: vthrcomp: 97 87 78 81 84 80 79 99 84 83 93 86 95 79 88 88
[13:44:51.085] <TB3> INFO: vcal mean: 35.01 35.05 35.03 35.04 35.02 35.05 35.06 35.04 35.01 35.03 34.99 35.05 35.00 35.03 35.04 35.04
[13:44:51.085] <TB3> INFO: vcal RMS: 1.18 1.17 0.91 0.95 1.00 1.01 0.90 1.08 1.03 0.95 1.03 0.95 1.03 0.95 1.01 1.00
[13:44:51.085] <TB3> INFO: bits mean: 10.08 10.19 8.98 9.67 9.78 9.61 8.74 9.90 9.98 9.49 9.84 9.76 9.93 9.64 9.89 9.39
[13:44:51.085] <TB3> INFO: bits RMS: 2.52 2.33 2.61 2.71 2.61 2.63 2.54 2.64 2.51 2.71 2.55 2.66 2.63 2.28 2.48 2.53
[13:44:51.093] <TB3> INFO: ----------------------------------------------------------------------
[13:44:51.093] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:44:51.093] <TB3> INFO: ----------------------------------------------------------------------
[13:44:51.096] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:44:51.106] <TB3> INFO: dacScan step from 0 .. 19
[13:45:12.424] <TB3> INFO: Test took 21318ms.
[13:45:12.465] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:12.465] <TB3> INFO: dacScan step from 20 .. 39
[13:45:35.105] <TB3> INFO: Test took 22640ms.
[13:45:35.145] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:35.145] <TB3> INFO: dacScan step from 40 .. 59
[13:45:57.777] <TB3> INFO: Test took 22632ms.
[13:45:57.817] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:57.817] <TB3> INFO: dacScan step from 60 .. 79
[13:46:19.997] <TB3> INFO: Test took 22180ms.
[13:46:20.040] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:20.040] <TB3> INFO: dacScan step from 80 .. 99
[13:46:44.091] <TB3> INFO: Test took 24051ms.
[13:46:44.184] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:44.193] <TB3> INFO: dacScan step from 100 .. 119
[13:47:12.591] <TB3> INFO: Test took 28398ms.
[13:47:12.921] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:12.959] <TB3> INFO: dacScan step from 120 .. 139


[13:47:45.262] <TB3> INFO: Test took 32303ms.
[13:47:45.614] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:45.672] <TB3> INFO: dacScan step from 140 .. 159



[13:48:16.497] <TB3> INFO: Test took 30825ms.
[13:48:16.832] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:16.870] <TB3> INFO: dacScan step from 160 .. 179
[13:48:49.600] <TB3> INFO: Test took 32730ms.
[13:48:49.885] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:49.926] <TB3> INFO: dacScan step from 180 .. 199
[13:49:21.479] <TB3> INFO: Test took 31553ms.
[13:49:21.746] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:48.886] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 192 (20) hits flags = 16 (plus default)
[13:49:48.896] <TB3> INFO: dacScan step from 0 .. 19
[13:50:10.010] <TB3> INFO: Test took 21114ms.
[13:50:10.044] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:10.044] <TB3> INFO: dacScan step from 20 .. 39
[13:50:32.685] <TB3> INFO: Test took 22641ms.
[13:50:32.722] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:32.722] <TB3> INFO: dacScan step from 40 .. 59
[13:50:55.277] <TB3> INFO: Test took 22555ms.
[13:50:55.312] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:55.312] <TB3> INFO: dacScan step from 60 .. 79
[13:51:17.432] <TB3> INFO: Test took 22120ms.
[13:51:17.475] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:17.476] <TB3> INFO: dacScan step from 80 .. 99
[13:51:44.136] <TB3> INFO: Test took 26660ms.
[13:51:44.315] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:44.335] <TB3> INFO: dacScan step from 100 .. 119


[13:52:16.631] <TB3> INFO: Test took 32296ms.
[13:52:16.951] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:16.998] <TB3> INFO: dacScan step from 120 .. 139



[13:52:50.301] <TB3> INFO: Test took 33303ms.
[13:52:50.601] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:50.653] <TB3> INFO: dacScan step from 140 .. 159
[13:53:21.478] <TB3> INFO: Test took 30825ms.
[13:53:21.928] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:53:22.006] <TB3> INFO: dacScan step from 160 .. 179
[13:53:55.026] <TB3> INFO: Test took 33019ms.
[13:53:55.409] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:53:55.465] <TB3> INFO: dacScan step from 180 .. 192
[13:54:18.483] <TB3> INFO: Test took 23017ms.
[13:54:18.669] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:45.125] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 178 (20) hits flags = 16 (plus default)
[13:54:45.133] <TB3> INFO: dacScan step from 0 .. 19
[13:55:06.326] <TB3> INFO: Test took 21193ms.
[13:55:06.370] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:06.370] <TB3> INFO: dacScan step from 20 .. 39
[13:55:28.936] <TB3> INFO: Test took 22566ms.
[13:55:28.979] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:28.979] <TB3> INFO: dacScan step from 40 .. 59
[13:55:51.755] <TB3> INFO: Test took 22776ms.
[13:55:51.793] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:51.793] <TB3> INFO: dacScan step from 60 .. 79
[13:56:13.355] <TB3> INFO: Test took 21561ms.
[13:56:13.407] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:13.408] <TB3> INFO: dacScan step from 80 .. 99
[13:56:38.312] <TB3> INFO: Test took 24904ms.
[13:56:38.498] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:38.521] <TB3> INFO: dacScan step from 100 .. 119


[13:57:08.539] <TB3> INFO: Test took 30017ms.
[13:57:08.840] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:08.886] <TB3> INFO: dacScan step from 120 .. 139



[13:57:42.065] <TB3> INFO: Test took 33179ms.
[13:57:42.368] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:42.423] <TB3> INFO: dacScan step from 140 .. 159
[13:58:15.431] <TB3> INFO: Test took 33008ms.
[13:58:15.709] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:15.759] <TB3> INFO: dacScan step from 160 .. 178
[13:58:47.295] <TB3> INFO: Test took 31535ms.
[13:58:47.557] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:14.022] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 150 (20) hits flags = 16 (plus default)
[13:59:14.031] <TB3> INFO: dacScan step from 0 .. 19
[13:59:36.512] <TB3> INFO: Test took 22481ms.
[13:59:36.555] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:36.556] <TB3> INFO: dacScan step from 20 .. 39
[13:59:59.171] <TB3> INFO: Test took 22615ms.
[13:59:59.212] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:59.212] <TB3> INFO: dacScan step from 40 .. 59
[14:00:21.667] <TB3> INFO: Test took 22455ms.
[14:00:21.705] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:21.705] <TB3> INFO: dacScan step from 60 .. 79
[14:00:43.077] <TB3> INFO: Test took 21371ms.
[14:00:43.124] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:43.125] <TB3> INFO: dacScan step from 80 .. 99
[14:01:09.771] <TB3> INFO: Test took 26646ms.
[14:01:09.956] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:09.976] <TB3> INFO: dacScan step from 100 .. 119


[14:01:42.368] <TB3> INFO: Test took 32391ms.
[14:01:42.705] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:42.749] <TB3> INFO: dacScan step from 120 .. 139


[14:02:15.556] <TB3> INFO: Test took 32807ms.
[14:02:15.849] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:15.906] <TB3> INFO: dacScan step from 140 .. 150
[14:02:34.802] <TB3> INFO: Test took 18896ms.
[14:02:34.976] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:57.932] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 150 (20) hits flags = 16 (plus default)
[14:02:57.940] <TB3> INFO: dacScan step from 0 .. 19
[14:03:18.971] <TB3> INFO: Test took 21031ms.
[14:03:19.013] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:19.013] <TB3> INFO: dacScan step from 20 .. 39
[14:03:41.602] <TB3> INFO: Test took 22588ms.
[14:03:41.641] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:41.641] <TB3> INFO: dacScan step from 40 .. 59
[14:04:02.840] <TB3> INFO: Test took 21199ms.
[14:04:02.875] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:02.875] <TB3> INFO: dacScan step from 60 .. 79
[14:04:25.450] <TB3> INFO: Test took 22575ms.
[14:04:25.494] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:25.494] <TB3> INFO: dacScan step from 80 .. 99
[14:04:52.008] <TB3> INFO: Test took 26514ms.
[14:04:52.224] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:52.243] <TB3> INFO: dacScan step from 100 .. 119


[14:05:24.518] <TB3> INFO: Test took 32276ms.
[14:05:24.791] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:24.832] <TB3> INFO: dacScan step from 120 .. 139

[14:05:57.809] <TB3> INFO: Test took 32977ms.
[14:05:58.187] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:58.247] <TB3> INFO: dacScan step from 140 .. 150
[14:06:17.442] <TB3> INFO: Test took 19195ms.
[14:06:17.622] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:43.577] <TB3> INFO: PixTestTrim::trimBitTest() done
[14:06:43.578] <TB3> INFO: PixTestTrim::doTest() done, duration: 2555 seconds
[14:06:44.270] <TB3> INFO: ######################################################################
[14:06:44.270] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:06:44.270] <TB3> INFO: ######################################################################
[14:06:47.539] <TB3> INFO: Test took 3268ms.
[14:06:47.557] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:51.023] <TB3> INFO: Test took 3269ms.
[14:06:51.084] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:54.398] <TB3> INFO: Test took 3304ms.
[14:06:54.459] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:54.465] <TB3> INFO: The DUT currently contains the following objects:
[14:06:54.465] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:06:54.465] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:06:54.465] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:06:54.465] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:06:54.465] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:54.465] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:54.465] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:54.465] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:54.465] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:54.465] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:54.465] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:54.465] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:54.465] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:54.465] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:54.465] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:54.465] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:54.465] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:54.465] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:54.465] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:54.466] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:55.568] <TB3> INFO: Test took 1102ms.
[14:06:55.569] <TB3> INFO: The DUT currently contains the following objects:
[14:06:55.569] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:06:55.569] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:06:55.569] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:06:55.569] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:06:55.569] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:55.569] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:55.569] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:55.569] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:55.569] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:55.569] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:55.569] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:55.569] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:55.569] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:55.569] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:55.570] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:55.570] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:55.570] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:55.570] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:55.570] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:55.570] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:56.672] <TB3> INFO: Test took 1102ms.
[14:06:56.673] <TB3> INFO: The DUT currently contains the following objects:
[14:06:56.673] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:06:56.673] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:06:56.673] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:06:56.673] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:06:56.673] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:56.673] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:56.673] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:56.673] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:56.673] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:56.673] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:56.673] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:56.673] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:56.673] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:56.673] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:56.673] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:56.673] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:56.673] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:56.673] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:56.673] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:56.673] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:57.776] <TB3> INFO: Test took 1102ms.
[14:06:57.777] <TB3> INFO: The DUT currently contains the following objects:
[14:06:57.777] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:06:57.777] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:06:57.777] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:06:57.777] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:06:57.777] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:57.777] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:57.777] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:57.777] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:57.777] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:57.777] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:57.777] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:57.777] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:57.777] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:57.777] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:57.777] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:57.778] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:57.778] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:57.778] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:57.778] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:57.778] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:58.879] <TB3> INFO: Test took 1101ms.
[14:06:58.880] <TB3> INFO: The DUT currently contains the following objects:
[14:06:58.880] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:06:58.880] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:06:58.880] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:06:58.880] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:06:58.880] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:58.880] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:58.880] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:58.880] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:58.880] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:58.880] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:58.880] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:58.880] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:58.880] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:58.880] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:58.880] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:58.880] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:58.880] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:58.880] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:58.880] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:58.880] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:59.988] <TB3> INFO: Test took 1108ms.
[14:06:59.990] <TB3> INFO: The DUT currently contains the following objects:
[14:06:59.990] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:06:59.990] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:06:59.990] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:06:59.990] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:06:59.990] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:59.990] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:59.990] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:59.990] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:59.990] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:59.990] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:59.990] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:59.990] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:59.990] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:59.990] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:59.990] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:59.990] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:59.990] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:59.990] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:59.990] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:06:59.990] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:01.098] <TB3> INFO: Test took 1108ms.
[14:07:01.100] <TB3> INFO: The DUT currently contains the following objects:
[14:07:01.100] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:07:01.100] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:07:01.100] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:07:01.100] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:07:01.100] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:01.100] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:01.100] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:01.100] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:01.100] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:01.100] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:01.100] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:01.100] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:01.100] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:01.100] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:01.100] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:01.100] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:01.100] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:01.100] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:01.100] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:01.101] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:02.209] <TB3> INFO: Test took 1108ms.
[14:07:02.211] <TB3> INFO: The DUT currently contains the following objects:
[14:07:02.211] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:07:02.211] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:07:02.211] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:07:02.211] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:07:02.211] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:02.211] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:02.211] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:02.211] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:02.211] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:02.211] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:02.211] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:02.211] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:02.211] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:02.211] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:02.211] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:02.211] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:02.211] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:02.211] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:02.212] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:02.212] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:03.319] <TB3> INFO: Test took 1107ms.
[14:07:03.320] <TB3> INFO: The DUT currently contains the following objects:
[14:07:03.320] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:07:03.320] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:07:03.320] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:07:03.320] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:07:03.320] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:03.321] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:03.321] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:03.321] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:03.321] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:03.321] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:03.321] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:03.321] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:03.321] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:03.321] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:03.321] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:03.321] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:03.321] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:03.321] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:03.321] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:03.321] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:04.428] <TB3> INFO: Test took 1107ms.
[14:07:04.429] <TB3> INFO: The DUT currently contains the following objects:
[14:07:04.429] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:07:04.430] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:07:04.430] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:07:04.430] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:07:04.430] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:04.430] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:04.430] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:04.430] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:04.430] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:04.430] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:04.430] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:04.430] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:04.430] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:04.430] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:04.430] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:04.430] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:04.430] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:04.430] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:04.430] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:04.430] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:05.539] <TB3> INFO: Test took 1109ms.
[14:07:05.540] <TB3> INFO: The DUT currently contains the following objects:
[14:07:05.554] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:07:05.554] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:07:05.554] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:07:05.554] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:07:05.554] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:05.554] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:05.554] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:05.554] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:05.554] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:05.554] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:05.554] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:05.554] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:05.554] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:05.554] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:05.554] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:05.554] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:05.554] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:05.554] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:05.554] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:05.554] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:06.648] <TB3> INFO: Test took 1094ms.
[14:07:06.649] <TB3> INFO: The DUT currently contains the following objects:
[14:07:06.649] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:07:06.649] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:07:06.649] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:07:06.649] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:07:06.649] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:06.650] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:06.650] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:06.650] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:06.650] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:06.650] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:06.650] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:06.650] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:06.650] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:06.650] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:06.650] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:06.650] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:06.650] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:06.650] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:06.650] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:06.650] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:07.753] <TB3> INFO: Test took 1103ms.
[14:07:07.754] <TB3> INFO: The DUT currently contains the following objects:
[14:07:07.754] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:07:07.754] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:07:07.754] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:07:07.754] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:07:07.754] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:07.754] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:07.754] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:07.754] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:07.754] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:07.754] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:07.754] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:07.754] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:07.754] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:07.754] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:07.754] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:07.754] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:07.754] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:07.754] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:07.754] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:07.754] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:08.862] <TB3> INFO: Test took 1108ms.
[14:07:08.864] <TB3> INFO: The DUT currently contains the following objects:
[14:07:08.864] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:07:08.864] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:07:08.864] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:07:08.864] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:07:08.864] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:08.864] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:08.864] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:08.864] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:08.864] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:08.864] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:08.864] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:08.864] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:08.864] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:08.864] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:08.864] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:08.864] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:08.864] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:08.865] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:08.865] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:08.865] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:09.972] <TB3> INFO: Test took 1107ms.
[14:07:09.973] <TB3> INFO: The DUT currently contains the following objects:
[14:07:09.973] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:07:09.973] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:07:09.973] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:07:09.973] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:07:09.973] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:09.973] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:09.973] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:09.973] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:09.973] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:09.973] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:09.973] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:09.973] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:09.973] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:09.973] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:09.973] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:09.973] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:09.973] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:09.973] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:09.973] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:09.973] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:11.075] <TB3> INFO: Test took 1101ms.
[14:07:11.076] <TB3> INFO: The DUT currently contains the following objects:
[14:07:11.076] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:07:11.076] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:07:11.076] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:07:11.076] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:07:11.076] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:11.076] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:11.076] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:11.076] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:11.076] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:11.076] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:11.076] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:11.076] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:11.076] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:11.077] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:11.077] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:11.077] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:11.077] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:11.077] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:11.077] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:11.077] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:07:12.184] <TB3> INFO: Test took 1107ms.
[14:07:12.188] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:10:52.890] <TB3> INFO: Test took 220702ms.
[14:10:54.816] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:14:38.739] <TB3> INFO: Test took 223923ms.
[14:14:40.552] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:14:40.558] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:14:40.566] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:14:40.573] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:14:40.580] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:14:40.587] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:14:40.593] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:14:40.600] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:14:40.607] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:14:40.613] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:14:40.620] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:14:40.627] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:14:40.635] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:14:40.641] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:14:40.648] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[14:14:40.654] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[14:14:40.661] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[14:14:40.668] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[14:14:40.674] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[14:14:40.681] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[14:14:40.689] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:14:40.695] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[14:14:40.736] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:14:40.736] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:14:40.736] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:14:40.737] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:14:40.737] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:14:40.737] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:14:40.737] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:14:40.737] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:14:40.737] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:14:40.737] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:14:40.737] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:14:40.737] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:14:40.737] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:14:40.738] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:14:40.738] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:14:40.738] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:14:44.115] <TB3> INFO: Test took 3374ms.
[14:14:47.737] <TB3> INFO: Test took 3349ms.
[14:14:51.399] <TB3> INFO: Test took 3386ms.
[14:14:51.678] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:14:52.598] <TB3> INFO: Test took 920ms.
[14:14:52.600] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:14:53.709] <TB3> INFO: Test took 1109ms.
[14:14:53.711] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:14:54.821] <TB3> INFO: Test took 1110ms.
[14:14:54.824] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:14:55.931] <TB3> INFO: Test took 1107ms.
[14:14:55.936] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:14:57.044] <TB3> INFO: Test took 1108ms.
[14:14:57.046] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:14:58.153] <TB3> INFO: Test took 1107ms.
[14:14:58.156] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:14:59.264] <TB3> INFO: Test took 1108ms.
[14:14:59.268] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:00.377] <TB3> INFO: Test took 1109ms.
[14:15:00.380] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:01.489] <TB3> INFO: Test took 1109ms.
[14:15:01.493] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:02.598] <TB3> INFO: Test took 1105ms.
[14:15:02.600] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:03.710] <TB3> INFO: Test took 1110ms.
[14:15:03.714] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:04.819] <TB3> INFO: Test took 1105ms.
[14:15:04.822] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:05.925] <TB3> INFO: Test took 1103ms.
[14:15:05.927] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:07.031] <TB3> INFO: Test took 1104ms.
[14:15:07.034] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:08.136] <TB3> INFO: Test took 1103ms.
[14:15:08.139] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:09.241] <TB3> INFO: Test took 1103ms.
[14:15:09.244] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:10.351] <TB3> INFO: Test took 1108ms.
[14:15:10.354] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:11.460] <TB3> INFO: Test took 1106ms.
[14:15:11.463] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:12.566] <TB3> INFO: Test took 1103ms.
[14:15:12.569] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:13.677] <TB3> INFO: Test took 1108ms.
[14:15:13.681] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:14.788] <TB3> INFO: Test took 1108ms.
[14:15:14.792] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:15.900] <TB3> INFO: Test took 1108ms.
[14:15:15.904] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:17.006] <TB3> INFO: Test took 1102ms.
[14:15:17.009] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:18.117] <TB3> INFO: Test took 1109ms.
[14:15:18.121] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:19.224] <TB3> INFO: Test took 1103ms.
[14:15:19.227] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:20.328] <TB3> INFO: Test took 1101ms.
[14:15:20.331] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:21.437] <TB3> INFO: Test took 1106ms.
[14:15:21.441] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:22.549] <TB3> INFO: Test took 1109ms.
[14:15:22.553] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:23.659] <TB3> INFO: Test took 1106ms.
[14:15:23.662] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:24.768] <TB3> INFO: Test took 1106ms.
[14:15:24.771] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:25.877] <TB3> INFO: Test took 1106ms.
[14:15:25.880] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:26.987] <TB3> INFO: Test took 1107ms.
[14:15:27.520] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 523 seconds
[14:15:27.520] <TB3> INFO: PH scale (per ROC): 79 76 89 90 85 84 80 82 87 86 82 87 82 85 82 80
[14:15:27.520] <TB3> INFO: PH offset (per ROC): 151 158 144 162 147 164 147 173 155 154 161 144 158 144 155 170
[14:15:27.705] <TB3> INFO: ######################################################################
[14:15:27.705] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:15:27.706] <TB3> INFO: ######################################################################
[14:15:27.715] <TB3> INFO: scanning low vcal = 10
[14:15:31.526] <TB3> INFO: Test took 3812ms.
[14:15:31.531] <TB3> INFO: scanning low vcal = 20
[14:15:35.354] <TB3> INFO: Test took 3824ms.
[14:15:35.360] <TB3> INFO: scanning low vcal = 30
[14:15:39.219] <TB3> INFO: Test took 3859ms.
[14:15:39.226] <TB3> INFO: scanning low vcal = 40
[14:15:43.550] <TB3> INFO: Test took 4324ms.
[14:15:43.614] <TB3> INFO: scanning low vcal = 50
[14:15:47.897] <TB3> INFO: Test took 4283ms.
[14:15:47.958] <TB3> INFO: scanning low vcal = 60
[14:15:52.246] <TB3> INFO: Test took 4288ms.
[14:15:52.309] <TB3> INFO: scanning low vcal = 70
[14:15:56.573] <TB3> INFO: Test took 4264ms.
[14:15:56.630] <TB3> INFO: scanning low vcal = 80
[14:16:00.940] <TB3> INFO: Test took 4310ms.
[14:16:01.007] <TB3> INFO: scanning low vcal = 90
[14:16:05.304] <TB3> INFO: Test took 4297ms.
[14:16:05.365] <TB3> INFO: scanning low vcal = 100
[14:16:09.771] <TB3> INFO: Test took 4406ms.
[14:16:09.833] <TB3> INFO: scanning low vcal = 110
[14:16:14.205] <TB3> INFO: Test took 4372ms.
[14:16:14.293] <TB3> INFO: scanning low vcal = 120
[14:16:18.662] <TB3> INFO: Test took 4369ms.
[14:16:18.727] <TB3> INFO: scanning low vcal = 130
[14:16:23.113] <TB3> INFO: Test took 4386ms.
[14:16:23.189] <TB3> INFO: scanning low vcal = 140
[14:16:27.566] <TB3> INFO: Test took 4377ms.
[14:16:27.631] <TB3> INFO: scanning low vcal = 150
[14:16:31.980] <TB3> INFO: Test took 4349ms.
[14:16:32.041] <TB3> INFO: scanning low vcal = 160
[14:16:36.253] <TB3> INFO: Test took 4211ms.
[14:16:36.343] <TB3> INFO: scanning low vcal = 170
[14:16:40.557] <TB3> INFO: Test took 4214ms.
[14:16:40.635] <TB3> INFO: scanning low vcal = 180
[14:16:44.841] <TB3> INFO: Test took 4206ms.
[14:16:44.897] <TB3> INFO: scanning low vcal = 190
[14:16:49.209] <TB3> INFO: Test took 4312ms.
[14:16:49.266] <TB3> INFO: scanning low vcal = 200
[14:16:53.497] <TB3> INFO: Test took 4231ms.
[14:16:53.582] <TB3> INFO: scanning low vcal = 210
[14:16:57.831] <TB3> INFO: Test took 4249ms.
[14:16:57.900] <TB3> INFO: scanning low vcal = 220
[14:17:02.102] <TB3> INFO: Test took 4202ms.
[14:17:02.160] <TB3> INFO: scanning low vcal = 230
[14:17:06.536] <TB3> INFO: Test took 4376ms.
[14:17:06.596] <TB3> INFO: scanning low vcal = 240
[14:17:11.001] <TB3> INFO: Test took 4405ms.
[14:17:11.062] <TB3> INFO: scanning low vcal = 250
[14:17:15.449] <TB3> INFO: Test took 4387ms.
[14:17:15.533] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[14:17:19.905] <TB3> INFO: Test took 4372ms.
[14:17:19.969] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[14:17:24.370] <TB3> INFO: Test took 4401ms.
[14:17:24.454] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[14:17:28.840] <TB3> INFO: Test took 4386ms.
[14:17:28.906] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[14:17:33.276] <TB3> INFO: Test took 4370ms.
[14:17:33.365] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:17:37.731] <TB3> INFO: Test took 4366ms.
[14:17:38.243] <TB3> INFO: PixTestGainPedestal::measure() done
[14:18:14.851] <TB3> INFO: PixTestGainPedestal::fit() done
[14:18:14.851] <TB3> INFO: non-linearity mean: 0.953 0.956 0.951 0.949 0.955 0.955 0.957 0.957 0.962 0.956 0.952 0.952 0.956 0.958 0.957 0.962
[14:18:14.851] <TB3> INFO: non-linearity RMS: 0.006 0.006 0.005 0.005 0.006 0.006 0.005 0.006 0.005 0.006 0.006 0.006 0.006 0.005 0.006 0.006
[14:18:14.851] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[14:18:14.883] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[14:18:14.914] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[14:18:14.946] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[14:18:14.976] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[14:18:14.995] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[14:18:15.014] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[14:18:15.032] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[14:18:15.050] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[14:18:15.068] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[14:18:15.086] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[14:18:15.105] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[14:18:15.123] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[14:18:15.141] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[14:18:15.159] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[14:18:15.177] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2043_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[14:18:15.195] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 167 seconds
[14:18:15.202] <TB3> INFO: enter test to run
[14:18:15.202] <TB3> INFO: test: exit no parameter change
[14:18:15.662] <TB3> QUIET: Connection to board 170 closed.
[14:18:15.741] <TB3> INFO: pXar: this is the end, my friend