[15:21:08.525] <TB2> INFO: *** Welcome to pxar ***
[15:21:08.525] <TB2> INFO: *** Today: 2015/07/23
[15:21:08.525] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C15.dat
[15:21:08.526] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//tbmParameters_C0b.dat
[15:21:08.526] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//defaultMaskFile.dat
[15:21:08.526] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters_C15.dat
[15:21:08.603] <TB2> INFO: clk: 4
[15:21:08.603] <TB2> INFO: ctr: 4
[15:21:08.603] <TB2> INFO: sda: 19
[15:21:08.603] <TB2> INFO: tin: 9
[15:21:08.603] <TB2> INFO: level: 15
[15:21:08.603] <TB2> INFO: triggerdelay: 0
[15:21:08.604] <TB2> QUIET: Instanciating API for pxar v2.2.5+46~gdbe75a1
[15:21:08.604] <TB2> INFO: Log level: INFO
[15:21:08.611] <TB2> INFO: Found DTB DTB_WXC55Z
[15:21:08.624] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[15:21:08.627] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 0
HW version:
FW version: 4.0
SW version: 4.0
USB id:
MAC address: 000000000000
Hostname:
Comment:
------------------------------------------------------
[15:21:08.630] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[15:21:10.200] <TB2> INFO: DUT info:
[15:21:10.200] <TB2> INFO: The DUT currently contains the following objects:
[15:21:10.200] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:21:10.201] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:21:10.201] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:21:10.201] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[15:21:10.201] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[15:21:10.201] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[15:21:10.201] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[15:21:10.201] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[15:21:10.201] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[15:21:10.201] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[15:21:10.201] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[15:21:10.201] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[15:21:10.201] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[15:21:10.201] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[15:21:10.201] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[15:21:10.201] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[15:21:10.201] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[15:21:10.201] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[15:21:10.201] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[15:21:10.201] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[15:21:10.603] <TB2> INFO: enter 'restricted' command line mode
[15:21:10.603] <TB2> INFO: enter test to run
[15:21:10.603] <TB2> INFO: test: pretest no parameter change
[15:21:10.603] <TB2> INFO: running: pretest
[15:21:10.612] <TB2> INFO: ######################################################################
[15:21:10.612] <TB2> INFO: PixTestPretest::doTest()
[15:21:10.612] <TB2> INFO: ######################################################################
[15:21:10.613] <TB2> INFO: ----------------------------------------------------------------------
[15:21:10.613] <TB2> INFO: PixTestPretest::programROC()
[15:21:10.613] <TB2> INFO: ----------------------------------------------------------------------
[15:21:28.631] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[15:21:28.631] <TB2> INFO: IA differences per ROC: 19.3 20.1 18.5 18.5 19.3 19.3 19.3 21.7 17.7 20.1 20.9 19.3 20.1 20.9 20.1 21.7
[15:21:28.698] <TB2> INFO: ----------------------------------------------------------------------
[15:21:28.698] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[15:21:28.698] <TB2> INFO: ----------------------------------------------------------------------
[15:21:34.577] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 392.3 mA = 24.5187 mA/ROC
[15:21:34.580] <TB2> INFO: ----------------------------------------------------------------------
[15:21:34.580] <TB2> INFO: PixTestPretest::findWorkingPixel()
[15:21:34.580] <TB2> INFO: ----------------------------------------------------------------------
[15:21:43.647] <TB2> INFO: Test took 9064ms.
[15:21:43.950] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[15:21:43.986] <TB2> INFO: ----------------------------------------------------------------------
[15:21:43.986] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[15:21:43.986] <TB2> INFO: ----------------------------------------------------------------------
[15:21:53.344] <TB2> INFO: Test took 9353ms.
[15:21:53.651] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[15:21:53.651] <TB2> INFO: CalDel: 142 140 159 146 143 125 142 156 143 127 132 144 152 134 144 143
[15:21:53.651] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[15:21:53.656] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C0.dat
[15:21:53.657] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C1.dat
[15:21:53.657] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C2.dat
[15:21:53.657] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C3.dat
[15:21:53.658] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C4.dat
[15:21:53.658] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C5.dat
[15:21:53.658] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C6.dat
[15:21:53.659] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C7.dat
[15:21:53.659] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C8.dat
[15:21:53.659] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C9.dat
[15:21:53.659] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C10.dat
[15:21:53.660] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C11.dat
[15:21:53.660] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C12.dat
[15:21:53.660] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C13.dat
[15:21:53.660] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C14.dat
[15:21:53.661] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters_C15.dat
[15:21:53.661] <TB2> INFO: PixTestPretest::doTest() done, duration: 43 seconds
[15:21:53.768] <TB2> INFO: enter test to run
[15:21:53.769] <TB2> INFO: test: fulltest no parameter change
[15:21:53.769] <TB2> INFO: running: fulltest
[15:21:53.769] <TB2> INFO: ######################################################################
[15:21:53.769] <TB2> INFO: PixTestFullTest::doTest()
[15:21:53.769] <TB2> INFO: ######################################################################
[15:21:53.770] <TB2> INFO: ######################################################################
[15:21:53.770] <TB2> INFO: PixTestAlive::doTest()
[15:21:53.770] <TB2> INFO: ######################################################################
[15:21:53.772] <TB2> INFO: ----------------------------------------------------------------------
[15:21:53.772] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:21:53.772] <TB2> INFO: ----------------------------------------------------------------------
[15:21:57.479] <TB2> INFO: Test took 3706ms.
[15:21:57.503] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:57.729] <TB2> INFO: PixTestAlive::aliveTest() done
[15:21:57.729] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:21:57.731] <TB2> INFO: ----------------------------------------------------------------------
[15:21:57.731] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:21:57.731] <TB2> INFO: ----------------------------------------------------------------------
[15:22:00.523] <TB2> INFO: Test took 2790ms.
[15:22:00.527] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:00.527] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[15:22:00.745] <TB2> INFO: PixTestAlive::maskTest() done
[15:22:00.745] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:22:00.747] <TB2> INFO: ----------------------------------------------------------------------
[15:22:00.747] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:22:00.747] <TB2> INFO: ----------------------------------------------------------------------
[15:22:04.469] <TB2> INFO: Test took 3721ms.
[15:22:04.491] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:04.714] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[15:22:04.714] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:22:04.714] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[15:22:04.726] <TB2> INFO: ######################################################################
[15:22:04.726] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[15:22:04.726] <TB2> INFO: ######################################################################
[15:22:04.729] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[15:22:04.742] <TB2> INFO: dacScan step from 0 .. 29
[15:22:27.820] <TB2> INFO: Test took 23078ms.
[15:22:27.852] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:27.853] <TB2> INFO: dacScan step from 30 .. 59
[15:22:53.023] <TB2> INFO: Test took 25170ms.
[15:22:53.121] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:53.136] <TB2> INFO: dacScan step from 60 .. 89
[15:23:26.324] <TB2> INFO: Test took 33188ms.
[15:23:26.591] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:26.667] <TB2> INFO: dacScan step from 90 .. 119
[15:23:58.745] <TB2> INFO: Test took 32078ms.
[15:23:59.158] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:59.289] <TB2> INFO: dacScan step from 120 .. 149
[15:24:27.343] <TB2> INFO: Test took 28053ms.
[15:24:27.562] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:53.070] <TB2> INFO: PixTestBBMap::doTest() done, duration: 168 seconds
[15:24:53.070] <TB2> INFO: number of dead bumps (per ROC): 1 0 0 0 0 0 0 0 0 0 2 0 0 0 0 1
[15:24:53.070] <TB2> INFO: separation cut (per ROC): 87 85 87 85 87 91 66 70 86 91 99 87 88 92 90 92
[15:24:53.141] <TB2> INFO: ######################################################################
[15:24:53.141] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[15:24:53.141] <TB2> INFO: ######################################################################
[15:24:53.141] <TB2> INFO: ----------------------------------------------------------------------
[15:24:53.141] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[15:24:53.141] <TB2> INFO: ----------------------------------------------------------------------
[15:24:53.141] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[15:24:53.150] <TB2> INFO: dacScan step from 0 .. 3
[15:25:14.635] <TB2> INFO: Test took 21485ms.
[15:25:14.664] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:14.664] <TB2> INFO: dacScan step from 4 .. 7
[15:25:36.449] <TB2> INFO: Test took 21785ms.
[15:25:36.475] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:36.475] <TB2> INFO: dacScan step from 8 .. 11
[15:25:57.850] <TB2> INFO: Test took 21375ms.
[15:25:57.877] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:57.877] <TB2> INFO: dacScan step from 12 .. 15
[15:26:19.312] <TB2> INFO: Test took 21435ms.
[15:26:19.337] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:19.337] <TB2> INFO: dacScan step from 16 .. 19
[15:26:41.064] <TB2> INFO: Test took 21727ms.
[15:26:41.093] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:41.093] <TB2> INFO: dacScan step from 20 .. 23
[15:27:02.343] <TB2> INFO: Test took 21250ms.
[15:27:02.372] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:02.372] <TB2> INFO: dacScan step from 24 .. 27
[15:27:24.002] <TB2> INFO: Test took 21630ms.
[15:27:24.028] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:24.028] <TB2> INFO: dacScan step from 28 .. 31
[15:27:45.541] <TB2> INFO: Test took 21513ms.
[15:27:45.568] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:45.568] <TB2> INFO: dacScan step from 32 .. 35
[15:28:07.427] <TB2> INFO: Test took 21859ms.
[15:28:07.456] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:07.456] <TB2> INFO: dacScan step from 36 .. 39
[15:28:29.138] <TB2> INFO: Test took 21682ms.
[15:28:29.165] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:29.165] <TB2> INFO: dacScan step from 40 .. 43
[15:28:50.829] <TB2> INFO: Test took 21664ms.
[15:28:50.856] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:50.856] <TB2> INFO: dacScan step from 44 .. 47
[15:29:12.446] <TB2> INFO: Test took 21590ms.
[15:29:12.474] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:12.474] <TB2> INFO: dacScan step from 48 .. 51
[15:29:34.109] <TB2> INFO: Test took 21635ms.
[15:29:34.135] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:34.135] <TB2> INFO: dacScan step from 52 .. 55
[15:29:55.650] <TB2> INFO: Test took 21515ms.
[15:29:55.675] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:55.676] <TB2> INFO: dacScan step from 56 .. 59
[15:30:17.280] <TB2> INFO: Test took 21604ms.
[15:30:17.311] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:30:17.311] <TB2> INFO: dacScan step from 60 .. 63
[15:30:38.642] <TB2> INFO: Test took 21331ms.
[15:30:38.668] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:30:38.668] <TB2> INFO: dacScan step from 64 .. 67
[15:31:00.389] <TB2> INFO: Test took 21721ms.
[15:31:00.417] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:31:00.417] <TB2> INFO: dacScan step from 68 .. 71
[15:31:22.018] <TB2> INFO: Test took 21601ms.
[15:31:22.050] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:31:22.050] <TB2> INFO: dacScan step from 72 .. 75
[15:31:43.635] <TB2> INFO: Test took 21585ms.
[15:31:43.668] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:31:43.668] <TB2> INFO: dacScan step from 76 .. 79
[15:32:05.846] <TB2> INFO: Test took 22178ms.
[15:32:05.899] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:32:05.900] <TB2> INFO: dacScan step from 80 .. 83
[15:32:29.242] <TB2> INFO: Test took 23342ms.
[15:32:29.334] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:32:29.338] <TB2> INFO: dacScan step from 84 .. 87
[15:32:54.653] <TB2> INFO: Test took 25315ms.
[15:32:54.760] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:32:54.765] <TB2> INFO: dacScan step from 88 .. 91
[15:33:22.408] <TB2> INFO: Test took 27643ms.
[15:33:22.558] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:33:22.566] <TB2> INFO: dacScan step from 92 .. 95
[15:33:53.670] <TB2> INFO: Test took 31104ms.
[15:33:53.859] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:33:53.870] <TB2> INFO: dacScan step from 96 .. 99
[15:34:26.378] <TB2> INFO: Test took 32507ms.
[15:34:26.614] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:34:26.624] <TB2> INFO: dacScan step from 100 .. 103





[15:35:00.081] <TB2> INFO: Test took 33457ms.
[15:35:00.304] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:35:00.314] <TB2> INFO: dacScan step from 104 .. 107





[15:35:33.712] <TB2> INFO: Test took 33397ms.
[15:35:33.953] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:35:33.964] <TB2> INFO: dacScan step from 108 .. 111





[15:36:07.875] <TB2> INFO: Test took 33911ms.
[15:36:08.141] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:36:08.153] <TB2> INFO: dacScan step from 112 .. 115




[15:36:41.781] <TB2> INFO: Test took 33628ms.
[15:36:42.008] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:36:42.021] <TB2> INFO: dacScan step from 116 .. 119



[15:37:15.888] <TB2> INFO: Test took 33867ms.
[15:37:16.121] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:16.139] <TB2> INFO: dacScan step from 120 .. 123


[15:37:49.987] <TB2> INFO: Test took 33848ms.
[15:37:50.235] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:50.246] <TB2> INFO: dacScan step from 124 .. 127





[15:38:24.053] <TB2> INFO: Test took 33807ms.
[15:38:24.287] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:38:24.298] <TB2> INFO: dacScan step from 128 .. 131


[15:38:58.291] <TB2> INFO: Test took 33993ms.
[15:38:58.523] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:38:58.534] <TB2> INFO: dacScan step from 132 .. 135


[15:39:30.424] <TB2> INFO: Test took 31889ms.
[15:39:30.809] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:39:30.830] <TB2> INFO: dacScan step from 136 .. 139


[15:40:02.290] <TB2> INFO: Test took 31460ms.
[15:40:02.516] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:40:02.527] <TB2> INFO: dacScan step from 140 .. 143


[15:40:36.837] <TB2> INFO: Test took 34310ms.
[15:40:37.121] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:40:37.136] <TB2> INFO: dacScan step from 144 .. 147


[15:41:10.898] <TB2> INFO: Test took 33762ms.
[15:41:11.156] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:41:11.167] <TB2> INFO: dacScan step from 148 .. 149
[15:41:29.492] <TB2> INFO: Test took 18324ms.
[15:41:29.609] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:41:29.615] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:41:31.088] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:41:32.560] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:41:34.008] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:41:35.457] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:41:36.993] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:41:38.454] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:41:39.902] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:41:41.384] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:41:42.894] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:41:44.312] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:41:45.728] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:41:47.142] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:41:48.515] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:41:49.929] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:41:51.390] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:41:52.782] <TB2> INFO: PixTestScurves::scurves() done
[15:41:52.782] <TB2> INFO: Vcal mean: 88.03 88.99 88.98 96.30 92.11 96.44 79.38 91.38 94.71 96.27 100.55 89.46 91.09 93.50 96.75 93.47
[15:41:52.782] <TB2> INFO: Vcal RMS: 5.41 4.80 5.97 5.10 5.01 5.52 3.56 5.44 5.28 5.54 5.99 5.25 5.33 5.49 5.08 5.53
[15:41:52.782] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1019 seconds
[15:41:52.861] <TB2> INFO: ######################################################################
[15:41:52.861] <TB2> INFO: PixTestTrim::doTest()
[15:41:52.861] <TB2> INFO: ######################################################################
[15:41:52.863] <TB2> INFO: ----------------------------------------------------------------------
[15:41:52.863] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[15:41:52.863] <TB2> INFO: ----------------------------------------------------------------------
[15:41:52.941] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:41:52.941] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[15:41:52.949] <TB2> INFO: dacScan step from 0 .. 19
[15:42:08.865] <TB2> INFO: Test took 15916ms.
[15:42:08.886] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:08.886] <TB2> INFO: dacScan step from 20 .. 39
[15:42:24.597] <TB2> INFO: Test took 15711ms.
[15:42:24.617] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:24.617] <TB2> INFO: dacScan step from 40 .. 59
[15:42:41.206] <TB2> INFO: Test took 16589ms.
[15:42:41.226] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:41.226] <TB2> INFO: dacScan step from 60 .. 79
[15:42:57.357] <TB2> INFO: Test took 16131ms.
[15:42:57.386] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:57.386] <TB2> INFO: dacScan step from 80 .. 99
[15:43:14.004] <TB2> INFO: Test took 16618ms.
[15:43:14.050] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:43:14.054] <TB2> INFO: dacScan step from 100 .. 119
[15:43:35.562] <TB2> INFO: Test took 21508ms.
[15:43:35.724] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:43:35.775] <TB2> INFO: dacScan step from 120 .. 139
[15:43:57.741] <TB2> INFO: Test took 21966ms.
[15:43:57.904] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:43:57.935] <TB2> INFO: dacScan step from 140 .. 159
[15:44:15.908] <TB2> INFO: Test took 17973ms.
[15:44:15.989] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:44:40.818] <TB2> INFO: ROC 0 VthrComp = 94
[15:44:40.818] <TB2> INFO: ROC 1 VthrComp = 94
[15:44:40.819] <TB2> INFO: ROC 2 VthrComp = 88
[15:44:40.819] <TB2> INFO: ROC 3 VthrComp = 93
[15:44:40.819] <TB2> INFO: ROC 4 VthrComp = 94
[15:44:40.819] <TB2> INFO: ROC 5 VthrComp = 97
[15:44:40.819] <TB2> INFO: ROC 6 VthrComp = 86
[15:44:40.819] <TB2> INFO: ROC 7 VthrComp = 94
[15:44:40.819] <TB2> INFO: ROC 8 VthrComp = 92
[15:44:40.819] <TB2> INFO: ROC 9 VthrComp = 96
[15:44:40.819] <TB2> INFO: ROC 10 VthrComp = 102
[15:44:40.819] <TB2> INFO: ROC 11 VthrComp = 92
[15:44:40.819] <TB2> INFO: ROC 12 VthrComp = 93
[15:44:40.820] <TB2> INFO: ROC 13 VthrComp = 97
[15:44:40.820] <TB2> INFO: ROC 14 VthrComp = 98
[15:44:40.820] <TB2> INFO: ROC 15 VthrComp = 98
[15:44:40.820] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[15:44:40.820] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[15:44:40.828] <TB2> INFO: dacScan step from 0 .. 19
[15:44:56.500] <TB2> INFO: Test took 15672ms.
[15:44:56.524] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:44:56.524] <TB2> INFO: dacScan step from 20 .. 39
[15:45:12.506] <TB2> INFO: Test took 15982ms.
[15:45:12.541] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:45:12.543] <TB2> INFO: dacScan step from 40 .. 59
[15:45:34.538] <TB2> INFO: Test took 21994ms.
[15:45:34.718] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:45:34.756] <TB2> INFO: dacScan step from 60 .. 79
[15:45:57.517] <TB2> INFO: Test took 22761ms.
[15:45:57.745] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:45:57.814] <TB2> INFO: dacScan step from 80 .. 99
[15:46:20.771] <TB2> INFO: Test took 22957ms.
[15:46:20.990] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:46:21.055] <TB2> INFO: dacScan step from 100 .. 119
[15:46:43.647] <TB2> INFO: Test took 22592ms.
[15:46:43.835] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:46:43.890] <TB2> INFO: dacScan step from 120 .. 139
[15:47:06.457] <TB2> INFO: Test took 22567ms.
[15:47:06.621] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:47:06.676] <TB2> INFO: dacScan step from 140 .. 159
[15:47:29.241] <TB2> INFO: Test took 22565ms.
[15:47:29.429] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:47:54.724] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 56.5212 for pixel 37/1 mean/min/max = 44.7631/32.361/57.1651
[15:47:54.724] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 56.6529 for pixel 25/19 mean/min/max = 45.177/33.5835/56.7705
[15:47:54.725] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 62.701 for pixel 7/69 mean/min/max = 47.8176/32.9153/62.7199
[15:47:54.725] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.6842 for pixel 20/47 mean/min/max = 46.6788/33.5084/59.8492
[15:47:54.726] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 57.5832 for pixel 1/1 mean/min/max = 45.3964/33.2039/57.5889
[15:47:54.727] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 56.8285 for pixel 0/50 mean/min/max = 45.0484/32.8211/57.2758
[15:47:54.727] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 54.107 for pixel 51/19 mean/min/max = 43.0377/31.9451/54.1304
[15:47:54.727] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 57.7306 for pixel 0/72 mean/min/max = 45.4792/33.1268/57.8317
[15:47:54.728] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 60.2525 for pixel 16/69 mean/min/max = 47.0972/33.9384/60.2559
[15:47:54.728] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 59.6926 for pixel 19/9 mean/min/max = 46.1002/32.4608/59.7396
[15:47:54.729] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 58.5833 for pixel 0/79 mean/min/max = 45.5306/32.4099/58.6512
[15:47:54.730] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 58.9206 for pixel 14/52 mean/min/max = 46.2928/33.5989/58.9867
[15:47:54.730] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 59.4366 for pixel 24/73 mean/min/max = 46.0907/32.7282/59.4532
[15:47:54.730] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 58.7547 for pixel 12/3 mean/min/max = 45.4249/32.0362/58.8135
[15:47:54.731] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 57.6829 for pixel 2/0 mean/min/max = 44.9326/32.1392/57.726
[15:47:54.731] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 56.9503 for pixel 13/0 mean/min/max = 44.1891/31.3556/57.0226
[15:47:54.731] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:49:44.612] <TB2> INFO: Test took 109881ms.
[15:49:46.042] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[15:49:46.050] <TB2> INFO: dacScan step from 0 .. 19
[15:50:11.884] <TB2> INFO: Test took 25834ms.
[15:50:11.933] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:50:11.935] <TB2> INFO: dacScan step from 20 .. 39
[15:50:45.922] <TB2> INFO: Test took 33987ms.
[15:50:46.173] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:50:46.211] <TB2> INFO: dacScan step from 40 .. 59





[15:51:24.188] <TB2> INFO: Test took 37978ms.
[15:51:24.464] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:51:24.517] <TB2> INFO: dacScan step from 60 .. 79





[15:52:01.166] <TB2> INFO: Test took 36649ms.
[15:52:01.450] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:52:01.508] <TB2> INFO: dacScan step from 80 .. 99





[15:52:36.603] <TB2> INFO: Test took 35094ms.
[15:52:36.929] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:52:36.981] <TB2> INFO: dacScan step from 100 .. 119


[15:53:15.158] <TB2> INFO: Test took 38177ms.
[15:53:15.462] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:53:15.520] <TB2> INFO: dacScan step from 120 .. 139



[15:53:52.800] <TB2> INFO: Test took 37279ms.
[15:53:53.081] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:53:53.139] <TB2> INFO: dacScan step from 140 .. 159




[15:54:30.625] <TB2> INFO: Test took 37486ms.
[15:54:30.893] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:54:30.945] <TB2> INFO: dacScan step from 160 .. 179




[15:55:09.046] <TB2> INFO: Test took 38101ms.
[15:55:09.314] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:55:09.360] <TB2> INFO: dacScan step from 180 .. 199





[15:55:47.662] <TB2> INFO: Test took 38302ms.
[15:55:47.972] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:56:16.529] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.028756 .. 255.000000
[15:56:16.604] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[15:56:16.612] <TB2> INFO: dacScan step from 0 .. 19
[15:56:30.807] <TB2> INFO: Test took 14195ms.
[15:56:30.826] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:56:30.826] <TB2> INFO: dacScan step from 20 .. 39
[15:56:46.861] <TB2> INFO: Test took 16035ms.
[15:56:46.941] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:56:46.957] <TB2> INFO: dacScan step from 40 .. 59
[15:57:07.065] <TB2> INFO: Test took 20108ms.
[15:57:07.221] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:57:07.276] <TB2> INFO: dacScan step from 60 .. 79
[15:57:26.336] <TB2> INFO: Test took 19060ms.
[15:57:26.475] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:57:26.527] <TB2> INFO: dacScan step from 80 .. 99
[15:57:45.369] <TB2> INFO: Test took 18842ms.
[15:57:45.532] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:57:45.588] <TB2> INFO: dacScan step from 100 .. 119
[15:58:05.641] <TB2> INFO: Test took 20053ms.
[15:58:05.780] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:58:05.833] <TB2> INFO: dacScan step from 120 .. 139
[15:58:24.481] <TB2> INFO: Test took 18648ms.
[15:58:24.631] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:58:24.684] <TB2> INFO: dacScan step from 140 .. 159
[15:58:43.967] <TB2> INFO: Test took 19283ms.
[15:58:44.130] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:58:44.184] <TB2> INFO: dacScan step from 160 .. 179
[15:59:04.074] <TB2> INFO: Test took 19890ms.
[15:59:04.214] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:59:04.267] <TB2> INFO: dacScan step from 180 .. 199
[15:59:23.912] <TB2> INFO: Test took 19645ms.
[15:59:24.112] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:59:24.164] <TB2> INFO: dacScan step from 200 .. 219
[15:59:43.859] <TB2> INFO: Test took 19695ms.
[15:59:44.012] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:59:44.062] <TB2> INFO: dacScan step from 220 .. 239
[16:00:03.911] <TB2> INFO: Test took 19849ms.
[16:00:04.057] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:00:04.113] <TB2> INFO: dacScan step from 240 .. 255
[16:00:20.352] <TB2> INFO: Test took 16239ms.
[16:00:20.469] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:00:52.622] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 16.040400 .. 44.500063
[16:00:52.699] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 6 .. 54 (20) hits flags = 16 (plus default)
[16:00:52.707] <TB2> INFO: dacScan step from 6 .. 25
[16:01:07.242] <TB2> INFO: Test took 14535ms.
[16:01:07.266] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:01:07.266] <TB2> INFO: dacScan step from 26 .. 45
[16:01:25.274] <TB2> INFO: Test took 18008ms.
[16:01:25.405] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:01:25.436] <TB2> INFO: dacScan step from 46 .. 54
[16:01:36.000] <TB2> INFO: Test took 10564ms.
[16:01:36.082] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:01:54.335] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 1.927676 .. 41.469741
[16:01:54.410] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 1 .. 51 (20) hits flags = 16 (plus default)
[16:01:54.418] <TB2> INFO: dacScan step from 1 .. 20
[16:02:09.044] <TB2> INFO: Test took 14626ms.
[16:02:09.066] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:02:09.066] <TB2> INFO: dacScan step from 21 .. 40
[16:02:26.143] <TB2> INFO: Test took 17077ms.
[16:02:26.231] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:02:26.249] <TB2> INFO: dacScan step from 41 .. 51
[16:02:38.281] <TB2> INFO: Test took 12031ms.
[16:02:38.364] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:02:54.330] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 1.927676 .. 38.708361
[16:02:54.407] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 48 (20) hits flags = 16 (plus default)
[16:02:54.415] <TB2> INFO: dacScan step from 1 .. 20
[16:03:09.086] <TB2> INFO: Test took 14671ms.
[16:03:09.108] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:03:09.108] <TB2> INFO: dacScan step from 21 .. 40
[16:03:25.307] <TB2> INFO: Test took 16199ms.
[16:03:25.401] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:03:25.420] <TB2> INFO: dacScan step from 41 .. 48
[16:03:35.172] <TB2> INFO: Test took 9752ms.
[16:03:35.240] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:03:49.536] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[16:03:49.536] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[16:03:49.544] <TB2> INFO: dacScan step from 15 .. 34
[16:04:15.701] <TB2> INFO: Test took 26157ms.
[16:04:15.769] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:04:15.777] <TB2> INFO: dacScan step from 35 .. 54


[16:04:53.406] <TB2> INFO: Test took 37629ms.
[16:04:53.706] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:04:53.758] <TB2> INFO: dacScan step from 55 .. 55
[16:04:58.393] <TB2> INFO: Test took 4635ms.
[16:04:58.409] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:05:12.798] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C0.dat
[16:05:12.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C1.dat
[16:05:12.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C2.dat
[16:05:12.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C3.dat
[16:05:12.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C4.dat
[16:05:12.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C5.dat
[16:05:12.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C6.dat
[16:05:12.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C7.dat
[16:05:12.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C8.dat
[16:05:12.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C9.dat
[16:05:12.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C10.dat
[16:05:12.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C11.dat
[16:05:12.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C12.dat
[16:05:12.807] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C13.dat
[16:05:12.807] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C14.dat
[16:05:12.807] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C15.dat
[16:05:12.807] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters35_C0.dat
[16:05:12.814] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters35_C1.dat
[16:05:12.820] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters35_C2.dat
[16:05:12.826] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters35_C3.dat
[16:05:12.832] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters35_C4.dat
[16:05:12.838] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters35_C5.dat
[16:05:12.844] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters35_C6.dat
[16:05:12.850] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters35_C7.dat
[16:05:12.856] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters35_C8.dat
[16:05:12.862] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters35_C9.dat
[16:05:12.869] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters35_C10.dat
[16:05:12.875] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters35_C11.dat
[16:05:12.881] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters35_C12.dat
[16:05:12.887] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters35_C13.dat
[16:05:12.893] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters35_C14.dat
[16:05:12.899] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//trimParameters35_C15.dat
[16:05:12.905] <TB2> INFO: PixTestTrim::trimTest() done
[16:05:12.905] <TB2> INFO: vtrim: 110 110 123 111 111 99 101 100 118 119 110 118 118 121 101 103
[16:05:12.905] <TB2> INFO: vthrcomp: 94 94 88 93 94 97 86 94 92 96 102 92 93 97 98 98
[16:05:12.905] <TB2> INFO: vcal mean: 35.03 35.05 35.05 35.14 35.11 35.09 35.13 35.11 35.06 35.08 35.07 35.06 35.08 35.13 35.06 35.06
[16:05:12.905] <TB2> INFO: vcal RMS: 1.02 1.03 1.15 1.05 1.03 1.10 1.08 1.04 1.07 1.05 1.15 1.05 1.20 1.03 1.10 1.04
[16:05:12.905] <TB2> INFO: bits mean: 10.18 9.78 9.50 9.54 9.92 10.14 10.74 9.44 9.82 9.91 9.35 9.78 10.17 9.92 10.08 10.11
[16:05:12.905] <TB2> INFO: bits RMS: 2.41 2.44 2.44 2.47 2.40 2.37 2.24 2.55 2.28 2.46 2.80 2.35 2.28 2.54 2.49 2.64
[16:05:12.913] <TB2> INFO: ----------------------------------------------------------------------
[16:05:12.913] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[16:05:12.913] <TB2> INFO: ----------------------------------------------------------------------
[16:05:12.915] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[16:05:12.924] <TB2> INFO: dacScan step from 0 .. 19
[16:05:36.548] <TB2> INFO: Test took 23624ms.
[16:05:36.581] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:05:36.581] <TB2> INFO: dacScan step from 20 .. 39
[16:06:02.101] <TB2> INFO: Test took 25519ms.
[16:06:02.136] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:06:02.137] <TB2> INFO: dacScan step from 40 .. 59
[16:06:27.292] <TB2> INFO: Test took 25155ms.
[16:06:27.333] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:06:27.333] <TB2> INFO: dacScan step from 60 .. 79
[16:06:52.361] <TB2> INFO: Test took 25028ms.
[16:06:52.400] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:06:52.400] <TB2> INFO: dacScan step from 80 .. 99
[16:07:17.991] <TB2> INFO: Test took 25591ms.
[16:07:18.037] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:07:18.037] <TB2> INFO: dacScan step from 100 .. 119
[16:07:47.348] <TB2> INFO: Test took 29311ms.
[16:07:47.512] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:07:47.525] <TB2> INFO: dacScan step from 120 .. 139
[16:08:24.898] <TB2> INFO: Test took 37372ms.
[16:08:25.175] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:08:25.220] <TB2> INFO: dacScan step from 140 .. 159





[16:09:02.500] <TB2> INFO: Test took 37280ms.
[16:09:02.804] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:09:02.869] <TB2> INFO: dacScan step from 160 .. 179


[16:09:39.053] <TB2> INFO: Test took 36184ms.
[16:09:39.344] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:09:39.402] <TB2> INFO: dacScan step from 180 .. 199


[16:10:15.955] <TB2> INFO: Test took 36553ms.
[16:10:16.234] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:10:42.168] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 198 (20) hits flags = 16 (plus default)
[16:10:42.177] <TB2> INFO: dacScan step from 0 .. 19
[16:11:07.567] <TB2> INFO: Test took 25389ms.
[16:11:07.605] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:11:07.605] <TB2> INFO: dacScan step from 20 .. 39
[16:11:32.602] <TB2> INFO: Test took 24997ms.
[16:11:32.643] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:11:32.643] <TB2> INFO: dacScan step from 40 .. 59
[16:11:58.365] <TB2> INFO: Test took 25722ms.
[16:11:58.410] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:11:58.410] <TB2> INFO: dacScan step from 60 .. 79
[16:12:23.652] <TB2> INFO: Test took 25242ms.
[16:12:23.685] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:12:23.685] <TB2> INFO: dacScan step from 80 .. 99
[16:12:49.458] <TB2> INFO: Test took 25773ms.
[16:12:49.516] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:12:49.519] <TB2> INFO: dacScan step from 100 .. 119
[16:13:22.008] <TB2> INFO: Test took 32489ms.
[16:13:22.277] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:13:22.310] <TB2> INFO: dacScan step from 120 .. 139





[16:13:57.272] <TB2> INFO: Test took 34962ms.
[16:13:57.588] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:13:57.642] <TB2> INFO: dacScan step from 140 .. 159


[16:14:35.810] <TB2> INFO: Test took 38168ms.
[16:14:36.089] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:14:36.144] <TB2> INFO: dacScan step from 160 .. 179


[16:15:14.371] <TB2> INFO: Test took 38227ms.
[16:15:14.642] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:15:14.684] <TB2> INFO: dacScan step from 180 .. 198


[16:15:51.997] <TB2> INFO: Test took 37313ms.
[16:15:52.292] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:16:20.674] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 155 (20) hits flags = 16 (plus default)
[16:16:20.682] <TB2> INFO: dacScan step from 0 .. 19
[16:16:45.902] <TB2> INFO: Test took 25215ms.
[16:16:45.942] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:16:45.942] <TB2> INFO: dacScan step from 20 .. 39
[16:17:09.780] <TB2> INFO: Test took 23838ms.
[16:17:09.814] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:17:09.814] <TB2> INFO: dacScan step from 40 .. 59
[16:17:35.053] <TB2> INFO: Test took 25239ms.
[16:17:35.089] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:17:35.089] <TB2> INFO: dacScan step from 60 .. 79
[16:17:58.509] <TB2> INFO: Test took 23420ms.
[16:17:58.547] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:17:58.547] <TB2> INFO: dacScan step from 80 .. 99
[16:18:22.954] <TB2> INFO: Test took 24407ms.
[16:18:23.019] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:18:23.022] <TB2> INFO: dacScan step from 100 .. 119
[16:18:57.130] <TB2> INFO: Test took 34108ms.
[16:18:57.358] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:18:57.385] <TB2> INFO: dacScan step from 120 .. 139


[16:19:34.823] <TB2> INFO: Test took 37438ms.
[16:19:35.143] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:19:35.188] <TB2> INFO: dacScan step from 140 .. 155
[16:20:06.787] <TB2> INFO: Test took 31599ms.
[16:20:07.047] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:20:30.891] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 155 (20) hits flags = 16 (plus default)
[16:20:30.902] <TB2> INFO: dacScan step from 0 .. 19
[16:20:54.513] <TB2> INFO: Test took 23611ms.
[16:20:54.554] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:20:54.554] <TB2> INFO: dacScan step from 20 .. 39
[16:21:19.931] <TB2> INFO: Test took 25377ms.
[16:21:19.964] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:21:19.964] <TB2> INFO: dacScan step from 40 .. 59
[16:21:43.794] <TB2> INFO: Test took 23830ms.
[16:21:43.827] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:21:43.827] <TB2> INFO: dacScan step from 60 .. 79
[16:22:07.709] <TB2> INFO: Test took 23882ms.
[16:22:07.743] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:22:07.743] <TB2> INFO: dacScan step from 80 .. 99
[16:22:33.928] <TB2> INFO: Test took 26184ms.
[16:22:34.002] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:22:34.005] <TB2> INFO: dacScan step from 100 .. 119
[16:23:08.276] <TB2> INFO: Test took 34271ms.
[16:23:08.512] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:23:08.540] <TB2> INFO: dacScan step from 120 .. 139


[16:23:46.101] <TB2> INFO: Test took 37561ms.
[16:23:46.368] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:23:46.413] <TB2> INFO: dacScan step from 140 .. 155
[16:24:17.732] <TB2> INFO: Test took 31318ms.
[16:24:18.031] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:24:41.445] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 155 (20) hits flags = 16 (plus default)
[16:24:41.453] <TB2> INFO: dacScan step from 0 .. 19
[16:25:06.803] <TB2> INFO: Test took 25350ms.
[16:25:06.841] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:25:06.841] <TB2> INFO: dacScan step from 20 .. 39
[16:25:32.173] <TB2> INFO: Test took 25332ms.
[16:25:32.211] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:25:32.211] <TB2> INFO: dacScan step from 40 .. 59
[16:25:57.615] <TB2> INFO: Test took 25404ms.
[16:25:57.653] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:25:57.654] <TB2> INFO: dacScan step from 60 .. 79
[16:26:22.718] <TB2> INFO: Test took 25064ms.
[16:26:22.757] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:26:22.757] <TB2> INFO: dacScan step from 80 .. 99
[16:26:48.680] <TB2> INFO: Test took 25923ms.
[16:26:48.737] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:26:48.740] <TB2> INFO: dacScan step from 100 .. 119
[16:27:22.357] <TB2> INFO: Test took 33616ms.
[16:27:22.585] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:27:22.612] <TB2> INFO: dacScan step from 120 .. 139





[16:28:00.199] <TB2> INFO: Test took 37587ms.
[16:28:00.564] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:28:00.616] <TB2> INFO: dacScan step from 140 .. 155
[16:28:32.195] <TB2> INFO: Test took 31579ms.
[16:28:32.434] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:28:55.409] <TB2> INFO: PixTestTrim::trimBitTest() done
[16:28:55.411] <TB2> INFO: PixTestTrim::doTest() done, duration: 2822 seconds
[16:28:56.098] <TB2> INFO: ######################################################################
[16:28:56.098] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[16:28:56.098] <TB2> INFO: ######################################################################
[16:28:59.742] <TB2> INFO: Test took 3642ms.
[16:28:59.765] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:03.660] <TB2> INFO: Test took 3697ms.
[16:29:03.726] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:07.408] <TB2> INFO: Test took 3672ms.
[16:29:07.472] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:07.479] <TB2> INFO: The DUT currently contains the following objects:
[16:29:07.479] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:07.479] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:07.479] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:07.479] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:07.479] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:07.479] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:07.479] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:07.479] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:07.479] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:07.479] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:07.479] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:07.479] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:07.479] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:07.479] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:07.479] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:07.479] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:07.479] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:07.479] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:07.479] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:07.479] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:08.601] <TB2> INFO: Test took 1122ms.
[16:29:08.602] <TB2> INFO: The DUT currently contains the following objects:
[16:29:08.602] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:08.602] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:08.602] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:08.602] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:08.602] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:08.602] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:08.602] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:08.602] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:08.602] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:08.602] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:08.602] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:08.604] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:08.604] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:08.604] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:08.604] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:08.604] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:08.604] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:08.604] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:08.604] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:08.604] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:09.724] <TB2> INFO: Test took 1120ms.
[16:29:09.725] <TB2> INFO: The DUT currently contains the following objects:
[16:29:09.725] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:09.725] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:09.725] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:09.725] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:09.725] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:09.725] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:09.725] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:09.725] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:09.725] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:09.725] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:09.725] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:09.725] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:09.725] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:09.725] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:09.725] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:09.725] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:09.725] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:09.725] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:09.725] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:09.725] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:10.875] <TB2> INFO: Test took 1150ms.
[16:29:10.877] <TB2> INFO: The DUT currently contains the following objects:
[16:29:10.877] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:10.877] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:10.877] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:10.877] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:10.877] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:10.877] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:10.877] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:10.877] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:10.877] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:10.877] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:10.877] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:10.877] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:10.877] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:10.877] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:10.877] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:10.877] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:10.877] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:10.877] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:10.878] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:10.878] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:11.986] <TB2> INFO: Test took 1108ms.
[16:29:11.987] <TB2> INFO: The DUT currently contains the following objects:
[16:29:11.987] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:11.987] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:11.987] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:11.987] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:11.987] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:11.987] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:11.987] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:11.987] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:11.987] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:11.987] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:11.987] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:11.987] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:11.987] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:11.987] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:11.987] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:11.987] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:11.988] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:11.988] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:11.988] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:11.988] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:13.095] <TB2> INFO: Test took 1107ms.
[16:29:13.096] <TB2> INFO: The DUT currently contains the following objects:
[16:29:13.096] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:13.096] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:13.096] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:13.096] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:13.096] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:13.096] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:13.096] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:13.096] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:13.096] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:13.096] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:13.096] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:13.096] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:13.096] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:13.096] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:13.096] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:13.096] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:13.097] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:13.097] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:13.097] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:13.097] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:14.199] <TB2> INFO: Test took 1102ms.
[16:29:14.199] <TB2> INFO: The DUT currently contains the following objects:
[16:29:14.199] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:14.199] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:14.199] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:14.199] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:14.199] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:14.199] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:14.199] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:14.199] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:14.199] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:14.199] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:14.199] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:14.199] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:14.199] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:14.199] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:14.199] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:14.199] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:14.199] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:14.200] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:14.200] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:14.200] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:15.316] <TB2> INFO: Test took 1116ms.
[16:29:15.317] <TB2> INFO: The DUT currently contains the following objects:
[16:29:15.317] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:15.317] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:15.317] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:15.317] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:15.317] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:15.317] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:15.317] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:15.317] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:15.317] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:15.317] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:15.317] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:15.317] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:15.317] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:15.317] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:15.317] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:15.317] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:15.317] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:15.317] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:15.317] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:15.317] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.439] <TB2> INFO: Test took 1122ms.
[16:29:16.441] <TB2> INFO: The DUT currently contains the following objects:
[16:29:16.441] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:16.441] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:16.441] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:16.441] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:16.441] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.441] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.441] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.441] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.441] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.441] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.441] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.441] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.441] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.441] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.441] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.441] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.441] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.441] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.441] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:16.442] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:17.572] <TB2> INFO: Test took 1130ms.
[16:29:17.573] <TB2> INFO: The DUT currently contains the following objects:
[16:29:17.573] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:17.573] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:17.573] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:17.573] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:17.573] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:17.573] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:17.573] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:17.573] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:17.573] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:17.573] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:17.573] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:17.573] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:17.573] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:17.573] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:17.573] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:17.573] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:17.573] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:17.573] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:17.573] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:17.573] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.689] <TB2> INFO: Test took 1116ms.
[16:29:18.690] <TB2> INFO: The DUT currently contains the following objects:
[16:29:18.690] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:18.690] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:18.690] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:18.690] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:18.690] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.690] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.690] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.690] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.690] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.690] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.690] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.690] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.690] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.690] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.690] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.690] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.690] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.690] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.690] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:18.690] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.812] <TB2> INFO: Test took 1122ms.
[16:29:19.813] <TB2> INFO: The DUT currently contains the following objects:
[16:29:19.813] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:19.813] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:19.813] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:19.813] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:19.813] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.813] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.813] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.813] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.813] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.813] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.813] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.814] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.814] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.814] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.814] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.814] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.814] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.814] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.814] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:19.814] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.933] <TB2> INFO: Test took 1119ms.
[16:29:20.934] <TB2> INFO: The DUT currently contains the following objects:
[16:29:20.934] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:20.934] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:20.934] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:20.934] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:20.934] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.934] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.934] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.934] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.934] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.934] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.934] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.934] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.934] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.934] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.934] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.934] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.934] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.934] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.934] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:20.934] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.055] <TB2> INFO: Test took 1121ms.
[16:29:22.056] <TB2> INFO: The DUT currently contains the following objects:
[16:29:22.057] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:22.057] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:22.057] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:22.057] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:22.057] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.057] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.057] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.057] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.057] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.057] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.057] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.057] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.057] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.057] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.057] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.057] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.057] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.057] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.057] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:22.057] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.168] <TB2> INFO: Test took 1111ms.
[16:29:23.169] <TB2> INFO: The DUT currently contains the following objects:
[16:29:23.169] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:23.169] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:23.169] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:23.169] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:23.169] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.169] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.169] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.169] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.169] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.169] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.169] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.170] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.170] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.170] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.170] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.170] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.170] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.170] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.170] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:23.170] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.319] <TB2> INFO: Test took 1149ms.
[16:29:24.320] <TB2> INFO: The DUT currently contains the following objects:
[16:29:24.320] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:29:24.320] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:29:24.320] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:29:24.320] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:29:24.320] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.320] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.320] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.320] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.320] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.320] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.320] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.320] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.320] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.320] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.320] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.320] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.320] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.320] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.320] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:24.320] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:29:25.435] <TB2> INFO: Test took 1115ms.
[16:29:25.438] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:33:50.234] <TB2> INFO: Test took 264797ms.
[16:33:51.936] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:08.133] <TB2> INFO: Test took 256197ms.
[16:38:09.707] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:09.713] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:09.720] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:09.726] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:09.733] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:09.739] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:09.746] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:09.752] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:09.758] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:09.765] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:09.771] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:09.778] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[16:38:09.784] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[16:38:09.791] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[16:38:09.797] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:09.804] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:09.810] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:09.817] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:09.823] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:38:09.857] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C0.dat
[16:38:09.857] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C1.dat
[16:38:09.858] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C2.dat
[16:38:09.858] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C3.dat
[16:38:09.858] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C4.dat
[16:38:09.858] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C5.dat
[16:38:09.858] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C6.dat
[16:38:09.858] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C7.dat
[16:38:09.858] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C8.dat
[16:38:09.858] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C9.dat
[16:38:09.858] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C10.dat
[16:38:09.858] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C11.dat
[16:38:09.859] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C12.dat
[16:38:09.859] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C13.dat
[16:38:09.859] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C14.dat
[16:38:09.859] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//dacParameters35_C15.dat
[16:38:13.404] <TB2> INFO: Test took 3543ms.
[16:38:17.347] <TB2> INFO: Test took 3678ms.
[16:38:21.069] <TB2> INFO: Test took 3456ms.
[16:38:21.338] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:22.263] <TB2> INFO: Test took 925ms.
[16:38:22.265] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:23.380] <TB2> INFO: Test took 1115ms.
[16:38:23.381] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:24.495] <TB2> INFO: Test took 1114ms.
[16:38:24.497] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:25.597] <TB2> INFO: Test took 1100ms.
[16:38:25.599] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:26.742] <TB2> INFO: Test took 1143ms.
[16:38:26.744] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:27.858] <TB2> INFO: Test took 1114ms.
[16:38:27.860] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:29.003] <TB2> INFO: Test took 1143ms.
[16:38:29.005] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:30.149] <TB2> INFO: Test took 1144ms.
[16:38:30.151] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:31.253] <TB2> INFO: Test took 1102ms.
[16:38:31.255] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:32.385] <TB2> INFO: Test took 1130ms.
[16:38:32.387] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:33.488] <TB2> INFO: Test took 1101ms.
[16:38:33.490] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:34.606] <TB2> INFO: Test took 1116ms.
[16:38:34.608] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:35.723] <TB2> INFO: Test took 1115ms.
[16:38:35.725] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:36.840] <TB2> INFO: Test took 1115ms.
[16:38:36.842] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:37.972] <TB2> INFO: Test took 1130ms.
[16:38:37.974] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:39.104] <TB2> INFO: Test took 1130ms.
[16:38:39.106] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:40.222] <TB2> INFO: Test took 1116ms.
[16:38:40.224] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:41.339] <TB2> INFO: Test took 1115ms.
[16:38:41.341] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:42.470] <TB2> INFO: Test took 1129ms.
[16:38:42.472] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:43.574] <TB2> INFO: Test took 1102ms.
[16:38:43.576] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:44.679] <TB2> INFO: Test took 1103ms.
[16:38:44.682] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:45.797] <TB2> INFO: Test took 1115ms.
[16:38:45.799] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:46.915] <TB2> INFO: Test took 1116ms.
[16:38:46.917] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:48.032] <TB2> INFO: Test took 1115ms.
[16:38:48.034] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:49.150] <TB2> INFO: Test took 1116ms.
[16:38:49.152] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:50.253] <TB2> INFO: Test took 1101ms.
[16:38:50.255] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:51.357] <TB2> INFO: Test took 1102ms.
[16:38:51.359] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:52.460] <TB2> INFO: Test took 1101ms.
[16:38:52.462] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:53.563] <TB2> INFO: Test took 1101ms.
[16:38:53.565] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:54.666] <TB2> INFO: Test took 1101ms.
[16:38:54.668] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:55.783] <TB2> INFO: Test took 1115ms.
[16:38:55.785] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:38:56.900] <TB2> INFO: Test took 1115ms.
[16:38:57.401] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 601 seconds
[16:38:57.401] <TB2> INFO: PH scale (per ROC): 83 80 75 66 76 76 78 75 70 69 80 80 65 70 73 70
[16:38:57.401] <TB2> INFO: PH offset (per ROC): 153 175 182 195 175 171 166 174 173 180 175 163 181 176 180 172
[16:38:57.567] <TB2> INFO: ######################################################################
[16:38:57.567] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[16:38:57.567] <TB2> INFO: ######################################################################
[16:38:57.576] <TB2> INFO: scanning low vcal = 10
[16:39:01.449] <TB2> INFO: Test took 3873ms.
[16:39:01.452] <TB2> INFO: scanning low vcal = 20
[16:39:05.362] <TB2> INFO: Test took 3910ms.
[16:39:05.364] <TB2> INFO: scanning low vcal = 30
[16:39:09.261] <TB2> INFO: Test took 3897ms.
[16:39:09.268] <TB2> INFO: scanning low vcal = 40
[16:39:13.862] <TB2> INFO: Test took 4594ms.
[16:39:13.921] <TB2> INFO: scanning low vcal = 50
[16:39:18.454] <TB2> INFO: Test took 4533ms.
[16:39:18.512] <TB2> INFO: scanning low vcal = 60
[16:39:23.013] <TB2> INFO: Test took 4501ms.
[16:39:23.069] <TB2> INFO: scanning low vcal = 70
[16:39:27.573] <TB2> INFO: Test took 4504ms.
[16:39:27.629] <TB2> INFO: scanning low vcal = 80
[16:39:32.026] <TB2> INFO: Test took 4397ms.
[16:39:32.084] <TB2> INFO: scanning low vcal = 90
[16:39:36.562] <TB2> INFO: Test took 4478ms.
[16:39:36.617] <TB2> INFO: scanning low vcal = 100
[16:39:41.124] <TB2> INFO: Test took 4507ms.
[16:39:41.179] <TB2> INFO: scanning low vcal = 110
[16:39:45.712] <TB2> INFO: Test took 4533ms.
[16:39:45.767] <TB2> INFO: scanning low vcal = 120
[16:39:50.234] <TB2> INFO: Test took 4467ms.
[16:39:50.290] <TB2> INFO: scanning low vcal = 130
[16:39:54.806] <TB2> INFO: Test took 4516ms.
[16:39:54.860] <TB2> INFO: scanning low vcal = 140
[16:39:59.385] <TB2> INFO: Test took 4525ms.
[16:39:59.442] <TB2> INFO: scanning low vcal = 150
[16:40:04.084] <TB2> INFO: Test took 4642ms.
[16:40:04.140] <TB2> INFO: scanning low vcal = 160
[16:40:08.647] <TB2> INFO: Test took 4507ms.
[16:40:08.704] <TB2> INFO: scanning low vcal = 170
[16:40:13.120] <TB2> INFO: Test took 4416ms.
[16:40:13.179] <TB2> INFO: scanning low vcal = 180
[16:40:17.729] <TB2> INFO: Test took 4550ms.
[16:40:17.784] <TB2> INFO: scanning low vcal = 190
[16:40:22.304] <TB2> INFO: Test took 4520ms.
[16:40:22.361] <TB2> INFO: scanning low vcal = 200
[16:40:26.913] <TB2> INFO: Test took 4552ms.
[16:40:26.968] <TB2> INFO: scanning low vcal = 210
[16:40:31.417] <TB2> INFO: Test took 4449ms.
[16:40:31.474] <TB2> INFO: scanning low vcal = 220
[16:40:35.963] <TB2> INFO: Test took 4489ms.
[16:40:36.021] <TB2> INFO: scanning low vcal = 230
[16:40:40.481] <TB2> INFO: Test took 4460ms.
[16:40:40.538] <TB2> INFO: scanning low vcal = 240
[16:40:45.065] <TB2> INFO: Test took 4527ms.
[16:40:45.121] <TB2> INFO: scanning low vcal = 250
[16:40:49.570] <TB2> INFO: Test took 4449ms.
[16:40:49.628] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[16:40:53.988] <TB2> INFO: Test took 4360ms.
[16:40:54.044] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[16:40:58.535] <TB2> INFO: Test took 4491ms.
[16:40:58.592] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[16:41:03.029] <TB2> INFO: Test took 4437ms.
[16:41:03.085] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[16:41:07.556] <TB2> INFO: Test took 4471ms.
[16:41:07.615] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[16:41:11.994] <TB2> INFO: Test took 4379ms.
[16:41:12.476] <TB2> INFO: PixTestGainPedestal::measure() done
[16:41:43.574] <TB2> INFO: PixTestGainPedestal::fit() done
[16:41:43.574] <TB2> INFO: non-linearity mean: 0.962 0.958 0.958 0.960 0.959 0.956 0.948 0.960 0.959 0.961 0.960 0.960 0.951 0.960 0.954 0.953
[16:41:43.574] <TB2> INFO: non-linearity RMS: 0.005 0.007 0.006 0.007 0.007 0.006 0.007 0.006 0.007 0.008 0.005 0.006 0.008 0.008 0.007 0.007
[16:41:43.574] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[16:41:43.592] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[16:41:43.610] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[16:41:43.627] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[16:41:43.645] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[16:41:43.663] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[16:41:43.680] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[16:41:43.698] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[16:41:43.716] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[16:41:43.733] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[16:41:43.750] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[16:41:43.768] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[16:41:43.785] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[16:41:43.803] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[16:41:43.820] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[16:41:43.837] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[16:41:43.855] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 166 seconds
[16:41:43.861] <TB2> INFO: enter test to run
[16:41:43.861] <TB2> INFO: test: exit no parameter change
[16:41:44.345] <TB2> QUIET: Connection to board 0 closed.
[16:41:44.424] <TB2> INFO: pXar: this is the end, my friend