[13:05:05.544] <TB2> INFO: *** Welcome to pxar ***
[13:05:05.544] <TB2> INFO: *** Today: 2015/07/23
[13:05:05.544] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C15.dat
[13:05:05.546] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//tbmParameters_C0b.dat
[13:05:05.546] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//defaultMaskFile.dat
[13:05:05.546] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters_C15.dat
[13:05:05.616] <TB2> INFO: clk: 4
[13:05:05.616] <TB2> INFO: ctr: 4
[13:05:05.616] <TB2> INFO: sda: 19
[13:05:05.616] <TB2> INFO: tin: 9
[13:05:05.616] <TB2> INFO: level: 15
[13:05:05.616] <TB2> INFO: triggerdelay: 0
[13:05:05.616] <TB2> QUIET: Instanciating API for pxar v2.2.5+46~gdbe75a1
[13:05:05.616] <TB2> INFO: Log level: INFO
[13:05:05.625] <TB2> INFO: Found DTB DTB_WXC55Z
[13:05:05.637] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[13:05:05.640] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 0
HW version:
FW version: 4.0
SW version: 4.0
USB id:
MAC address: 000000000000
Hostname:
Comment:
------------------------------------------------------
[13:05:05.643] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[13:05:07.173] <TB2> INFO: DUT info:
[13:05:07.173] <TB2> INFO: The DUT currently contains the following objects:
[13:05:07.173] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:05:07.173] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:05:07.173] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:05:07.173] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[13:05:07.173] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:07.173] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:07.173] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:07.173] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:07.173] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:07.173] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:07.173] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:07.173] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:07.173] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:07.174] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:07.174] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:07.174] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:07.174] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:07.174] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:07.174] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:07.174] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[13:05:07.575] <TB2> INFO: enter 'restricted' command line mode
[13:05:07.575] <TB2> INFO: enter test to run
[13:05:07.575] <TB2> INFO: test: pretest no parameter change
[13:05:07.575] <TB2> INFO: running: pretest
[13:05:07.581] <TB2> INFO: ######################################################################
[13:05:07.581] <TB2> INFO: PixTestPretest::doTest()
[13:05:07.581] <TB2> INFO: ######################################################################
[13:05:07.583] <TB2> INFO: ----------------------------------------------------------------------
[13:05:07.583] <TB2> INFO: PixTestPretest::programROC()
[13:05:07.583] <TB2> INFO: ----------------------------------------------------------------------
[13:05:25.599] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[13:05:25.599] <TB2> INFO: IA differences per ROC: 18.5 20.1 17.7 18.5 18.5 19.3 17.7 21.7 16.9 20.1 20.9 19.3 19.3 20.9 19.3 21.7
[13:05:25.672] <TB2> INFO: ----------------------------------------------------------------------
[13:05:25.672] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[13:05:25.672] <TB2> INFO: ----------------------------------------------------------------------
[13:05:30.747] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 389.9 mA = 24.3688 mA/ROC
[13:05:30.752] <TB2> INFO: ----------------------------------------------------------------------
[13:05:30.752] <TB2> INFO: PixTestPretest::findWorkingPixel()
[13:05:30.752] <TB2> INFO: ----------------------------------------------------------------------
[13:05:39.668] <TB2> INFO: Test took 8911ms.
[13:05:39.964] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[13:05:40.001] <TB2> INFO: ----------------------------------------------------------------------
[13:05:40.001] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[13:05:40.001] <TB2> INFO: ----------------------------------------------------------------------
[13:05:49.329] <TB2> INFO: Test took 9321ms.
[13:05:49.630] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[13:05:49.630] <TB2> INFO: CalDel: 147 145 170 155 152 132 147 165 149 131 139 153 161 140 153 152
[13:05:49.630] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[13:05:49.634] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C0.dat
[13:05:49.634] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C1.dat
[13:05:49.634] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C2.dat
[13:05:49.634] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C3.dat
[13:05:49.635] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C4.dat
[13:05:49.635] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C5.dat
[13:05:49.635] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C6.dat
[13:05:49.636] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C7.dat
[13:05:49.636] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C8.dat
[13:05:49.636] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C9.dat
[13:05:49.636] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C10.dat
[13:05:49.636] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C11.dat
[13:05:49.637] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C12.dat
[13:05:49.637] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C13.dat
[13:05:49.637] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C14.dat
[13:05:49.637] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters_C15.dat
[13:05:49.637] <TB2> INFO: PixTestPretest::doTest() done, duration: 42 seconds
[13:05:49.735] <TB2> INFO: enter test to run
[13:05:49.735] <TB2> INFO: test: fulltest no parameter change
[13:05:49.735] <TB2> INFO: running: fulltest
[13:05:49.735] <TB2> INFO: ######################################################################
[13:05:49.735] <TB2> INFO: PixTestFullTest::doTest()
[13:05:49.735] <TB2> INFO: ######################################################################
[13:05:49.737] <TB2> INFO: ######################################################################
[13:05:49.737] <TB2> INFO: PixTestAlive::doTest()
[13:05:49.737] <TB2> INFO: ######################################################################
[13:05:49.738] <TB2> INFO: ----------------------------------------------------------------------
[13:05:49.738] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:05:49.738] <TB2> INFO: ----------------------------------------------------------------------
[13:05:53.478] <TB2> INFO: Test took 3738ms.
[13:05:53.503] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:53.729] <TB2> INFO: PixTestAlive::aliveTest() done
[13:05:53.729] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:05:53.730] <TB2> INFO: ----------------------------------------------------------------------
[13:05:53.731] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:05:53.731] <TB2> INFO: ----------------------------------------------------------------------
[13:05:56.582] <TB2> INFO: Test took 2850ms.
[13:05:56.585] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:56.594] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[13:05:56.813] <TB2> INFO: PixTestAlive::maskTest() done
[13:05:56.813] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:05:56.815] <TB2> INFO: ----------------------------------------------------------------------
[13:05:56.815] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:05:56.815] <TB2> INFO: ----------------------------------------------------------------------
[13:06:00.496] <TB2> INFO: Test took 3680ms.
[13:06:00.514] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:00.733] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[13:06:00.733] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:06:00.733] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[13:06:00.744] <TB2> INFO: ######################################################################
[13:06:00.744] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[13:06:00.744] <TB2> INFO: ######################################################################
[13:06:00.747] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[13:06:00.758] <TB2> INFO: dacScan step from 0 .. 29
[13:06:23.963] <TB2> INFO: Test took 23205ms.
[13:06:23.997] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:23.997] <TB2> INFO: dacScan step from 30 .. 59
[13:06:51.246] <TB2> INFO: Test took 27249ms.
[13:06:51.344] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:51.392] <TB2> INFO: dacScan step from 60 .. 89
[13:07:24.635] <TB2> INFO: Test took 33243ms.
[13:07:24.880] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:24.959] <TB2> INFO: dacScan step from 90 .. 119
[13:07:56.760] <TB2> INFO: Test took 31801ms.
[13:07:57.162] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:57.300] <TB2> INFO: dacScan step from 120 .. 149
[13:08:24.315] <TB2> INFO: Test took 27015ms.
[13:08:24.490] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:47.853] <TB2> INFO: PixTestBBMap::doTest() done, duration: 167 seconds
[13:08:47.853] <TB2> INFO: number of dead bumps (per ROC): 1 0 0 0 0 0 0 0 0 0 2 0 0 0 0 1
[13:08:47.853] <TB2> INFO: separation cut (per ROC): 70 71 74 75 77 82 67 69 77 88 95 69 79 76 89 81
[13:08:47.928] <TB2> INFO: ######################################################################
[13:08:47.928] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[13:08:47.928] <TB2> INFO: ######################################################################
[13:08:47.929] <TB2> INFO: ----------------------------------------------------------------------
[13:08:47.929] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[13:08:47.929] <TB2> INFO: ----------------------------------------------------------------------
[13:08:47.929] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[13:08:47.938] <TB2> INFO: dacScan step from 0 .. 3
[13:09:09.554] <TB2> INFO: Test took 21616ms.
[13:09:09.580] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:09.580] <TB2> INFO: dacScan step from 4 .. 7
[13:09:31.092] <TB2> INFO: Test took 21511ms.
[13:09:31.119] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:31.119] <TB2> INFO: dacScan step from 8 .. 11
[13:09:52.430] <TB2> INFO: Test took 21311ms.
[13:09:52.458] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:52.458] <TB2> INFO: dacScan step from 12 .. 15
[13:10:14.261] <TB2> INFO: Test took 21803ms.
[13:10:14.291] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:14.291] <TB2> INFO: dacScan step from 16 .. 19
[13:10:35.493] <TB2> INFO: Test took 21202ms.
[13:10:35.524] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:35.524] <TB2> INFO: dacScan step from 20 .. 23
[13:10:57.251] <TB2> INFO: Test took 21727ms.
[13:10:57.278] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:57.278] <TB2> INFO: dacScan step from 24 .. 27
[13:11:18.515] <TB2> INFO: Test took 21237ms.
[13:11:18.545] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:18.545] <TB2> INFO: dacScan step from 28 .. 31
[13:11:39.872] <TB2> INFO: Test took 21327ms.
[13:11:39.899] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:39.899] <TB2> INFO: dacScan step from 32 .. 35
[13:12:01.151] <TB2> INFO: Test took 21252ms.
[13:12:01.184] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:01.184] <TB2> INFO: dacScan step from 36 .. 39
[13:12:22.401] <TB2> INFO: Test took 21218ms.
[13:12:22.429] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:22.429] <TB2> INFO: dacScan step from 40 .. 43
[13:12:43.952] <TB2> INFO: Test took 21523ms.
[13:12:43.982] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:43.982] <TB2> INFO: dacScan step from 44 .. 47
[13:13:05.174] <TB2> INFO: Test took 21193ms.
[13:13:05.204] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:05.204] <TB2> INFO: dacScan step from 48 .. 51
[13:13:27.220] <TB2> INFO: Test took 22016ms.
[13:13:27.250] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:27.251] <TB2> INFO: dacScan step from 52 .. 55
[13:13:48.887] <TB2> INFO: Test took 21636ms.
[13:13:48.925] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:48.925] <TB2> INFO: dacScan step from 56 .. 59
[13:14:10.458] <TB2> INFO: Test took 21533ms.
[13:14:10.491] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:10.491] <TB2> INFO: dacScan step from 60 .. 63
[13:14:32.162] <TB2> INFO: Test took 21671ms.
[13:14:32.193] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:32.194] <TB2> INFO: dacScan step from 64 .. 67
[13:14:54.181] <TB2> INFO: Test took 21987ms.
[13:14:54.221] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:54.222] <TB2> INFO: dacScan step from 68 .. 71
[13:15:17.400] <TB2> INFO: Test took 23178ms.
[13:15:17.458] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:17.459] <TB2> INFO: dacScan step from 72 .. 75
[13:15:41.540] <TB2> INFO: Test took 24081ms.
[13:15:41.626] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:41.629] <TB2> INFO: dacScan step from 76 .. 79
[13:16:07.822] <TB2> INFO: Test took 26193ms.
[13:16:07.937] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:07.942] <TB2> INFO: dacScan step from 80 .. 83
[13:16:38.730] <TB2> INFO: Test took 30788ms.
[13:16:38.901] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:38.911] <TB2> INFO: dacScan step from 84 .. 87
[13:17:11.600] <TB2> INFO: Test took 32689ms.
[13:17:11.805] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:11.814] <TB2> INFO: dacScan step from 88 .. 91
[13:17:45.460] <TB2> INFO: Test took 33646ms.
[13:17:45.674] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:45.684] <TB2> INFO: dacScan step from 92 .. 95


[13:18:19.679] <TB2> INFO: Test took 33994ms.
[13:18:19.914] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:19.925] <TB2> INFO: dacScan step from 96 .. 99





[13:18:53.785] <TB2> INFO: Test took 33860ms.
[13:18:54.059] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:54.071] <TB2> INFO: dacScan step from 100 .. 103





[13:19:28.102] <TB2> INFO: Test took 34031ms.
[13:19:28.324] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:28.336] <TB2> INFO: dacScan step from 104 .. 107


[13:20:01.870] <TB2> INFO: Test took 33534ms.
[13:20:02.149] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:02.163] <TB2> INFO: dacScan step from 108 .. 111





[13:20:35.927] <TB2> INFO: Test took 33764ms.
[13:20:36.155] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:36.168] <TB2> INFO: dacScan step from 112 .. 115


[13:21:10.580] <TB2> INFO: Test took 34412ms.
[13:21:10.847] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:10.860] <TB2> INFO: dacScan step from 116 .. 119


[13:21:44.850] <TB2> INFO: Test took 33990ms.
[13:21:45.119] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:45.131] <TB2> INFO: dacScan step from 120 .. 123


[13:22:19.516] <TB2> INFO: Test took 34385ms.
[13:22:19.768] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:19.781] <TB2> INFO: dacScan step from 124 .. 127


[13:22:54.252] <TB2> INFO: Test took 34471ms.
[13:22:54.481] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:54.494] <TB2> INFO: dacScan step from 128 .. 131


[13:23:26.198] <TB2> INFO: Test took 31704ms.
[13:23:26.504] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:26.517] <TB2> INFO: dacScan step from 132 .. 135


[13:23:57.858] <TB2> INFO: Test took 31341ms.
[13:23:58.083] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:58.095] <TB2> INFO: dacScan step from 136 .. 139


[13:24:32.407] <TB2> INFO: Test took 34312ms.
[13:24:32.709] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:32.723] <TB2> INFO: dacScan step from 140 .. 143


[13:25:06.601] <TB2> INFO: Test took 33878ms.
[13:25:06.818] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:06.830] <TB2> INFO: dacScan step from 144 .. 147


[13:25:40.915] <TB2> INFO: Test took 34084ms.
[13:25:41.197] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:41.211] <TB2> INFO: dacScan step from 148 .. 149
[13:25:58.304] <TB2> INFO: Test took 17093ms.
[13:25:58.420] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:58.428] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:26:00.020] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:26:01.784] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:26:03.296] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:26:04.669] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:26:06.039] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:26:07.417] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:26:08.827] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:26:10.187] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:26:11.550] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:26:12.904] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:26:14.277] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:26:15.687] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:26:17.067] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:26:18.647] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:26:20.068] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:26:21.678] <TB2> INFO: PixTestScurves::scurves() done
[13:26:21.678] <TB2> INFO: Vcal mean: 72.54 79.16 79.46 85.51 84.38 85.93 71.25 84.88 83.68 86.98 89.53 75.91 81.98 81.72 87.28 83.43
[13:26:21.678] <TB2> INFO: Vcal RMS: 4.73 3.81 5.27 5.01 4.82 5.00 4.18 5.13 4.82 5.42 5.58 4.61 4.76 4.78 5.10 4.92
[13:26:21.678] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1053 seconds
[13:26:21.776] <TB2> INFO: ######################################################################
[13:26:21.776] <TB2> INFO: PixTestTrim::doTest()
[13:26:21.776] <TB2> INFO: ######################################################################
[13:26:21.777] <TB2> INFO: ----------------------------------------------------------------------
[13:26:21.777] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:26:21.777] <TB2> INFO: ----------------------------------------------------------------------
[13:26:21.899] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:26:21.899] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:26:21.911] <TB2> INFO: dacScan step from 0 .. 19
[13:26:37.469] <TB2> INFO: Test took 15558ms.
[13:26:37.489] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:37.489] <TB2> INFO: dacScan step from 20 .. 39
[13:26:53.781] <TB2> INFO: Test took 16292ms.
[13:26:53.807] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:53.807] <TB2> INFO: dacScan step from 40 .. 59
[13:27:10.257] <TB2> INFO: Test took 16450ms.
[13:27:10.279] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:10.279] <TB2> INFO: dacScan step from 60 .. 79
[13:27:26.753] <TB2> INFO: Test took 16474ms.
[13:27:26.778] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:26.778] <TB2> INFO: dacScan step from 80 .. 99
[13:27:45.169] <TB2> INFO: Test took 18391ms.
[13:27:45.250] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:45.265] <TB2> INFO: dacScan step from 100 .. 119
[13:28:07.888] <TB2> INFO: Test took 22623ms.
[13:28:08.080] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:08.138] <TB2> INFO: dacScan step from 120 .. 139
[13:28:29.306] <TB2> INFO: Test took 21168ms.
[13:28:29.449] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:29.474] <TB2> INFO: dacScan step from 140 .. 159
[13:28:46.059] <TB2> INFO: Test took 16585ms.
[13:28:46.108] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:07.101] <TB2> INFO: ROC 0 VthrComp = 79
[13:29:07.101] <TB2> INFO: ROC 1 VthrComp = 87
[13:29:07.101] <TB2> INFO: ROC 2 VthrComp = 82
[13:29:07.101] <TB2> INFO: ROC 3 VthrComp = 87
[13:29:07.101] <TB2> INFO: ROC 4 VthrComp = 89
[13:29:07.102] <TB2> INFO: ROC 5 VthrComp = 92
[13:29:07.102] <TB2> INFO: ROC 6 VthrComp = 79
[13:29:07.102] <TB2> INFO: ROC 7 VthrComp = 91
[13:29:07.102] <TB2> INFO: ROC 8 VthrComp = 85
[13:29:07.102] <TB2> INFO: ROC 9 VthrComp = 91
[13:29:07.102] <TB2> INFO: ROC 10 VthrComp = 96
[13:29:07.102] <TB2> INFO: ROC 11 VthrComp = 80
[13:29:07.102] <TB2> INFO: ROC 12 VthrComp = 88
[13:29:07.102] <TB2> INFO: ROC 13 VthrComp = 88
[13:29:07.102] <TB2> INFO: ROC 14 VthrComp = 92
[13:29:07.103] <TB2> INFO: ROC 15 VthrComp = 91
[13:29:07.103] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:29:07.103] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:29:07.111] <TB2> INFO: dacScan step from 0 .. 19
[13:29:22.812] <TB2> INFO: Test took 15700ms.
[13:29:22.839] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:22.839] <TB2> INFO: dacScan step from 20 .. 39
[13:29:39.432] <TB2> INFO: Test took 16593ms.
[13:29:39.467] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:39.470] <TB2> INFO: dacScan step from 40 .. 59
[13:30:00.870] <TB2> INFO: Test took 21400ms.
[13:30:01.067] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:01.119] <TB2> INFO: dacScan step from 60 .. 79
[13:30:24.172] <TB2> INFO: Test took 23053ms.
[13:30:24.333] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:24.397] <TB2> INFO: dacScan step from 80 .. 99
[13:30:47.178] <TB2> INFO: Test took 22781ms.
[13:30:47.340] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:47.394] <TB2> INFO: dacScan step from 100 .. 119
[13:31:10.452] <TB2> INFO: Test took 23058ms.
[13:31:10.618] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:10.675] <TB2> INFO: dacScan step from 120 .. 139
[13:31:33.239] <TB2> INFO: Test took 22564ms.
[13:31:33.424] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:33.479] <TB2> INFO: dacScan step from 140 .. 159
[13:31:56.318] <TB2> INFO: Test took 22839ms.
[13:31:56.483] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:22.851] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 57.8653 for pixel 12/0 mean/min/max = 46.3367/34.7396/57.9338
[13:32:22.851] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 55.7193 for pixel 11/12 mean/min/max = 44.3176/32.3996/56.2356
[13:32:22.852] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 60.9744 for pixel 0/33 mean/min/max = 46.2299/31.4589/61.0009
[13:32:22.852] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 58.5293 for pixel 16/1 mean/min/max = 45.2888/31.7786/58.799
[13:32:22.852] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 57.9503 for pixel 42/2 mean/min/max = 45.7069/33.2411/58.1727
[13:32:22.853] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 56.6818 for pixel 51/46 mean/min/max = 45.0063/33.1281/56.8844
[13:32:22.853] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 55.1217 for pixel 21/57 mean/min/max = 45.4716/35.6206/55.3226
[13:32:22.853] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 57.9555 for pixel 3/69 mean/min/max = 45.3481/32.7377/57.9584
[13:32:22.854] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 59.3876 for pixel 8/8 mean/min/max = 46.0957/32.7551/59.4363
[13:32:22.854] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 59.5832 for pixel 18/2 mean/min/max = 45.735/31.8372/59.6328
[13:32:22.854] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 58.0793 for pixel 5/53 mean/min/max = 45.1883/32.1433/58.2332
[13:32:22.855] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 58.0652 for pixel 11/52 mean/min/max = 45.1586/32.1988/58.1185
[13:32:22.855] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 58.6244 for pixel 13/43 mean/min/max = 45.566/32.3528/58.7792
[13:32:22.855] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 58.8732 for pixel 0/42 mean/min/max = 45.8426/32.7444/58.9407
[13:32:22.856] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 58.1277 for pixel 51/73 mean/min/max = 45.5779/32.9638/58.192
[13:32:22.856] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 56.9904 for pixel 0/23 mean/min/max = 44.6993/32.3129/57.0857
[13:32:22.856] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:34:13.022] <TB2> INFO: Test took 110166ms.
[13:34:14.633] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:34:14.642] <TB2> INFO: dacScan step from 0 .. 19
[13:34:39.983] <TB2> INFO: Test took 25341ms.
[13:34:40.032] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:40.033] <TB2> INFO: dacScan step from 20 .. 39
[13:35:12.661] <TB2> INFO: Test took 32628ms.
[13:35:12.893] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:12.928] <TB2> INFO: dacScan step from 40 .. 59


[13:35:50.657] <TB2> INFO: Test took 37729ms.
[13:35:50.946] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:51.015] <TB2> INFO: dacScan step from 60 .. 79





[13:36:25.948] <TB2> INFO: Test took 34933ms.
[13:36:26.213] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:26.276] <TB2> INFO: dacScan step from 80 .. 99





[13:37:02.827] <TB2> INFO: Test took 36551ms.
[13:37:03.120] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:03.190] <TB2> INFO: dacScan step from 100 .. 119





[13:37:40.489] <TB2> INFO: Test took 37299ms.
[13:37:40.765] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:40.820] <TB2> INFO: dacScan step from 120 .. 139



[13:38:18.088] <TB2> INFO: Test took 37268ms.
[13:38:18.427] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:18.487] <TB2> INFO: dacScan step from 140 .. 159





[13:38:56.272] <TB2> INFO: Test took 37785ms.
[13:38:56.590] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:56.651] <TB2> INFO: dacScan step from 160 .. 179





[13:39:34.376] <TB2> INFO: Test took 37725ms.
[13:39:34.673] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:34.730] <TB2> INFO: dacScan step from 180 .. 199



[13:40:11.695] <TB2> INFO: Test took 36965ms.
[13:40:11.986] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:37.641] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.129530 .. 255.000000
[13:40:37.731] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[13:40:37.740] <TB2> INFO: dacScan step from 0 .. 19
[13:40:51.979] <TB2> INFO: Test took 14239ms.
[13:40:52.005] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:52.005] <TB2> INFO: dacScan step from 20 .. 39
[13:41:08.008] <TB2> INFO: Test took 16003ms.
[13:41:08.089] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:08.104] <TB2> INFO: dacScan step from 40 .. 59
[13:41:26.675] <TB2> INFO: Test took 18571ms.
[13:41:26.820] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:26.873] <TB2> INFO: dacScan step from 60 .. 79
[13:41:45.585] <TB2> INFO: Test took 18712ms.
[13:41:45.756] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:45.818] <TB2> INFO: dacScan step from 80 .. 99
[13:42:04.947] <TB2> INFO: Test took 19129ms.
[13:42:05.116] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:05.157] <TB2> INFO: dacScan step from 100 .. 119
[13:42:23.877] <TB2> INFO: Test took 18720ms.
[13:42:24.017] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:24.064] <TB2> INFO: dacScan step from 120 .. 139
[13:42:42.753] <TB2> INFO: Test took 18689ms.
[13:42:42.942] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:42.984] <TB2> INFO: dacScan step from 140 .. 159
[13:43:02.597] <TB2> INFO: Test took 19613ms.
[13:43:02.787] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:02.832] <TB2> INFO: dacScan step from 160 .. 179
[13:43:22.089] <TB2> INFO: Test took 19257ms.
[13:43:22.227] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:22.265] <TB2> INFO: dacScan step from 180 .. 199
[13:43:42.290] <TB2> INFO: Test took 20025ms.
[13:43:42.426] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:42.460] <TB2> INFO: dacScan step from 200 .. 219
[13:44:02.054] <TB2> INFO: Test took 19594ms.
[13:44:02.195] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:02.232] <TB2> INFO: dacScan step from 220 .. 239
[13:44:21.369] <TB2> INFO: Test took 19137ms.
[13:44:21.507] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:21.547] <TB2> INFO: dacScan step from 240 .. 255
[13:44:37.558] <TB2> INFO: Test took 16011ms.
[13:44:37.703] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:12.681] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 15.207067 .. 44.882473
[13:45:12.779] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 5 .. 54 (20) hits flags = 16 (plus default)
[13:45:12.788] <TB2> INFO: dacScan step from 5 .. 24
[13:45:27.627] <TB2> INFO: Test took 14838ms.
[13:45:27.646] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:27.647] <TB2> INFO: dacScan step from 25 .. 44
[13:45:45.561] <TB2> INFO: Test took 17914ms.
[13:45:45.699] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:45.723] <TB2> INFO: dacScan step from 45 .. 54
[13:45:57.130] <TB2> INFO: Test took 11407ms.
[13:45:57.206] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:12.995] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 17.398877 .. 40.858907
[13:46:13.077] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 7 .. 50 (20) hits flags = 16 (plus default)
[13:46:13.086] <TB2> INFO: dacScan step from 7 .. 26
[13:46:27.548] <TB2> INFO: Test took 14462ms.
[13:46:27.566] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:27.566] <TB2> INFO: dacScan step from 27 .. 46
[13:46:45.921] <TB2> INFO: Test took 18355ms.
[13:46:46.041] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:46.069] <TB2> INFO: dacScan step from 47 .. 50
[13:46:52.264] <TB2> INFO: Test took 6195ms.
[13:46:52.302] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:07.742] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 2.550736 .. 40.858907
[13:47:07.820] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 2 .. 50 (20) hits flags = 16 (plus default)
[13:47:07.828] <TB2> INFO: dacScan step from 2 .. 21
[13:47:22.447] <TB2> INFO: Test took 14619ms.
[13:47:22.466] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:22.466] <TB2> INFO: dacScan step from 22 .. 41
[13:47:39.068] <TB2> INFO: Test took 16602ms.
[13:47:39.156] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:39.178] <TB2> INFO: dacScan step from 42 .. 50
[13:47:49.016] <TB2> INFO: Test took 9838ms.
[13:47:49.095] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:04.227] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:48:04.227] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[13:48:04.235] <TB2> INFO: dacScan step from 15 .. 34
[13:48:30.802] <TB2> INFO: Test took 26567ms.
[13:48:30.863] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:30.871] <TB2> INFO: dacScan step from 35 .. 54





[13:49:07.915] <TB2> INFO: Test took 37044ms.
[13:49:08.215] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:08.264] <TB2> INFO: dacScan step from 55 .. 55
[13:49:12.691] <TB2> INFO: Test took 4427ms.
[13:49:12.714] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:27.594] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:49:27.594] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:49:27.594] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:49:27.594] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:49:27.594] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:49:27.594] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:49:27.594] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:49:27.594] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:49:27.595] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:49:27.595] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:49:27.595] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:49:27.595] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:49:27.595] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:49:27.595] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:49:27.595] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:49:27.595] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:49:27.595] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:49:27.602] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:49:27.607] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:49:27.613] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:49:27.619] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:49:27.625] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:49:27.631] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:49:27.637] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:49:27.643] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:49:27.651] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:49:27.656] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:49:27.662] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:49:27.668] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:49:27.674] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:49:27.680] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:49:27.686] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:49:27.692] <TB2> INFO: PixTestTrim::trimTest() done
[13:49:27.692] <TB2> INFO: vtrim: 100 106 104 107 110 90 110 111 108 123 123 113 109 110 96 99
[13:49:27.692] <TB2> INFO: vthrcomp: 79 87 82 87 89 92 79 91 85 91 96 80 88 88 92 91
[13:49:27.692] <TB2> INFO: vcal mean: 35.04 34.99 35.02 34.91 35.04 35.06 35.00 35.05 35.00 35.03 35.05 35.02 35.02 35.05 35.04 35.05
[13:49:27.692] <TB2> INFO: vcal RMS: 0.90 0.99 0.97 1.03 1.00 1.01 0.93 1.00 1.02 1.12 1.02 1.01 1.02 0.94 1.01 0.96
[13:49:27.692] <TB2> INFO: bits mean: 9.03 9.92 9.20 9.89 9.51 9.44 9.44 9.80 9.63 10.09 10.09 10.32 9.80 9.15 9.39 9.45
[13:49:27.692] <TB2> INFO: bits RMS: 2.45 2.56 2.87 2.55 2.52 2.60 2.18 2.38 2.54 2.46 2.47 2.31 2.51 2.72 2.64 2.73
[13:49:27.699] <TB2> INFO: ----------------------------------------------------------------------
[13:49:27.699] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:49:27.699] <TB2> INFO: ----------------------------------------------------------------------
[13:49:27.701] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:49:27.709] <TB2> INFO: dacScan step from 0 .. 19
[13:49:51.299] <TB2> INFO: Test took 23589ms.
[13:49:51.343] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:51.343] <TB2> INFO: dacScan step from 20 .. 39
[13:50:15.441] <TB2> INFO: Test took 24098ms.
[13:50:15.475] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:15.475] <TB2> INFO: dacScan step from 40 .. 59
[13:50:40.756] <TB2> INFO: Test took 25281ms.
[13:50:40.791] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:40.791] <TB2> INFO: dacScan step from 60 .. 79
[13:51:05.962] <TB2> INFO: Test took 25171ms.
[13:51:06.000] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:06.000] <TB2> INFO: dacScan step from 80 .. 99
[13:51:31.501] <TB2> INFO: Test took 25501ms.
[13:51:31.591] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:31.598] <TB2> INFO: dacScan step from 100 .. 119
[13:52:07.373] <TB2> INFO: Test took 35775ms.
[13:52:07.612] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:07.644] <TB2> INFO: dacScan step from 120 .. 139





[13:52:45.536] <TB2> INFO: Test took 37892ms.
[13:52:45.806] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:45.846] <TB2> INFO: dacScan step from 140 .. 159


[13:53:22.850] <TB2> INFO: Test took 37004ms.
[13:53:23.125] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:53:23.168] <TB2> INFO: dacScan step from 160 .. 179


[13:54:01.201] <TB2> INFO: Test took 38033ms.
[13:54:01.510] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:01.549] <TB2> INFO: dacScan step from 180 .. 199


[13:54:38.620] <TB2> INFO: Test took 37070ms.
[13:54:38.896] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:05.970] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 151 (20) hits flags = 16 (plus default)
[13:55:05.979] <TB2> INFO: dacScan step from 0 .. 19
[13:55:31.376] <TB2> INFO: Test took 25398ms.
[13:55:31.411] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:31.412] <TB2> INFO: dacScan step from 20 .. 39
[13:55:56.790] <TB2> INFO: Test took 25378ms.
[13:55:56.832] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:56.833] <TB2> INFO: dacScan step from 40 .. 59
[13:56:20.675] <TB2> INFO: Test took 23842ms.
[13:56:20.709] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:20.709] <TB2> INFO: dacScan step from 60 .. 79
[13:56:45.151] <TB2> INFO: Test took 24442ms.
[13:56:45.189] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:45.189] <TB2> INFO: dacScan step from 80 .. 99
[13:57:14.336] <TB2> INFO: Test took 29147ms.
[13:57:14.493] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:14.506] <TB2> INFO: dacScan step from 100 .. 119





[13:57:52.293] <TB2> INFO: Test took 37787ms.
[13:57:52.561] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:52.596] <TB2> INFO: dacScan step from 120 .. 139


[13:58:30.777] <TB2> INFO: Test took 38181ms.
[13:58:31.075] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:31.115] <TB2> INFO: dacScan step from 140 .. 151
[13:58:54.231] <TB2> INFO: Test took 23115ms.
[13:58:54.503] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:16.580] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 140 (20) hits flags = 16 (plus default)
[13:59:16.590] <TB2> INFO: dacScan step from 0 .. 19
[13:59:41.374] <TB2> INFO: Test took 24784ms.
[13:59:41.419] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:41.420] <TB2> INFO: dacScan step from 20 .. 39
[14:00:06.919] <TB2> INFO: Test took 25499ms.
[14:00:06.956] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:06.956] <TB2> INFO: dacScan step from 40 .. 59
[14:00:30.869] <TB2> INFO: Test took 23913ms.
[14:00:30.921] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:30.921] <TB2> INFO: dacScan step from 60 .. 79
[14:00:56.555] <TB2> INFO: Test took 25634ms.
[14:00:56.593] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:56.593] <TB2> INFO: dacScan step from 80 .. 99
[14:01:26.415] <TB2> INFO: Test took 29822ms.
[14:01:26.560] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:26.575] <TB2> INFO: dacScan step from 100 .. 119


[14:02:04.553] <TB2> INFO: Test took 37978ms.
[14:02:04.828] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:04.871] <TB2> INFO: dacScan step from 120 .. 139





[14:02:41.688] <TB2> INFO: Test took 36817ms.
[14:02:41.970] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:42.017] <TB2> INFO: dacScan step from 140 .. 140
[14:02:46.591] <TB2> INFO: Test took 4574ms.
[14:02:46.606] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:08.732] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 141 (20) hits flags = 16 (plus default)
[14:03:08.741] <TB2> INFO: dacScan step from 0 .. 19
[14:03:33.982] <TB2> INFO: Test took 25241ms.
[14:03:34.018] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:34.018] <TB2> INFO: dacScan step from 20 .. 39
[14:03:58.766] <TB2> INFO: Test took 24748ms.
[14:03:58.810] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:58.810] <TB2> INFO: dacScan step from 40 .. 59
[14:04:23.627] <TB2> INFO: Test took 24817ms.
[14:04:23.661] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:23.661] <TB2> INFO: dacScan step from 60 .. 79
[14:04:49.039] <TB2> INFO: Test took 25378ms.
[14:04:49.076] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:49.077] <TB2> INFO: dacScan step from 80 .. 99
[14:05:18.572] <TB2> INFO: Test took 29495ms.
[14:05:18.722] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:18.736] <TB2> INFO: dacScan step from 100 .. 119


[14:05:55.803] <TB2> INFO: Test took 37068ms.
[14:05:56.085] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:56.127] <TB2> INFO: dacScan step from 120 .. 139





[14:06:31.995] <TB2> INFO: Test took 35868ms.
[14:06:32.265] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:32.305] <TB2> INFO: dacScan step from 140 .. 141
[14:06:38.483] <TB2> INFO: Test took 6177ms.
[14:06:38.514] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:59.113] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 140 (20) hits flags = 16 (plus default)
[14:06:59.122] <TB2> INFO: dacScan step from 0 .. 19
[14:07:24.322] <TB2> INFO: Test took 25200ms.
[14:07:24.362] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:24.362] <TB2> INFO: dacScan step from 20 .. 39
[14:07:49.491] <TB2> INFO: Test took 25129ms.
[14:07:49.526] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:49.526] <TB2> INFO: dacScan step from 40 .. 59
[14:08:14.545] <TB2> INFO: Test took 25018ms.
[14:08:14.588] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:14.588] <TB2> INFO: dacScan step from 60 .. 79
[14:08:40.108] <TB2> INFO: Test took 25520ms.
[14:08:40.152] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:40.153] <TB2> INFO: dacScan step from 80 .. 99
[14:09:09.914] <TB2> INFO: Test took 29761ms.
[14:09:10.059] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:10.074] <TB2> INFO: dacScan step from 100 .. 119





[14:09:46.912] <TB2> INFO: Test took 36838ms.
[14:09:47.307] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:47.352] <TB2> INFO: dacScan step from 120 .. 139




[14:10:22.405] <TB2> INFO: Test took 35053ms.
[14:10:22.668] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:22.711] <TB2> INFO: dacScan step from 140 .. 140
[14:10:27.394] <TB2> INFO: Test took 4683ms.
[14:10:27.417] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:48.057] <TB2> INFO: PixTestTrim::trimBitTest() done
[14:10:48.058] <TB2> INFO: PixTestTrim::doTest() done, duration: 2666 seconds
[14:10:48.774] <TB2> INFO: ######################################################################
[14:10:48.774] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:10:48.774] <TB2> INFO: ######################################################################
[14:10:52.482] <TB2> INFO: Test took 3706ms.
[14:10:52.503] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:56.476] <TB2> INFO: Test took 3775ms.
[14:10:56.565] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:00.319] <TB2> INFO: Test took 3741ms.
[14:11:00.398] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:00.405] <TB2> INFO: The DUT currently contains the following objects:
[14:11:00.405] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:00.405] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:11:00.405] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:11:00.405] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:00.405] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.405] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.405] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.405] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.405] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.405] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.405] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.405] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.405] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.405] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.405] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.405] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.405] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.405] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.405] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:00.405] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:01.542] <TB2> INFO: Test took 1137ms.
[14:11:01.543] <TB2> INFO: The DUT currently contains the following objects:
[14:11:01.548] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:01.549] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:11:01.549] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:11:01.549] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:01.549] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:01.549] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:01.549] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:01.549] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:01.549] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:01.549] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:01.549] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:01.549] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:01.549] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:01.549] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:01.549] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:01.549] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:01.549] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:01.549] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:01.549] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:01.549] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.667] <TB2> INFO: Test took 1118ms.
[14:11:02.668] <TB2> INFO: The DUT currently contains the following objects:
[14:11:02.668] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:02.668] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:11:02.668] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:11:02.668] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:02.668] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.668] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.668] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.668] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.668] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.668] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.668] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.668] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.668] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.668] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.668] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.668] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.668] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.669] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.669] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:02.669] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.818] <TB2> INFO: Test took 1149ms.
[14:11:03.819] <TB2> INFO: The DUT currently contains the following objects:
[14:11:03.819] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:03.819] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:11:03.819] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:11:03.819] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:03.819] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.819] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.819] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.819] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.819] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.819] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.819] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.820] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.820] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.820] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.820] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.820] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.820] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.820] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.820] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:03.820] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:04.941] <TB2> INFO: Test took 1121ms.
[14:11:04.942] <TB2> INFO: The DUT currently contains the following objects:
[14:11:04.943] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:04.943] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:11:04.943] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:11:04.943] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:04.943] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:04.943] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:04.943] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:04.943] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:04.943] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:04.943] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:04.943] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:04.943] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:04.943] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:04.943] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:04.943] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:04.943] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:04.943] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:04.943] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:04.943] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:04.943] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.082] <TB2> INFO: Test took 1139ms.
[14:11:06.083] <TB2> INFO: The DUT currently contains the following objects:
[14:11:06.083] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:06.083] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:11:06.083] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:11:06.083] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:06.083] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.083] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.083] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.083] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.083] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.083] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.083] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.083] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.083] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.084] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.084] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.084] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.084] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.084] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.084] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:06.084] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:07.205] <TB2> INFO: Test took 1121ms.
[14:11:07.206] <TB2> INFO: The DUT currently contains the following objects:
[14:11:07.206] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:07.206] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:11:07.206] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:11:07.206] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:07.206] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:07.206] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:07.206] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:07.207] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:07.207] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:07.207] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:07.207] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:07.207] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:07.207] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:07.207] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:07.207] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:07.207] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:07.207] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:07.207] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:07.207] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:07.207] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.343] <TB2> INFO: Test took 1136ms.
[14:11:08.344] <TB2> INFO: The DUT currently contains the following objects:
[14:11:08.344] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:08.344] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:11:08.344] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:11:08.344] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:08.344] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.344] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.344] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.344] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.344] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.345] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.345] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.345] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.345] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.345] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.345] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.345] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.345] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.345] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.345] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:08.345] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.450] <TB2> INFO: Test took 1105ms.
[14:11:09.451] <TB2> INFO: The DUT currently contains the following objects:
[14:11:09.451] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:09.451] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:11:09.451] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:11:09.451] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:09.451] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.451] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.451] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.451] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.451] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.451] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.451] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.452] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.452] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.452] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.452] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.452] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.452] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.452] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.452] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:09.452] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:10.560] <TB2> INFO: Test took 1108ms.
[14:11:10.561] <TB2> INFO: The DUT currently contains the following objects:
[14:11:10.561] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:10.561] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:11:10.561] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:11:10.561] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:10.561] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:10.561] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:10.561] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:10.561] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:10.561] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:10.561] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:10.561] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:10.561] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:10.561] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:10.561] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:10.561] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:10.561] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:10.561] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:10.562] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:10.562] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:10.562] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.697] <TB2> INFO: Test took 1135ms.
[14:11:11.698] <TB2> INFO: The DUT currently contains the following objects:
[14:11:11.699] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:11.699] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:11:11.699] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:11:11.699] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:11.699] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.699] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.699] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.699] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.699] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.699] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.699] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.699] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.700] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.700] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.700] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.700] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.700] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.700] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.700] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:11.700] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.807] <TB2> INFO: Test took 1107ms.
[14:11:12.809] <TB2> INFO: The DUT currently contains the following objects:
[14:11:12.819] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:12.819] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:11:12.819] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:11:12.819] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:12.819] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.819] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.819] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.819] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.819] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.819] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.819] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.819] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.819] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.819] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.819] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.819] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.819] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.820] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.820] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:12.820] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:13.917] <TB2> INFO: Test took 1097ms.
[14:11:13.918] <TB2> INFO: The DUT currently contains the following objects:
[14:11:13.918] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:13.918] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:11:13.918] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:11:13.918] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:13.918] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:13.918] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:13.918] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:13.919] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:13.919] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:13.919] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:13.919] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:13.919] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:13.919] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:13.919] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:13.919] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:13.919] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:13.919] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:13.919] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:13.919] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:13.919] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.041] <TB2> INFO: Test took 1122ms.
[14:11:15.043] <TB2> INFO: The DUT currently contains the following objects:
[14:11:15.043] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:15.043] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:11:15.043] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:11:15.043] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:15.043] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.043] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.043] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.043] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.043] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.043] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.043] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.043] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.043] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.043] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.043] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.043] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.043] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.043] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.043] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:15.043] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:16.150] <TB2> INFO: Test took 1107ms.
[14:11:16.151] <TB2> INFO: The DUT currently contains the following objects:
[14:11:16.151] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:16.151] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:11:16.151] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:11:16.151] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:16.151] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:16.151] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:16.151] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:16.151] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:16.151] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:16.151] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:16.151] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:16.151] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:16.151] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:16.151] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:16.151] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:16.151] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:16.151] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:16.151] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:16.151] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:16.152] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.304] <TB2> INFO: Test took 1152ms.
[14:11:17.305] <TB2> INFO: The DUT currently contains the following objects:
[14:11:17.305] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:11:17.305] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:11:17.306] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:11:17.306] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:11:17.306] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.306] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.306] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.306] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.306] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.306] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.306] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.306] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.306] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.306] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.306] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.306] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.306] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.306] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.306] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:17.306] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:11:18.410] <TB2> INFO: Test took 1104ms.
[14:11:18.412] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:15:44.867] <TB2> INFO: Test took 266455ms.
[14:15:46.533] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:07.378] <TB2> INFO: Test took 260845ms.
[14:20:09.456] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:09.467] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:09.477] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:09.488] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:09.498] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:20:09.509] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:20:09.519] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[14:20:09.530] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[14:20:09.540] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:09.551] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:09.561] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:09.572] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:09.582] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:09.593] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:09.603] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:09.613] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:09.624] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:09.634] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:09.645] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:09.655] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:09.696] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:20:09.696] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:20:09.697] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:20:09.697] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:20:09.697] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:20:09.697] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:20:09.697] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:20:09.697] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:20:09.698] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:20:09.698] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:20:09.698] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:20:09.698] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:20:09.698] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:20:09.698] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:20:09.698] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:20:09.699] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:20:13.447] <TB2> INFO: Test took 3746ms.
[14:20:17.459] <TB2> INFO: Test took 3735ms.
[14:20:21.509] <TB2> INFO: Test took 3742ms.
[14:20:21.779] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:22.731] <TB2> INFO: Test took 952ms.
[14:20:22.736] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:23.860] <TB2> INFO: Test took 1124ms.
[14:20:23.863] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:24.983] <TB2> INFO: Test took 1120ms.
[14:20:24.985] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:26.098] <TB2> INFO: Test took 1113ms.
[14:20:26.102] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:27.226] <TB2> INFO: Test took 1125ms.
[14:20:27.230] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:28.357] <TB2> INFO: Test took 1127ms.
[14:20:28.362] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:29.483] <TB2> INFO: Test took 1122ms.
[14:20:29.486] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:30.623] <TB2> INFO: Test took 1137ms.
[14:20:30.626] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:31.764] <TB2> INFO: Test took 1138ms.
[14:20:31.768] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:32.889] <TB2> INFO: Test took 1121ms.
[14:20:32.892] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:34.044] <TB2> INFO: Test took 1152ms.
[14:20:34.048] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:35.166] <TB2> INFO: Test took 1118ms.
[14:20:35.168] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:36.289] <TB2> INFO: Test took 1121ms.
[14:20:36.292] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:37.434] <TB2> INFO: Test took 1142ms.
[14:20:37.438] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:38.579] <TB2> INFO: Test took 1141ms.
[14:20:38.584] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:39.709] <TB2> INFO: Test took 1127ms.
[14:20:39.714] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:40.830] <TB2> INFO: Test took 1116ms.
[14:20:40.832] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:41.938] <TB2> INFO: Test took 1106ms.
[14:20:41.942] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:43.069] <TB2> INFO: Test took 1127ms.
[14:20:43.074] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:44.197] <TB2> INFO: Test took 1123ms.
[14:20:44.201] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:45.324] <TB2> INFO: Test took 1124ms.
[14:20:45.327] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:46.477] <TB2> INFO: Test took 1150ms.
[14:20:46.481] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:47.602] <TB2> INFO: Test took 1122ms.
[14:20:47.605] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:48.740] <TB2> INFO: Test took 1135ms.
[14:20:48.743] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:49.893] <TB2> INFO: Test took 1151ms.
[14:20:49.897] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:51.034] <TB2> INFO: Test took 1138ms.
[14:20:51.038] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:52.146] <TB2> INFO: Test took 1109ms.
[14:20:52.150] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:53.301] <TB2> INFO: Test took 1151ms.
[14:20:53.303] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:54.438] <TB2> INFO: Test took 1135ms.
[14:20:54.441] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:55.545] <TB2> INFO: Test took 1104ms.
[14:20:55.547] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:56.670] <TB2> INFO: Test took 1123ms.
[14:20:56.673] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:57.783] <TB2> INFO: Test took 1110ms.
[14:20:58.328] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 609 seconds
[14:20:58.328] <TB2> INFO: PH scale (per ROC): 96 96 88 79 86 80 89 82 79 78 88 91 78 80 81 80
[14:20:58.328] <TB2> INFO: PH offset (per ROC): 132 153 161 176 151 150 145 153 153 163 154 142 162 156 160 148
[14:20:58.523] <TB2> INFO: ######################################################################
[14:20:58.523] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:20:58.523] <TB2> INFO: ######################################################################
[14:20:58.533] <TB2> INFO: scanning low vcal = 10
[14:21:02.544] <TB2> INFO: Test took 4011ms.
[14:21:02.549] <TB2> INFO: scanning low vcal = 20
[14:21:06.543] <TB2> INFO: Test took 3994ms.
[14:21:06.549] <TB2> INFO: scanning low vcal = 30
[14:21:10.589] <TB2> INFO: Test took 4040ms.
[14:21:10.605] <TB2> INFO: scanning low vcal = 40
[14:21:15.368] <TB2> INFO: Test took 4763ms.
[14:21:15.423] <TB2> INFO: scanning low vcal = 50
[14:21:19.990] <TB2> INFO: Test took 4567ms.
[14:21:20.050] <TB2> INFO: scanning low vcal = 60
[14:21:24.773] <TB2> INFO: Test took 4723ms.
[14:21:24.850] <TB2> INFO: scanning low vcal = 70
[14:21:29.565] <TB2> INFO: Test took 4715ms.
[14:21:29.668] <TB2> INFO: scanning low vcal = 80
[14:21:34.342] <TB2> INFO: Test took 4674ms.
[14:21:34.442] <TB2> INFO: scanning low vcal = 90
[14:21:39.185] <TB2> INFO: Test took 4743ms.
[14:21:39.263] <TB2> INFO: scanning low vcal = 100
[14:21:43.831] <TB2> INFO: Test took 4568ms.
[14:21:43.895] <TB2> INFO: scanning low vcal = 110
[14:21:48.562] <TB2> INFO: Test took 4668ms.
[14:21:48.664] <TB2> INFO: scanning low vcal = 120
[14:21:53.346] <TB2> INFO: Test took 4682ms.
[14:21:53.415] <TB2> INFO: scanning low vcal = 130
[14:21:58.092] <TB2> INFO: Test took 4677ms.
[14:21:58.166] <TB2> INFO: scanning low vcal = 140
[14:22:02.940] <TB2> INFO: Test took 4774ms.
[14:22:03.000] <TB2> INFO: scanning low vcal = 150
[14:22:07.485] <TB2> INFO: Test took 4485ms.
[14:22:07.589] <TB2> INFO: scanning low vcal = 160
[14:22:12.175] <TB2> INFO: Test took 4586ms.
[14:22:12.238] <TB2> INFO: scanning low vcal = 170
[14:22:16.978] <TB2> INFO: Test took 4740ms.
[14:22:17.040] <TB2> INFO: scanning low vcal = 180
[14:22:21.698] <TB2> INFO: Test took 4658ms.
[14:22:21.754] <TB2> INFO: scanning low vcal = 190
[14:22:26.462] <TB2> INFO: Test took 4708ms.
[14:22:26.521] <TB2> INFO: scanning low vcal = 200
[14:22:31.161] <TB2> INFO: Test took 4640ms.
[14:22:31.221] <TB2> INFO: scanning low vcal = 210
[14:22:35.851] <TB2> INFO: Test took 4629ms.
[14:22:35.907] <TB2> INFO: scanning low vcal = 220
[14:22:40.530] <TB2> INFO: Test took 4623ms.
[14:22:40.592] <TB2> INFO: scanning low vcal = 230
[14:22:45.170] <TB2> INFO: Test took 4578ms.
[14:22:45.267] <TB2> INFO: scanning low vcal = 240
[14:22:49.841] <TB2> INFO: Test took 4573ms.
[14:22:49.932] <TB2> INFO: scanning low vcal = 250
[14:22:54.608] <TB2> INFO: Test took 4676ms.
[14:22:54.672] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[14:22:59.269] <TB2> INFO: Test took 4597ms.
[14:22:59.360] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[14:23:04.004] <TB2> INFO: Test took 4644ms.
[14:23:04.108] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[14:23:08.614] <TB2> INFO: Test took 4506ms.
[14:23:08.719] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[14:23:13.301] <TB2> INFO: Test took 4582ms.
[14:23:13.362] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:23:17.901] <TB2> INFO: Test took 4539ms.
[14:23:18.405] <TB2> INFO: PixTestGainPedestal::measure() done
[14:23:49.935] <TB2> INFO: PixTestGainPedestal::fit() done
[14:23:49.935] <TB2> INFO: non-linearity mean: 0.958 0.958 0.959 0.966 0.956 0.951 0.950 0.955 0.955 0.959 0.951 0.954 0.955 0.958 0.951 0.954
[14:23:49.935] <TB2> INFO: non-linearity RMS: 0.005 0.006 0.005 0.004 0.006 0.006 0.005 0.006 0.007 0.006 0.006 0.006 0.006 0.006 0.007 0.005
[14:23:49.935] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[14:23:49.954] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[14:23:49.972] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[14:23:49.991] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[14:23:50.010] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[14:23:50.030] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[14:23:50.048] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[14:23:50.067] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[14:23:50.085] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[14:23:50.103] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[14:23:50.121] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[14:23:50.139] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[14:23:50.157] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[14:23:50.176] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[14:23:50.194] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[14:23:50.212] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[14:23:50.230] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 171 seconds
[14:23:50.236] <TB2> INFO: enter test to run
[14:23:50.236] <TB2> INFO: test: exit no parameter change
[14:23:50.636] <TB2> QUIET: Connection to board 0 closed.
[14:23:50.716] <TB2> INFO: pXar: this is the end, my friend