[08:26:13.430] <TB2> INFO: *** Welcome to pxar ***
[08:26:13.430] <TB2> INFO: *** Today: 2015/07/23
[08:26:13.430] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C15.dat
[08:26:13.431] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//tbmParameters_C0b.dat
[08:26:13.431] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//defaultMaskFile.dat
[08:26:13.431] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters_C15.dat
[08:26:13.507] <TB2> INFO: clk: 4
[08:26:13.507] <TB2> INFO: ctr: 4
[08:26:13.507] <TB2> INFO: sda: 19
[08:26:13.507] <TB2> INFO: tin: 9
[08:26:13.507] <TB2> INFO: level: 15
[08:26:13.507] <TB2> INFO: triggerdelay: 0
[08:26:13.507] <TB2> QUIET: Instanciating API for pxar v2.2.5+46~gdbe75a1
[08:26:13.507] <TB2> INFO: Log level: INFO
[08:26:13.515] <TB2> INFO: Found DTB DTB_WXC55Z
[08:26:13.527] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[08:26:13.531] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 0
HW version:
FW version: 4.0
SW version: 4.0
USB id:
MAC address: 000000000000
Hostname:
Comment:
------------------------------------------------------
[08:26:13.533] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[08:26:15.053] <TB2> INFO: DUT info:
[08:26:15.053] <TB2> INFO: The DUT currently contains the following objects:
[08:26:15.053] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:26:15.053] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:26:15.053] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:26:15.053] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[08:26:15.053] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[08:26:15.053] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[08:26:15.053] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[08:26:15.053] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[08:26:15.053] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[08:26:15.053] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[08:26:15.053] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[08:26:15.053] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[08:26:15.053] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[08:26:15.053] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[08:26:15.053] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[08:26:15.053] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[08:26:15.053] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[08:26:15.053] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[08:26:15.053] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[08:26:15.053] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[08:26:15.454] <TB2> INFO: enter 'restricted' command line mode
[08:26:15.455] <TB2> INFO: enter test to run
[08:26:15.455] <TB2> INFO: test: pretest no parameter change
[08:26:15.455] <TB2> INFO: running: pretest
[08:26:15.463] <TB2> INFO: ######################################################################
[08:26:15.463] <TB2> INFO: PixTestPretest::doTest()
[08:26:15.463] <TB2> INFO: ######################################################################
[08:26:15.465] <TB2> INFO: ----------------------------------------------------------------------
[08:26:15.465] <TB2> INFO: PixTestPretest::programROC()
[08:26:15.465] <TB2> INFO: ----------------------------------------------------------------------
[08:26:33.482] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[08:26:33.482] <TB2> INFO: IA differences per ROC: 19.3 20.9 18.5 18.5 18.5 20.1 18.5 21.7 17.7 20.9 20.9 20.1 20.1 20.9 20.1 22.5
[08:26:33.560] <TB2> INFO: ----------------------------------------------------------------------
[08:26:33.560] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[08:26:33.560] <TB2> INFO: ----------------------------------------------------------------------
[08:26:38.625] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 391.5 mA = 24.4688 mA/ROC
[08:26:38.628] <TB2> INFO: ----------------------------------------------------------------------
[08:26:38.629] <TB2> INFO: PixTestPretest::findWorkingPixel()
[08:26:38.629] <TB2> INFO: ----------------------------------------------------------------------
[08:26:47.891] <TB2> INFO: Test took 9257ms.
[08:26:48.192] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[08:26:48.229] <TB2> INFO: ----------------------------------------------------------------------
[08:26:48.229] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[08:26:48.229] <TB2> INFO: ----------------------------------------------------------------------
[08:26:57.311] <TB2> INFO: Test took 9076ms.
[08:26:57.612] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[08:26:57.612] <TB2> INFO: CalDel: 148 145 170 154 153 132 147 165 149 130 139 153 161 140 154 152
[08:26:57.612] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[08:26:57.616] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C0.dat
[08:26:57.617] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C1.dat
[08:26:57.617] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C2.dat
[08:26:57.617] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C3.dat
[08:26:57.617] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C4.dat
[08:26:57.618] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C5.dat
[08:26:57.618] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C6.dat
[08:26:57.618] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C7.dat
[08:26:57.619] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C8.dat
[08:26:57.619] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C9.dat
[08:26:57.619] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C10.dat
[08:26:57.619] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C11.dat
[08:26:57.620] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C12.dat
[08:26:57.620] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C13.dat
[08:26:57.620] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C14.dat
[08:26:57.620] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters_C15.dat
[08:26:57.621] <TB2> INFO: PixTestPretest::doTest() done, duration: 42 seconds
[08:26:57.715] <TB2> INFO: enter test to run
[08:26:57.715] <TB2> INFO: test: fulltest no parameter change
[08:26:57.715] <TB2> INFO: running: fulltest
[08:26:57.715] <TB2> INFO: ######################################################################
[08:26:57.715] <TB2> INFO: PixTestFullTest::doTest()
[08:26:57.715] <TB2> INFO: ######################################################################
[08:26:57.717] <TB2> INFO: ######################################################################
[08:26:57.717] <TB2> INFO: PixTestAlive::doTest()
[08:26:57.717] <TB2> INFO: ######################################################################
[08:26:57.718] <TB2> INFO: ----------------------------------------------------------------------
[08:26:57.718] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:26:57.718] <TB2> INFO: ----------------------------------------------------------------------
[08:27:01.490] <TB2> INFO: Test took 3770ms.
[08:27:01.517] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:27:01.739] <TB2> INFO: PixTestAlive::aliveTest() done
[08:27:01.739] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:27:01.741] <TB2> INFO: ----------------------------------------------------------------------
[08:27:01.741] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:27:01.741] <TB2> INFO: ----------------------------------------------------------------------
[08:27:04.680] <TB2> INFO: Test took 2938ms.
[08:27:04.684] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:27:04.684] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[08:27:04.906] <TB2> INFO: PixTestAlive::maskTest() done
[08:27:04.906] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:27:04.908] <TB2> INFO: ----------------------------------------------------------------------
[08:27:04.908] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:27:04.908] <TB2> INFO: ----------------------------------------------------------------------
[08:27:08.620] <TB2> INFO: Test took 3711ms.
[08:27:08.644] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:27:08.872] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[08:27:08.872] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:27:08.872] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[08:27:08.884] <TB2> INFO: ######################################################################
[08:27:08.884] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[08:27:08.884] <TB2> INFO: ######################################################################
[08:27:08.886] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[08:27:08.898] <TB2> INFO: dacScan step from 0 .. 29
[08:27:32.412] <TB2> INFO: Test took 23514ms.
[08:27:32.441] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:27:32.441] <TB2> INFO: dacScan step from 30 .. 59
[08:27:59.079] <TB2> INFO: Test took 26638ms.
[08:27:59.202] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:27:59.223] <TB2> INFO: dacScan step from 60 .. 89
[08:28:32.734] <TB2> INFO: Test took 33511ms.
[08:28:33.008] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:28:33.092] <TB2> INFO: dacScan step from 90 .. 119
[08:29:04.586] <TB2> INFO: Test took 31494ms.
[08:29:04.829] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:29:04.906] <TB2> INFO: dacScan step from 120 .. 149
[08:29:32.236] <TB2> INFO: Test took 27330ms.
[08:29:32.440] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:29:57.160] <TB2> INFO: PixTestBBMap::doTest() done, duration: 168 seconds
[08:29:57.160] <TB2> INFO: number of dead bumps (per ROC): 1 0 0 0 0 0 0 0 0 0 2 0 0 0 0 1
[08:29:57.160] <TB2> INFO: separation cut (per ROC): 72 72 76 75 78 82 67 70 79 89 96 70 80 82 91 82
[08:29:57.235] <TB2> INFO: ######################################################################
[08:29:57.235] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[08:29:57.235] <TB2> INFO: ######################################################################
[08:29:57.235] <TB2> INFO: ----------------------------------------------------------------------
[08:29:57.235] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[08:29:57.235] <TB2> INFO: ----------------------------------------------------------------------
[08:29:57.236] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[08:29:57.245] <TB2> INFO: dacScan step from 0 .. 3
[08:30:18.694] <TB2> INFO: Test took 21449ms.
[08:30:18.724] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:30:18.724] <TB2> INFO: dacScan step from 4 .. 7
[08:30:40.282] <TB2> INFO: Test took 21558ms.
[08:30:40.310] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:30:40.310] <TB2> INFO: dacScan step from 8 .. 11
[08:31:01.911] <TB2> INFO: Test took 21601ms.
[08:31:01.936] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:31:01.936] <TB2> INFO: dacScan step from 12 .. 15
[08:31:23.446] <TB2> INFO: Test took 21510ms.
[08:31:23.473] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:31:23.473] <TB2> INFO: dacScan step from 16 .. 19
[08:31:44.842] <TB2> INFO: Test took 21369ms.
[08:31:44.877] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:31:44.877] <TB2> INFO: dacScan step from 20 .. 23
[08:32:06.205] <TB2> INFO: Test took 21328ms.
[08:32:06.233] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:32:06.233] <TB2> INFO: dacScan step from 24 .. 27
[08:32:27.743] <TB2> INFO: Test took 21510ms.
[08:32:27.773] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:32:27.773] <TB2> INFO: dacScan step from 28 .. 31
[08:32:49.136] <TB2> INFO: Test took 21363ms.
[08:32:49.169] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:32:49.169] <TB2> INFO: dacScan step from 32 .. 35
[08:33:10.897] <TB2> INFO: Test took 21728ms.
[08:33:10.927] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:33:10.927] <TB2> INFO: dacScan step from 36 .. 39
[08:33:32.897] <TB2> INFO: Test took 21969ms.
[08:33:32.931] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:33:32.931] <TB2> INFO: dacScan step from 40 .. 43
[08:33:54.774] <TB2> INFO: Test took 21843ms.
[08:33:54.802] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:33:54.802] <TB2> INFO: dacScan step from 44 .. 47
[08:34:16.385] <TB2> INFO: Test took 21583ms.
[08:34:16.414] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:34:16.414] <TB2> INFO: dacScan step from 48 .. 51
[08:34:37.907] <TB2> INFO: Test took 21493ms.
[08:34:37.938] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:34:37.938] <TB2> INFO: dacScan step from 52 .. 55
[08:34:59.102] <TB2> INFO: Test took 21163ms.
[08:34:59.127] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:34:59.127] <TB2> INFO: dacScan step from 56 .. 59
[08:35:20.574] <TB2> INFO: Test took 21447ms.
[08:35:20.605] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:35:20.605] <TB2> INFO: dacScan step from 60 .. 63
[08:35:42.210] <TB2> INFO: Test took 21605ms.
[08:35:42.244] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:35:42.244] <TB2> INFO: dacScan step from 64 .. 67
[08:36:04.053] <TB2> INFO: Test took 21809ms.
[08:36:04.096] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:36:04.097] <TB2> INFO: dacScan step from 68 .. 71
[08:36:26.552] <TB2> INFO: Test took 22455ms.
[08:36:26.616] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:36:26.617] <TB2> INFO: dacScan step from 72 .. 75
[08:36:50.713] <TB2> INFO: Test took 24095ms.
[08:36:50.784] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:36:50.787] <TB2> INFO: dacScan step from 76 .. 79
[08:37:16.641] <TB2> INFO: Test took 25854ms.
[08:37:16.767] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:37:16.773] <TB2> INFO: dacScan step from 80 .. 83
[08:37:46.417] <TB2> INFO: Test took 29644ms.
[08:37:46.623] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:37:46.632] <TB2> INFO: dacScan step from 84 .. 87
[08:38:18.925] <TB2> INFO: Test took 32293ms.
[08:38:19.177] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:19.186] <TB2> INFO: dacScan step from 88 .. 91
[08:38:52.465] <TB2> INFO: Test took 33279ms.
[08:38:52.689] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:52.699] <TB2> INFO: dacScan step from 92 .. 95





[08:39:26.323] <TB2> INFO: Test took 33624ms.
[08:39:26.618] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:39:26.631] <TB2> INFO: dacScan step from 96 .. 99





[08:40:00.442] <TB2> INFO: Test took 33811ms.
[08:40:00.680] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:00.691] <TB2> INFO: dacScan step from 100 .. 103





[08:40:34.926] <TB2> INFO: Test took 34235ms.
[08:40:35.151] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:35.165] <TB2> INFO: dacScan step from 104 .. 107


[08:41:08.881] <TB2> INFO: Test took 33716ms.
[08:41:09.110] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:09.121] <TB2> INFO: dacScan step from 108 .. 111





[08:41:43.321] <TB2> INFO: Test took 34200ms.
[08:41:43.591] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:43.605] <TB2> INFO: dacScan step from 112 .. 115





[08:42:17.664] <TB2> INFO: Test took 34059ms.
[08:42:17.935] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:17.949] <TB2> INFO: dacScan step from 116 .. 119


[08:42:52.080] <TB2> INFO: Test took 34131ms.
[08:42:52.354] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:52.368] <TB2> INFO: dacScan step from 120 .. 123


[08:43:25.541] <TB2> INFO: Test took 33173ms.
[08:43:25.802] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:25.816] <TB2> INFO: dacScan step from 124 .. 127


[08:43:59.450] <TB2> INFO: Test took 33634ms.
[08:43:59.672] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:59.683] <TB2> INFO: dacScan step from 128 .. 131


[08:44:31.169] <TB2> INFO: Test took 31486ms.
[08:44:31.458] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:31.473] <TB2> INFO: dacScan step from 132 .. 135


[08:45:03.284] <TB2> INFO: Test took 31811ms.
[08:45:03.510] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:03.521] <TB2> INFO: dacScan step from 136 .. 139


[08:45:37.111] <TB2> INFO: Test took 33590ms.
[08:45:37.370] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:37.382] <TB2> INFO: dacScan step from 140 .. 143


[08:46:11.787] <TB2> INFO: Test took 34405ms.
[08:46:12.007] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:46:12.023] <TB2> INFO: dacScan step from 144 .. 147


[08:46:46.615] <TB2> INFO: Test took 34592ms.
[08:46:46.847] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:46:46.858] <TB2> INFO: dacScan step from 148 .. 149
[08:47:03.843] <TB2> INFO: Test took 16985ms.
[08:47:03.954] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:47:03.960] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:47:05.449] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:47:06.978] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:47:08.389] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:47:09.809] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:47:11.170] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:47:12.534] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:47:14.026] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:47:15.424] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:47:16.873] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:47:18.321] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:47:19.773] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:47:21.334] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:47:22.703] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:47:24.062] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:47:25.416] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:47:26.809] <TB2> INFO: PixTestScurves::scurves() done
[08:47:26.809] <TB2> INFO: Vcal mean: 73.73 79.98 80.35 86.05 84.58 86.12 71.24 84.96 84.52 87.87 90.75 76.06 81.90 83.74 88.52 83.92
[08:47:26.809] <TB2> INFO: Vcal RMS: 4.66 3.88 5.32 5.03 4.84 5.01 4.17 5.15 4.93 5.50 5.58 4.58 4.73 5.01 5.12 4.99
[08:47:26.809] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1049 seconds
[08:47:26.878] <TB2> INFO: ######################################################################
[08:47:26.878] <TB2> INFO: PixTestTrim::doTest()
[08:47:26.878] <TB2> INFO: ######################################################################
[08:47:26.880] <TB2> INFO: ----------------------------------------------------------------------
[08:47:26.880] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[08:47:26.880] <TB2> INFO: ----------------------------------------------------------------------
[08:47:26.957] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[08:47:26.957] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[08:47:26.967] <TB2> INFO: dacScan step from 0 .. 19
[08:47:42.508] <TB2> INFO: Test took 15541ms.
[08:47:42.529] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:47:42.529] <TB2> INFO: dacScan step from 20 .. 39
[08:47:59.003] <TB2> INFO: Test took 16474ms.
[08:47:59.030] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:47:59.030] <TB2> INFO: dacScan step from 40 .. 59
[08:48:15.410] <TB2> INFO: Test took 16380ms.
[08:48:15.436] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:48:15.436] <TB2> INFO: dacScan step from 60 .. 79
[08:48:31.575] <TB2> INFO: Test took 16138ms.
[08:48:31.598] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:48:31.599] <TB2> INFO: dacScan step from 80 .. 99
[08:48:49.895] <TB2> INFO: Test took 18296ms.
[08:48:49.968] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:48:49.978] <TB2> INFO: dacScan step from 100 .. 119
[08:49:12.401] <TB2> INFO: Test took 22423ms.
[08:49:12.563] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:49:12.597] <TB2> INFO: dacScan step from 120 .. 139
[08:49:33.840] <TB2> INFO: Test took 21243ms.
[08:49:34.006] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:49:34.033] <TB2> INFO: dacScan step from 140 .. 159
[08:49:50.777] <TB2> INFO: Test took 16744ms.
[08:49:50.831] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:50:13.981] <TB2> INFO: ROC 0 VthrComp = 80
[08:50:13.981] <TB2> INFO: ROC 1 VthrComp = 88
[08:50:13.981] <TB2> INFO: ROC 2 VthrComp = 83
[08:50:13.981] <TB2> INFO: ROC 3 VthrComp = 87
[08:50:13.981] <TB2> INFO: ROC 4 VthrComp = 89
[08:50:13.981] <TB2> INFO: ROC 5 VthrComp = 93
[08:50:13.981] <TB2> INFO: ROC 6 VthrComp = 79
[08:50:13.981] <TB2> INFO: ROC 7 VthrComp = 91
[08:50:13.981] <TB2> INFO: ROC 8 VthrComp = 86
[08:50:13.982] <TB2> INFO: ROC 9 VthrComp = 92
[08:50:13.982] <TB2> INFO: ROC 10 VthrComp = 98
[08:50:13.982] <TB2> INFO: ROC 11 VthrComp = 80
[08:50:13.982] <TB2> INFO: ROC 12 VthrComp = 88
[08:50:13.982] <TB2> INFO: ROC 13 VthrComp = 91
[08:50:13.982] <TB2> INFO: ROC 14 VthrComp = 94
[08:50:13.982] <TB2> INFO: ROC 15 VthrComp = 91
[08:50:13.982] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[08:50:13.982] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[08:50:13.991] <TB2> INFO: dacScan step from 0 .. 19
[08:50:29.901] <TB2> INFO: Test took 15910ms.
[08:50:29.927] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:50:29.927] <TB2> INFO: dacScan step from 20 .. 39
[08:50:46.766] <TB2> INFO: Test took 16838ms.
[08:50:46.798] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:50:46.801] <TB2> INFO: dacScan step from 40 .. 59
[08:51:08.533] <TB2> INFO: Test took 21732ms.
[08:51:08.697] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:51:08.735] <TB2> INFO: dacScan step from 60 .. 79
[08:51:31.446] <TB2> INFO: Test took 22711ms.
[08:51:31.619] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:51:31.669] <TB2> INFO: dacScan step from 80 .. 99
[08:51:54.762] <TB2> INFO: Test took 23093ms.
[08:51:54.936] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:51:54.986] <TB2> INFO: dacScan step from 100 .. 119
[08:52:17.427] <TB2> INFO: Test took 22441ms.
[08:52:17.596] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:52:17.643] <TB2> INFO: dacScan step from 120 .. 139
[08:52:40.217] <TB2> INFO: Test took 22574ms.
[08:52:40.404] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:52:40.455] <TB2> INFO: dacScan step from 140 .. 159
[08:53:03.184] <TB2> INFO: Test took 22728ms.
[08:53:03.351] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:53:30.232] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 56.5646 for pixel 9/67 mean/min/max = 44.7205/32.713/56.728
[08:53:30.233] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 56.7341 for pixel 5/1 mean/min/max = 45.2287/33.6837/56.7737
[08:53:30.233] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 60.9184 for pixel 7/69 mean/min/max = 46.1298/31.2582/61.0015
[08:53:30.233] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.3818 for pixel 4/1 mean/min/max = 46.0558/32.6567/59.4549
[08:53:30.234] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 58.1542 for pixel 51/6 mean/min/max = 45.8102/33.2822/58.3382
[08:53:30.234] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 56.488 for pixel 5/71 mean/min/max = 44.3936/32.2452/56.5421
[08:53:30.234] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 54.9184 for pixel 21/57 mean/min/max = 45.4893/35.659/55.3197
[08:53:30.235] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.0626 for pixel 0/75 mean/min/max = 45.3947/32.7034/58.086
[08:53:30.235] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 59.1935 for pixel 0/38 mean/min/max = 46.0325/32.7771/59.2879
[08:53:30.235] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 59.6805 for pixel 11/6 mean/min/max = 45.7349/31.7079/59.7618
[08:53:30.235] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 57.977 for pixel 6/57 mean/min/max = 44.7147/31.4419/57.9874
[08:53:30.236] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 57.7917 for pixel 9/0 mean/min/max = 45.2505/32.3476/58.1535
[08:53:30.236] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 58.7112 for pixel 0/8 mean/min/max = 45.564/32.3736/58.7544
[08:53:30.236] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 58.5337 for pixel 0/76 mean/min/max = 45.394/32.2142/58.5738
[08:53:30.236] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 57.7224 for pixel 19/4 mean/min/max = 45.023/32.2466/57.7993
[08:53:30.237] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 57.3957 for pixel 2/67 mean/min/max = 44.9939/32.5486/57.4391
[08:53:30.237] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:55:20.742] <TB2> INFO: Test took 110505ms.
[08:55:22.245] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[08:55:22.253] <TB2> INFO: dacScan step from 0 .. 19
[08:55:47.183] <TB2> INFO: Test took 24930ms.
[08:55:47.230] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:55:47.231] <TB2> INFO: dacScan step from 20 .. 39
[08:56:19.567] <TB2> INFO: Test took 32336ms.
[08:56:19.791] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:19.819] <TB2> INFO: dacScan step from 40 .. 59





[08:56:57.639] <TB2> INFO: Test took 37820ms.
[08:56:57.925] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:57.987] <TB2> INFO: dacScan step from 60 .. 79


[08:57:33.149] <TB2> INFO: Test took 35162ms.
[08:57:33.408] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:57:33.462] <TB2> INFO: dacScan step from 80 .. 99


[08:58:09.036] <TB2> INFO: Test took 35574ms.
[08:58:09.310] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:58:09.363] <TB2> INFO: dacScan step from 100 .. 119


[08:58:46.849] <TB2> INFO: Test took 37486ms.
[08:58:47.168] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:58:47.224] <TB2> INFO: dacScan step from 120 .. 139





[08:59:23.532] <TB2> INFO: Test took 36308ms.
[08:59:23.798] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:59:23.848] <TB2> INFO: dacScan step from 140 .. 159


[09:00:00.115] <TB2> INFO: Test took 36267ms.
[09:00:00.431] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:00:00.487] <TB2> INFO: dacScan step from 160 .. 179





[09:00:37.111] <TB2> INFO: Test took 36624ms.
[09:00:37.499] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:00:37.557] <TB2> INFO: dacScan step from 180 .. 199


[09:01:13.653] <TB2> INFO: Test took 36095ms.
[09:01:13.977] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:39.178] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.258341 .. 255.000000
[09:01:39.253] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[09:01:39.261] <TB2> INFO: dacScan step from 0 .. 19
[09:01:53.201] <TB2> INFO: Test took 13940ms.
[09:01:53.224] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:53.224] <TB2> INFO: dacScan step from 20 .. 39
[09:02:08.814] <TB2> INFO: Test took 15590ms.
[09:02:08.892] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:08.908] <TB2> INFO: dacScan step from 40 .. 59
[09:02:27.561] <TB2> INFO: Test took 18653ms.
[09:02:27.736] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:27.799] <TB2> INFO: dacScan step from 60 .. 79
[09:02:47.240] <TB2> INFO: Test took 19441ms.
[09:02:47.390] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:47.456] <TB2> INFO: dacScan step from 80 .. 99
[09:03:06.202] <TB2> INFO: Test took 18746ms.
[09:03:06.348] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:03:06.399] <TB2> INFO: dacScan step from 100 .. 119
[09:03:24.764] <TB2> INFO: Test took 18365ms.
[09:03:24.901] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:03:24.960] <TB2> INFO: dacScan step from 120 .. 139
[09:03:44.677] <TB2> INFO: Test took 19717ms.
[09:03:44.854] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:03:44.906] <TB2> INFO: dacScan step from 140 .. 159
[09:04:04.345] <TB2> INFO: Test took 19439ms.
[09:04:04.493] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:04.551] <TB2> INFO: dacScan step from 160 .. 179
[09:04:23.687] <TB2> INFO: Test took 19136ms.
[09:04:23.843] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:23.900] <TB2> INFO: dacScan step from 180 .. 199
[09:04:44.741] <TB2> INFO: Test took 20841ms.
[09:04:44.879] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:44.935] <TB2> INFO: dacScan step from 200 .. 219
[09:05:04.137] <TB2> INFO: Test took 19202ms.
[09:05:04.274] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:05:04.327] <TB2> INFO: dacScan step from 220 .. 239
[09:05:22.886] <TB2> INFO: Test took 18558ms.
[09:05:23.094] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:05:23.166] <TB2> INFO: dacScan step from 240 .. 255
[09:05:38.526] <TB2> INFO: Test took 15360ms.
[09:05:38.684] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:14.633] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 15.341976 .. 45.867320
[09:06:14.719] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 5 .. 55 (20) hits flags = 16 (plus default)
[09:06:14.728] <TB2> INFO: dacScan step from 5 .. 24
[09:06:29.040] <TB2> INFO: Test took 14312ms.
[09:06:29.064] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:29.064] <TB2> INFO: dacScan step from 25 .. 44
[09:06:46.651] <TB2> INFO: Test took 17587ms.
[09:06:46.796] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:46.831] <TB2> INFO: dacScan step from 45 .. 55
[09:06:58.916] <TB2> INFO: Test took 12085ms.
[09:06:59.011] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:15.003] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 17.895815 .. 41.074627
[09:07:15.096] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 7 .. 51 (20) hits flags = 16 (plus default)
[09:07:15.106] <TB2> INFO: dacScan step from 7 .. 26
[09:07:29.131] <TB2> INFO: Test took 14025ms.
[09:07:29.150] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:29.150] <TB2> INFO: dacScan step from 27 .. 46
[09:07:46.561] <TB2> INFO: Test took 17411ms.
[09:07:46.687] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:46.725] <TB2> INFO: dacScan step from 47 .. 51
[09:07:53.627] <TB2> INFO: Test took 6902ms.
[09:07:53.679] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:09.141] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 2.035823 .. 40.804243
[09:08:09.220] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 2 .. 50 (20) hits flags = 16 (plus default)
[09:08:09.228] <TB2> INFO: dacScan step from 2 .. 21
[09:08:23.883] <TB2> INFO: Test took 14655ms.
[09:08:23.909] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:23.909] <TB2> INFO: dacScan step from 22 .. 41
[09:08:40.487] <TB2> INFO: Test took 16578ms.
[09:08:40.574] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:40.594] <TB2> INFO: dacScan step from 42 .. 50
[09:08:51.313] <TB2> INFO: Test took 10719ms.
[09:08:51.387] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:09:07.815] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[09:09:07.815] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[09:09:07.825] <TB2> INFO: dacScan step from 15 .. 34
[09:09:33.874] <TB2> INFO: Test took 26049ms.
[09:09:33.942] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:09:33.953] <TB2> INFO: dacScan step from 35 .. 54






[09:10:11.585] <TB2> INFO: Test took 37632ms.
[09:10:11.909] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:10:11.966] <TB2> INFO: dacScan step from 55 .. 55
[09:10:16.553] <TB2> INFO: Test took 4587ms.
[09:10:16.569] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:10:30.360] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:10:30.360] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:10:30.361] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:10:30.361] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:10:30.361] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:10:30.361] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:10:30.361] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:10:30.361] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:10:30.361] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:10:30.361] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:10:30.362] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:10:30.362] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:10:30.362] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:10:30.362] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:10:30.362] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:10:30.362] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:10:30.362] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters35_C0.dat
[09:10:30.372] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters35_C1.dat
[09:10:30.381] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters35_C2.dat
[09:10:30.390] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters35_C3.dat
[09:10:30.400] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters35_C4.dat
[09:10:30.409] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters35_C5.dat
[09:10:30.418] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters35_C6.dat
[09:10:30.427] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters35_C7.dat
[09:10:30.437] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters35_C8.dat
[09:10:30.446] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters35_C9.dat
[09:10:30.455] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters35_C10.dat
[09:10:30.464] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters35_C11.dat
[09:10:30.474] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters35_C12.dat
[09:10:30.483] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters35_C13.dat
[09:10:30.492] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters35_C14.dat
[09:10:30.501] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//trimParameters35_C15.dat
[09:10:30.510] <TB2> INFO: PixTestTrim::trimTest() done
[09:10:30.510] <TB2> INFO: vtrim: 99 109 116 116 105 95 106 107 108 111 121 103 107 108 102 104
[09:10:30.510] <TB2> INFO: vthrcomp: 80 88 83 87 89 93 79 91 86 92 98 80 88 91 94 91
[09:10:30.510] <TB2> INFO: vcal mean: 35.01 35.03 35.04 35.05 35.02 35.03 35.02 35.03 35.02 35.06 35.04 35.02 35.07 35.00 35.04 35.01
[09:10:30.510] <TB2> INFO: vcal RMS: 0.97 0.94 0.99 1.24 0.98 1.04 0.97 1.03 1.02 1.00 1.05 1.01 1.01 0.96 1.03 0.96
[09:10:30.511] <TB2> INFO: bits mean: 9.86 9.49 9.83 10.00 9.18 10.11 9.19 9.60 9.60 9.43 10.15 9.76 9.69 9.20 9.98 9.50
[09:10:30.511] <TB2> INFO: bits RMS: 2.46 2.53 2.57 2.34 2.65 2.46 2.27 2.47 2.55 2.75 2.55 2.56 2.54 2.81 2.51 2.66
[09:10:30.518] <TB2> INFO: ----------------------------------------------------------------------
[09:10:30.518] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[09:10:30.518] <TB2> INFO: ----------------------------------------------------------------------
[09:10:30.521] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:10:30.532] <TB2> INFO: dacScan step from 0 .. 19
[09:10:55.758] <TB2> INFO: Test took 25226ms.
[09:10:55.793] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:10:55.793] <TB2> INFO: dacScan step from 20 .. 39
[09:11:20.832] <TB2> INFO: Test took 25039ms.
[09:11:20.865] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:20.865] <TB2> INFO: dacScan step from 40 .. 59
[09:11:46.224] <TB2> INFO: Test took 25358ms.
[09:11:46.262] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:46.262] <TB2> INFO: dacScan step from 60 .. 79
[09:12:11.701] <TB2> INFO: Test took 25439ms.
[09:12:11.734] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:11.734] <TB2> INFO: dacScan step from 80 .. 99
[09:12:37.742] <TB2> INFO: Test took 26008ms.
[09:12:37.820] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:37.826] <TB2> INFO: dacScan step from 100 .. 119
[09:13:12.297] <TB2> INFO: Test took 34471ms.
[09:13:12.571] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:12.606] <TB2> INFO: dacScan step from 120 .. 139





[09:13:50.478] <TB2> INFO: Test took 37872ms.
[09:13:50.781] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:50.844] <TB2> INFO: dacScan step from 140 .. 159





[09:14:27.208] <TB2> INFO: Test took 36364ms.
[09:14:27.654] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:27.747] <TB2> INFO: dacScan step from 160 .. 179


[09:15:06.381] <TB2> INFO: Test took 38634ms.
[09:15:06.656] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:15:06.710] <TB2> INFO: dacScan step from 180 .. 199


[09:15:42.328] <TB2> INFO: Test took 35618ms.
[09:15:42.631] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:12.013] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[09:16:12.021] <TB2> INFO: dacScan step from 0 .. 19
[09:16:37.520] <TB2> INFO: Test took 25498ms.
[09:16:37.562] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:37.562] <TB2> INFO: dacScan step from 20 .. 39
[09:17:01.786] <TB2> INFO: Test took 24224ms.
[09:17:01.824] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:01.824] <TB2> INFO: dacScan step from 40 .. 59
[09:17:25.722] <TB2> INFO: Test took 23898ms.
[09:17:25.763] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:25.763] <TB2> INFO: dacScan step from 60 .. 79
[09:17:50.554] <TB2> INFO: Test took 24791ms.
[09:17:50.595] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:50.595] <TB2> INFO: dacScan step from 80 .. 99
[09:18:19.029] <TB2> INFO: Test took 28434ms.
[09:18:19.177] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:19.191] <TB2> INFO: dacScan step from 100 .. 119
[09:18:56.732] <TB2> INFO: Test took 37541ms.
[09:18:57.043] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:57.092] <TB2> INFO: dacScan step from 120 .. 139


[09:19:34.679] <TB2> INFO: Test took 37587ms.
[09:19:34.954] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:35.006] <TB2> INFO: dacScan step from 140 .. 153
[09:20:02.362] <TB2> INFO: Test took 27356ms.
[09:20:02.552] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:24.932] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 141 (20) hits flags = 16 (plus default)
[09:20:24.941] <TB2> INFO: dacScan step from 0 .. 19
[09:20:50.344] <TB2> INFO: Test took 25403ms.
[09:20:50.380] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:50.380] <TB2> INFO: dacScan step from 20 .. 39
[09:21:15.756] <TB2> INFO: Test took 25376ms.
[09:21:15.792] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:15.792] <TB2> INFO: dacScan step from 40 .. 59
[09:21:39.866] <TB2> INFO: Test took 24073ms.
[09:21:39.899] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:39.899] <TB2> INFO: dacScan step from 60 .. 79
[09:22:03.597] <TB2> INFO: Test took 23698ms.
[09:22:03.639] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:03.639] <TB2> INFO: dacScan step from 80 .. 99
[09:22:30.875] <TB2> INFO: Test took 27236ms.
[09:22:31.011] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:31.032] <TB2> INFO: dacScan step from 100 .. 119


[09:23:08.910] <TB2> INFO: Test took 37878ms.
[09:23:09.183] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:23:09.229] <TB2> INFO: dacScan step from 120 .. 139




[09:23:46.546] <TB2> INFO: Test took 37317ms.
[09:23:46.898] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:23:46.952] <TB2> INFO: dacScan step from 140 .. 141
[09:23:53.270] <TB2> INFO: Test took 6318ms.
[09:23:53.302] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:14.128] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 141 (20) hits flags = 16 (plus default)
[09:24:14.136] <TB2> INFO: dacScan step from 0 .. 19
[09:24:39.132] <TB2> INFO: Test took 24996ms.
[09:24:39.165] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:39.165] <TB2> INFO: dacScan step from 20 .. 39
[09:25:04.613] <TB2> INFO: Test took 25448ms.
[09:25:04.651] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:04.651] <TB2> INFO: dacScan step from 40 .. 59
[09:25:28.593] <TB2> INFO: Test took 23942ms.
[09:25:28.626] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:28.626] <TB2> INFO: dacScan step from 60 .. 79
[09:25:52.549] <TB2> INFO: Test took 23923ms.
[09:25:52.586] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:52.586] <TB2> INFO: dacScan step from 80 .. 99
[09:26:21.220] <TB2> INFO: Test took 28634ms.
[09:26:21.366] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:26:21.379] <TB2> INFO: dacScan step from 100 .. 119





[09:26:58.769] <TB2> INFO: Test took 37387ms.
[09:26:59.041] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:26:59.086] <TB2> INFO: dacScan step from 120 .. 139





[09:27:36.307] <TB2> INFO: Test took 37221ms.
[09:27:36.589] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:27:36.643] <TB2> INFO: dacScan step from 140 .. 141
[09:27:42.813] <TB2> INFO: Test took 6170ms.
[09:27:42.854] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:04.389] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 142 (20) hits flags = 16 (plus default)
[09:28:04.397] <TB2> INFO: dacScan step from 0 .. 19
[09:28:29.291] <TB2> INFO: Test took 24894ms.
[09:28:29.324] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:29.324] <TB2> INFO: dacScan step from 20 .. 39
[09:28:53.410] <TB2> INFO: Test took 24085ms.
[09:28:53.449] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:53.449] <TB2> INFO: dacScan step from 40 .. 59
[09:29:17.600] <TB2> INFO: Test took 24151ms.
[09:29:17.639] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:17.639] <TB2> INFO: dacScan step from 60 .. 79
[09:29:43.085] <TB2> INFO: Test took 25446ms.
[09:29:43.123] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:43.124] <TB2> INFO: dacScan step from 80 .. 99
[09:30:12.625] <TB2> INFO: Test took 29501ms.
[09:30:12.780] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:12.794] <TB2> INFO: dacScan step from 100 .. 119





[09:30:50.344] <TB2> INFO: Test took 37550ms.
[09:30:50.648] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:50.688] <TB2> INFO: dacScan step from 120 .. 139



[09:31:28.486] <TB2> INFO: Test took 37798ms.
[09:31:28.758] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:28.813] <TB2> INFO: dacScan step from 140 .. 142
[09:31:36.968] <TB2> INFO: Test took 8155ms.
[09:31:37.011] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:59.756] <TB2> INFO: PixTestTrim::trimBitTest() done
[09:31:59.758] <TB2> INFO: PixTestTrim::doTest() done, duration: 2672 seconds
[09:32:00.487] <TB2> INFO: ######################################################################
[09:32:00.487] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[09:32:00.487] <TB2> INFO: ######################################################################
[09:32:04.116] <TB2> INFO: Test took 3628ms.
[09:32:04.142] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:08.129] <TB2> INFO: Test took 3791ms.
[09:32:08.198] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:11.819] <TB2> INFO: Test took 3611ms.
[09:32:11.888] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:11.895] <TB2> INFO: The DUT currently contains the following objects:
[09:32:11.895] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:32:11.895] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:32:11.895] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:32:11.895] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:32:11.895] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:11.895] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:11.895] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:11.895] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:11.895] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:11.895] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:11.895] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:11.895] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:11.895] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:11.895] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:11.895] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:11.895] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:11.895] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:11.895] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:11.895] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:11.895] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:13.007] <TB2> INFO: Test took 1112ms.
[09:32:13.008] <TB2> INFO: The DUT currently contains the following objects:
[09:32:13.008] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:32:13.008] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:32:13.008] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:32:13.008] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:32:13.008] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:13.008] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:13.008] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:13.009] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:13.009] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:13.009] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:13.009] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:13.009] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:13.009] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:13.009] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:13.009] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:13.009] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:13.009] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:13.009] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:13.009] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:13.009] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:14.117] <TB2> INFO: Test took 1108ms.
[09:32:14.118] <TB2> INFO: The DUT currently contains the following objects:
[09:32:14.118] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:32:14.118] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:32:14.118] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:32:14.118] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:32:14.118] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:14.118] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:14.118] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:14.118] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:14.118] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:14.118] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:14.118] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:14.119] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:14.119] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:14.119] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:14.119] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:14.119] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:14.119] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:14.119] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:14.119] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:14.119] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:15.226] <TB2> INFO: Test took 1107ms.
[09:32:15.228] <TB2> INFO: The DUT currently contains the following objects:
[09:32:15.228] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:32:15.228] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:32:15.228] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:32:15.228] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:32:15.228] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:15.228] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:15.228] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:15.228] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:15.228] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:15.228] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:15.228] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:15.228] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:15.228] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:15.228] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:15.228] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:15.228] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:15.228] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:15.228] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:15.228] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:15.229] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:16.334] <TB2> INFO: Test took 1105ms.
[09:32:16.339] <TB2> INFO: The DUT currently contains the following objects:
[09:32:16.339] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:32:16.339] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:32:16.339] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:32:16.339] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:32:16.339] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:16.339] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:16.339] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:16.339] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:16.339] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:16.339] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:16.339] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:16.339] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:16.339] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:16.339] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:16.339] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:16.339] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:16.339] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:16.339] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:16.339] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:16.339] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:17.475] <TB2> INFO: Test took 1136ms.
[09:32:17.476] <TB2> INFO: The DUT currently contains the following objects:
[09:32:17.476] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:32:17.476] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:32:17.476] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:32:17.476] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:32:17.476] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:17.477] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:17.477] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:17.477] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:17.477] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:17.477] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:17.477] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:17.477] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:17.477] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:17.477] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:17.477] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:17.477] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:17.477] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:17.477] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:17.477] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:17.477] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:18.594] <TB2> INFO: Test took 1117ms.
[09:32:18.595] <TB2> INFO: The DUT currently contains the following objects:
[09:32:18.595] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:32:18.595] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:32:18.595] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:32:18.595] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:32:18.595] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:18.595] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:18.595] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:18.595] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:18.595] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:18.595] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:18.595] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:18.595] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:18.595] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:18.595] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:18.595] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:18.595] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:18.595] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:18.595] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:18.595] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:18.595] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:19.704] <TB2> INFO: Test took 1109ms.
[09:32:19.706] <TB2> INFO: The DUT currently contains the following objects:
[09:32:19.706] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:32:19.706] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:32:19.706] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:32:19.706] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:32:19.706] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:19.706] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:19.706] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:19.706] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:19.706] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:19.706] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:19.706] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:19.706] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:19.706] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:19.707] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:19.707] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:19.707] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:19.707] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:19.707] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:19.707] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:19.707] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:20.816] <TB2> INFO: Test took 1109ms.
[09:32:20.817] <TB2> INFO: The DUT currently contains the following objects:
[09:32:20.818] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:32:20.818] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:32:20.818] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:32:20.818] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:32:20.818] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:20.818] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:20.818] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:20.818] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:20.818] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:20.818] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:20.818] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:20.818] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:20.818] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:20.818] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:20.818] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:20.818] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:20.818] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:20.818] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:20.818] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:20.818] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:21.939] <TB2> INFO: Test took 1121ms.
[09:32:21.940] <TB2> INFO: The DUT currently contains the following objects:
[09:32:21.940] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:32:21.940] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:32:21.940] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:32:21.940] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:32:21.940] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:21.940] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:21.940] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:21.940] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:21.940] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:21.940] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:21.940] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:21.940] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:21.940] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:21.940] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:21.940] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:21.940] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:21.940] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:21.941] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:21.941] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:21.941] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:23.078] <TB2> INFO: Test took 1137ms.
[09:32:23.079] <TB2> INFO: The DUT currently contains the following objects:
[09:32:23.079] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:32:23.079] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:32:23.079] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:32:23.079] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:32:23.079] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:23.079] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:23.079] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:23.079] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:23.080] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:23.080] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:23.080] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:23.080] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:23.080] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:23.080] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:23.080] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:23.080] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:23.080] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:23.080] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:23.080] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:23.080] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:24.202] <TB2> INFO: Test took 1122ms.
[09:32:24.203] <TB2> INFO: The DUT currently contains the following objects:
[09:32:24.203] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:32:24.203] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:32:24.203] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:32:24.204] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:32:24.204] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:24.204] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:24.204] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:24.204] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:24.204] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:24.204] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:24.204] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:24.204] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:24.204] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:24.204] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:24.204] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:24.204] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:24.204] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:24.204] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:24.204] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:24.204] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:25.341] <TB2> INFO: Test took 1137ms.
[09:32:25.343] <TB2> INFO: The DUT currently contains the following objects:
[09:32:25.343] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:32:25.343] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:32:25.343] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:32:25.343] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:32:25.343] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:25.343] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:25.343] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:25.343] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:25.343] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:25.343] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:25.343] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:25.343] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:25.343] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:25.343] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:25.343] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:25.343] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:25.344] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:25.344] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:25.344] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:25.344] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:26.451] <TB2> INFO: Test took 1107ms.
[09:32:26.452] <TB2> INFO: The DUT currently contains the following objects:
[09:32:26.452] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:32:26.452] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:32:26.452] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:32:26.452] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:32:26.452] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:26.452] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:26.452] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:26.452] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:26.452] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:26.452] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:26.453] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:26.453] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:26.453] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:26.453] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:26.453] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:26.453] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:26.453] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:26.453] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:26.453] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:26.453] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:27.576] <TB2> INFO: Test took 1123ms.
[09:32:27.577] <TB2> INFO: The DUT currently contains the following objects:
[09:32:27.578] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:32:27.578] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:32:27.578] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:32:27.578] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:32:27.578] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:27.578] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:27.578] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:27.578] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:27.578] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:27.578] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:27.578] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:27.578] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:27.578] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:27.578] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:27.578] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:27.578] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:27.578] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:27.578] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:27.578] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:27.578] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:28.699] <TB2> INFO: Test took 1121ms.
[09:32:28.700] <TB2> INFO: The DUT currently contains the following objects:
[09:32:28.700] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:32:28.700] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:32:28.700] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:32:28.700] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:32:28.700] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:28.700] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:28.700] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:28.700] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:28.700] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:28.700] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:28.700] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:28.700] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:28.700] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:28.700] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:28.700] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:28.700] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:28.700] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:28.700] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:28.701] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:28.701] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:32:29.822] <TB2> INFO: Test took 1121ms.
[09:32:29.825] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:36:53.419] <TB2> INFO: Test took 263594ms.
[09:36:55.080] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:19.479] <TB2> INFO: Test took 264399ms.
[09:41:21.192] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:41:21.199] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:41:21.205] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:41:21.212] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:41:21.222] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[09:41:21.233] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[09:41:21.244] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[09:41:21.254] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[09:41:21.265] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[09:41:21.275] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[09:41:21.286] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[09:41:21.296] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[09:41:21.306] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:41:21.317] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:41:21.328] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:41:21.336] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:41:21.343] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:41:21.350] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:41:21.357] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:41:21.364] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:41:21.372] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:41:21.378] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:41:21.386] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:41:21.393] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:41:21.429] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:41:21.430] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:41:21.430] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:41:21.430] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:41:21.430] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:41:21.430] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:41:21.430] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:41:21.430] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:41:21.431] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:41:21.431] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:41:21.431] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:41:21.431] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:41:21.431] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:41:21.431] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:41:21.431] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:41:21.431] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:41:25.147] <TB2> INFO: Test took 3714ms.
[09:41:29.177] <TB2> INFO: Test took 3711ms.
[09:41:33.220] <TB2> INFO: Test took 3767ms.
[09:41:33.492] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:34.410] <TB2> INFO: Test took 918ms.
[09:41:34.413] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:35.519] <TB2> INFO: Test took 1106ms.
[09:41:35.522] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:36.643] <TB2> INFO: Test took 1121ms.
[09:41:36.646] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:37.780] <TB2> INFO: Test took 1135ms.
[09:41:37.783] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:38.918] <TB2> INFO: Test took 1135ms.
[09:41:38.921] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:40.041] <TB2> INFO: Test took 1120ms.
[09:41:40.044] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:41.164] <TB2> INFO: Test took 1120ms.
[09:41:41.167] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:42.301] <TB2> INFO: Test took 1134ms.
[09:41:42.304] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:43.424] <TB2> INFO: Test took 1120ms.
[09:41:43.427] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:44.548] <TB2> INFO: Test took 1121ms.
[09:41:44.551] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:45.659] <TB2> INFO: Test took 1108ms.
[09:41:45.662] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:46.782] <TB2> INFO: Test took 1120ms.
[09:41:46.786] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:47.909] <TB2> INFO: Test took 1123ms.
[09:41:47.912] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:49.037] <TB2> INFO: Test took 1125ms.
[09:41:49.041] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:50.176] <TB2> INFO: Test took 1135ms.
[09:41:50.179] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:51.287] <TB2> INFO: Test took 1108ms.
[09:41:51.290] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:52.412] <TB2> INFO: Test took 1122ms.
[09:41:52.415] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:53.541] <TB2> INFO: Test took 1126ms.
[09:41:53.544] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:54.741] <TB2> INFO: Test took 1197ms.
[09:41:54.745] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:55.854] <TB2> INFO: Test took 1109ms.
[09:41:55.857] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:56.968] <TB2> INFO: Test took 1111ms.
[09:41:56.973] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:58.080] <TB2> INFO: Test took 1108ms.
[09:41:58.083] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:41:59.195] <TB2> INFO: Test took 1112ms.
[09:41:59.199] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:42:00.307] <TB2> INFO: Test took 1108ms.
[09:42:00.310] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:42:01.431] <TB2> INFO: Test took 1121ms.
[09:42:01.434] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:42:02.572] <TB2> INFO: Test took 1138ms.
[09:42:02.575] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:42:03.701] <TB2> INFO: Test took 1126ms.
[09:42:03.705] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:42:04.829] <TB2> INFO: Test took 1125ms.
[09:42:04.833] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:42:05.968] <TB2> INFO: Test took 1135ms.
[09:42:05.970] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:42:07.080] <TB2> INFO: Test took 1110ms.
[09:42:07.083] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:42:08.189] <TB2> INFO: Test took 1106ms.
[09:42:08.192] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:42:09.342] <TB2> INFO: Test took 1150ms.
[09:42:09.872] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 609 seconds
[09:42:09.872] <TB2> INFO: PH scale (per ROC): 96 94 87 80 86 80 87 82 76 78 87 92 77 80 81 81
[09:42:09.872] <TB2> INFO: PH offset (per ROC): 132 154 162 176 150 150 145 153 155 162 154 142 162 156 160 147
[09:42:10.112] <TB2> INFO: ######################################################################
[09:42:10.112] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[09:42:10.112] <TB2> INFO: ######################################################################
[09:42:10.125] <TB2> INFO: scanning low vcal = 10
[09:42:14.118] <TB2> INFO: Test took 3993ms.
[09:42:14.121] <TB2> INFO: scanning low vcal = 20
[09:42:18.116] <TB2> INFO: Test took 3995ms.
[09:42:18.123] <TB2> INFO: scanning low vcal = 30
[09:42:22.150] <TB2> INFO: Test took 4027ms.
[09:42:22.162] <TB2> INFO: scanning low vcal = 40
[09:42:26.789] <TB2> INFO: Test took 4627ms.
[09:42:26.844] <TB2> INFO: scanning low vcal = 50
[09:42:31.501] <TB2> INFO: Test took 4657ms.
[09:42:31.579] <TB2> INFO: scanning low vcal = 60
[09:42:36.047] <TB2> INFO: Test took 4468ms.
[09:42:36.105] <TB2> INFO: scanning low vcal = 70
[09:42:40.529] <TB2> INFO: Test took 4424ms.
[09:42:40.611] <TB2> INFO: scanning low vcal = 80
[09:42:45.163] <TB2> INFO: Test took 4552ms.
[09:42:45.261] <TB2> INFO: scanning low vcal = 90
[09:42:49.686] <TB2> INFO: Test took 4425ms.
[09:42:49.740] <TB2> INFO: scanning low vcal = 100
[09:42:54.270] <TB2> INFO: Test took 4530ms.
[09:42:54.324] <TB2> INFO: scanning low vcal = 110
[09:42:58.857] <TB2> INFO: Test took 4533ms.
[09:42:58.911] <TB2> INFO: scanning low vcal = 120
[09:43:03.589] <TB2> INFO: Test took 4678ms.
[09:43:03.649] <TB2> INFO: scanning low vcal = 130
[09:43:08.336] <TB2> INFO: Test took 4687ms.
[09:43:08.400] <TB2> INFO: scanning low vcal = 140
[09:43:13.003] <TB2> INFO: Test took 4603ms.
[09:43:13.061] <TB2> INFO: scanning low vcal = 150
[09:43:17.769] <TB2> INFO: Test took 4708ms.
[09:43:17.830] <TB2> INFO: scanning low vcal = 160
[09:43:22.393] <TB2> INFO: Test took 4563ms.
[09:43:22.484] <TB2> INFO: scanning low vcal = 170
[09:43:27.102] <TB2> INFO: Test took 4618ms.
[09:43:27.162] <TB2> INFO: scanning low vcal = 180
[09:43:31.769] <TB2> INFO: Test took 4607ms.
[09:43:31.830] <TB2> INFO: scanning low vcal = 190
[09:43:36.610] <TB2> INFO: Test took 4780ms.
[09:43:36.688] <TB2> INFO: scanning low vcal = 200
[09:43:41.300] <TB2> INFO: Test took 4612ms.
[09:43:41.359] <TB2> INFO: scanning low vcal = 210
[09:43:45.959] <TB2> INFO: Test took 4600ms.
[09:43:46.020] <TB2> INFO: scanning low vcal = 220
[09:43:50.564] <TB2> INFO: Test took 4544ms.
[09:43:50.622] <TB2> INFO: scanning low vcal = 230
[09:43:55.281] <TB2> INFO: Test took 4659ms.
[09:43:55.337] <TB2> INFO: scanning low vcal = 240
[09:43:59.979] <TB2> INFO: Test took 4642ms.
[09:44:00.049] <TB2> INFO: scanning low vcal = 250
[09:44:04.711] <TB2> INFO: Test took 4662ms.
[09:44:04.815] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[09:44:09.524] <TB2> INFO: Test took 4709ms.
[09:44:09.594] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[09:44:14.200] <TB2> INFO: Test took 4606ms.
[09:44:14.260] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[09:44:18.920] <TB2> INFO: Test took 4660ms.
[09:44:18.982] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[09:44:23.590] <TB2> INFO: Test took 4608ms.
[09:44:23.651] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[09:44:28.142] <TB2> INFO: Test took 4491ms.
[09:44:28.628] <TB2> INFO: PixTestGainPedestal::measure() done
[09:45:00.045] <TB2> INFO: PixTestGainPedestal::fit() done
[09:45:00.045] <TB2> INFO: non-linearity mean: 0.958 0.957 0.959 0.969 0.955 0.951 0.948 0.955 0.953 0.958 0.951 0.956 0.953 0.959 0.951 0.954
[09:45:00.045] <TB2> INFO: non-linearity RMS: 0.005 0.006 0.004 0.005 0.007 0.006 0.006 0.006 0.007 0.007 0.006 0.006 0.006 0.006 0.007 0.006
[09:45:00.045] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[09:45:00.064] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[09:45:00.082] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[09:45:00.100] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[09:45:00.118] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[09:45:00.136] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[09:45:00.154] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[09:45:00.172] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[09:45:00.190] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[09:45:00.208] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[09:45:00.226] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[09:45:00.244] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[09:45:00.262] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[09:45:00.280] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[09:45:00.298] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[09:45:00.316] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2042_FullQualification_2015-07-23_10h06m_1437638763//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[09:45:00.334] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 170 seconds
[09:45:00.340] <TB2> INFO: enter test to run
[09:45:00.340] <TB2> INFO: test: exit no parameter change
[09:45:00.783] <TB2> QUIET: Connection to board 0 closed.
[09:45:00.863] <TB2> INFO: pXar: this is the end, my friend