[13:16:59.647] <TB0> INFO: *** Welcome to pxar ***
[13:16:59.647] <TB0> INFO: *** Today: 2015/08/19
[13:16:59.647] <TB0> INFO: readRocDacs: /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C15.dat
[13:16:59.648] <TB0> INFO: readTbmDacs: /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//tbmParameters_C0b.dat
[13:16:59.648] <TB0> INFO: readMaskFile: /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//defaultMaskFile.dat
[13:16:59.648] <TB0> INFO: readTrimFile: /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters_C15.dat
[13:16:59.754] <TB0> INFO: clk: 4
[13:16:59.754] <TB0> INFO: ctr: 4
[13:16:59.754] <TB0> INFO: sda: 19
[13:16:59.754] <TB0> INFO: tin: 9
[13:16:59.754] <TB0> INFO: level: 15
[13:16:59.754] <TB0> INFO: triggerdelay: 0
[13:16:59.754] <TB0> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[13:16:59.754] <TB0> INFO: Log level: INFO
[13:16:59.762] <TB0> INFO: Found DTB DTB_WWVASW
[13:16:59.773] <TB0> QUIET: Connection to board DTB_WWVASW opened.
[13:16:59.776] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[13:16:59.779] <TB0> INFO: RPC call hashes of host and DTB match: 447413373
[13:17:01.291] <TB0> INFO: DUT info:
[13:17:01.291] <TB0> INFO: The DUT currently contains the following objects:
[13:17:01.291] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:17:01.291] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:17:01.291] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:17:01.291] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[13:17:01.291] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:01.291] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:01.291] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:01.291] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:01.291] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:01.291] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:01.291] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:01.291] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:01.291] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:01.291] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:01.291] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:01.291] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:01.291] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:01.291] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:01.291] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:01.291] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[13:17:01.692] <TB0> INFO: enter 'restricted' command line mode
[13:17:01.692] <TB0> INFO: enter test to run
[13:17:01.692] <TB0> INFO: test: pretest no parameter change
[13:17:01.692] <TB0> INFO: running: pretest
[13:17:01.696] <TB0> INFO: ######################################################################
[13:17:01.696] <TB0> INFO: PixTestPretest::doTest()
[13:17:01.696] <TB0> INFO: ######################################################################
[13:17:01.698] <TB0> INFO: ----------------------------------------------------------------------
[13:17:01.698] <TB0> INFO: PixTestPretest::programROC()
[13:17:01.698] <TB0> INFO: ----------------------------------------------------------------------
[13:17:19.714] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[13:17:19.714] <TB0> INFO: IA differences per ROC: 18.5 19.3 20.1 17.7 16.1 18.5 18.5 19.3 20.1 20.9 18.5 19.3 18.5 20.1 20.1 19.3
[13:17:19.804] <TB0> INFO: ----------------------------------------------------------------------
[13:17:19.804] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[13:17:19.804] <TB0> INFO: ----------------------------------------------------------------------
[13:17:24.181] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 378.6 mA = 23.6625 mA/ROC
[13:17:24.185] <TB0> INFO: ----------------------------------------------------------------------
[13:17:24.185] <TB0> INFO: PixTestPretest::findWorkingPixel()
[13:17:24.185] <TB0> INFO: ----------------------------------------------------------------------
[13:17:32.565] <TB0> INFO: Test took 8374ms.
[13:17:32.874] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[13:17:32.913] <TB0> INFO: ----------------------------------------------------------------------
[13:17:32.914] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[13:17:32.914] <TB0> INFO: ----------------------------------------------------------------------
[13:17:41.248] <TB0> INFO: Test took 8328ms.
[13:17:41.564] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[13:17:41.564] <TB0> INFO: CalDel: 134 133 114 132 128 124 126 127 125 143 129 146 125 144 137 143
[13:17:41.564] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[13:17:41.568] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C0.dat
[13:17:41.568] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C1.dat
[13:17:41.568] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C2.dat
[13:17:41.569] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C3.dat
[13:17:41.569] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C4.dat
[13:17:41.569] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C5.dat
[13:17:41.569] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C6.dat
[13:17:41.570] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C7.dat
[13:17:41.570] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C8.dat
[13:17:41.570] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C9.dat
[13:17:41.570] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C10.dat
[13:17:41.571] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C11.dat
[13:17:41.571] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C12.dat
[13:17:41.571] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C13.dat
[13:17:41.572] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C14.dat
[13:17:41.572] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters_C15.dat
[13:17:41.572] <TB0> INFO: PixTestPretest::doTest() done, duration: 39 seconds
[13:17:41.680] <TB0> INFO: enter test to run
[13:17:41.680] <TB0> INFO: test: fulltest no parameter change
[13:17:41.680] <TB0> INFO: running: fulltest
[13:17:41.680] <TB0> INFO: ######################################################################
[13:17:41.680] <TB0> INFO: PixTestFullTest::doTest()
[13:17:41.680] <TB0> INFO: ######################################################################
[13:17:41.681] <TB0> INFO: ######################################################################
[13:17:41.681] <TB0> INFO: PixTestAlive::doTest()
[13:17:41.681] <TB0> INFO: ######################################################################
[13:17:41.684] <TB0> INFO: ----------------------------------------------------------------------
[13:17:41.684] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:17:41.684] <TB0> INFO: ----------------------------------------------------------------------
[13:17:45.149] <TB0> INFO: Test took 3463ms.
[13:17:45.179] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:45.407] <TB0> INFO: PixTestAlive::aliveTest() done
[13:17:45.407] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:17:45.409] <TB0> INFO: ----------------------------------------------------------------------
[13:17:45.409] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:17:45.409] <TB0> INFO: ----------------------------------------------------------------------
[13:17:48.183] <TB0> INFO: Test took 2773ms.
[13:17:48.186] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:48.187] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[13:17:48.412] <TB0> INFO: PixTestAlive::maskTest() done
[13:17:48.412] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:17:48.415] <TB0> INFO: ----------------------------------------------------------------------
[13:17:48.415] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:17:48.415] <TB0> INFO: ----------------------------------------------------------------------
[13:17:52.052] <TB0> INFO: Test took 3633ms.
[13:17:52.077] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:52.307] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[13:17:52.307] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:17:52.307] <TB0> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[13:17:52.318] <TB0> INFO: ######################################################################
[13:17:52.318] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[13:17:52.318] <TB0> INFO: ######################################################################
[13:17:52.321] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[13:17:52.333] <TB0> INFO: dacScan step from 0 .. 29
[13:18:13.319] <TB0> INFO: Test took 20986ms.
[13:18:13.356] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:13.356] <TB0> INFO: dacScan step from 30 .. 59
[13:18:37.090] <TB0> INFO: Test took 23734ms.
[13:18:37.221] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:37.244] <TB0> INFO: dacScan step from 60 .. 89
[13:19:05.927] <TB0> INFO: Test took 28683ms.
[13:19:06.196] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:06.284] <TB0> INFO: dacScan step from 90 .. 119
[13:19:33.806] <TB0> INFO: Test took 27522ms.
[13:19:34.065] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:34.149] <TB0> INFO: dacScan step from 120 .. 149
[13:20:00.581] <TB0> INFO: Test took 26432ms.
[13:20:00.758] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:26.660] <TB0> INFO: PixTestBBMap::doTest() done, duration: 154 seconds
[13:20:26.660] <TB0> INFO: number of dead bumps (per ROC): 0 1 0 0 0 0 0 7 0 0 0 0 2 0 0 0
[13:20:26.660] <TB0> INFO: separation cut (per ROC): 82 74 87 86 88 89 73 84 90 71 85 72 71 93 72 75
[13:20:26.769] <TB0> INFO: ######################################################################
[13:20:26.769] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50
[13:20:26.769] <TB0> INFO: ######################################################################
[13:20:26.769] <TB0> INFO: ----------------------------------------------------------------------
[13:20:26.769] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[13:20:26.769] <TB0> INFO: ----------------------------------------------------------------------
[13:20:26.770] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[13:20:26.781] <TB0> INFO: dacScan step from 0 .. 3
[13:20:45.127] <TB0> INFO: Test took 18346ms.
[13:20:45.152] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:45.152] <TB0> INFO: dacScan step from 4 .. 7
[13:21:06.136] <TB0> INFO: Test took 20984ms.
[13:21:06.167] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:06.167] <TB0> INFO: dacScan step from 8 .. 11
[13:21:27.291] <TB0> INFO: Test took 21123ms.
[13:21:27.319] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:27.319] <TB0> INFO: dacScan step from 12 .. 15
[13:21:48.241] <TB0> INFO: Test took 20922ms.
[13:21:48.273] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:48.273] <TB0> INFO: dacScan step from 16 .. 19
[13:22:09.483] <TB0> INFO: Test took 21210ms.
[13:22:09.512] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:09.512] <TB0> INFO: dacScan step from 20 .. 23
[13:22:30.648] <TB0> INFO: Test took 21136ms.
[13:22:30.678] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:30.678] <TB0> INFO: dacScan step from 24 .. 27
[13:22:51.436] <TB0> INFO: Test took 20757ms.
[13:22:51.465] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:51.465] <TB0> INFO: dacScan step from 28 .. 31
[13:23:12.369] <TB0> INFO: Test took 20904ms.
[13:23:12.397] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:12.397] <TB0> INFO: dacScan step from 32 .. 35
[13:23:33.746] <TB0> INFO: Test took 21349ms.
[13:23:33.771] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:33.771] <TB0> INFO: dacScan step from 36 .. 39
[13:23:55.082] <TB0> INFO: Test took 21311ms.
[13:23:55.111] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:55.111] <TB0> INFO: dacScan step from 40 .. 43
[13:24:16.453] <TB0> INFO: Test took 21342ms.
[13:24:16.486] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:16.486] <TB0> INFO: dacScan step from 44 .. 47
[13:24:37.888] <TB0> INFO: Test took 21402ms.
[13:24:37.917] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:37.917] <TB0> INFO: dacScan step from 48 .. 51
[13:24:58.930] <TB0> INFO: Test took 21013ms.
[13:24:58.957] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:58.957] <TB0> INFO: dacScan step from 52 .. 55
[13:25:20.015] <TB0> INFO: Test took 21058ms.
[13:25:20.040] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:20.040] <TB0> INFO: dacScan step from 56 .. 59
[13:25:40.799] <TB0> INFO: Test took 20759ms.
[13:25:40.830] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:40.830] <TB0> INFO: dacScan step from 60 .. 63
[13:26:01.961] <TB0> INFO: Test took 21131ms.
[13:26:01.988] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:01.988] <TB0> INFO: dacScan step from 64 .. 67
[13:26:23.262] <TB0> INFO: Test took 21274ms.
[13:26:23.289] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:23.289] <TB0> INFO: dacScan step from 68 .. 71
[13:26:44.444] <TB0> INFO: Test took 21155ms.
[13:26:44.477] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:44.478] <TB0> INFO: dacScan step from 72 .. 75
[13:27:06.109] <TB0> INFO: Test took 21631ms.
[13:27:06.148] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:06.149] <TB0> INFO: dacScan step from 76 .. 79
[13:27:28.138] <TB0> INFO: Test took 21989ms.
[13:27:28.195] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:28.200] <TB0> INFO: dacScan step from 80 .. 83
[13:27:51.760] <TB0> INFO: Test took 23560ms.
[13:27:51.876] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:51.883] <TB0> INFO: dacScan step from 84 .. 87
[13:28:17.954] <TB0> INFO: Test took 26070ms.
[13:28:18.099] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:18.106] <TB0> INFO: dacScan step from 88 .. 91
[13:28:45.353] <TB0> INFO: Test took 27247ms.
[13:28:45.525] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:45.533] <TB0> INFO: dacScan step from 92 .. 95
[13:29:14.256] <TB0> INFO: Test took 28723ms.
[13:29:14.480] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:14.490] <TB0> INFO: dacScan step from 96 .. 99


[13:29:44.941] <TB0> INFO: Test took 30451ms.
[13:29:45.157] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:45.170] <TB0> INFO: dacScan step from 100 .. 103


[13:30:16.403] <TB0> INFO: Test took 31233ms.
[13:30:16.626] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:16.638] <TB0> INFO: dacScan step from 104 .. 107



[13:30:48.010] <TB0> INFO: Test took 31372ms.
[13:30:48.238] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:48.249] <TB0> INFO: dacScan step from 108 .. 111





[13:31:20.415] <TB0> INFO: Test took 32166ms.
[13:31:20.661] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:20.672] <TB0> INFO: dacScan step from 112 .. 115


[13:31:51.532] <TB0> INFO: Test took 30860ms.
[13:31:51.777] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:51.789] <TB0> INFO: dacScan step from 116 .. 119
[13:32:23.518] <TB0> INFO: Test took 31729ms.
[13:32:23.760] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:23.773] <TB0> INFO: dacScan step from 120 .. 123





[13:32:55.057] <TB0> INFO: Test took 31284ms.
[13:32:55.298] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:55.312] <TB0> INFO: dacScan step from 124 .. 127
[13:33:27.557] <TB0> INFO: Test took 32245ms.
[13:33:27.791] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:27.805] <TB0> INFO: dacScan step from 128 .. 131
[13:33:59.954] <TB0> INFO: Test took 32149ms.
[13:34:00.192] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:00.207] <TB0> INFO: dacScan step from 132 .. 135
[13:34:32.505] <TB0> INFO: Test took 32298ms.
[13:34:32.740] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:32.754] <TB0> INFO: dacScan step from 136 .. 139
[13:35:05.096] <TB0> INFO: Test took 32342ms.
[13:35:05.335] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:05.347] <TB0> INFO: dacScan step from 140 .. 143
[13:35:36.228] <TB0> INFO: Test took 30881ms.
[13:35:36.443] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:36.455] <TB0> INFO: dacScan step from 144 .. 147
[13:36:07.773] <TB0> INFO: Test took 31318ms.
[13:36:07.987] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:07.999] <TB0> INFO: dacScan step from 148 .. 149
[13:36:25.755] <TB0> INFO: Test took 17756ms.
[13:36:25.867] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:25.874] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:36:27.607] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:36:29.228] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:36:30.854] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:36:32.448] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:36:33.988] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:36:35.515] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:36:37.124] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:36:38.860] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:36:40.419] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:36:42.144] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:36:43.868] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:36:45.572] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:36:47.165] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:36:48.732] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:36:50.254] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:36:51.974] <TB0> INFO: PixTestScurves::scurves() done
[13:36:51.974] <TB0> INFO: Vcal mean: 86.40 89.44 96.98 92.01 96.57 100.59 89.23 84.80 101.96 80.92 93.21 86.15 83.16 96.40 82.25 85.30
[13:36:51.974] <TB0> INFO: Vcal RMS: 5.99 5.18 5.09 5.11 6.35 6.08 5.67 5.32 5.47 3.92 5.65 4.77 5.27 5.87 4.74 5.44
[13:36:51.974] <TB0> INFO: PixTestScurves::fullTest() done, duration: 985 seconds
[13:36:52.070] <TB0> INFO: ######################################################################
[13:36:52.070] <TB0> INFO: PixTestTrim::doTest()
[13:36:52.070] <TB0> INFO: ######################################################################
[13:36:52.071] <TB0> INFO: ----------------------------------------------------------------------
[13:36:52.072] <TB0> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:36:52.072] <TB0> INFO: ----------------------------------------------------------------------
[13:36:52.171] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:36:52.171] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:36:52.180] <TB0> INFO: dacScan step from 0 .. 19
[13:37:07.018] <TB0> INFO: Test took 14837ms.
[13:37:07.042] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:07.042] <TB0> INFO: dacScan step from 20 .. 39
[13:37:22.793] <TB0> INFO: Test took 15750ms.
[13:37:22.822] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:22.823] <TB0> INFO: dacScan step from 40 .. 59
[13:37:38.529] <TB0> INFO: Test took 15706ms.
[13:37:38.554] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:38.554] <TB0> INFO: dacScan step from 60 .. 79
[13:37:54.147] <TB0> INFO: Test took 15592ms.
[13:37:54.171] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:54.171] <TB0> INFO: dacScan step from 80 .. 99
[13:38:09.635] <TB0> INFO: Test took 15463ms.
[13:38:09.708] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:09.718] <TB0> INFO: dacScan step from 100 .. 119
[13:38:28.925] <TB0> INFO: Test took 19207ms.
[13:38:29.087] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:29.117] <TB0> INFO: dacScan step from 120 .. 139
[13:38:48.036] <TB0> INFO: Test took 18919ms.
[13:38:48.190] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:48.218] <TB0> INFO: dacScan step from 140 .. 159
[13:39:04.486] <TB0> INFO: Test took 16268ms.
[13:39:04.549] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:26.744] <TB0> INFO: ROC 0 VthrComp = 89
[13:39:26.744] <TB0> INFO: ROC 1 VthrComp = 91
[13:39:26.744] <TB0> INFO: ROC 2 VthrComp = 101
[13:39:26.744] <TB0> INFO: ROC 3 VthrComp = 94
[13:39:26.744] <TB0> INFO: ROC 4 VthrComp = 94
[13:39:26.744] <TB0> INFO: ROC 5 VthrComp = 97
[13:39:26.744] <TB0> INFO: ROC 6 VthrComp = 90
[13:39:26.744] <TB0> INFO: ROC 7 VthrComp = 86
[13:39:26.744] <TB0> INFO: ROC 8 VthrComp = 102
[13:39:26.745] <TB0> INFO: ROC 9 VthrComp = 88
[13:39:26.745] <TB0> INFO: ROC 10 VthrComp = 95
[13:39:26.745] <TB0> INFO: ROC 11 VthrComp = 88
[13:39:26.745] <TB0> INFO: ROC 12 VthrComp = 84
[13:39:26.745] <TB0> INFO: ROC 13 VthrComp = 97
[13:39:26.745] <TB0> INFO: ROC 14 VthrComp = 84
[13:39:26.745] <TB0> INFO: ROC 15 VthrComp = 88
[13:39:26.745] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:39:26.745] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:39:26.755] <TB0> INFO: dacScan step from 0 .. 19
[13:39:41.797] <TB0> INFO: Test took 15042ms.
[13:39:41.821] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:41.859] <TB0> INFO: dacScan step from 20 .. 39
[13:39:57.380] <TB0> INFO: Test took 15521ms.
[13:39:57.412] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:57.415] <TB0> INFO: dacScan step from 40 .. 59
[13:40:16.347] <TB0> INFO: Test took 18932ms.
[13:40:16.530] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:16.567] <TB0> INFO: dacScan step from 60 .. 79
[13:40:37.041] <TB0> INFO: Test took 20474ms.
[13:40:37.197] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:37.240] <TB0> INFO: dacScan step from 80 .. 99
[13:40:56.373] <TB0> INFO: Test took 19132ms.
[13:40:56.532] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:56.578] <TB0> INFO: dacScan step from 100 .. 119
[13:41:16.023] <TB0> INFO: Test took 19445ms.
[13:41:16.199] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:16.248] <TB0> INFO: dacScan step from 120 .. 139
[13:41:37.234] <TB0> INFO: Test took 20986ms.
[13:41:37.411] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:37.455] <TB0> INFO: dacScan step from 140 .. 159
[13:41:58.153] <TB0> INFO: Test took 20698ms.
[13:41:58.317] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:23.660] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 59.5832 for pixel 1/4 mean/min/max = 46.2683/32.8623/59.6742
[13:42:23.661] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 57.8614 for pixel 5/74 mean/min/max = 45.7891/33.7085/57.8697
[13:42:23.661] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 57.5833 for pixel 24/19 mean/min/max = 44.6048/31.3756/57.834
[13:42:23.661] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 58.4752 for pixel 23/4 mean/min/max = 45.6288/32.7512/58.5065
[13:42:23.662] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 62.9368 for pixel 1/0 mean/min/max = 47.3476/31.7208/62.9744
[13:42:23.662] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 61.583 for pixel 8/8 mean/min/max = 46.7866/31.7535/61.8197
[13:42:23.662] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 60.9145 for pixel 11/2 mean/min/max = 47.1192/33.2583/60.9801
[13:42:23.662] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 59.0096 for pixel 0/56 mean/min/max = 45.8126/32.5044/59.1209
[13:42:23.663] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 60.3098 for pixel 1/1 mean/min/max = 46.7428/33.1649/60.3207
[13:42:23.663] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 55.9257 for pixel 0/3 mean/min/max = 44.995/34.0044/55.9856
[13:42:23.663] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 58.8095 for pixel 38/1 mean/min/max = 45.8133/32.7004/58.9262
[13:42:23.663] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 57.4351 for pixel 1/1 mean/min/max = 46.0322/34.5619/57.5024
[13:42:23.664] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 58.8106 for pixel 4/12 mean/min/max = 45.752/32.661/58.843
[13:42:23.664] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 59.5815 for pixel 0/27 mean/min/max = 45.3962/31.0798/59.7127
[13:42:23.664] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 58.2896 for pixel 23/51 mean/min/max = 45.2214/32.1035/58.3393
[13:42:23.664] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 59.0011 for pixel 14/76 mean/min/max = 46.1881/33.1961/59.1801
[13:42:23.665] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:44:09.185] <TB0> INFO: Test took 105520ms.
[13:44:10.540] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:44:10.549] <TB0> INFO: dacScan step from 0 .. 19
[13:44:33.530] <TB0> INFO: Test took 22981ms.
[13:44:33.582] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:33.585] <TB0> INFO: dacScan step from 20 .. 39
[13:45:03.374] <TB0> INFO: Test took 29789ms.
[13:45:03.620] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:03.652] <TB0> INFO: dacScan step from 40 .. 59


[13:45:38.710] <TB0> INFO: Test took 35058ms.
[13:45:38.995] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:39.048] <TB0> INFO: dacScan step from 60 .. 79



[13:46:14.095] <TB0> INFO: Test took 35047ms.
[13:46:14.400] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:14.454] <TB0> INFO: dacScan step from 80 .. 99


[13:46:50.108] <TB0> INFO: Test took 35654ms.
[13:46:50.380] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:50.432] <TB0> INFO: dacScan step from 100 .. 119


[13:47:25.829] <TB0> INFO: Test took 35397ms.
[13:47:26.113] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:26.163] <TB0> INFO: dacScan step from 120 .. 139
[13:48:01.524] <TB0> INFO: Test took 35361ms.
[13:48:01.800] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:01.852] <TB0> INFO: dacScan step from 140 .. 159

[13:48:34.239] <TB0> INFO: Test took 32387ms.
[13:48:34.549] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:34.613] <TB0> INFO: dacScan step from 160 .. 179



[13:49:07.151] <TB0> INFO: Test took 32538ms.
[13:49:07.450] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:07.506] <TB0> INFO: dacScan step from 180 .. 199


[13:49:40.130] <TB0> INFO: Test took 32623ms.
[13:49:40.404] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:06.795] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.034994 .. 255.000000
[13:50:06.875] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[13:50:06.884] <TB0> INFO: dacScan step from 0 .. 19
[13:50:20.276] <TB0> INFO: Test took 13392ms.
[13:50:20.302] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:20.302] <TB0> INFO: dacScan step from 20 .. 39
[13:50:35.243] <TB0> INFO: Test took 14941ms.
[13:50:35.326] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:35.343] <TB0> INFO: dacScan step from 40 .. 59
[13:50:53.338] <TB0> INFO: Test took 17995ms.
[13:50:53.491] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:53.538] <TB0> INFO: dacScan step from 60 .. 79
[13:51:11.475] <TB0> INFO: Test took 17937ms.
[13:51:11.639] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:11.692] <TB0> INFO: dacScan step from 80 .. 99
[13:51:29.678] <TB0> INFO: Test took 17986ms.
[13:51:29.820] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:29.863] <TB0> INFO: dacScan step from 100 .. 119
[13:51:47.662] <TB0> INFO: Test took 17799ms.
[13:51:47.802] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:47.853] <TB0> INFO: dacScan step from 120 .. 139
[13:52:06.027] <TB0> INFO: Test took 18174ms.
[13:52:06.171] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:06.218] <TB0> INFO: dacScan step from 140 .. 159
[13:52:23.056] <TB0> INFO: Test took 16838ms.
[13:52:23.198] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:23.252] <TB0> INFO: dacScan step from 160 .. 179
[13:52:40.230] <TB0> INFO: Test took 16978ms.
[13:52:40.462] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:40.538] <TB0> INFO: dacScan step from 180 .. 199
[13:52:59.184] <TB0> INFO: Test took 18646ms.
[13:52:59.332] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:59.382] <TB0> INFO: dacScan step from 200 .. 219
[13:53:16.926] <TB0> INFO: Test took 17544ms.
[13:53:17.068] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:53:17.130] <TB0> INFO: dacScan step from 220 .. 239
[13:53:33.692] <TB0> INFO: Test took 16562ms.
[13:53:33.836] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:53:33.896] <TB0> INFO: dacScan step from 240 .. 255
[13:53:49.078] <TB0> INFO: Test took 15182ms.
[13:53:49.197] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:22.741] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 14.947874 .. 46.635241
[13:54:22.816] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 4 .. 56 (20) hits flags = 16 (plus default)
[13:54:22.824] <TB0> INFO: dacScan step from 4 .. 23
[13:54:36.472] <TB0> INFO: Test took 13648ms.
[13:54:36.499] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:36.499] <TB0> INFO: dacScan step from 24 .. 43
[13:54:52.163] <TB0> INFO: Test took 15664ms.
[13:54:52.280] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:52.306] <TB0> INFO: dacScan step from 44 .. 56
[13:55:04.097] <TB0> INFO: Test took 11790ms.
[13:55:04.188] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:19.845] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 3.500000 .. 40.666062
[13:55:19.934] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 3 .. 50 (20) hits flags = 16 (plus default)
[13:55:19.943] <TB0> INFO: dacScan step from 3 .. 22
[13:55:33.102] <TB0> INFO: Test took 13159ms.
[13:55:33.124] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:33.124] <TB0> INFO: dacScan step from 23 .. 42
[13:55:49.045] <TB0> INFO: Test took 15921ms.
[13:55:49.159] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:49.189] <TB0> INFO: dacScan step from 43 .. 50
[13:55:57.879] <TB0> INFO: Test took 8690ms.
[13:55:57.943] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:14.143] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 3.500000 .. 45.528733
[13:56:14.219] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 3 .. 55 (20) hits flags = 16 (plus default)
[13:56:14.227] <TB0> INFO: dacScan step from 3 .. 22
[13:56:27.226] <TB0> INFO: Test took 12999ms.
[13:56:27.242] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:27.244] <TB0> INFO: dacScan step from 23 .. 42
[13:56:41.962] <TB0> INFO: Test took 14718ms.
[13:56:42.075] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:42.102] <TB0> INFO: dacScan step from 43 .. 55
[13:56:55.650] <TB0> INFO: Test took 13548ms.
[13:56:55.743] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:12.345] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:57:12.345] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[13:57:12.354] <TB0> INFO: dacScan step from 15 .. 34
[13:57:35.406] <TB0> INFO: Test took 23052ms.
[13:57:35.480] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:35.489] <TB0> INFO: dacScan step from 35 .. 54


[13:58:09.017] <TB0> INFO: Test took 33528ms.
[13:58:09.310] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:09.352] <TB0> INFO: dacScan step from 55 .. 55
[13:58:13.701] <TB0> INFO: Test took 4349ms.
[13:58:13.724] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:28.545] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C0.dat
[13:58:28.545] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C1.dat
[13:58:28.545] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C2.dat
[13:58:28.546] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C3.dat
[13:58:28.546] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C4.dat
[13:58:28.546] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C5.dat
[13:58:28.546] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C6.dat
[13:58:28.546] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C7.dat
[13:58:28.547] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C8.dat
[13:58:28.547] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C9.dat
[13:58:28.547] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C10.dat
[13:58:28.547] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C11.dat
[13:58:28.548] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C12.dat
[13:58:28.548] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C13.dat
[13:58:28.548] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C14.dat
[13:58:28.548] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C15.dat
[13:58:28.548] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C0.dat
[13:58:28.558] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C1.dat
[13:58:28.564] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C2.dat
[13:58:28.571] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C3.dat
[13:58:28.577] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C4.dat
[13:58:28.584] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C5.dat
[13:58:28.590] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C6.dat
[13:58:28.597] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C7.dat
[13:58:28.603] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C8.dat
[13:58:28.610] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C9.dat
[13:58:28.616] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C10.dat
[13:58:28.623] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C11.dat
[13:58:28.639] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C12.dat
[13:58:28.647] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C13.dat
[13:58:28.654] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C14.dat
[13:58:28.660] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//trimParameters35_C15.dat
[13:58:28.667] <TB0> INFO: PixTestTrim::trimTest() done
[13:58:28.667] <TB0> INFO: vtrim: 105 96 105 114 109 107 120 93 120 88 112 95 103 97 102 103
[13:58:28.667] <TB0> INFO: vthrcomp: 89 91 101 94 94 97 90 86 102 88 95 88 84 97 84 88
[13:58:28.667] <TB0> INFO: vcal mean: 35.08 35.09 35.06 35.07 35.09 35.10 35.06 35.10 35.10 35.07 35.07 35.07 35.12 35.07 35.07 34.97
[13:58:28.667] <TB0> INFO: vcal RMS: 1.07 1.05 1.08 1.22 1.28 1.22 1.14 1.06 1.10 0.98 1.10 1.04 1.10 1.11 1.08 1.02
[13:58:28.667] <TB0> INFO: bits mean: 9.58 9.78 10.38 10.13 9.67 10.01 9.54 9.35 9.74 9.41 10.22 9.73 9.96 9.82 9.97 9.53
[13:58:28.667] <TB0> INFO: bits RMS: 2.53 2.37 2.46 2.40 2.61 2.42 2.48 2.76 2.43 2.56 2.28 2.25 2.50 2.74 2.50 2.48
[13:58:28.674] <TB0> INFO: ----------------------------------------------------------------------
[13:58:28.674] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:58:28.674] <TB0> INFO: ----------------------------------------------------------------------
[13:58:28.677] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:58:28.687] <TB0> INFO: dacScan step from 0 .. 19
[13:58:51.686] <TB0> INFO: Test took 22999ms.
[13:58:51.721] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:51.721] <TB0> INFO: dacScan step from 20 .. 39
[13:59:14.395] <TB0> INFO: Test took 22674ms.
[13:59:14.427] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:14.428] <TB0> INFO: dacScan step from 40 .. 59
[13:59:37.436] <TB0> INFO: Test took 23008ms.
[13:59:37.475] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:37.475] <TB0> INFO: dacScan step from 60 .. 79
[14:00:00.310] <TB0> INFO: Test took 22834ms.
[14:00:00.351] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:00.351] <TB0> INFO: dacScan step from 80 .. 99
[14:00:23.274] <TB0> INFO: Test took 22923ms.
[14:00:23.317] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:23.318] <TB0> INFO: dacScan step from 100 .. 119
[14:00:49.308] <TB0> INFO: Test took 25990ms.
[14:00:49.460] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:49.479] <TB0> INFO: dacScan step from 120 .. 139
[14:01:20.879] <TB0> INFO: Test took 31400ms.
[14:01:21.155] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:21.188] <TB0> INFO: dacScan step from 140 .. 159


[14:01:56.688] <TB0> INFO: Test took 35499ms.
[14:01:57.014] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:57.073] <TB0> INFO: dacScan step from 160 .. 179
[14:02:33.003] <TB0> INFO: Test took 35930ms.
[14:02:33.301] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:33.347] <TB0> INFO: dacScan step from 180 .. 199
[14:03:11.822] <TB0> INFO: Test took 38475ms.
[14:03:12.114] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:40.241] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 171 (20) hits flags = 16 (plus default)
[14:03:40.251] <TB0> INFO: dacScan step from 0 .. 19
[14:04:01.631] <TB0> INFO: Test took 21380ms.
[14:04:01.664] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:01.664] <TB0> INFO: dacScan step from 20 .. 39
[14:04:25.146] <TB0> INFO: Test took 23482ms.
[14:04:25.179] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:25.179] <TB0> INFO: dacScan step from 40 .. 59
[14:04:48.365] <TB0> INFO: Test took 23186ms.
[14:04:48.401] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:48.401] <TB0> INFO: dacScan step from 60 .. 79
[14:05:10.383] <TB0> INFO: Test took 21982ms.
[14:05:10.420] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:10.420] <TB0> INFO: dacScan step from 80 .. 99
[14:05:34.695] <TB0> INFO: Test took 24275ms.
[14:05:34.776] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:34.787] <TB0> INFO: dacScan step from 100 .. 119
[14:06:06.597] <TB0> INFO: Test took 31810ms.
[14:06:06.856] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:06.899] <TB0> INFO: dacScan step from 120 .. 139


[14:06:41.570] <TB0> INFO: Test took 34671ms.
[14:06:41.907] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:41.946] <TB0> INFO: dacScan step from 140 .. 159


[14:07:18.381] <TB0> INFO: Test took 36435ms.
[14:07:18.654] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:18.697] <TB0> INFO: dacScan step from 160 .. 171
[14:07:41.891] <TB0> INFO: Test took 23194ms.
[14:07:42.065] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:05.355] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 157 (20) hits flags = 16 (plus default)
[14:08:05.363] <TB0> INFO: dacScan step from 0 .. 19
[14:08:26.967] <TB0> INFO: Test took 21603ms.
[14:08:27.011] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:27.011] <TB0> INFO: dacScan step from 20 .. 39
[14:08:50.119] <TB0> INFO: Test took 23108ms.
[14:08:50.154] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:50.154] <TB0> INFO: dacScan step from 40 .. 59
[14:09:13.637] <TB0> INFO: Test took 23482ms.
[14:09:13.674] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:13.674] <TB0> INFO: dacScan step from 60 .. 79
[14:09:37.074] <TB0> INFO: Test took 23400ms.
[14:09:37.108] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:37.108] <TB0> INFO: dacScan step from 80 .. 99
[14:10:01.446] <TB0> INFO: Test took 24337ms.
[14:10:01.537] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:01.547] <TB0> INFO: dacScan step from 100 .. 119
[14:10:30.415] <TB0> INFO: Test took 28868ms.
[14:10:30.684] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:30.719] <TB0> INFO: dacScan step from 120 .. 139


[14:11:06.623] <TB0> INFO: Test took 35904ms.
[14:11:06.931] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:06.971] <TB0> INFO: dacScan step from 140 .. 157
[14:11:41.049] <TB0> INFO: Test took 34078ms.
[14:11:41.304] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:05.846] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 156 (20) hits flags = 16 (plus default)
[14:12:05.855] <TB0> INFO: dacScan step from 0 .. 19
[14:12:27.260] <TB0> INFO: Test took 21405ms.
[14:12:27.298] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:27.298] <TB0> INFO: dacScan step from 20 .. 39
[14:12:51.065] <TB0> INFO: Test took 23767ms.
[14:12:51.099] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:51.099] <TB0> INFO: dacScan step from 40 .. 59
[14:13:14.957] <TB0> INFO: Test took 23858ms.
[14:13:14.996] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:14.996] <TB0> INFO: dacScan step from 60 .. 79
[14:13:38.525] <TB0> INFO: Test took 23529ms.
[14:13:38.563] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:38.563] <TB0> INFO: dacScan step from 80 .. 99
[14:14:03.188] <TB0> INFO: Test took 24625ms.
[14:14:03.262] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:03.269] <TB0> INFO: dacScan step from 100 .. 119
[14:14:32.690] <TB0> INFO: Test took 29421ms.
[14:14:32.979] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:33.016] <TB0> INFO: dacScan step from 120 .. 139



[14:15:09.431] <TB0> INFO: Test took 36415ms.
[14:15:09.712] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:09.752] <TB0> INFO: dacScan step from 140 .. 156
[14:15:41.313] <TB0> INFO: Test took 31561ms.
[14:15:41.662] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:04.657] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 157 (20) hits flags = 16 (plus default)
[14:16:04.666] <TB0> INFO: dacScan step from 0 .. 19
[14:16:26.008] <TB0> INFO: Test took 21341ms.
[14:16:26.043] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:26.043] <TB0> INFO: dacScan step from 20 .. 39
[14:16:49.026] <TB0> INFO: Test took 22983ms.
[14:16:49.062] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:49.062] <TB0> INFO: dacScan step from 40 .. 59
[14:17:12.324] <TB0> INFO: Test took 23262ms.
[14:17:12.364] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:12.364] <TB0> INFO: dacScan step from 60 .. 79
[14:17:35.358] <TB0> INFO: Test took 22994ms.
[14:17:35.396] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:35.396] <TB0> INFO: dacScan step from 80 .. 99
[14:17:59.544] <TB0> INFO: Test took 24148ms.
[14:17:59.623] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:59.631] <TB0> INFO: dacScan step from 100 .. 119
[14:18:29.060] <TB0> INFO: Test took 29429ms.
[14:18:29.300] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:29.355] <TB0> INFO: dacScan step from 120 .. 139

[14:19:02.470] <TB0> INFO: Test took 33115ms.
[14:19:02.947] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:03.045] <TB0> INFO: dacScan step from 140 .. 157
[14:19:35.118] <TB0> INFO: Test took 32064ms.
[14:19:35.378] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:57.439] <TB0> INFO: PixTestTrim::trimBitTest() done
[14:19:57.441] <TB0> INFO: PixTestTrim::doTest() done, duration: 2585 seconds
[14:19:58.138] <TB0> INFO: ######################################################################
[14:19:58.138] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:19:58.138] <TB0> INFO: ######################################################################
[14:20:01.783] <TB0> INFO: Test took 3644ms.
[14:20:01.802] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:05.685] <TB0> INFO: Test took 3685ms.
[14:20:05.755] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:09.083] <TB0> INFO: Test took 3318ms.
[14:20:09.146] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:09.153] <TB0> INFO: The DUT currently contains the following objects:
[14:20:09.153] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:09.153] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:20:09.153] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:20:09.153] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:09.153] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:09.153] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:09.153] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:09.153] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:09.153] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:09.153] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:09.153] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:09.153] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:09.153] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:09.153] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:09.153] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:09.153] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:09.153] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:09.153] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:09.153] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:09.153] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:10.254] <TB0> INFO: Test took 1101ms.
[14:20:10.255] <TB0> INFO: The DUT currently contains the following objects:
[14:20:10.255] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:10.255] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:20:10.255] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:20:10.255] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:10.255] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:10.255] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:10.255] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:10.255] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:10.255] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:10.255] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:10.255] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:10.255] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:10.255] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:10.255] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:10.255] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:10.255] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:10.256] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:10.256] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:10.256] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:10.256] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:11.356] <TB0> INFO: Test took 1101ms.
[14:20:11.357] <TB0> INFO: The DUT currently contains the following objects:
[14:20:11.357] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:11.357] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:20:11.357] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:20:11.357] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:11.357] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:11.357] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:11.357] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:11.357] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:11.357] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:11.357] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:11.358] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:11.358] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:11.358] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:11.358] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:11.358] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:11.358] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:11.358] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:11.358] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:11.358] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:11.358] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:12.460] <TB0> INFO: Test took 1102ms.
[14:20:12.462] <TB0> INFO: The DUT currently contains the following objects:
[14:20:12.463] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:12.463] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:20:12.463] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:20:12.463] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:12.463] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:12.463] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:12.463] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:12.463] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:12.463] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:12.465] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:12.465] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:12.465] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:12.465] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:12.465] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:12.465] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:12.465] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:12.465] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:12.465] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:12.465] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:12.465] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:13.563] <TB0> INFO: Test took 1098ms.
[14:20:13.565] <TB0> INFO: The DUT currently contains the following objects:
[14:20:13.565] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:13.565] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:20:13.565] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:20:13.565] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:13.565] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:13.565] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:13.565] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:13.565] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:13.565] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:13.565] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:13.565] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:13.565] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:13.565] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:13.565] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:13.565] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:13.565] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:13.565] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:13.565] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:13.565] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:13.566] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:14.665] <TB0> INFO: Test took 1099ms.
[14:20:14.665] <TB0> INFO: The DUT currently contains the following objects:
[14:20:14.665] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:14.665] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:20:14.665] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:20:14.665] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:14.665] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:14.665] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:14.665] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:14.665] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:14.665] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:14.665] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:14.665] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:14.665] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:14.665] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:14.665] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:14.665] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:14.666] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:14.666] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:14.666] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:14.666] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:14.666] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:15.767] <TB0> INFO: Test took 1101ms.
[14:20:15.767] <TB0> INFO: The DUT currently contains the following objects:
[14:20:15.767] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:15.767] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:20:15.767] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:20:15.767] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:15.767] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:15.767] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:15.767] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:15.767] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:15.767] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:15.767] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:15.767] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:15.767] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:15.767] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:15.767] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:15.767] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:15.767] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:15.767] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:15.767] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:15.768] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:15.768] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:16.867] <TB0> INFO: Test took 1099ms.
[14:20:16.868] <TB0> INFO: The DUT currently contains the following objects:
[14:20:16.868] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:16.868] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:20:16.868] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:20:16.868] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:16.868] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:16.868] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:16.868] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:16.868] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:16.868] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:16.868] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:16.868] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:16.868] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:16.868] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:16.868] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:16.868] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:16.868] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:16.868] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:16.868] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:16.868] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:16.868] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:17.969] <TB0> INFO: Test took 1101ms.
[14:20:17.969] <TB0> INFO: The DUT currently contains the following objects:
[14:20:17.969] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:17.969] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:20:17.969] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:20:17.969] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:17.969] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:17.969] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:17.969] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:17.969] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:17.969] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:17.969] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:17.969] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:17.969] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:17.969] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:17.969] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:17.969] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:17.969] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:17.969] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:17.969] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:17.969] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:17.969] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:19.084] <TB0> INFO: Test took 1115ms.
[14:20:19.084] <TB0> INFO: The DUT currently contains the following objects:
[14:20:19.084] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:19.084] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:20:19.084] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:20:19.084] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:19.084] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:19.084] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:19.085] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:19.085] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:19.085] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:19.085] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:19.085] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:19.085] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:19.085] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:19.085] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:19.085] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:19.085] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:19.085] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:19.085] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:19.085] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:19.085] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:20.187] <TB0> INFO: Test took 1102ms.
[14:20:20.187] <TB0> INFO: The DUT currently contains the following objects:
[14:20:20.187] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:20.187] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:20:20.187] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:20:20.187] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:20.188] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:20.188] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:20.188] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:20.188] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:20.188] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:20.188] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:20.188] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:20.188] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:20.188] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:20.188] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:20.188] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:20.188] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:20.188] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:20.188] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:20.188] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:20.188] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:21.288] <TB0> INFO: Test took 1100ms.
[14:20:21.289] <TB0> INFO: The DUT currently contains the following objects:
[14:20:21.289] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:21.289] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:20:21.289] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:20:21.289] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:21.289] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:21.289] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:21.289] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:21.289] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:21.289] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:21.289] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:21.289] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:21.289] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:21.289] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:21.289] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:21.289] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:21.289] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:21.289] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:21.289] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:21.289] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:21.289] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:22.390] <TB0> INFO: Test took 1101ms.
[14:20:22.390] <TB0> INFO: The DUT currently contains the following objects:
[14:20:22.391] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:22.391] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:20:22.391] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:20:22.391] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:22.391] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:22.391] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:22.391] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:22.391] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:22.391] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:22.391] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:22.391] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:22.391] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:22.391] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:22.391] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:22.391] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:22.391] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:22.391] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:22.391] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:22.391] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:22.391] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:23.506] <TB0> INFO: Test took 1115ms.
[14:20:23.506] <TB0> INFO: The DUT currently contains the following objects:
[14:20:23.506] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:23.506] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:20:23.506] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:20:23.506] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:23.506] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:23.506] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:23.506] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:23.506] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:23.506] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:23.506] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:23.506] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:23.506] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:23.506] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:23.507] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:23.507] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:23.507] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:23.507] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:23.507] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:23.507] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:23.507] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:24.607] <TB0> INFO: Test took 1100ms.
[14:20:24.607] <TB0> INFO: The DUT currently contains the following objects:
[14:20:24.607] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:24.607] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:20:24.607] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:20:24.607] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:24.607] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:24.607] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:24.607] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:24.607] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:24.607] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:24.607] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:24.608] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:24.608] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:24.608] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:24.608] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:24.608] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:24.608] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:24.608] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:24.608] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:24.608] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:24.608] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:25.708] <TB0> INFO: Test took 1100ms.
[14:20:25.709] <TB0> INFO: The DUT currently contains the following objects:
[14:20:25.709] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:20:25.709] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:20:25.709] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:20:25.709] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:20:25.709] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:25.709] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:25.709] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:25.709] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:25.709] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:25.709] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:25.709] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:25.709] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:25.709] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:25.709] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:25.709] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:25.709] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:25.709] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:25.709] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:25.709] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:25.709] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:20:26.809] <TB0> INFO: Test took 1100ms.
[14:20:26.812] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:24:29.658] <TB0> INFO: Test took 242846ms.
[14:24:31.157] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:28.196] <TB0> INFO: Test took 237039ms.
[14:28:30.221] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:28:30.231] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:28:30.240] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[14:28:30.249] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:28:30.259] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:28:30.268] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:28:30.278] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:28:30.287] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:28:30.297] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:28:30.306] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[14:28:30.313] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:28:30.321] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[14:28:30.329] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[14:28:30.339] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[14:28:30.348] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[14:28:30.357] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:28:30.366] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:28:30.376] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:28:30.383] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:28:30.390] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:28:30.397] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:28:30.404] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:28:30.411] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[14:28:30.418] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[14:28:30.425] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[14:28:30.433] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[14:28:30.472] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C0.dat
[14:28:30.472] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C1.dat
[14:28:30.472] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C2.dat
[14:28:30.472] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C3.dat
[14:28:30.472] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C4.dat
[14:28:30.472] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C5.dat
[14:28:30.472] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C6.dat
[14:28:30.472] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C7.dat
[14:28:30.472] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C8.dat
[14:28:30.473] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C9.dat
[14:28:30.473] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C10.dat
[14:28:30.473] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C11.dat
[14:28:30.473] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C12.dat
[14:28:30.473] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C13.dat
[14:28:30.473] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C14.dat
[14:28:30.473] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//dacParameters35_C15.dat
[14:28:34.186] <TB0> INFO: Test took 3710ms.
[14:28:37.936] <TB0> INFO: Test took 3467ms.
[14:28:41.911] <TB0> INFO: Test took 3701ms.
[14:28:42.210] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:43.129] <TB0> INFO: Test took 919ms.
[14:28:43.133] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:44.256] <TB0> INFO: Test took 1124ms.
[14:28:44.259] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:45.397] <TB0> INFO: Test took 1138ms.
[14:28:45.400] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:46.520] <TB0> INFO: Test took 1120ms.
[14:28:46.524] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:47.660] <TB0> INFO: Test took 1137ms.
[14:28:47.664] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:48.770] <TB0> INFO: Test took 1106ms.
[14:28:48.773] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:49.879] <TB0> INFO: Test took 1106ms.
[14:28:49.882] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:50.988] <TB0> INFO: Test took 1106ms.
[14:28:50.993] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:52.097] <TB0> INFO: Test took 1104ms.
[14:28:52.101] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:53.206] <TB0> INFO: Test took 1105ms.
[14:28:53.210] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:54.360] <TB0> INFO: Test took 1150ms.
[14:28:54.365] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:55.498] <TB0> INFO: Test took 1134ms.
[14:28:55.502] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:56.609] <TB0> INFO: Test took 1107ms.
[14:28:56.613] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:57.734] <TB0> INFO: Test took 1121ms.
[14:28:57.738] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:58.844] <TB0> INFO: Test took 1106ms.
[14:28:58.847] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:59.955] <TB0> INFO: Test took 1108ms.
[14:28:59.959] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:01.066] <TB0> INFO: Test took 1107ms.
[14:29:01.070] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:02.176] <TB0> INFO: Test took 1106ms.
[14:29:02.179] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:03.281] <TB0> INFO: Test took 1102ms.
[14:29:03.283] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:04.383] <TB0> INFO: Test took 1100ms.
[14:29:04.386] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:05.492] <TB0> INFO: Test took 1106ms.
[14:29:05.495] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:06.603] <TB0> INFO: Test took 1108ms.
[14:29:06.607] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:07.717] <TB0> INFO: Test took 1110ms.
[14:29:07.721] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:08.831] <TB0> INFO: Test took 1110ms.
[14:29:08.834] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:09.957] <TB0> INFO: Test took 1124ms.
[14:29:09.961] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:11.113] <TB0> INFO: Test took 1152ms.
[14:29:11.117] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:12.219] <TB0> INFO: Test took 1103ms.
[14:29:12.223] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:13.328] <TB0> INFO: Test took 1105ms.
[14:29:13.332] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:14.440] <TB0> INFO: Test took 1109ms.
[14:29:14.443] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:15.548] <TB0> INFO: Test took 1105ms.
[14:29:15.552] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:16.661] <TB0> INFO: Test took 1110ms.
[14:29:16.665] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:29:17.770] <TB0> INFO: Test took 1106ms.
[14:29:18.302] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 560 seconds
[14:29:18.302] <TB0> INFO: PH scale (per ROC): 75 80 75 66 67 76 78 79 83 75 79 72 78 69 77 74
[14:29:18.302] <TB0> INFO: PH offset (per ROC): 188 171 179 196 191 160 165 173 176 158 175 167 171 193 178 176
[14:29:18.517] <TB0> INFO: ######################################################################
[14:29:18.517] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:29:18.517] <TB0> INFO: ######################################################################
[14:29:18.529] <TB0> INFO: scanning low vcal = 10
[14:29:22.459] <TB0> INFO: Test took 3930ms.
[14:29:22.465] <TB0> INFO: scanning low vcal = 20
[14:29:26.330] <TB0> INFO: Test took 3865ms.
[14:29:26.336] <TB0> INFO: scanning low vcal = 30
[14:29:30.187] <TB0> INFO: Test took 3844ms.
[14:29:30.197] <TB0> INFO: scanning low vcal = 40
[14:29:34.364] <TB0> INFO: Test took 4167ms.
[14:29:34.423] <TB0> INFO: scanning low vcal = 50
[14:29:38.718] <TB0> INFO: Test took 4295ms.
[14:29:38.775] <TB0> INFO: scanning low vcal = 60
[14:29:43.024] <TB0> INFO: Test took 4248ms.
[14:29:43.082] <TB0> INFO: scanning low vcal = 70
[14:29:47.315] <TB0> INFO: Test took 4233ms.
[14:29:47.373] <TB0> INFO: scanning low vcal = 80
[14:29:51.580] <TB0> INFO: Test took 4207ms.
[14:29:51.642] <TB0> INFO: scanning low vcal = 90
[14:29:56.023] <TB0> INFO: Test took 4381ms.
[14:29:56.081] <TB0> INFO: scanning low vcal = 100
[14:30:00.381] <TB0> INFO: Test took 4300ms.
[14:30:00.450] <TB0> INFO: scanning low vcal = 110
[14:30:04.819] <TB0> INFO: Test took 4369ms.
[14:30:04.879] <TB0> INFO: scanning low vcal = 120
[14:30:09.226] <TB0> INFO: Test took 4347ms.
[14:30:09.288] <TB0> INFO: scanning low vcal = 130
[14:30:13.662] <TB0> INFO: Test took 4374ms.
[14:30:13.727] <TB0> INFO: scanning low vcal = 140
[14:30:18.045] <TB0> INFO: Test took 4318ms.
[14:30:18.108] <TB0> INFO: scanning low vcal = 150
[14:30:22.548] <TB0> INFO: Test took 4440ms.
[14:30:22.648] <TB0> INFO: scanning low vcal = 160
[14:30:27.093] <TB0> INFO: Test took 4445ms.
[14:30:27.156] <TB0> INFO: scanning low vcal = 170
[14:30:31.542] <TB0> INFO: Test took 4386ms.
[14:30:31.608] <TB0> INFO: scanning low vcal = 180
[14:30:35.999] <TB0> INFO: Test took 4391ms.
[14:30:36.087] <TB0> INFO: scanning low vcal = 190
[14:30:40.604] <TB0> INFO: Test took 4517ms.
[14:30:40.667] <TB0> INFO: scanning low vcal = 200
[14:30:45.083] <TB0> INFO: Test took 4416ms.
[14:30:45.147] <TB0> INFO: scanning low vcal = 210
[14:30:49.610] <TB0> INFO: Test took 4463ms.
[14:30:49.670] <TB0> INFO: scanning low vcal = 220
[14:30:54.259] <TB0> INFO: Test took 4589ms.
[14:30:54.328] <TB0> INFO: scanning low vcal = 230
[14:30:58.840] <TB0> INFO: Test took 4512ms.
[14:30:58.897] <TB0> INFO: scanning low vcal = 240
[14:31:03.364] <TB0> INFO: Test took 4467ms.
[14:31:03.424] <TB0> INFO: scanning low vcal = 250
[14:31:07.779] <TB0> INFO: Test took 4355ms.
[14:31:07.837] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[14:31:12.540] <TB0> INFO: Test took 4702ms.
[14:31:12.609] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[14:31:17.231] <TB0> INFO: Test took 4622ms.
[14:31:17.292] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[14:31:22.002] <TB0> INFO: Test took 4710ms.
[14:31:22.060] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[14:31:26.591] <TB0> INFO: Test took 4531ms.
[14:31:26.655] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:31:31.404] <TB0> INFO: Test took 4749ms.
[14:31:31.895] <TB0> INFO: PixTestGainPedestal::measure() done
[14:32:03.830] <TB0> INFO: PixTestGainPedestal::fit() done
[14:32:03.830] <TB0> INFO: non-linearity mean: 0.950 0.959 0.958 0.955 0.958 0.956 0.963 0.957 0.965 0.955 0.968 0.960 0.959 0.951 0.961 0.957
[14:32:03.830] <TB0> INFO: non-linearity RMS: 0.008 0.006 0.006 0.007 0.009 0.007 0.006 0.005 0.006 0.007 0.005 0.007 0.006 0.007 0.006 0.005
[14:32:03.830] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[14:32:03.848] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[14:32:03.866] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[14:32:03.885] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[14:32:03.904] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[14:32:03.923] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[14:32:03.942] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[14:32:03.959] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[14:32:03.977] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[14:32:03.994] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[14:32:04.012] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[14:32:04.030] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[14:32:04.047] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[14:32:04.065] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[14:32:04.083] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[14:32:04.101] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[14:32:04.119] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 165 seconds
[14:32:04.125] <TB0> INFO: enter test to run
[14:32:04.125] <TB0> INFO: test: exit no parameter change
[14:32:04.620] <TB0> QUIET: Connection to board 126 closed.
[14:32:04.700] <TB0> INFO: pXar: this is the end, my friend