[15:47:21.574] <TB2> INFO: *** Welcome to pxar ***
[15:47:21.575] <TB2> INFO: *** Today: 2015/07/10
[15:47:21.575] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C15.dat
[15:47:21.576] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//tbmParameters_C0b.dat
[15:47:21.576] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//defaultMaskFile.dat
[15:47:21.576] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters_C15.dat
[15:47:21.646] <TB2> INFO: clk: 4
[15:47:21.646] <TB2> INFO: ctr: 4
[15:47:21.646] <TB2> INFO: sda: 19
[15:47:21.646] <TB2> INFO: tin: 9
[15:47:21.646] <TB2> INFO: level: 15
[15:47:21.646] <TB2> INFO: triggerdelay: 0
[15:47:21.646] <TB2> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[15:47:21.646] <TB2> INFO: Log level: INFO
[15:47:21.654] <TB2> INFO: Found DTB DTB_WXC55Z
[15:47:21.665] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[15:47:21.669] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[15:47:21.671] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[15:47:23.262] <TB2> INFO: DUT info:
[15:47:23.262] <TB2> INFO: The DUT currently contains the following objects:
[15:47:23.262] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:47:23.262] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:47:23.262] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:47:23.262] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[15:47:23.262] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[15:47:23.262] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[15:47:23.262] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[15:47:23.262] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[15:47:23.262] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[15:47:23.262] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[15:47:23.262] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[15:47:23.262] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[15:47:23.262] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[15:47:23.262] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[15:47:23.262] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[15:47:23.263] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[15:47:23.263] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[15:47:23.263] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[15:47:23.263] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[15:47:23.263] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[15:47:23.664] <TB2> INFO: enter 'restricted' command line mode
[15:47:23.664] <TB2> INFO: enter test to run
[15:47:23.664] <TB2> INFO: test: pretest no parameter change
[15:47:23.664] <TB2> INFO: running: pretest
[15:47:23.673] <TB2> INFO: ######################################################################
[15:47:23.673] <TB2> INFO: PixTestPretest::doTest()
[15:47:23.673] <TB2> INFO: ######################################################################
[15:47:23.675] <TB2> INFO: ----------------------------------------------------------------------
[15:47:23.675] <TB2> INFO: PixTestPretest::programROC()
[15:47:23.675] <TB2> INFO: ----------------------------------------------------------------------
[15:47:41.693] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[15:47:41.693] <TB2> INFO: IA differences per ROC: 20.9 18.5 15.3 18.5 21.7 18.5 17.7 18.5 19.3 17.7 16.1 17.7 24.1 16.1 19.3 19.3
[15:47:41.782] <TB2> INFO: ----------------------------------------------------------------------
[15:47:41.782] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[15:47:41.782] <TB2> INFO: ----------------------------------------------------------------------
[15:48:01.330] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 388.3 mA = 24.2687 mA/ROC
[15:48:01.333] <TB2> INFO: ----------------------------------------------------------------------
[15:48:01.333] <TB2> INFO: PixTestPretest::findWorkingPixel()
[15:48:01.333] <TB2> INFO: ----------------------------------------------------------------------




























































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































[15:48:11.213] <TB2> INFO: Test took 9875ms.
[15:48:11.473] <TB2> INFO: fwp_c12_r22_C12 does not pass: vthrComp = 20 Delta(CalDel) = 0, trying another
[15:48:20.924] <TB2> INFO: Test took 9445ms.
[15:48:21.199] <TB2> INFO: fwp_c5_r5_C12 does not pass: vthrComp = -34 Delta(CalDel) = 59, trying another
[15:48:30.700] <TB2> INFO: Test took 9498ms.
[15:48:30.970] <TB2> INFO: fwp_c15_r26_C12 does not pass: vthrComp = -21 Delta(CalDel) = 61, trying another
[15:48:40.194] <TB2> INFO: Test took 9222ms.
[15:48:40.462] <TB2> INFO: fwp_c20_r32_C12 does not pass: vthrComp = -15 Delta(CalDel) = 62, trying another
[15:48:49.744] <TB2> INFO: Test took 9278ms.
[15:48:50.032] <TB2> INFO: fwp_c25_r36_C12 does not pass: vthrComp = -11 Delta(CalDel) = 62, trying another
[15:48:59.327] <TB2> INFO: Test took 9291ms.
[15:48:59.613] <TB2> INFO: fwp_c30_r42_C12 does not pass: vthrComp = -3 Delta(CalDel) = 61, trying another
[15:49:08.507] <TB2> INFO: Test took 8890ms.
[15:49:08.781] <TB2> INFO: fwp_c35_r50_C12 does not pass: vthrComp = -9 Delta(CalDel) = 60, trying another
[15:49:18.152] <TB2> INFO: Test took 9366ms.
[15:49:18.415] <TB2> INFO: fwp_c40_r60_C12 does not pass: vthrComp = -3 Delta(CalDel) = 60, trying another
[15:49:27.595] <TB2> INFO: Test took 9176ms.
[15:49:27.865] <TB2> INFO: fwp_c45_r70_C12 does not pass: vthrComp = -6 Delta(CalDel) = 61, trying another
[15:49:37.015] <TB2> INFO: Test took 9146ms.
[15:49:37.275] <TB2> INFO: fwp_c50_r75_C12 does not pass: vthrComp = 0 Delta(CalDel) = 0, trying another
[15:49:37.275] <TB2> INFO: Found working pixel in all ROCs: col/row = 50/75
[15:49:37.309] <TB2> INFO: ----------------------------------------------------------------------
[15:49:37.309] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[15:49:37.309] <TB2> INFO: ----------------------------------------------------------------------
[15:49:46.624] <TB2> INFO: Test took 9310ms.
[15:49:46.945] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[15:49:46.945] <TB2> INFO: CalDel: 130 146 120 127 143 134 138 128 126 125 130 145 183 136 142 145
[15:49:46.945] <TB2> INFO: VthrComp: 52 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[15:49:46.949] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C0.dat
[15:49:46.949] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C1.dat
[15:49:46.950] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C2.dat
[15:49:46.950] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C3.dat
[15:49:46.950] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C4.dat
[15:49:46.951] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C5.dat
[15:49:46.951] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C6.dat
[15:49:46.951] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C7.dat
[15:49:46.952] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C8.dat
[15:49:46.952] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C9.dat
[15:49:46.952] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C10.dat
[15:49:46.952] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C11.dat
[15:49:46.953] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C12.dat
[15:49:46.953] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C13.dat
[15:49:46.953] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C14.dat
[15:49:46.953] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters_C15.dat
[15:49:46.953] <TB2> INFO: PixTestPretest::doTest() done, duration: 143 seconds
[15:49:47.016] <TB2> INFO: enter test to run
[15:49:47.016] <TB2> INFO: test: fulltest no parameter change
[15:49:47.016] <TB2> INFO: running: fulltest
[15:49:47.016] <TB2> INFO: ######################################################################
[15:49:47.016] <TB2> INFO: PixTestFullTest::doTest()
[15:49:47.016] <TB2> INFO: ######################################################################
[15:49:47.018] <TB2> INFO: ######################################################################
[15:49:47.018] <TB2> INFO: PixTestAlive::doTest()
[15:49:47.018] <TB2> INFO: ######################################################################
[15:49:47.019] <TB2> INFO: ----------------------------------------------------------------------
[15:49:47.019] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:49:47.019] <TB2> INFO: ----------------------------------------------------------------------
[15:49:50.723] <TB2> INFO: Test took 3702ms.
[15:49:50.747] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:49:50.966] <TB2> INFO: PixTestAlive::aliveTest() done
[15:49:50.966] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 2 0 0 0 0 0 0 4049 0 0 0
[15:49:50.968] <TB2> INFO: ----------------------------------------------------------------------
[15:49:50.968] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:49:50.968] <TB2> INFO: ----------------------------------------------------------------------
[15:49:53.805] <TB2> INFO: Test took 2836ms.
[15:49:53.808] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:49:53.809] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[15:49:54.029] <TB2> INFO: PixTestAlive::maskTest() done
[15:49:54.029] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:49:54.032] <TB2> INFO: ----------------------------------------------------------------------
[15:49:54.032] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[15:49:54.032] <TB2> INFO: ----------------------------------------------------------------------
[15:49:57.837] <TB2> INFO: Test took 3803ms.
[15:49:57.857] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:49:58.086] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[15:49:58.086] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[15:49:58.086] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[15:49:58.101] <TB2> INFO: ######################################################################
[15:49:58.101] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[15:49:58.101] <TB2> INFO: ######################################################################
[15:49:58.104] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[15:49:58.119] <TB2> INFO: dacScan step from 0 .. 29
[15:50:20.704] <TB2> INFO: Test took 22584ms.
[15:50:20.747] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:50:20.747] <TB2> INFO: dacScan step from 30 .. 59
[15:50:44.473] <TB2> INFO: Test took 23726ms.
[15:50:44.573] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:50:44.584] <TB2> INFO: dacScan step from 60 .. 89
[15:51:17.478] <TB2> INFO: Test took 32894ms.
[15:51:17.799] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:51:17.870] <TB2> INFO: dacScan step from 90 .. 119
[15:51:51.218] <TB2> INFO: Test took 33348ms.
[15:51:51.443] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:51:51.510] <TB2> INFO: dacScan step from 120 .. 149
[15:52:22.535] <TB2> INFO: Test took 31025ms.
[15:52:22.741] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:52:47.644] <TB2> INFO: PixTestBBMap::doTest() done, duration: 169 seconds
[15:52:47.644] <TB2> INFO: number of dead bumps (per ROC): 1 2 6 3 1 3 2 0 0 0 0 4 911 0 0 19
[15:52:47.644] <TB2> INFO: separation cut (per ROC): 121 90 98 89 103 95 87 88 90 88 78 91 34 76 89 91
[15:52:47.762] <TB2> INFO: ######################################################################
[15:52:47.762] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[15:52:47.762] <TB2> INFO: ######################################################################
[15:52:47.762] <TB2> INFO: ----------------------------------------------------------------------
[15:52:47.762] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[15:52:47.762] <TB2> INFO: ----------------------------------------------------------------------
[15:52:47.762] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[15:52:47.770] <TB2> INFO: dacScan step from 0 .. 3
[15:53:09.201] <TB2> INFO: Test took 21431ms.
[15:53:09.226] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:53:09.226] <TB2> INFO: dacScan step from 4 .. 7
[15:53:30.721] <TB2> INFO: Test took 21495ms.
[15:53:30.746] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:53:30.746] <TB2> INFO: dacScan step from 8 .. 11
[15:53:52.267] <TB2> INFO: Test took 21521ms.
[15:53:52.294] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:53:52.294] <TB2> INFO: dacScan step from 12 .. 15
[15:54:13.600] <TB2> INFO: Test took 21306ms.
[15:54:13.632] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:54:13.632] <TB2> INFO: dacScan step from 16 .. 19
[15:54:34.888] <TB2> INFO: Test took 21256ms.
[15:54:34.914] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:54:34.914] <TB2> INFO: dacScan step from 20 .. 23
[15:54:56.149] <TB2> INFO: Test took 21234ms.
[15:54:56.175] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:54:56.175] <TB2> INFO: dacScan step from 24 .. 27
[15:55:18.078] <TB2> INFO: Test took 21903ms.
[15:55:18.105] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:55:18.105] <TB2> INFO: dacScan step from 28 .. 31
[15:55:39.668] <TB2> INFO: Test took 21563ms.
[15:55:39.695] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:55:39.695] <TB2> INFO: dacScan step from 32 .. 35
[15:56:01.265] <TB2> INFO: Test took 21570ms.
[15:56:01.300] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:56:01.300] <TB2> INFO: dacScan step from 36 .. 39
[15:56:22.858] <TB2> INFO: Test took 21558ms.
[15:56:22.888] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:56:22.888] <TB2> INFO: dacScan step from 40 .. 43
[15:56:44.620] <TB2> INFO: Test took 21732ms.
[15:56:44.646] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:56:44.646] <TB2> INFO: dacScan step from 44 .. 47
[15:57:06.353] <TB2> INFO: Test took 21707ms.
[15:57:06.383] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:57:06.383] <TB2> INFO: dacScan step from 48 .. 51
[15:57:27.887] <TB2> INFO: Test took 21503ms.
[15:57:27.915] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:57:27.916] <TB2> INFO: dacScan step from 52 .. 55
[15:57:49.642] <TB2> INFO: Test took 21726ms.
[15:57:49.672] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:57:49.672] <TB2> INFO: dacScan step from 56 .. 59
[15:58:11.573] <TB2> INFO: Test took 21901ms.
[15:58:11.603] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:58:11.603] <TB2> INFO: dacScan step from 60 .. 63
[15:58:33.382] <TB2> INFO: Test took 21778ms.
[15:58:33.412] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:58:33.412] <TB2> INFO: dacScan step from 64 .. 67
[15:58:55.679] <TB2> INFO: Test took 22267ms.
[15:58:55.705] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:58:55.705] <TB2> INFO: dacScan step from 68 .. 71
[15:59:16.973] <TB2> INFO: Test took 21267ms.
[15:59:17.002] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:59:17.002] <TB2> INFO: dacScan step from 72 .. 75
[15:59:38.165] <TB2> INFO: Test took 21162ms.
[15:59:38.202] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:59:38.202] <TB2> INFO: dacScan step from 76 .. 79
[16:00:00.174] <TB2> INFO: Test took 21971ms.
[16:00:00.206] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:00:00.207] <TB2> INFO: dacScan step from 80 .. 83
[16:00:23.388] <TB2> INFO: Test took 23181ms.
[16:00:23.464] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:00:23.467] <TB2> INFO: dacScan step from 84 .. 87
[16:00:48.567] <TB2> INFO: Test took 25100ms.
[16:00:48.661] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:00:48.665] <TB2> INFO: dacScan step from 88 .. 91
[16:01:15.597] <TB2> INFO: Test took 26932ms.
[16:01:15.736] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:01:15.743] <TB2> INFO: dacScan step from 92 .. 95
[16:01:46.173] <TB2> INFO: Test took 30430ms.
[16:01:46.410] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:01:46.422] <TB2> INFO: dacScan step from 96 .. 99
[16:02:18.500] <TB2> INFO: Test took 32077ms.
[16:02:18.759] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:02:18.774] <TB2> INFO: dacScan step from 100 .. 103



[16:02:53.160] <TB2> INFO: Test took 34386ms.
[16:02:53.382] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:02:53.390] <TB2> INFO: dacScan step from 104 .. 107



[16:03:28.288] <TB2> INFO: Test took 34897ms.
[16:03:28.493] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:03:28.502] <TB2> INFO: dacScan step from 108 .. 111
[16:04:04.216] <TB2> INFO: Test took 35714ms.
[16:04:04.447] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:04:04.457] <TB2> INFO: dacScan step from 112 .. 115






[16:04:39.711] <TB2> INFO: Test took 35254ms.
[16:04:40.038] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:04:40.053] <TB2> INFO: dacScan step from 116 .. 119



[16:05:14.234] <TB2> INFO: Test took 34180ms.
[16:05:14.443] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:05:14.454] <TB2> INFO: dacScan step from 120 .. 123



[16:05:46.254] <TB2> INFO: Test took 31800ms.
[16:05:46.499] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:05:46.509] <TB2> INFO: dacScan step from 124 .. 127
[16:06:20.071] <TB2> INFO: Test took 33562ms.
[16:06:20.324] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:06:20.334] <TB2> INFO: dacScan step from 128 .. 131
[16:06:54.153] <TB2> INFO: Test took 33819ms.
[16:06:54.416] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:06:54.427] <TB2> INFO: dacScan step from 132 .. 135
[16:07:28.783] <TB2> INFO: Test took 34356ms.
[16:07:29.005] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:07:29.019] <TB2> INFO: dacScan step from 136 .. 139
[16:08:01.647] <TB2> INFO: Test took 32629ms.
[16:08:01.849] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:08:01.859] <TB2> INFO: dacScan step from 140 .. 143
[16:08:35.724] <TB2> INFO: Test took 33865ms.
[16:08:35.926] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:08:35.938] <TB2> INFO: dacScan step from 144 .. 147
[16:09:09.353] <TB2> INFO: Test took 33415ms.
[16:09:09.563] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:09:09.573] <TB2> INFO: dacScan step from 148 .. 149
[16:09:26.802] <TB2> INFO: Test took 17229ms.
[16:09:26.906] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:09:26.912] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:09:28.290] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:09:29.763] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:09:31.390] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:09:32.732] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:09:34.096] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:09:35.467] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:09:36.855] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:09:38.229] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:09:39.644] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:09:41.021] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:09:42.405] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:09:43.766] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:09:43.862] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:09:45.232] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:09:46.593] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:09:47.973] <TB2> INFO: PixTestScurves::scurves() done
[16:09:47.973] <TB2> INFO: Vcal mean: 115.55 89.19 95.63 90.72 95.11 98.90 88.40 86.05 90.20 91.77 92.83 93.08 1.07 91.58 94.45 98.85
[16:09:47.973] <TB2> INFO: Vcal RMS: 6.17 5.40 5.59 5.53 5.44 6.17 5.47 4.62 4.78 5.25 5.05 7.21 10.33 5.34 7.06 5.38
[16:09:47.973] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1020 seconds
[16:09:48.086] <TB2> INFO: ######################################################################
[16:09:48.086] <TB2> INFO: PixTestTrim::doTest()
[16:09:48.086] <TB2> INFO: ######################################################################
[16:09:48.087] <TB2> INFO: ----------------------------------------------------------------------
[16:09:48.087] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[16:09:48.087] <TB2> INFO: ----------------------------------------------------------------------
[16:09:48.190] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[16:09:48.190] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[16:09:48.200] <TB2> INFO: dacScan step from 0 .. 19
[16:10:04.709] <TB2> INFO: Test took 16509ms.
[16:10:04.730] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:10:04.730] <TB2> INFO: dacScan step from 20 .. 39
[16:10:21.140] <TB2> INFO: Test took 16410ms.
[16:10:21.173] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:10:21.174] <TB2> INFO: dacScan step from 40 .. 59
[16:10:37.663] <TB2> INFO: Test took 16489ms.
[16:10:37.692] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:10:37.692] <TB2> INFO: dacScan step from 60 .. 79
[16:10:53.383] <TB2> INFO: Test took 15691ms.
[16:10:53.404] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:10:53.404] <TB2> INFO: dacScan step from 80 .. 99
[16:11:09.425] <TB2> INFO: Test took 16021ms.
[16:11:09.457] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:11:09.460] <TB2> INFO: dacScan step from 100 .. 119
[16:11:30.387] <TB2> INFO: Test took 20927ms.
[16:11:30.527] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:11:30.550] <TB2> INFO: dacScan step from 120 .. 139
[16:11:52.789] <TB2> INFO: Test took 22239ms.
[16:11:52.940] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:11:52.979] <TB2> INFO: dacScan step from 140 .. 159
[16:12:10.144] <TB2> INFO: Test took 17165ms.
[16:12:10.214] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:12:30.756] <TB2> INFO: ROC 0 VthrComp = 110
[16:12:30.756] <TB2> INFO: ROC 1 VthrComp = 92
[16:12:30.756] <TB2> INFO: ROC 2 VthrComp = 99
[16:12:30.756] <TB2> INFO: ROC 3 VthrComp = 95
[16:12:30.756] <TB2> INFO: ROC 4 VthrComp = 100
[16:12:30.756] <TB2> INFO: ROC 5 VthrComp = 101
[16:12:30.756] <TB2> INFO: ROC 6 VthrComp = 93
[16:12:30.756] <TB2> INFO: ROC 7 VthrComp = 93
[16:12:30.756] <TB2> INFO: ROC 8 VthrComp = 100
[16:12:30.757] <TB2> INFO: ROC 9 VthrComp = 97
[16:12:30.757] <TB2> INFO: ROC 10 VthrComp = 92
[16:12:30.757] <TB2> INFO: ROC 11 VthrComp = 91
[16:12:30.757] <TB2> INFO: ROC 12 VthrComp = 1
[16:12:30.757] <TB2> INFO: ROC 13 VthrComp = 94
[16:12:30.757] <TB2> INFO: ROC 14 VthrComp = 93
[16:12:30.757] <TB2> INFO: ROC 15 VthrComp = 102
[16:12:30.757] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[16:12:30.757] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[16:12:30.767] <TB2> INFO: dacScan step from 0 .. 19
[16:12:47.083] <TB2> INFO: Test took 16316ms.
[16:12:47.104] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:12:47.104] <TB2> INFO: dacScan step from 20 .. 39
[16:13:03.677] <TB2> INFO: Test took 16572ms.
[16:13:03.709] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:13:03.711] <TB2> INFO: dacScan step from 40 .. 59
[16:13:25.486] <TB2> INFO: Test took 21775ms.
[16:13:25.630] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:13:25.660] <TB2> INFO: dacScan step from 60 .. 79
[16:13:48.435] <TB2> INFO: Test took 22774ms.
[16:13:48.662] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:13:48.707] <TB2> INFO: dacScan step from 80 .. 99
[16:14:11.779] <TB2> INFO: Test took 23072ms.
[16:14:11.925] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:14:11.962] <TB2> INFO: dacScan step from 100 .. 119
[16:14:35.367] <TB2> INFO: Test took 23405ms.
[16:14:35.516] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:14:35.555] <TB2> INFO: dacScan step from 120 .. 139
[16:14:58.472] <TB2> INFO: Test took 22917ms.
[16:14:58.626] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:14:58.665] <TB2> INFO: dacScan step from 140 .. 159
[16:15:21.451] <TB2> INFO: Test took 22786ms.
[16:15:21.602] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:15:44.871] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 66.909 for pixel 0/10 mean/min/max = 50.9025/34.731/67.074
[16:15:44.872] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 58.8613 for pixel 12/12 mean/min/max = 46.2901/33.7123/58.8679
[16:15:44.872] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 58.2522 for pixel 36/79 mean/min/max = 44.9207/31.535/58.3065
[16:15:44.873] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 57.6815 for pixel 22/70 mean/min/max = 44.8261/31.9092/57.7431
[16:15:44.873] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 57.6627 for pixel 0/69 mean/min/max = 44.9831/32.3002/57.666
[16:15:44.873] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 60.9327 for pixel 7/53 mean/min/max = 46.6202/32.1206/61.1199
[16:15:44.874] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 57.4775 for pixel 15/76 mean/min/max = 45.029/32.5351/57.523
[16:15:44.874] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 56.3032 for pixel 0/65 mean/min/max = 44.7547/33.1647/56.3447
[16:15:44.875] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 55.0347 for pixel 2/1 mean/min/max = 43.6495/32.0579/55.2411
[16:15:44.875] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 56.4346 for pixel 1/68 mean/min/max = 44.1537/31.7612/56.5461
[16:15:44.876] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 58.7524 for pixel 0/29 mean/min/max = 45.9341/32.9935/58.8747
[16:15:44.876] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 64.1008 for pixel 3/17 mean/min/max = 47.5336/30.8906/64.1767
[16:15:44.877] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal -1 for pixel -1/-1 mean/min/max = 0/0/0


[16:15:44.877] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 58.015 for pixel 2/66 mean/min/max = 45.104/32.1548/58.0531
[16:15:44.878] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 63.8105 for pixel 1/54 mean/min/max = 47.7779/31.6307/63.9251
[16:15:44.878] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 57.9971 for pixel 23/76 mean/min/max = 45.3653/32.6531/58.0774
[16:15:44.878] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:17:28.272] <TB2> INFO: Test took 103394ms.
[16:17:29.939] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[16:17:29.947] <TB2> INFO: dacScan step from 0 .. 19
[16:17:55.517] <TB2> INFO: Test took 25570ms.
[16:17:55.561] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:17:55.562] <TB2> INFO: dacScan step from 20 .. 39
[16:18:26.883] <TB2> INFO: Test took 31321ms.
[16:18:27.098] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:18:27.125] <TB2> INFO: dacScan step from 40 .. 59
[16:19:03.603] <TB2> INFO: Test took 36478ms.
[16:19:03.973] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:19:04.014] <TB2> INFO: dacScan step from 60 .. 79



[16:19:41.250] <TB2> INFO: Test took 37236ms.
[16:19:41.645] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:19:41.684] <TB2> INFO: dacScan step from 80 .. 99



[16:20:19.813] <TB2> INFO: Test took 38129ms.
[16:20:20.195] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:20:20.243] <TB2> INFO: dacScan step from 100 .. 119



[16:20:56.057] <TB2> INFO: Test took 35814ms.
[16:20:56.307] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:20:56.350] <TB2> INFO: dacScan step from 120 .. 139
[16:21:33.322] <TB2> INFO: Test took 36972ms.
[16:21:33.571] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:21:33.610] <TB2> INFO: dacScan step from 140 .. 159


[16:22:11.362] <TB2> INFO: Test took 37752ms.
[16:22:11.610] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:22:11.658] <TB2> INFO: dacScan step from 160 .. 179
[16:22:47.121] <TB2> INFO: Test took 35463ms.
[16:22:47.366] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:22:47.412] <TB2> INFO: dacScan step from 180 .. 199
[16:23:26.373] <TB2> INFO: Test took 38961ms.
[16:23:26.620] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:23:50.405] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.059061 .. 255.000000
[16:23:50.484] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[16:23:50.492] <TB2> INFO: dacScan step from 0 .. 19
[16:24:05.380] <TB2> INFO: Test took 14888ms.
[16:24:05.409] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:24:05.409] <TB2> INFO: dacScan step from 20 .. 39
[16:24:22.187] <TB2> INFO: Test took 16777ms.
[16:24:22.282] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:24:22.302] <TB2> INFO: dacScan step from 40 .. 59
[16:24:41.707] <TB2> INFO: Test took 19405ms.
[16:24:41.906] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:24:41.958] <TB2> INFO: dacScan step from 60 .. 79
[16:25:00.732] <TB2> INFO: Test took 18774ms.
[16:25:00.870] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:25:00.917] <TB2> INFO: dacScan step from 80 .. 99
[16:25:19.443] <TB2> INFO: Test took 18526ms.
[16:25:19.573] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:25:19.614] <TB2> INFO: dacScan step from 100 .. 119
[16:25:37.802] <TB2> INFO: Test took 18187ms.
[16:25:38.008] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:25:38.059] <TB2> INFO: dacScan step from 120 .. 139
[16:25:58.135] <TB2> INFO: Test took 20076ms.
[16:25:58.263] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:25:58.302] <TB2> INFO: dacScan step from 140 .. 159
[16:26:18.331] <TB2> INFO: Test took 20029ms.
[16:26:18.464] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:26:18.509] <TB2> INFO: dacScan step from 160 .. 179
[16:26:38.210] <TB2> INFO: Test took 19700ms.
[16:26:38.341] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:26:38.386] <TB2> INFO: dacScan step from 180 .. 199
[16:26:58.107] <TB2> INFO: Test took 19721ms.
[16:26:58.233] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:26:58.279] <TB2> INFO: dacScan step from 200 .. 219
[16:27:18.203] <TB2> INFO: Test took 19924ms.
[16:27:18.330] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:27:18.367] <TB2> INFO: dacScan step from 220 .. 239
[16:27:38.140] <TB2> INFO: Test took 19773ms.
[16:27:38.338] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:27:38.385] <TB2> INFO: dacScan step from 240 .. 255
[16:27:54.270] <TB2> INFO: Test took 15885ms.
[16:27:54.400] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:28:24.342] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 15.973565 .. 47.546969
[16:28:24.421] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 5 .. 57 (20) hits flags = 16 (plus default)
[16:28:24.429] <TB2> INFO: dacScan step from 5 .. 24
[16:28:38.933] <TB2> INFO: Test took 14504ms.
[16:28:38.961] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:28:38.961] <TB2> INFO: dacScan step from 25 .. 44
[16:28:55.597] <TB2> INFO: Test took 16636ms.
[16:28:55.733] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:28:55.759] <TB2> INFO: dacScan step from 45 .. 57
[16:29:09.721] <TB2> INFO: Test took 13962ms.
[16:29:09.850] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:27.718] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 20.655346 .. 43.499950
[16:29:27.799] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 10 .. 53 (20) hits flags = 16 (plus default)
[16:29:27.807] <TB2> INFO: dacScan step from 10 .. 29
[16:29:42.411] <TB2> INFO: Test took 14604ms.
[16:29:42.436] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:29:42.436] <TB2> INFO: dacScan step from 30 .. 49
[16:30:01.323] <TB2> INFO: Test took 18887ms.
[16:30:01.456] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:30:01.491] <TB2> INFO: dacScan step from 50 .. 53
[16:30:07.383] <TB2> INFO: Test took 5892ms.
[16:30:07.418] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:30:21.557] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 2.799819 .. 42.630481
[16:30:21.636] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 2 .. 52 (20) hits flags = 16 (plus default)
[16:30:21.643] <TB2> INFO: dacScan step from 2 .. 21
[16:30:36.347] <TB2> INFO: Test took 14704ms.
[16:30:36.370] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:30:36.370] <TB2> INFO: dacScan step from 22 .. 41
[16:30:53.157] <TB2> INFO: Test took 16787ms.
[16:30:53.237] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:30:53.255] <TB2> INFO: dacScan step from 42 .. 52
[16:31:05.488] <TB2> INFO: Test took 12233ms.
[16:31:05.605] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:31:19.470] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[16:31:19.470] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[16:31:19.478] <TB2> INFO: dacScan step from 15 .. 34
[16:31:46.039] <TB2> INFO: Test took 26561ms.
[16:31:46.101] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:31:46.108] <TB2> INFO: dacScan step from 35 .. 54






[16:32:22.417] <TB2> INFO: Test took 36309ms.
[16:32:22.721] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:32:22.771] <TB2> INFO: dacScan step from 55 .. 55
[16:32:27.277] <TB2> INFO: Test took 4506ms.
[16:32:27.296] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:32:40.273] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C0.dat
[16:32:40.274] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C1.dat
[16:32:40.274] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C2.dat
[16:32:40.274] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C3.dat
[16:32:40.274] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C4.dat
[16:32:40.274] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C5.dat
[16:32:40.275] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C6.dat
[16:32:40.275] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C7.dat
[16:32:40.275] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C8.dat
[16:32:40.275] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C9.dat
[16:32:40.276] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C10.dat
[16:32:40.276] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C11.dat
[16:32:40.276] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C12.dat
[16:32:40.276] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C13.dat
[16:32:40.277] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C14.dat
[16:32:40.277] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C15.dat
[16:32:40.278] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters35_C0.dat
[16:32:40.291] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters35_C1.dat
[16:32:40.302] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters35_C2.dat
[16:32:40.312] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters35_C3.dat
[16:32:40.323] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters35_C4.dat
[16:32:40.334] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters35_C5.dat
[16:32:40.345] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters35_C6.dat
[16:32:40.356] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters35_C7.dat
[16:32:40.368] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters35_C8.dat
[16:32:40.379] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters35_C9.dat
[16:32:40.390] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters35_C10.dat
[16:32:40.399] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters35_C11.dat
[16:32:40.409] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters35_C12.dat
[16:32:40.420] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters35_C13.dat
[16:32:40.430] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters35_C14.dat
[16:32:40.441] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//trimParameters35_C15.dat
[16:32:40.450] <TB2> INFO: PixTestTrim::trimTest() done
[16:32:40.450] <TB2> INFO: vtrim: 127 111 104 108 115 128 102 108 100 110 108 109 0 104 113 107
[16:32:40.450] <TB2> INFO: vthrcomp: 110 92 99 95 100 101 93 93 100 97 92 91 1 94 93 102
[16:32:40.450] <TB2> INFO: vcal mean: 35.10 35.06 35.05 35.06 35.05 35.08 35.09 35.09 35.04 35.04 35.13 35.14 0.00 35.06 35.09 35.10
[16:32:40.450] <TB2> INFO: vcal RMS: 1.05 0.96 1.07 1.02 1.00 1.50 1.01 0.91 0.99 1.02 1.23 1.10 0.00 1.07 1.09 1.03
[16:32:40.450] <TB2> INFO: bits mean: 7.59 9.53 10.00 10.24 10.00 9.89 10.17 9.45 10.46 10.10 9.68 9.59 15.00 10.19 9.36 9.43
[16:32:40.450] <TB2> INFO: bits RMS: 2.67 2.45 2.57 2.40 2.51 2.45 2.36 2.66 2.35 2.49 2.50 2.64 0.00 2.41 2.65 2.71
[16:32:40.456] <TB2> INFO: ----------------------------------------------------------------------
[16:32:40.456] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 240 150 100
[16:32:40.456] <TB2> INFO: ----------------------------------------------------------------------
[16:32:40.458] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[16:32:40.469] <TB2> INFO: dacScan step from 0 .. 19
[16:33:06.267] <TB2> INFO: Test took 25798ms.
[16:33:06.302] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:33:06.302] <TB2> INFO: dacScan step from 20 .. 39
[16:33:32.549] <TB2> INFO: Test took 26247ms.
[16:33:32.612] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:33:32.615] <TB2> INFO: dacScan step from 40 .. 59
[16:34:07.681] <TB2> INFO: Test took 35066ms.
[16:34:07.986] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:34:08.015] <TB2> INFO: dacScan step from 60 .. 79






[16:34:44.748] <TB2> INFO: Test took 36733ms.
[16:34:45.037] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:34:45.085] <TB2> INFO: dacScan step from 80 .. 99
[16:35:22.345] <TB2> INFO: Test took 37260ms.
[16:35:22.726] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:35:22.772] <TB2> INFO: dacScan step from 100 .. 119
[16:36:00.317] <TB2> INFO: Test took 37545ms.
[16:36:00.638] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:36:00.677] <TB2> INFO: dacScan step from 120 .. 139
[16:36:37.169] <TB2> INFO: Test took 36492ms.
[16:36:37.440] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:36:37.480] <TB2> INFO: dacScan step from 140 .. 159
[16:37:13.440] <TB2> INFO: Test took 35960ms.
[16:37:13.753] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:37:13.781] <TB2> INFO: dacScan step from 160 .. 179
[16:37:51.833] <TB2> INFO: Test took 38052ms.
[16:37:52.203] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:37:52.247] <TB2> INFO: dacScan step from 180 .. 199
[16:38:31.099] <TB2> INFO: Test took 38852ms.
[16:38:31.349] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:38:58.475] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 85 (20) hits flags = 16 (plus default)
[16:38:58.483] <TB2> INFO: dacScan step from 0 .. 19
[16:39:24.402] <TB2> INFO: Test took 25919ms.
[16:39:24.446] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:39:24.446] <TB2> INFO: dacScan step from 20 .. 39
[16:39:50.711] <TB2> INFO: Test took 26265ms.
[16:39:50.803] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:39:50.816] <TB2> INFO: dacScan step from 40 .. 59
[16:40:28.397] <TB2> INFO: Test took 37581ms.
[16:40:28.728] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:40:28.766] <TB2> INFO: dacScan step from 60 .. 79



[16:41:04.762] <TB2> INFO: Test took 35996ms.
[16:41:05.006] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:41:05.042] <TB2> INFO: dacScan step from 80 .. 85
[16:41:18.364] <TB2> INFO: Test took 13322ms.
[16:41:18.435] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:41:35.701] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 78 (20) hits flags = 16 (plus default)
[16:41:35.709] <TB2> INFO: dacScan step from 0 .. 19
[16:42:00.836] <TB2> INFO: Test took 25127ms.
[16:42:00.883] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:42:00.883] <TB2> INFO: dacScan step from 20 .. 39
[16:42:30.201] <TB2> INFO: Test took 29317ms.
[16:42:30.324] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:42:30.338] <TB2> INFO: dacScan step from 40 .. 59



[16:43:08.152] <TB2> INFO: Test took 37814ms.
[16:43:08.539] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:43:08.586] <TB2> INFO: dacScan step from 60 .. 78



[16:43:42.983] <TB2> INFO: Test took 34397ms.
[16:43:43.276] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:44:00.840] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 74 (20) hits flags = 16 (plus default)
[16:44:00.848] <TB2> INFO: dacScan step from 0 .. 19
[16:44:26.168] <TB2> INFO: Test took 25320ms.
[16:44:26.204] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:44:26.204] <TB2> INFO: dacScan step from 20 .. 39
[16:44:56.933] <TB2> INFO: Test took 30729ms.
[16:44:57.132] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:44:57.160] <TB2> INFO: dacScan step from 40 .. 59
[16:45:33.846] <TB2> INFO: Test took 36686ms.
[16:45:34.098] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:45:34.133] <TB2> INFO: dacScan step from 60 .. 74
[16:46:02.881] <TB2> INFO: Test took 28748ms.
[16:46:03.068] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:46:19.906] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 72 (20) hits flags = 16 (plus default)
[16:46:19.915] <TB2> INFO: dacScan step from 0 .. 19
[16:46:45.363] <TB2> INFO: Test took 25448ms.
[16:46:45.416] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:46:45.417] <TB2> INFO: dacScan step from 20 .. 39
[16:47:17.458] <TB2> INFO: Test took 32041ms.
[16:47:17.685] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:47:17.720] <TB2> INFO: dacScan step from 40 .. 59



[16:47:55.453] <TB2> INFO: Test took 37733ms.
[16:47:55.713] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:47:55.747] <TB2> INFO: dacScan step from 60 .. 72
[16:48:21.700] <TB2> INFO: Test took 25952ms.
[16:48:21.856] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:48:38.116] <TB2> INFO: PixTestTrim::trimBitTest() done
[16:48:38.117] <TB2> INFO: PixTestTrim::doTest() done, duration: 2330 seconds
[16:48:38.751] <TB2> INFO: ######################################################################
[16:48:38.751] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[16:48:38.751] <TB2> INFO: ######################################################################
[16:48:42.392] <TB2> INFO: Test took 3639ms.
[16:48:42.413] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:48:46.300] <TB2> INFO: Test took 3690ms.
[16:48:46.392] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:48:50.077] <TB2> INFO: Test took 3666ms.
[16:48:50.132] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:48:50.145] <TB2> INFO: The DUT currently contains the following objects:
[16:48:50.145] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:50.145] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:48:50.145] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:48:50.145] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:50.145] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:50.145] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:50.145] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:50.145] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:50.145] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:50.145] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:50.145] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:50.145] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:50.145] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:50.145] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:50.146] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:50.146] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:50.146] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:50.146] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:50.146] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:50.146] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:51.266] <TB2> INFO: Test took 1120ms.
[16:48:51.267] <TB2> INFO: The DUT currently contains the following objects:
[16:48:51.267] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:51.267] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:48:51.267] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:48:51.268] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:51.268] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:51.268] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:51.268] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:51.268] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:51.268] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:51.268] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:51.268] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:51.268] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:51.268] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:51.268] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:51.268] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:51.268] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:51.268] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:51.268] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:51.268] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:51.268] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:52.374] <TB2> INFO: Test took 1106ms.
[16:48:52.375] <TB2> INFO: The DUT currently contains the following objects:
[16:48:52.375] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:52.375] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:48:52.375] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:48:52.375] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:52.375] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:52.375] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:52.375] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:52.375] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:52.375] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:52.375] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:52.375] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:52.375] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:52.375] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:52.375] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:52.376] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:52.376] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:52.376] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:52.376] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:52.376] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:52.376] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:53.494] <TB2> INFO: Test took 1118ms.
[16:48:53.495] <TB2> INFO: The DUT currently contains the following objects:
[16:48:53.495] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:53.495] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:48:53.495] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:48:53.495] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:53.495] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:53.495] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:53.496] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:53.496] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:53.496] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:53.496] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:53.496] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:53.496] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:53.496] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:53.496] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:53.496] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:53.496] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:53.496] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:53.496] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:53.496] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:53.496] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:54.620] <TB2> INFO: Test took 1124ms.
[16:48:54.621] <TB2> INFO: The DUT currently contains the following objects:
[16:48:54.621] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:54.621] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:48:54.621] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:48:54.621] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:54.621] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:54.621] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:54.621] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:54.621] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:54.621] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:54.622] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:54.622] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:54.622] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:54.622] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:54.622] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:54.622] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:54.622] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:54.622] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:54.622] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:54.622] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:54.622] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:55.730] <TB2> INFO: Test took 1108ms.
[16:48:55.731] <TB2> INFO: The DUT currently contains the following objects:
[16:48:55.731] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:55.731] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:48:55.731] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:48:55.731] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:55.731] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:55.731] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:55.731] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:55.731] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:55.731] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:55.731] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:55.731] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:55.731] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:55.731] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:55.731] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:55.731] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:55.731] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:55.731] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:55.731] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:55.731] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:55.732] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:56.853] <TB2> INFO: Test took 1121ms.
[16:48:56.854] <TB2> INFO: The DUT currently contains the following objects:
[16:48:56.854] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:56.854] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:48:56.855] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:48:56.855] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:56.855] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:56.855] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:56.855] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:56.855] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:56.855] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:56.855] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:56.855] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:56.855] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:56.855] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:56.855] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:56.855] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:56.855] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:56.855] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:56.855] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:56.855] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:56.855] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:57.963] <TB2> INFO: Test took 1108ms.
[16:48:57.965] <TB2> INFO: The DUT currently contains the following objects:
[16:48:57.965] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:57.965] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:48:57.965] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:48:57.965] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:57.965] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:57.965] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:57.965] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:57.965] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:57.965] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:57.965] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:57.965] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:57.965] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:57.965] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:57.965] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:57.965] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:57.965] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:57.965] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:57.965] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:57.965] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:57.966] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:59.102] <TB2> INFO: Test took 1136ms.
[16:48:59.103] <TB2> INFO: The DUT currently contains the following objects:
[16:48:59.103] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:48:59.103] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:48:59.103] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:48:59.104] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:48:59.104] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:59.104] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:59.104] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:59.104] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:59.104] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:59.104] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:59.104] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:59.104] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:59.104] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:59.104] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:59.104] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:59.104] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:59.104] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:59.104] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:59.104] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:48:59.104] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:00.212] <TB2> INFO: Test took 1108ms.
[16:49:00.213] <TB2> INFO: The DUT currently contains the following objects:
[16:49:00.213] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:49:00.213] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:49:00.213] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:49:00.213] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:49:00.213] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:00.213] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:00.213] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:00.213] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:00.213] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:00.213] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:00.213] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:00.214] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:00.214] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:00.214] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:00.214] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:00.214] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:00.214] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:00.214] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:00.214] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:00.214] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:01.337] <TB2> INFO: Test took 1123ms.
[16:49:01.339] <TB2> INFO: The DUT currently contains the following objects:
[16:49:01.339] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:49:01.339] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:49:01.339] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:49:01.339] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:49:01.339] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:01.339] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:01.339] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:01.339] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:01.339] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:01.339] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:01.339] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:01.339] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:01.339] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:01.339] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:01.339] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:01.339] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:01.339] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:01.339] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:01.339] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:01.339] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:02.462] <TB2> INFO: Test took 1123ms.
[16:49:02.463] <TB2> INFO: The DUT currently contains the following objects:
[16:49:02.463] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:49:02.464] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:49:02.464] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:49:02.464] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:49:02.464] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:02.464] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:02.464] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:02.464] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:02.464] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:02.464] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:02.464] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:02.464] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:02.464] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:02.464] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:02.464] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:02.464] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:02.464] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:02.464] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:02.464] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:02.464] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:03.570] <TB2> INFO: Test took 1106ms.
[16:49:03.572] <TB2> INFO: The DUT currently contains the following objects:
[16:49:03.572] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:49:03.572] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:49:03.572] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:49:03.572] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:49:03.572] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:03.572] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:03.572] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:03.572] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:03.572] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:03.572] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:03.572] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:03.572] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:03.572] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:03.572] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:03.572] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:03.572] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:03.572] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:03.572] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:03.572] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:03.572] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:04.691] <TB2> INFO: Test took 1119ms.
[16:49:04.693] <TB2> INFO: The DUT currently contains the following objects:
[16:49:04.693] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:49:04.693] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:49:04.693] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:49:04.693] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:49:04.693] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:04.693] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:04.693] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:04.693] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:04.693] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:04.693] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:04.693] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:04.693] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:04.693] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:04.693] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:04.693] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:04.693] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:04.693] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:04.693] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:04.694] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:04.694] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:05.802] <TB2> INFO: Test took 1108ms.
[16:49:05.804] <TB2> INFO: The DUT currently contains the following objects:
[16:49:05.804] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:49:05.804] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:49:05.804] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:49:05.804] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:49:05.804] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:05.804] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:05.804] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:05.804] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:05.804] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:05.804] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:05.804] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:05.804] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:05.804] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:05.804] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:05.804] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:05.804] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:05.804] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:05.804] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:05.804] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:05.804] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:06.927] <TB2> INFO: Test took 1122ms.
[16:49:06.928] <TB2> INFO: The DUT currently contains the following objects:
[16:49:06.928] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[16:49:06.928] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:49:06.928] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:49:06.929] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[16:49:06.929] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:06.929] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:06.929] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:06.929] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:06.929] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:06.929] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:06.929] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:06.929] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:06.929] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:06.929] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:06.929] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:06.929] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:06.929] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:06.929] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:06.929] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:06.929] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[16:49:08.063] <TB2> INFO: Test took 1134ms.
[16:49:08.067] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:33.197] <TB2> INFO: Test took 265130ms.
[16:53:34.749] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:57:48.031] <TB2> INFO: Test took 253282ms.
[16:57:49.429] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:49.435] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:49.442] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:49.448] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:49.454] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:49.460] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:49.467] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:49.473] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:49.479] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:49.486] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:49.492] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:49.498] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:49.504] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[16:57:49.511] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[16:57:49.517] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[16:57:49.523] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[16:57:49.529] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[16:57:49.536] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[16:57:49.542] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[16:57:49.548] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[16:57:49.555] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:49.561] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[16:57:49.567] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[16:57:49.574] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[16:57:49.580] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[16:57:49.586] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[16:57:49.592] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[16:57:49.599] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[16:57:49.605] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[16:57:49.611] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[16:57:49.617] <TB2> INFO: safety margin for low PH: adding 10, margin is now 30
[16:57:49.624] <TB2> INFO: safety margin for low PH: adding 11, margin is now 31
[16:57:49.630] <TB2> INFO: safety margin for low PH: adding 12, margin is now 32
[16:57:49.637] <TB2> INFO: safety margin for low PH: adding 13, margin is now 33
[16:57:49.643] <TB2> INFO: safety margin for low PH: adding 14, margin is now 34
[16:57:49.649] <TB2> INFO: safety margin for low PH: adding 15, margin is now 35
[16:57:49.655] <TB2> INFO: safety margin for low PH: adding 16, margin is now 36
[16:57:49.662] <TB2> INFO: safety margin for low PH: adding 17, margin is now 37
[16:57:49.668] <TB2> INFO: safety margin for low PH: adding 18, margin is now 38
[16:57:49.674] <TB2> INFO: safety margin for low PH: adding 19, margin is now 39
[16:57:49.680] <TB2> INFO: safety margin for low PH: adding 20, margin is now 40
[16:57:49.687] <TB2> INFO: safety margin for low PH: adding 21, margin is now 41
[16:57:49.693] <TB2> INFO: safety margin for low PH: adding 22, margin is now 42
[16:57:49.699] <TB2> INFO: safety margin for low PH: adding 23, margin is now 43
[16:57:49.706] <TB2> INFO: safety margin for low PH: adding 24, margin is now 44
[16:57:49.712] <TB2> INFO: safety margin for low PH: adding 25, margin is now 45
[16:57:49.718] <TB2> INFO: safety margin for low PH: adding 26, margin is now 46
[16:57:49.724] <TB2> INFO: safety margin for low PH: adding 27, margin is now 47
[16:57:49.731] <TB2> INFO: safety margin for low PH: adding 28, margin is now 48
[16:57:49.737] <TB2> INFO: safety margin for low PH: adding 29, margin is now 49
[16:57:49.743] <TB2> INFO: safety margin for low PH: adding 30, margin is now 50
[16:57:49.749] <TB2> INFO: safety margin for low PH: adding 31, margin is now 51
[16:57:49.756] <TB2> INFO: safety margin for low PH: adding 32, margin is now 52
[16:57:49.762] <TB2> INFO: safety margin for low PH: adding 33, margin is now 53
[16:57:49.768] <TB2> INFO: safety margin for low PH: adding 34, margin is now 54
[16:57:49.775] <TB2> INFO: safety margin for low PH: adding 35, margin is now 55
[16:57:49.781] <TB2> INFO: safety margin for low PH: adding 36, margin is now 56
[16:57:49.787] <TB2> INFO: safety margin for low PH: adding 37, margin is now 57
[16:57:49.793] <TB2> INFO: safety margin for low PH: adding 38, margin is now 58
[16:57:49.800] <TB2> INFO: safety margin for low PH: adding 39, margin is now 59
[16:57:49.806] <TB2> INFO: safety margin for low PH: adding 40, margin is now 60
[16:57:49.812] <TB2> INFO: safety margin for low PH: adding 41, margin is now 61
[16:57:49.818] <TB2> INFO: safety margin for low PH: adding 42, margin is now 62
[16:57:49.825] <TB2> INFO: safety margin for low PH: adding 43, margin is now 63
[16:57:49.831] <TB2> INFO: safety margin for low PH: adding 44, margin is now 64
[16:57:49.837] <TB2> INFO: safety margin for low PH: adding 45, margin is now 65
[16:57:49.843] <TB2> INFO: safety margin for low PH: adding 46, margin is now 66
[16:57:49.850] <TB2> INFO: safety margin for low PH: adding 47, margin is now 67
[16:57:49.856] <TB2> INFO: safety margin for low PH: adding 48, margin is now 68
[16:57:49.862] <TB2> INFO: safety margin for low PH: adding 49, margin is now 69
[16:57:49.868] <TB2> INFO: safety margin for low PH: adding 50, margin is now 70
[16:57:49.875] <TB2> INFO: safety margin for low PH: adding 51, margin is now 71
[16:57:49.881] <TB2> INFO: safety margin for low PH: adding 52, margin is now 72
[16:57:49.887] <TB2> INFO: safety margin for low PH: adding 53, margin is now 73
[16:57:49.893] <TB2> INFO: safety margin for low PH: adding 54, margin is now 74
[16:57:49.900] <TB2> INFO: safety margin for low PH: adding 55, margin is now 75
[16:57:49.906] <TB2> INFO: safety margin for low PH: adding 56, margin is now 76
[16:57:49.912] <TB2> INFO: safety margin for low PH: adding 57, margin is now 77
[16:57:49.919] <TB2> INFO: safety margin for low PH: adding 58, margin is now 78
[16:57:49.925] <TB2> INFO: safety margin for low PH: adding 59, margin is now 79
[16:57:49.931] <TB2> INFO: safety margin for low PH: adding 60, margin is now 80
[16:57:49.937] <TB2> INFO: safety margin for low PH: adding 61, margin is now 81
[16:57:49.944] <TB2> INFO: safety margin for low PH: adding 62, margin is now 82
[16:57:49.950] <TB2> INFO: safety margin for low PH: adding 63, margin is now 83
[16:57:49.957] <TB2> INFO: safety margin for low PH: adding 64, margin is now 84
[16:57:49.964] <TB2> INFO: safety margin for low PH: adding 65, margin is now 85
[16:57:49.970] <TB2> INFO: safety margin for low PH: adding 66, margin is now 86
[16:57:49.976] <TB2> INFO: safety margin for low PH: adding 67, margin is now 87
[16:57:49.983] <TB2> INFO: safety margin for low PH: adding 68, margin is now 88
[16:57:49.989] <TB2> INFO: safety margin for low PH: adding 69, margin is now 89
[16:57:49.995] <TB2> INFO: safety margin for low PH: adding 70, margin is now 90
[16:57:50.001] <TB2> INFO: safety margin for low PH: adding 71, margin is now 91
[16:57:50.008] <TB2> INFO: safety margin for low PH: adding 72, margin is now 92
[16:57:50.014] <TB2> INFO: safety margin for low PH: adding 73, margin is now 93
[16:57:50.021] <TB2> INFO: safety margin for low PH: adding 74, margin is now 94
[16:57:50.027] <TB2> INFO: safety margin for low PH: adding 75, margin is now 95
[16:57:50.033] <TB2> INFO: safety margin for low PH: adding 76, margin is now 96
[16:57:50.040] <TB2> INFO: safety margin for low PH: adding 77, margin is now 97
[16:57:50.046] <TB2> INFO: safety margin for low PH: adding 78, margin is now 98
[16:57:50.052] <TB2> INFO: safety margin for low PH: adding 79, margin is now 99
[16:57:50.059] <TB2> INFO: safety margin for low PH: adding 80, margin is now 100
[16:57:50.065] <TB2> INFO: safety margin for low PH: adding 81, margin is now 101
[16:57:50.071] <TB2> INFO: safety margin for low PH: adding 82, margin is now 102
[16:57:50.077] <TB2> INFO: safety margin for low PH: adding 83, margin is now 103
[16:57:50.084] <TB2> INFO: safety margin for low PH: adding 84, margin is now 104
[16:57:50.090] <TB2> INFO: safety margin for low PH: adding 85, margin is now 105
[16:57:50.096] <TB2> INFO: safety margin for low PH: adding 86, margin is now 106
[16:57:50.102] <TB2> INFO: safety margin for low PH: adding 87, margin is now 107
[16:57:50.109] <TB2> INFO: safety margin for low PH: adding 88, margin is now 108
[16:57:50.115] <TB2> INFO: safety margin for low PH: adding 89, margin is now 109
[16:57:50.121] <TB2> INFO: safety margin for low PH: adding 90, margin is now 110
[16:57:50.128] <TB2> INFO: safety margin for low PH: adding 91, margin is now 111
[16:57:50.134] <TB2> INFO: safety margin for low PH: adding 92, margin is now 112
[16:57:50.140] <TB2> INFO: safety margin for low PH: adding 93, margin is now 113
[16:57:50.146] <TB2> INFO: safety margin for low PH: adding 94, margin is now 114
[16:57:50.153] <TB2> INFO: safety margin for low PH: adding 95, margin is now 115
[16:57:50.159] <TB2> INFO: safety margin for low PH: adding 96, margin is now 116
[16:57:50.165] <TB2> INFO: safety margin for low PH: adding 97, margin is now 117
[16:57:50.172] <TB2> INFO: safety margin for low PH: adding 98, margin is now 118
[16:57:50.178] <TB2> INFO: safety margin for low PH: adding 99, margin is now 119
[16:57:50.184] <TB2> INFO: safety margin for low PH: adding 100, margin is now 120
[16:57:50.190] <TB2> INFO: safety margin for low PH: adding 101, margin is now 121
[16:57:50.197] <TB2> INFO: safety margin for low PH: adding 102, margin is now 122
[16:57:50.203] <TB2> INFO: safety margin for low PH: adding 103, margin is now 123
[16:57:50.209] <TB2> INFO: safety margin for low PH: adding 104, margin is now 124
[16:57:50.215] <TB2> INFO: safety margin for low PH: adding 105, margin is now 125
[16:57:50.222] <TB2> INFO: safety margin for low PH: adding 106, margin is now 126
[16:57:50.228] <TB2> INFO: safety margin for low PH: adding 107, margin is now 127
[16:57:50.234] <TB2> INFO: safety margin for low PH: adding 108, margin is now 128
[16:57:50.240] <TB2> INFO: safety margin for low PH: adding 109, margin is now 129
[16:57:50.247] <TB2> INFO: safety margin for low PH: adding 110, margin is now 130
[16:57:50.253] <TB2> INFO: safety margin for low PH: adding 111, margin is now 131
[16:57:50.264] <TB2> INFO: safety margin for low PH: adding 112, margin is now 132
[16:57:50.271] <TB2> INFO: safety margin for low PH: adding 113, margin is now 133
[16:57:50.277] <TB2> INFO: safety margin for low PH: adding 114, margin is now 134
[16:57:50.283] <TB2> INFO: safety margin for low PH: adding 115, margin is now 135
[16:57:50.289] <TB2> INFO: safety margin for low PH: adding 116, margin is now 136
[16:57:50.296] <TB2> INFO: safety margin for low PH: adding 117, margin is now 137
[16:57:50.302] <TB2> INFO: safety margin for low PH: adding 118, margin is now 138
[16:57:50.308] <TB2> INFO: safety margin for low PH: adding 119, margin is now 139
[16:57:50.314] <TB2> INFO: safety margin for low PH: adding 120, margin is now 140
[16:57:50.321] <TB2> INFO: safety margin for low PH: adding 121, margin is now 141
[16:57:50.327] <TB2> INFO: safety margin for low PH: adding 122, margin is now 142
[16:57:50.333] <TB2> INFO: safety margin for low PH: adding 123, margin is now 143
[16:57:50.340] <TB2> INFO: safety margin for low PH: adding 124, margin is now 144
[16:57:50.346] <TB2> INFO: safety margin for low PH: adding 125, margin is now 145
[16:57:50.352] <TB2> INFO: safety margin for low PH: adding 126, margin is now 146
[16:57:50.358] <TB2> INFO: safety margin for low PH: adding 127, margin is now 147
[16:57:50.365] <TB2> INFO: safety margin for low PH: adding 128, margin is now 148
[16:57:50.371] <TB2> INFO: safety margin for low PH: adding 129, margin is now 149
[16:57:50.377] <TB2> INFO: safety margin for low PH: adding 130, margin is now 150
[16:57:50.383] <TB2> INFO: safety margin for low PH: adding 131, margin is now 151
[16:57:50.390] <TB2> INFO: safety margin for low PH: adding 132, margin is now 152
[16:57:50.396] <TB2> INFO: safety margin for low PH: adding 133, margin is now 153
[16:57:50.402] <TB2> INFO: safety margin for low PH: adding 134, margin is now 154
[16:57:50.408] <TB2> INFO: safety margin for low PH: adding 135, margin is now 155
[16:57:50.415] <TB2> INFO: safety margin for low PH: adding 136, margin is now 156
[16:57:50.421] <TB2> INFO: safety margin for low PH: adding 137, margin is now 157
[16:57:50.427] <TB2> INFO: safety margin for low PH: adding 138, margin is now 158
[16:57:50.433] <TB2> INFO: safety margin for low PH: adding 139, margin is now 159
[16:57:50.440] <TB2> INFO: safety margin for low PH: adding 140, margin is now 160
[16:57:50.446] <TB2> INFO: safety margin for low PH: adding 141, margin is now 161
[16:57:50.452] <TB2> INFO: safety margin for low PH: adding 142, margin is now 162
[16:57:50.458] <TB2> INFO: safety margin for low PH: adding 143, margin is now 163
[16:57:50.465] <TB2> INFO: safety margin for low PH: adding 144, margin is now 164
[16:57:50.471] <TB2> INFO: safety margin for low PH: adding 145, margin is now 165
[16:57:50.477] <TB2> INFO: safety margin for low PH: adding 146, margin is now 166
[16:57:50.483] <TB2> INFO: safety margin for low PH: adding 147, margin is now 167
[16:57:50.490] <TB2> INFO: safety margin for low PH: adding 148, margin is now 168
[16:57:50.496] <TB2> INFO: safety margin for low PH: adding 149, margin is now 169
[16:57:50.502] <TB2> INFO: safety margin for low PH: adding 150, margin is now 170
[16:57:50.509] <TB2> INFO: safety margin for low PH: adding 151, margin is now 171
[16:57:50.515] <TB2> INFO: safety margin for low PH: adding 152, margin is now 172
[16:57:50.521] <TB2> INFO: safety margin for low PH: adding 153, margin is now 173
[16:57:50.527] <TB2> INFO: safety margin for low PH: adding 154, margin is now 174
[16:57:50.534] <TB2> INFO: safety margin for low PH: adding 155, margin is now 175
[16:57:50.540] <TB2> INFO: safety margin for low PH: adding 156, margin is now 176
[16:57:50.546] <TB2> INFO: safety margin for low PH: adding 157, margin is now 177
[16:57:50.553] <TB2> INFO: safety margin for low PH: adding 158, margin is now 178
[16:57:50.559] <TB2> INFO: safety margin for low PH: adding 159, margin is now 179
[16:57:50.565] <TB2> INFO: safety margin for low PH: adding 160, margin is now 180
[16:57:50.572] <TB2> INFO: safety margin for low PH: adding 161, margin is now 181
[16:57:50.578] <TB2> INFO: safety margin for low PH: adding 162, margin is now 182
[16:57:50.584] <TB2> INFO: safety margin for low PH: adding 163, margin is now 183
[16:57:50.591] <TB2> INFO: safety margin for low PH: adding 164, margin is now 184
[16:57:50.597] <TB2> INFO: safety margin for low PH: adding 165, margin is now 185
[16:57:50.604] <TB2> INFO: safety margin for low PH: adding 166, margin is now 186
[16:57:50.610] <TB2> INFO: safety margin for low PH: adding 167, margin is now 187
[16:57:50.616] <TB2> INFO: safety margin for low PH: adding 168, margin is now 188
[16:57:50.623] <TB2> INFO: safety margin for low PH: adding 169, margin is now 189
[16:57:50.629] <TB2> INFO: safety margin for low PH: adding 170, margin is now 190
[16:57:50.635] <TB2> INFO: safety margin for low PH: adding 171, margin is now 191
[16:57:50.642] <TB2> INFO: safety margin for low PH: adding 172, margin is now 192
[16:57:50.648] <TB2> INFO: safety margin for low PH: adding 173, margin is now 193
[16:57:50.654] <TB2> INFO: safety margin for low PH: adding 174, margin is now 194
[16:57:50.661] <TB2> INFO: safety margin for low PH: adding 175, margin is now 195
[16:57:50.667] <TB2> INFO: safety margin for low PH: adding 176, margin is now 196
[16:57:50.673] <TB2> INFO: safety margin for low PH: adding 177, margin is now 197
[16:57:50.680] <TB2> INFO: safety margin for low PH: adding 178, margin is now 198
[16:57:50.686] <TB2> INFO: safety margin for low PH: adding 179, margin is now 199
[16:57:50.692] <TB2> INFO: safety margin for low PH: adding 180, margin is now 200
[16:57:50.699] <TB2> INFO: safety margin for low PH: adding 181, margin is now 201
[16:57:50.705] <TB2> INFO: safety margin for low PH: adding 182, margin is now 202
[16:57:50.711] <TB2> INFO: safety margin for low PH: adding 183, margin is now 203
[16:57:50.718] <TB2> INFO: safety margin for low PH: adding 184, margin is now 204
[16:57:50.724] <TB2> INFO: safety margin for low PH: adding 185, margin is now 205
[16:57:50.730] <TB2> INFO: safety margin for low PH: adding 186, margin is now 206
[16:57:50.737] <TB2> INFO: safety margin for low PH: adding 187, margin is now 207
[16:57:50.743] <TB2> INFO: safety margin for low PH: adding 188, margin is now 208
[16:57:50.749] <TB2> INFO: safety margin for low PH: adding 189, margin is now 209
[16:57:50.756] <TB2> INFO: safety margin for low PH: adding 190, margin is now 210
[16:57:50.762] <TB2> INFO: safety margin for low PH: adding 191, margin is now 211
[16:57:50.768] <TB2> INFO: safety margin for low PH: adding 192, margin is now 212
[16:57:50.775] <TB2> INFO: safety margin for low PH: adding 193, margin is now 213
[16:57:50.781] <TB2> INFO: safety margin for low PH: adding 194, margin is now 214
[16:57:50.787] <TB2> INFO: safety margin for low PH: adding 195, margin is now 215
[16:57:50.794] <TB2> INFO: safety margin for low PH: adding 196, margin is now 216
[16:57:50.800] <TB2> INFO: safety margin for low PH: adding 197, margin is now 217
[16:57:50.806] <TB2> INFO: safety margin for low PH: adding 198, margin is now 218
[16:57:50.813] <TB2> INFO: safety margin for low PH: adding 199, margin is now 219
[16:57:50.819] <TB2> INFO: safety margin for low PH: adding 200, margin is now 220
[16:57:50.825] <TB2> INFO: safety margin for low PH: adding 201, margin is now 221
[16:57:50.831] <TB2> INFO: safety margin for low PH: adding 202, margin is now 222
[16:57:50.838] <TB2> INFO: safety margin for low PH: adding 203, margin is now 223
[16:57:50.844] <TB2> INFO: safety margin for low PH: adding 204, margin is now 224
[16:57:50.850] <TB2> INFO: safety margin for low PH: adding 205, margin is now 225
[16:57:50.857] <TB2> INFO: safety margin for low PH: adding 206, margin is now 226
[16:57:50.863] <TB2> INFO: safety margin for low PH: adding 207, margin is now 227
[16:57:50.869] <TB2> INFO: safety margin for low PH: adding 208, margin is now 228
[16:57:50.876] <TB2> INFO: safety margin for low PH: adding 209, margin is now 229
[16:57:50.882] <TB2> INFO: safety margin for low PH: adding 210, margin is now 230
[16:57:50.888] <TB2> INFO: safety margin for low PH: adding 211, margin is now 231
[16:57:50.895] <TB2> INFO: safety margin for low PH: adding 212, margin is now 232
[16:57:50.901] <TB2> INFO: safety margin for low PH: adding 213, margin is now 233
[16:57:50.907] <TB2> INFO: safety margin for low PH: adding 214, margin is now 234
[16:57:50.914] <TB2> INFO: safety margin for low PH: adding 215, margin is now 235
[16:57:50.920] <TB2> INFO: safety margin for low PH: adding 216, margin is now 236
[16:57:50.926] <TB2> INFO: safety margin for low PH: adding 217, margin is now 237
[16:57:50.932] <TB2> INFO: safety margin for low PH: adding 218, margin is now 238
[16:57:50.939] <TB2> INFO: safety margin for low PH: adding 219, margin is now 239
[16:57:50.945] <TB2> INFO: safety margin for low PH: adding 220, margin is now 240
[16:57:50.951] <TB2> INFO: safety margin for low PH: adding 221, margin is now 241
[16:57:50.958] <TB2> INFO: safety margin for low PH: adding 222, margin is now 242
[16:57:50.964] <TB2> INFO: safety margin for low PH: adding 223, margin is now 243
[16:57:50.970] <TB2> INFO: safety margin for low PH: adding 224, margin is now 244
[16:57:50.977] <TB2> INFO: safety margin for low PH: adding 225, margin is now 245
[16:57:50.983] <TB2> INFO: safety margin for low PH: adding 226, margin is now 246
[16:57:50.989] <TB2> INFO: safety margin for low PH: adding 227, margin is now 247
[16:57:50.995] <TB2> INFO: safety margin for low PH: adding 228, margin is now 248
[16:57:51.002] <TB2> INFO: safety margin for low PH: adding 229, margin is now 249
[16:57:51.008] <TB2> INFO: safety margin for low PH: adding 230, margin is now 250
[16:57:51.014] <TB2> INFO: safety margin for low PH: adding 231, margin is now 251
[16:57:51.021] <TB2> INFO: safety margin for low PH: adding 232, margin is now 252
[16:57:51.027] <TB2> INFO: safety margin for low PH: adding 233, margin is now 253
[16:57:51.033] <TB2> INFO: safety margin for low PH: adding 234, margin is now 254
[16:57:51.040] <TB2> INFO: safety margin for low PH: adding 235, margin is now 255
[16:57:51.046] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:51.052] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:51.059] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[16:57:51.093] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C0.dat
[16:57:51.093] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C1.dat
[16:57:51.093] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C2.dat
[16:57:51.093] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C3.dat
[16:57:51.093] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C4.dat
[16:57:51.093] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C5.dat
[16:57:51.093] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C6.dat
[16:57:51.093] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C7.dat
[16:57:51.093] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C8.dat
[16:57:51.094] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C9.dat
[16:57:51.094] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C10.dat
[16:57:51.094] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C11.dat
[16:57:51.094] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C12.dat
[16:57:51.094] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C13.dat
[16:57:51.094] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C14.dat
[16:57:51.094] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//dacParameters35_C15.dat
[16:57:54.715] <TB2> INFO: Test took 3618ms.
[16:57:58.410] <TB2> INFO: Test took 3437ms.
[16:58:02.265] <TB2> INFO: Test took 3597ms.
[16:58:02.528] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:03.439] <TB2> INFO: Test took 911ms.
[16:58:03.441] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:04.555] <TB2> INFO: Test took 1114ms.
[16:58:04.557] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:05.685] <TB2> INFO: Test took 1129ms.
[16:58:05.687] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:06.787] <TB2> INFO: Test took 1100ms.
[16:58:06.789] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:07.902] <TB2> INFO: Test took 1113ms.
[16:58:07.904] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:09.032] <TB2> INFO: Test took 1128ms.
[16:58:09.034] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:10.134] <TB2> INFO: Test took 1100ms.
[16:58:10.136] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:11.235] <TB2> INFO: Test took 1099ms.
[16:58:11.237] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:12.365] <TB2> INFO: Test took 1128ms.
[16:58:12.367] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:13.481] <TB2> INFO: Test took 1115ms.
[16:58:13.483] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:14.597] <TB2> INFO: Test took 1114ms.
[16:58:14.599] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:15.699] <TB2> INFO: Test took 1100ms.
[16:58:15.701] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:16.815] <TB2> INFO: Test took 1114ms.
[16:58:16.817] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:17.931] <TB2> INFO: Test took 1114ms.
[16:58:17.933] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:19.060] <TB2> INFO: Test took 1127ms.
[16:58:19.062] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:20.162] <TB2> INFO: Test took 1100ms.
[16:58:20.164] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:21.306] <TB2> INFO: Test took 1142ms.
[16:58:21.308] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:22.436] <TB2> INFO: Test took 1128ms.
[16:58:22.438] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:23.538] <TB2> INFO: Test took 1100ms.
[16:58:23.540] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:24.640] <TB2> INFO: Test took 1100ms.
[16:58:24.641] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:25.755] <TB2> INFO: Test took 1114ms.
[16:58:25.757] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:26.872] <TB2> INFO: Test took 1115ms.
[16:58:26.874] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:27.987] <TB2> INFO: Test took 1113ms.
[16:58:27.989] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:29.104] <TB2> INFO: Test took 1115ms.
[16:58:29.105] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:30.232] <TB2> INFO: Test took 1127ms.
[16:58:30.233] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:31.374] <TB2> INFO: Test took 1141ms.
[16:58:31.375] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:32.475] <TB2> INFO: Test took 1100ms.
[16:58:32.477] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:33.592] <TB2> INFO: Test took 1115ms.
[16:58:33.593] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:34.722] <TB2> INFO: Test took 1129ms.
[16:58:34.724] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:35.852] <TB2> INFO: Test took 1129ms.
[16:58:35.853] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:36.967] <TB2> INFO: Test took 1114ms.
[16:58:36.969] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:58:38.068] <TB2> INFO: Test took 1099ms.
[16:58:38.571] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 599 seconds
[16:58:38.571] <TB2> INFO: PH scale (per ROC): 71 72 67 76 75 69 78 75 87 75 82 74 0 76 73 81
[16:58:38.571] <TB2> INFO: PH offset (per ROC): 207 179 178 165 177 186 177 176 161 181 180 176 0 182 188 175
[16:58:38.746] <TB2> INFO: ######################################################################
[16:58:38.746] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[16:58:38.746] <TB2> INFO: ######################################################################
[16:58:38.755] <TB2> INFO: scanning low vcal = 50
[16:58:43.165] <TB2> INFO: Test took 4410ms.
[16:58:43.216] <TB2> INFO: scanning low vcal = 100
[16:58:47.776] <TB2> INFO: Test took 4560ms.
[16:58:47.826] <TB2> INFO: scanning low vcal = 150
[16:58:52.316] <TB2> INFO: Test took 4489ms.
[16:58:52.366] <TB2> INFO: scanning low vcal = 200
[16:58:56.669] <TB2> INFO: Test took 4303ms.
[16:58:56.720] <TB2> INFO: scanning low vcal = 250
[16:59:01.195] <TB2> INFO: Test took 4475ms.
[16:59:01.247] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[16:59:05.733] <TB2> INFO: Test took 4486ms.
[16:59:05.783] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[16:59:10.227] <TB2> INFO: Test took 4444ms.
[16:59:10.278] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[16:59:14.665] <TB2> INFO: Test took 4387ms.
[16:59:14.716] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[16:59:19.218] <TB2> INFO: Test took 4502ms.
[16:59:19.269] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[16:59:23.788] <TB2> INFO: Test took 4519ms.
[16:59:24.065] <TB2> INFO: PixTestGainPedestal::measure() done
[16:59:45.468] <TB2> INFO: PixTestGainPedestal::fit() done
[16:59:45.468] <TB2> INFO: non-linearity mean: 0.965 0.954 0.951 0.961 0.956 0.960 0.957 0.954 0.965 0.952 0.960 0.961 0.000 0.957 0.946 0.958
[16:59:45.468] <TB2> INFO: non-linearity RMS: 0.006 0.007 0.007 0.006 0.006 0.007 0.006 0.007 0.004 0.006 0.007 0.004 0.000 0.006 0.008 0.005
[16:59:45.468] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[16:59:45.486] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[16:59:45.504] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[16:59:45.522] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[16:59:45.540] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[16:59:45.558] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[16:59:45.576] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[16:59:45.594] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[16:59:45.612] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[16:59:45.630] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[16:59:45.648] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[16:59:45.666] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[16:59:45.684] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[16:59:45.697] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[16:59:45.715] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[16:59:45.733] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[16:59:45.751] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 67 seconds
[16:59:45.757] <TB2> INFO: enter test to run
[16:59:45.757] <TB2> INFO: test: exit no parameter change
[16:59:46.265] <TB2> QUIET: Connection to board 156 closed.
[16:59:46.345] <TB2> INFO: pXar: this is the end, my friend