[13:52:43.314] <TB2> INFO: *** Welcome to pxar ***
[13:52:43.314] <TB2> INFO: *** Today: 2015/07/10
[13:52:43.314] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C15.dat
[13:52:43.315] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//tbmParameters_C0b.dat
[13:52:43.315] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//defaultMaskFile.dat
[13:52:43.315] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters_C15.dat
[13:52:43.404] <TB2> INFO: clk: 4
[13:52:43.404] <TB2> INFO: ctr: 4
[13:52:43.404] <TB2> INFO: sda: 19
[13:52:43.404] <TB2> INFO: tin: 9
[13:52:43.404] <TB2> INFO: level: 15
[13:52:43.404] <TB2> INFO: triggerdelay: 0
[13:52:43.404] <TB2> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[13:52:43.404] <TB2> INFO: Log level: INFO
[13:52:43.413] <TB2> INFO: Found DTB DTB_WXC55Z
[13:52:43.425] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[13:52:43.428] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[13:52:43.431] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[13:52:45.000] <TB2> INFO: DUT info:
[13:52:45.000] <TB2> INFO: The DUT currently contains the following objects:
[13:52:45.000] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:52:45.000] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:52:45.000] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:52:45.000] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[13:52:45.000] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[13:52:45.000] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[13:52:45.000] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[13:52:45.000] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[13:52:45.000] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[13:52:45.000] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[13:52:45.000] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[13:52:45.000] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[13:52:45.000] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[13:52:45.000] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[13:52:45.001] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[13:52:45.001] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[13:52:45.001] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[13:52:45.001] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[13:52:45.001] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[13:52:45.001] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[13:52:45.402] <TB2> INFO: enter 'restricted' command line mode
[13:52:45.402] <TB2> INFO: enter test to run
[13:52:45.402] <TB2> INFO: test: pretest no parameter change
[13:52:45.402] <TB2> INFO: running: pretest
[13:52:45.408] <TB2> INFO: ######################################################################
[13:52:45.408] <TB2> INFO: PixTestPretest::doTest()
[13:52:45.409] <TB2> INFO: ######################################################################
[13:52:45.410] <TB2> INFO: ----------------------------------------------------------------------
[13:52:45.410] <TB2> INFO: PixTestPretest::programROC()
[13:52:45.410] <TB2> INFO: ----------------------------------------------------------------------
[13:53:03.427] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[13:53:03.427] <TB2> INFO: IA differences per ROC: 19.3 20.9 16.9 19.3 22.5 19.3 17.7 19.3 20.1 18.5 16.1 18.5 24.9 16.9 20.9 20.1
[13:53:03.492] <TB2> INFO: ----------------------------------------------------------------------
[13:53:03.492] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[13:53:03.492] <TB2> INFO: ----------------------------------------------------------------------
[13:53:23.040] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 378.6 mA = 23.6625 mA/ROC
[13:53:23.043] <TB2> INFO: ----------------------------------------------------------------------
[13:53:23.043] <TB2> INFO: PixTestPretest::findWorkingPixel()
[13:53:23.043] <TB2> INFO: ----------------------------------------------------------------------
[13:53:32.323] <TB2> INFO: Test took 9275ms.
[13:53:32.591] <TB2> INFO: fwp_c12_r22_C12 does not pass: vthrComp = -34 Delta(CalDel) = 61, trying another
[13:53:41.389] <TB2> INFO: Test took 8791ms.
[13:53:41.640] <TB2> INFO: fwp_c5_r5_C12 does not pass: vthrComp = -42 Delta(CalDel) = 63, trying another
[13:53:50.970] <TB2> INFO: Test took 9328ms.
[13:53:51.253] <TB2> INFO: fwp_c15_r26_C12 does not pass: vthrComp = -32 Delta(CalDel) = 61, trying another
[13:54:00.069] <TB2> INFO: Test took 8806ms.
[13:54:00.321] <TB2> INFO: fwp_c20_r32_C12 does not pass: vthrComp = -24 Delta(CalDel) = 61, trying another
[13:54:09.331] <TB2> INFO: Test took 9008ms.
[13:54:09.622] <TB2> INFO: fwp_c25_r36_C12 does not pass: vthrComp = -20 Delta(CalDel) = 60, trying another
[13:54:18.883] <TB2> INFO: Test took 9257ms.
[13:54:19.159] <TB2> INFO: fwp_c30_r42_C12 does not pass: vthrComp = -13 Delta(CalDel) = 61, trying another
[13:54:28.002] <TB2> INFO: Test took 8839ms.
[13:54:28.253] <TB2> INFO: fwp_c35_r50_C12 does not pass: vthrComp = -19 Delta(CalDel) = 61, trying another
[13:54:37.057] <TB2> INFO: Test took 8802ms.
[13:54:37.315] <TB2> INFO: fwp_c40_r60_C12 does not pass: vthrComp = -12 Delta(CalDel) = 61, trying another
[13:54:46.538] <TB2> INFO: Test took 9221ms.
[13:54:46.807] <TB2> INFO: fwp_c45_r70_C12 does not pass: vthrComp = -16 Delta(CalDel) = 61, trying another
[13:54:55.829] <TB2> INFO: Test took 9018ms.
[13:54:56.096] <TB2> INFO: fwp_c50_r75_C12 does not pass: vthrComp = -7 Delta(CalDel) = 60, trying another
[13:54:56.096] <TB2> INFO: Found working pixel in all ROCs: col/row = 50/75
[13:54:56.127] <TB2> INFO: ----------------------------------------------------------------------
[13:54:56.127] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[13:54:56.127] <TB2> INFO: ----------------------------------------------------------------------
[13:55:04.985] <TB2> INFO: Test took 8854ms.
[13:55:05.268] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[13:55:05.268] <TB2> INFO: CalDel: 136 155 125 134 150 142 145 135 132 132 137 152 _ 96 143 145 154
[13:55:05.268] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[13:55:05.271] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C0.dat
[13:55:05.271] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C1.dat
[13:55:05.271] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C2.dat
[13:55:05.271] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C3.dat
[13:55:05.271] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C4.dat
[13:55:05.271] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C5.dat
[13:55:05.271] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C6.dat
[13:55:05.272] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C7.dat
[13:55:05.272] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C8.dat
[13:55:05.272] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C9.dat
[13:55:05.272] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C10.dat
[13:55:05.272] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C11.dat
[13:55:05.272] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C12.dat
[13:55:05.272] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C13.dat
[13:55:05.272] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C14.dat
[13:55:05.272] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters_C15.dat
[13:55:05.272] <TB2> INFO: PixTestPretest::doTest() done, duration: 139 seconds
[13:55:05.333] <TB2> INFO: enter test to run
[13:55:05.333] <TB2> INFO: test: fulltest no parameter change
[13:55:05.333] <TB2> INFO: running: fulltest
[13:55:05.333] <TB2> INFO: ######################################################################
[13:55:05.333] <TB2> INFO: PixTestFullTest::doTest()
[13:55:05.333] <TB2> INFO: ######################################################################
[13:55:05.335] <TB2> INFO: ######################################################################
[13:55:05.335] <TB2> INFO: PixTestAlive::doTest()
[13:55:05.335] <TB2> INFO: ######################################################################
[13:55:05.336] <TB2> INFO: ----------------------------------------------------------------------
[13:55:05.336] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:55:05.336] <TB2> INFO: ----------------------------------------------------------------------
[13:55:08.921] <TB2> INFO: Test took 3584ms.
[13:55:08.945] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:09.169] <TB2> INFO: PixTestAlive::aliveTest() done
[13:55:09.170] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 2 0 0 0 0 0 0 4160 0 0 0
[13:55:09.171] <TB2> INFO: ----------------------------------------------------------------------
[13:55:09.171] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:55:09.171] <TB2> INFO: ----------------------------------------------------------------------
[13:55:11.981] <TB2> INFO: Test took 2809ms.
[13:55:11.982] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:11.982] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[13:55:12.202] <TB2> INFO: PixTestAlive::maskTest() done
[13:55:12.202] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:55:12.204] <TB2> INFO: ----------------------------------------------------------------------
[13:55:12.204] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:55:12.204] <TB2> INFO: ----------------------------------------------------------------------
[13:55:15.917] <TB2> INFO: Test took 3712ms.
[13:55:15.943] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:16.171] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[13:55:16.171] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:55:16.171] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[13:55:16.184] <TB2> INFO: ######################################################################
[13:55:16.184] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[13:55:16.184] <TB2> INFO: ######################################################################
[13:55:16.186] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[13:55:16.198] <TB2> INFO: dacScan step from 0 .. 29
[13:55:39.631] <TB2> INFO: Test took 23433ms.
[13:55:39.686] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:39.689] <TB2> INFO: dacScan step from 30 .. 59
[13:56:05.069] <TB2> INFO: Test took 25380ms.
[13:56:05.250] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:05.275] <TB2> INFO: dacScan step from 60 .. 89
[13:56:37.598] <TB2> INFO: Test took 32323ms.
[13:56:37.831] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:37.897] <TB2> INFO: dacScan step from 90 .. 119
[13:57:09.758] <TB2> INFO: Test took 31861ms.
[13:57:10.001] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:10.070] <TB2> INFO: dacScan step from 120 .. 149
[13:57:39.459] <TB2> INFO: Test took 29388ms.
[13:57:39.686] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:02.457] <TB2> INFO: PixTestBBMap::doTest() done, duration: 166 seconds
[13:58:02.457] <TB2> INFO: number of dead bumps (per ROC): 5 2 7 3 1 3 2 0 0 0 0 3 2 0 0 20
[13:58:02.457] <TB2> INFO: separation cut (per ROC): 115 75 87 74 97 92 76 84 71 87 65 83 256 69 78 82
[13:58:02.515] <TB2> INFO: ######################################################################
[13:58:02.515] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[13:58:02.515] <TB2> INFO: ######################################################################
[13:58:02.516] <TB2> INFO: ----------------------------------------------------------------------
[13:58:02.516] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[13:58:02.516] <TB2> INFO: ----------------------------------------------------------------------
[13:58:02.516] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[13:58:02.525] <TB2> INFO: dacScan step from 0 .. 3
[13:58:23.734] <TB2> INFO: Test took 21209ms.
[13:58:23.763] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:23.763] <TB2> INFO: dacScan step from 4 .. 7
[13:58:45.304] <TB2> INFO: Test took 21541ms.
[13:58:45.333] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:45.333] <TB2> INFO: dacScan step from 8 .. 11
[13:59:06.792] <TB2> INFO: Test took 21459ms.
[13:59:06.820] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:06.820] <TB2> INFO: dacScan step from 12 .. 15
[13:59:28.488] <TB2> INFO: Test took 21668ms.
[13:59:28.514] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:28.514] <TB2> INFO: dacScan step from 16 .. 19
[13:59:50.021] <TB2> INFO: Test took 21506ms.
[13:59:50.050] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:50.051] <TB2> INFO: dacScan step from 20 .. 23
[14:00:11.231] <TB2> INFO: Test took 21180ms.
[14:00:11.264] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:11.264] <TB2> INFO: dacScan step from 24 .. 27
[14:00:32.613] <TB2> INFO: Test took 21349ms.
[14:00:32.644] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:32.644] <TB2> INFO: dacScan step from 28 .. 31
[14:00:54.263] <TB2> INFO: Test took 21619ms.
[14:00:54.292] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:54.292] <TB2> INFO: dacScan step from 32 .. 35
[14:01:15.827] <TB2> INFO: Test took 21535ms.
[14:01:15.853] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:15.853] <TB2> INFO: dacScan step from 36 .. 39
[14:01:37.539] <TB2> INFO: Test took 21686ms.
[14:01:37.571] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:37.571] <TB2> INFO: dacScan step from 40 .. 43
[14:01:59.472] <TB2> INFO: Test took 21901ms.
[14:01:59.502] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:59.502] <TB2> INFO: dacScan step from 44 .. 47
[14:02:21.170] <TB2> INFO: Test took 21668ms.
[14:02:21.196] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:21.196] <TB2> INFO: dacScan step from 48 .. 51
[14:02:42.663] <TB2> INFO: Test took 21467ms.
[14:02:42.692] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:42.692] <TB2> INFO: dacScan step from 52 .. 55
[14:03:04.062] <TB2> INFO: Test took 21370ms.
[14:03:04.095] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:04.095] <TB2> INFO: dacScan step from 56 .. 59
[14:03:24.855] <TB2> INFO: Test took 20760ms.
[14:03:24.883] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:24.883] <TB2> INFO: dacScan step from 60 .. 63
[14:03:45.875] <TB2> INFO: Test took 20992ms.
[14:03:45.905] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:45.906] <TB2> INFO: dacScan step from 64 .. 67
[14:04:07.668] <TB2> INFO: Test took 21762ms.
[14:04:07.704] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:07.705] <TB2> INFO: dacScan step from 68 .. 71
[14:04:29.502] <TB2> INFO: Test took 21797ms.
[14:04:29.563] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:29.565] <TB2> INFO: dacScan step from 72 .. 75
[14:04:52.870] <TB2> INFO: Test took 23305ms.
[14:04:52.944] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:52.947] <TB2> INFO: dacScan step from 76 .. 79
[14:05:18.502] <TB2> INFO: Test took 25555ms.
[14:05:18.618] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:18.624] <TB2> INFO: dacScan step from 80 .. 83
[14:05:47.967] <TB2> INFO: Test took 29343ms.
[14:05:48.180] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:48.192] <TB2> INFO: dacScan step from 84 .. 87
[14:06:19.023] <TB2> INFO: Test took 30831ms.
[14:06:19.204] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:19.212] <TB2> INFO: dacScan step from 88 .. 91
[14:06:51.065] <TB2> INFO: Test took 31853ms.
[14:06:51.269] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:51.277] <TB2> INFO: dacScan step from 92 .. 95
[14:07:23.899] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[14:07:23.899] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:07:24.315] <TB2> INFO: Test took 33038ms.
[14:07:24.517] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:24.525] <TB2> INFO: dacScan step from 96 .. 99
[14:07:58.012] <TB2> INFO: Test took 33487ms.
[14:07:58.257] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:58.267] <TB2> INFO: dacScan step from 100 .. 103
[14:08:30.767] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (176) != TBM ID (0)
[14:08:30.768] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (1) != Token Chain Length (4)
[14:08:30.768] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (1) != TBM ID (177)
[14:08:30.768] <TB2> WARNING: ROC 1: Readback start marker after 15 readouts!
[14:08:30.768] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[14:08:30.768] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:08:32.091] <TB2> INFO: Test took 33824ms.
[14:08:32.333] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:32.342] <TB2> INFO: dacScan step from 104 .. 107
[14:09:04.681] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[14:09:04.681] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[14:09:04.681] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:09:06.128] <TB2> INFO: Test took 33786ms.
[14:09:06.424] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:06.433] <TB2> INFO: dacScan step from 108 .. 111
[14:09:39.407] <TB2> INFO: Test took 32974ms.
[14:09:39.665] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:39.677] <TB2> INFO: dacScan step from 112 .. 115
[14:10:12.071] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[14:10:12.071] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:10:13.449] <TB2> INFO: Test took 33772ms.
[14:10:13.760] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:13.771] <TB2> INFO: dacScan step from 116 .. 119
[14:10:46.752] <TB2> INFO: Test took 32981ms.
[14:10:46.964] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:46.975] <TB2> INFO: dacScan step from 120 .. 123
[14:11:17.997] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[14:11:17.997] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[14:11:17.997] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:11:19.220] <TB2> INFO: Test took 32245ms.
[14:11:19.520] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:19.535] <TB2> INFO: dacScan step from 124 .. 127
[14:11:52.697] <TB2> INFO: Test took 33161ms.
[14:11:53.006] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:53.019] <TB2> INFO: dacScan step from 128 .. 131
[14:12:26.006] <TB2> INFO: Test took 32987ms.
[14:12:26.208] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:26.217] <TB2> INFO: dacScan step from 132 .. 135
[14:12:58.501] <TB2> INFO: Test took 32283ms.
[14:12:58.731] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:58.741] <TB2> INFO: dacScan step from 136 .. 139
[14:13:31.326] <TB2> INFO: Test took 32585ms.
[14:13:31.582] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:31.593] <TB2> INFO: dacScan step from 140 .. 143
[14:14:05.104] <TB2> INFO: Test took 33511ms.
[14:14:05.357] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:05.373] <TB2> INFO: dacScan step from 144 .. 147
[14:14:39.330] <TB2> INFO: Test took 33957ms.
[14:14:39.538] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:39.548] <TB2> INFO: dacScan step from 148 .. 149
[14:14:58.065] <TB2> INFO: Test took 18517ms.
[14:14:58.167] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:58.172] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:14:59.574] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:15:00.969] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:15:02.326] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:15:03.741] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:15:05.155] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:15:06.596] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:15:08.136] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:15:09.541] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:15:10.942] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:15:12.316] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:15:13.858] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:15:15.628] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:15:15.636] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:15:17.168] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:15:18.620] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:15:20.207] <TB2> INFO: PixTestScurves::scurves() done
[14:15:20.207] <TB2> INFO: Vcal mean: 102.65 74.59 85.31 78.72 82.79 91.17 79.02 80.29 72.64 87.34 77.47 85.11 0.00 78.92 84.61 90.21
[14:15:20.207] <TB2> INFO: Vcal RMS: 6.22 4.67 5.58 4.69 4.89 6.27 4.50 3.96 4.42 5.22 4.66 6.78 0.00 4.59 6.28 5.56
[14:15:20.207] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1037 seconds
[14:15:20.275] <TB2> INFO: ######################################################################
[14:15:20.275] <TB2> INFO: PixTestTrim::doTest()
[14:15:20.275] <TB2> INFO: ######################################################################
[14:15:20.276] <TB2> INFO: ----------------------------------------------------------------------
[14:15:20.276] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[14:15:20.276] <TB2> INFO: ----------------------------------------------------------------------
[14:15:20.363] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[14:15:20.363] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[14:15:20.370] <TB2> INFO: dacScan step from 0 .. 19
[14:15:35.707] <TB2> INFO: Test took 15336ms.
[14:15:35.733] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:35.733] <TB2> INFO: dacScan step from 20 .. 39
[14:15:52.355] <TB2> INFO: Test took 16622ms.
[14:15:52.386] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:52.387] <TB2> INFO: dacScan step from 40 .. 59
[14:16:08.886] <TB2> INFO: Test took 16499ms.
[14:16:08.915] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:08.915] <TB2> INFO: dacScan step from 60 .. 79
[14:16:24.525] <TB2> INFO: Test took 15610ms.
[14:16:24.547] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:24.547] <TB2> INFO: dacScan step from 80 .. 99
[14:16:41.962] <TB2> INFO: Test took 17415ms.
[14:16:42.044] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:42.062] <TB2> INFO: dacScan step from 100 .. 119
[14:17:04.221] <TB2> INFO: Test took 22159ms.
[14:17:04.371] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:04.399] <TB2> INFO: dacScan step from 120 .. 139
[14:17:25.699] <TB2> INFO: Test took 21300ms.
[14:17:25.826] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:25.849] <TB2> INFO: dacScan step from 140 .. 159
[14:17:43.971] <TB2> INFO: Test took 18122ms.
[14:17:44.052] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:05.176] <TB2> INFO: ROC 0 VthrComp = 99
[14:18:05.176] <TB2> INFO: ROC 1 VthrComp = 78
[14:18:05.176] <TB2> INFO: ROC 2 VthrComp = 90
[14:18:05.176] <TB2> INFO: ROC 3 VthrComp = 84
[14:18:05.176] <TB2> INFO: ROC 4 VthrComp = 90
[14:18:05.176] <TB2> INFO: ROC 5 VthrComp = 98
[14:18:05.176] <TB2> INFO: ROC 6 VthrComp = 85
[14:18:05.176] <TB2> INFO: ROC 7 VthrComp = 90
[14:18:05.176] <TB2> INFO: ROC 8 VthrComp = 80
[14:18:05.176] <TB2> INFO: ROC 9 VthrComp = 97
[14:18:05.176] <TB2> INFO: ROC 10 VthrComp = 77
[14:18:05.176] <TB2> INFO: ROC 11 VthrComp = 85
[14:18:05.177] <TB2> INFO: ROC 12 VthrComp = 0
[14:18:05.177] <TB2> INFO: ROC 13 VthrComp = 82
[14:18:05.177] <TB2> INFO: ROC 14 VthrComp = 87
[14:18:05.177] <TB2> INFO: ROC 15 VthrComp = 95
[14:18:05.177] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[14:18:05.177] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[14:18:05.185] <TB2> INFO: dacScan step from 0 .. 19
[14:18:20.956] <TB2> INFO: Test took 15771ms.
[14:18:20.982] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:20.982] <TB2> INFO: dacScan step from 20 .. 39
[14:18:37.216] <TB2> INFO: Test took 16234ms.
[14:18:37.248] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:37.250] <TB2> INFO: dacScan step from 40 .. 59
[14:18:58.702] <TB2> INFO: Test took 21452ms.
[14:18:58.844] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:58.873] <TB2> INFO: dacScan step from 60 .. 79
[14:19:21.813] <TB2> INFO: Test took 22940ms.
[14:19:21.957] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:21.994] <TB2> INFO: dacScan step from 80 .. 99
[14:19:44.602] <TB2> INFO: Test took 22608ms.
[14:19:44.748] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:44.784] <TB2> INFO: dacScan step from 100 .. 119
[14:20:07.020] <TB2> INFO: Test took 22236ms.
[14:20:07.164] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:07.206] <TB2> INFO: dacScan step from 120 .. 139
[14:20:30.512] <TB2> INFO: Test took 23306ms.
[14:20:30.689] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:30.735] <TB2> INFO: dacScan step from 140 .. 159
[14:20:53.395] <TB2> INFO: Test took 22660ms.
[14:20:53.639] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:21.947] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 63.662 for pixel 20/25 mean/min/max = 47.649/31.4105/63.8874
[14:21:21.948] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 59.3049 for pixel 7/65 mean/min/max = 46.8822/34.4312/59.3332
[14:21:21.948] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 59.868 for pixel 1/76 mean/min/max = 46.0576/32.1379/59.9773
[14:21:21.948] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 57.8133 for pixel 14/74 mean/min/max = 44.9121/31.9988/57.8254
[14:21:21.948] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 58.2281 for pixel 19/42 mean/min/max = 45.6352/32.9826/58.2878
[14:21:21.949] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 60.738 for pixel 17/76 mean/min/max = 46.0543/31.3311/60.7776
[14:21:21.949] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 56.6766 for pixel 1/47 mean/min/max = 44.4696/32.045/56.8942
[14:21:21.949] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 56.0963 for pixel 11/14 mean/min/max = 44.4454/32.6244/56.2665
[14:21:21.949] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 55.1263 for pixel 0/10 mean/min/max = 44.1512/32.7153/55.5872
[14:21:21.950] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 56.601 for pixel 9/55 mean/min/max = 43.9972/31.3111/56.6833
[14:21:21.950] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 61.9932 for pixel 0/25 mean/min/max = 48.5907/34.9391/62.2423
[14:21:21.950] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 64.0926 for pixel 0/26 mean/min/max = 47.1331/30.1355/64.1308
[14:21:21.950] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 155.444 for pixel 51/66 mean/min/max = 117.54/77.6093/157.47
[14:21:21.951] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 58.1695 for pixel 2/66 mean/min/max = 45.09/31.953/58.227
[14:21:21.951] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 61.6838 for pixel 16/14 mean/min/max = 46.2544/30.5614/61.9474
[14:21:21.951] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 58.7029 for pixel 6/76 mean/min/max = 45.5037/32.1507/58.8567
[14:21:21.951] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:23:10.054] <TB2> INFO: Test took 108103ms.
[14:23:11.406] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:23:11.413] <TB2> INFO: dacScan step from 0 .. 19
[14:23:36.085] <TB2> INFO: Test took 24672ms.
[14:23:36.141] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:36.143] <TB2> INFO: dacScan step from 20 .. 39
[14:24:07.183] <TB2> INFO: Test took 31040ms.
[14:24:07.453] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:07.493] <TB2> INFO: dacScan step from 40 .. 59
[14:24:42.867] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[14:24:42.867] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:24:43.957] <TB2> INFO: Test took 36464ms.
[14:24:44.249] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:44.294] <TB2> INFO: dacScan step from 60 .. 79
[14:25:19.172] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (8) != Token Chain Length (4)
[14:25:19.172] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (225) != TBM ID (226)
[14:25:19.172] <TB2> WARNING: ROC 0: Readback start marker after 15 readouts!
[14:25:19.172] <TB2> WARNING: ROC 1: Readback start marker after 15 readouts!
[14:25:19.172] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[14:25:19.172] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:25:20.480] <TB2> INFO: Test took 36186ms.
[14:25:20.760] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:20.819] <TB2> INFO: dacScan step from 80 .. 99
[14:25:56.531] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (219) != TBM ID (0)
[14:25:56.531] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[14:25:56.531] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (1) != TBM ID (220)
[14:25:56.531] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:25:57.921] <TB2> INFO: Test took 37102ms.
[14:25:58.198] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:58.242] <TB2> INFO: dacScan step from 100 .. 119
[14:26:34.568] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[14:26:34.569] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[14:26:34.569] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:26:35.964] <TB2> INFO: Test took 37722ms.
[14:26:36.224] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:36.256] <TB2> INFO: dacScan step from 120 .. 139
[14:27:12.603] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (217) != TBM ID (0)
[14:27:12.603] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[14:27:12.603] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (1) != TBM ID (218)
[14:27:12.603] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:27:13.981] <TB2> INFO: Test took 37725ms.
[14:27:14.248] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:14.290] <TB2> INFO: dacScan step from 140 .. 159
[14:27:49.999] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[14:27:49.999] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:27:51.282] <TB2> INFO: Test took 36992ms.
[14:27:51.620] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:51.682] <TB2> INFO: dacScan step from 160 .. 179
[14:28:26.986] <TB2> INFO: Test took 35304ms.
[14:28:27.305] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:27.350] <TB2> INFO: dacScan step from 180 .. 199
[14:29:06.352] <TB2> INFO: Test took 39002ms.
[14:29:06.607] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:34.124] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.015763 .. 255.000000
[14:29:34.225] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[14:29:34.235] <TB2> INFO: dacScan step from 0 .. 19
[14:29:48.870] <TB2> INFO: Test took 14635ms.
[14:29:48.901] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:48.901] <TB2> INFO: dacScan step from 20 .. 39
[14:30:05.350] <TB2> INFO: Test took 16449ms.
[14:30:05.441] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:05.462] <TB2> INFO: dacScan step from 40 .. 59
[14:30:25.294] <TB2> INFO: Test took 19832ms.
[14:30:25.454] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:25.493] <TB2> INFO: dacScan step from 60 .. 79
[14:30:44.058] <TB2> INFO: Test took 18565ms.
[14:30:44.192] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:44.245] <TB2> INFO: dacScan step from 80 .. 99
[14:31:04.235] <TB2> INFO: Test took 19990ms.
[14:31:04.370] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:04.409] <TB2> INFO: dacScan step from 100 .. 119
[14:31:24.323] <TB2> INFO: Test took 19914ms.
[14:31:24.531] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:24.583] <TB2> INFO: dacScan step from 120 .. 139
[14:31:44.041] <TB2> INFO: Test took 19458ms.
[14:31:44.171] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:44.213] <TB2> INFO: dacScan step from 140 .. 159
[14:32:02.816] <TB2> INFO: Test took 18603ms.
[14:32:02.954] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:02.997] <TB2> INFO: dacScan step from 160 .. 179
[14:32:22.419] <TB2> INFO: Test took 19422ms.
[14:32:22.556] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:22.598] <TB2> INFO: dacScan step from 180 .. 199
[14:32:43.111] <TB2> INFO: Test took 20512ms.
[14:32:43.246] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:43.289] <TB2> INFO: dacScan step from 200 .. 219
[14:33:02.717] <TB2> INFO: Test took 19428ms.
[14:33:02.894] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:02.934] <TB2> INFO: dacScan step from 220 .. 239
[14:33:22.053] <TB2> INFO: Test took 19119ms.
[14:33:22.183] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:22.228] <TB2> INFO: dacScan step from 240 .. 255
[14:33:38.507] <TB2> INFO: Test took 16279ms.
[14:33:38.609] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:11.226] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 0.220011 .. 66.653324
[14:34:11.308] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 0 .. 76 (20) hits flags = 16 (plus default)
[14:34:11.316] <TB2> INFO: dacScan step from 0 .. 19
[14:34:25.848] <TB2> INFO: Test took 14531ms.
[14:34:25.874] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:25.874] <TB2> INFO: dacScan step from 20 .. 39
[14:34:42.059] <TB2> INFO: Test took 16185ms.
[14:34:42.136] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:42.151] <TB2> INFO: dacScan step from 40 .. 59
[14:35:02.105] <TB2> INFO: Test took 19954ms.
[14:35:02.242] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:35:02.283] <TB2> INFO: dacScan step from 60 .. 76
[14:35:19.591] <TB2> INFO: Test took 17308ms.
[14:35:19.772] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:35:37.870] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 1.927676 .. 68.500000
[14:35:37.963] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 1 .. 78 (20) hits flags = 16 (plus default)
[14:35:37.970] <TB2> INFO: dacScan step from 1 .. 20
[14:35:52.630] <TB2> INFO: Test took 14659ms.
[14:35:52.655] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:35:52.655] <TB2> INFO: dacScan step from 21 .. 40
[14:36:09.237] <TB2> INFO: Test took 16582ms.
[14:36:09.319] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:09.335] <TB2> INFO: dacScan step from 41 .. 60
[14:36:27.683] <TB2> INFO: Test took 18348ms.
[14:36:27.816] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:27.860] <TB2> INFO: dacScan step from 61 .. 78
[14:36:44.837] <TB2> INFO: Test took 16977ms.
[14:36:44.972] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:37:03.699] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 1.074540 .. 62.620008
[14:37:03.793] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 72 (20) hits flags = 16 (plus default)
[14:37:03.804] <TB2> INFO: dacScan step from 1 .. 20
[14:37:18.632] <TB2> INFO: Test took 14828ms.
[14:37:18.657] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:37:18.657] <TB2> INFO: dacScan step from 21 .. 40
[14:37:35.263] <TB2> INFO: Test took 16606ms.
[14:37:35.379] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:37:35.403] <TB2> INFO: dacScan step from 41 .. 60
[14:37:54.903] <TB2> INFO: Test took 19500ms.
[14:37:55.039] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:37:55.075] <TB2> INFO: dacScan step from 61 .. 72
[14:38:08.213] <TB2> INFO: Test took 13138ms.
[14:38:08.346] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:38:26.927] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[14:38:26.927] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[14:38:26.934] <TB2> INFO: dacScan step from 15 .. 34
[14:38:52.521] <TB2> INFO: Test took 25587ms.
[14:38:52.587] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:38:52.595] <TB2> INFO: dacScan step from 35 .. 54
[14:39:29.705] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[14:39:29.705] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[14:39:29.705] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:39:30.531] <TB2> INFO: Test took 37931ms.
[14:39:30.812] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:30.852] <TB2> INFO: dacScan step from 55 .. 55
[14:39:35.418] <TB2> INFO: Test took 4566ms.
[14:39:35.440] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:48.631] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:39:48.631] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:39:48.631] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:39:48.632] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:39:48.632] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:39:48.632] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:39:48.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:39:48.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:39:48.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:39:48.634] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:39:48.634] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:39:48.634] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:39:48.634] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:39:48.634] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:39:48.635] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:39:48.635] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:39:48.635] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters35_C0.dat
[14:39:48.644] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters35_C1.dat
[14:39:48.650] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters35_C2.dat
[14:39:48.656] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters35_C3.dat
[14:39:48.662] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters35_C4.dat
[14:39:48.668] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters35_C5.dat
[14:39:48.674] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters35_C6.dat
[14:39:48.686] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters35_C7.dat
[14:39:48.698] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters35_C8.dat
[14:39:48.709] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters35_C9.dat
[14:39:48.718] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters35_C10.dat
[14:39:48.724] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters35_C11.dat
[14:39:48.730] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters35_C12.dat
[14:39:48.736] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters35_C13.dat
[14:39:48.742] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters35_C14.dat
[14:39:48.748] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//trimParameters35_C15.dat
[14:39:48.753] <TB2> INFO: PixTestTrim::trimTest() done
[14:39:48.753] <TB2> INFO: vtrim: 129 105 105 100 115 124 93 121 86 122 107 104 135 98 117 111
[14:39:48.753] <TB2> INFO: vthrcomp: 99 78 90 84 90 98 85 90 80 97 77 85 0 82 87 95
[14:39:48.754] <TB2> INFO: vcal mean: 35.07 35.08 35.07 35.09 35.03 35.04 35.10 35.11 35.11 35.03 35.21 35.08 34.21 35.13 35.07 35.03
[14:39:48.754] <TB2> INFO: vcal RMS: 1.11 0.94 1.00 0.98 0.99 1.31 0.94 0.89 0.93 1.02 1.07 1.12 9.51 1.22 1.12 1.05
[14:39:48.754] <TB2> INFO: bits mean: 9.69 9.25 9.60 10.01 9.82 9.92 10.09 9.95 9.97 10.36 8.72 9.56 5.16 10.24 10.23 9.69
[14:39:48.754] <TB2> INFO: bits RMS: 2.48 2.38 2.55 2.49 2.43 2.56 2.47 2.48 2.46 2.41 2.42 2.72 3.59 2.40 2.46 2.63
[14:39:48.758] <TB2> INFO: ----------------------------------------------------------------------
[14:39:48.758] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 240 150 100
[14:39:48.758] <TB2> INFO: ----------------------------------------------------------------------
[14:39:48.761] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:39:48.771] <TB2> INFO: dacScan step from 0 .. 19
[14:40:14.243] <TB2> INFO: Test took 25472ms.
[14:40:14.280] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:40:14.280] <TB2> INFO: dacScan step from 20 .. 39
[14:40:40.237] <TB2> INFO: Test took 25957ms.
[14:40:40.309] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:40:40.313] <TB2> INFO: dacScan step from 40 .. 59
[14:41:13.913] <TB2> INFO: Test took 33600ms.
[14:41:14.141] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:14.169] <TB2> INFO: dacScan step from 60 .. 79
[14:41:50.343] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[14:41:50.344] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:41:51.624] <TB2> INFO: Test took 37455ms.
[14:41:51.865] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:51.896] <TB2> INFO: dacScan step from 80 .. 99
[14:42:30.222] <TB2> INFO: Test took 38326ms.
[14:42:30.465] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:42:30.495] <TB2> INFO: dacScan step from 100 .. 119
[14:43:08.602] <TB2> INFO: Test took 38107ms.
[14:43:08.844] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:08.878] <TB2> INFO: dacScan step from 120 .. 139
[14:43:47.352] <TB2> INFO: Test took 38473ms.
[14:43:47.605] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:47.640] <TB2> INFO: dacScan step from 140 .. 159
[14:44:25.356] <TB2> INFO: Test took 37716ms.
[14:44:25.608] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:25.644] <TB2> INFO: dacScan step from 160 .. 179
[14:45:03.274] <TB2> INFO: Test took 37630ms.
[14:45:03.592] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:03.635] <TB2> INFO: dacScan step from 180 .. 199
[14:45:42.080] <TB2> INFO: Test took 38445ms.
[14:45:42.342] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:06.046] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 170 (20) hits flags = 16 (plus default)
[14:46:06.054] <TB2> INFO: dacScan step from 0 .. 19
[14:46:31.883] <TB2> INFO: Test took 25829ms.
[14:46:31.928] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:31.928] <TB2> INFO: dacScan step from 20 .. 39
[14:46:59.313] <TB2> INFO: Test took 27385ms.
[14:46:59.397] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:59.405] <TB2> INFO: dacScan step from 40 .. 59
[14:47:37.177] <TB2> INFO: Test took 37772ms.
[14:47:37.430] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:37.462] <TB2> INFO: dacScan step from 60 .. 79
[14:48:13.871] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[14:48:13.871] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[14:48:13.871] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:48:15.130] <TB2> INFO: Test took 37668ms.
[14:48:15.375] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:15.407] <TB2> INFO: dacScan step from 80 .. 99
[14:48:50.469] <TB2> INFO: Test took 35062ms.
[14:48:50.724] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:50.768] <TB2> INFO: dacScan step from 100 .. 119
[14:49:28.866] <TB2> INFO: Test took 38098ms.
[14:49:29.139] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:29.193] <TB2> INFO: dacScan step from 120 .. 139
[14:50:07.376] <TB2> INFO: Test took 38183ms.
[14:50:07.733] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:07.769] <TB2> INFO: dacScan step from 140 .. 159
[14:50:45.349] <TB2> INFO: Test took 37580ms.
[14:50:45.681] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:45.735] <TB2> INFO: dacScan step from 160 .. 170
[14:51:07.867] <TB2> INFO: Test took 22131ms.
[14:51:08.009] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:31.127] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 139 (20) hits flags = 16 (plus default)
[14:51:31.135] <TB2> INFO: dacScan step from 0 .. 19
[14:51:56.800] <TB2> INFO: Test took 25665ms.
[14:51:56.849] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:56.849] <TB2> INFO: dacScan step from 20 .. 39
[14:52:25.616] <TB2> INFO: Test took 28767ms.
[14:52:25.786] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:25.808] <TB2> INFO: dacScan step from 40 .. 59
[14:53:02.474] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[14:53:02.474] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:53:03.138] <TB2> INFO: Test took 37329ms.
[14:53:03.450] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:03.483] <TB2> INFO: dacScan step from 60 .. 79
[14:53:40.035] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[14:53:40.035] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:53:41.383] <TB2> INFO: Test took 37900ms.
[14:53:41.633] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:41.668] <TB2> INFO: dacScan step from 80 .. 99
[14:54:18.064] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (8) != Token Chain Length (4)
[14:54:18.065] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (195) != TBM ID (196)
[14:54:18.065] <TB2> WARNING: ROC 0: Readback start marker after 15 readouts!
[14:54:18.065] <TB2> WARNING: ROC 1: Readback start marker after 15 readouts!
[14:54:18.065] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[14:54:18.065] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:54:19.596] <TB2> INFO: Test took 37928ms.
[14:54:19.854] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:19.892] <TB2> INFO: dacScan step from 100 .. 119
[14:54:59.063] <TB2> INFO: Test took 39171ms.
[14:54:59.321] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:59.357] <TB2> INFO: dacScan step from 120 .. 139
[14:55:36.663] <TB2> INFO: Test took 37305ms.
[14:55:36.921] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:58.262] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 121 (20) hits flags = 16 (plus default)
[14:55:58.270] <TB2> INFO: dacScan step from 0 .. 19
[14:56:23.769] <TB2> INFO: Test took 25499ms.
[14:56:23.819] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:23.819] <TB2> INFO: dacScan step from 20 .. 39
[14:56:54.781] <TB2> INFO: Test took 30962ms.
[14:56:54.940] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:54.958] <TB2> INFO: dacScan step from 40 .. 59
[14:57:31.632] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[14:57:31.632] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[14:57:31.632] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:57:32.534] <TB2> INFO: Test took 37575ms.
[14:57:32.790] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:32.822] <TB2> INFO: dacScan step from 60 .. 79
[14:58:09.532] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[14:58:09.532] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:58:11.028] <TB2> INFO: Test took 38206ms.
[14:58:11.275] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:11.309] <TB2> INFO: dacScan step from 80 .. 99
[14:58:48.376] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (8) != Token Chain Length (4)
[14:58:48.376] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (195) != TBM ID (196)
[14:58:48.376] <TB2> WARNING: ROC 0: Readback start marker after 15 readouts!
[14:58:48.376] <TB2> WARNING: ROC 1: Readback start marker after 15 readouts!
[14:58:48.376] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[14:58:48.376] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[14:58:49.797] <TB2> INFO: Test took 38488ms.
[14:58:50.059] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:50.097] <TB2> INFO: dacScan step from 100 .. 119
[14:59:28.605] <TB2> INFO: Test took 38508ms.
[14:59:28.893] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:28.933] <TB2> INFO: dacScan step from 120 .. 121
[14:59:35.378] <TB2> INFO: Test took 6444ms.
[14:59:35.411] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:55.587] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 113 (20) hits flags = 16 (plus default)
[14:59:55.595] <TB2> INFO: dacScan step from 0 .. 19
[15:00:21.987] <TB2> INFO: Test took 26392ms.
[15:00:22.038] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:22.039] <TB2> INFO: dacScan step from 20 .. 39
[15:00:54.652] <TB2> INFO: Test took 32613ms.
[15:00:54.930] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:54.962] <TB2> INFO: dacScan step from 40 .. 59
[15:01:33.195] <TB2> INFO: Test took 38233ms.
[15:01:33.447] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:33.479] <TB2> INFO: dacScan step from 60 .. 79
[15:02:11.247] <TB2> INFO: Test took 37768ms.
[15:02:11.501] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:11.540] <TB2> INFO: dacScan step from 80 .. 99
[15:02:47.024] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[15:02:47.024] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[15:02:47.024] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[15:02:48.342] <TB2> INFO: Test took 36801ms.
[15:02:48.664] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:48.706] <TB2> INFO: dacScan step from 100 .. 113
[15:03:14.066] <TB2> INFO: Test took 25360ms.
[15:03:14.239] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:32.521] <TB2> INFO: PixTestTrim::trimBitTest() done
[15:03:32.522] <TB2> INFO: PixTestTrim::doTest() done, duration: 2892 seconds
[15:03:33.166] <TB2> INFO: ######################################################################
[15:03:33.166] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[15:03:33.166] <TB2> INFO: ######################################################################
[15:03:36.763] <TB2> INFO: Test took 3595ms.
[15:03:36.779] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:40.485] <TB2> INFO: Test took 3509ms.
[15:03:40.538] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:44.091] <TB2> INFO: Test took 3544ms.
[15:03:44.146] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:44.152] <TB2> INFO: The DUT currently contains the following objects:
[15:03:44.152] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:44.152] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:44.152] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:44.152] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:44.152] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:44.152] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:44.152] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:44.152] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:44.153] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:44.153] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:44.153] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:44.153] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:44.153] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:44.153] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:44.153] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:44.153] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:44.153] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:44.153] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:44.153] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:44.153] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:45.253] <TB2> INFO: Test took 1100ms.
[15:03:45.254] <TB2> INFO: The DUT currently contains the following objects:
[15:03:45.254] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:45.254] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:45.254] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:45.254] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:45.254] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:45.254] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:45.254] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:45.254] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:45.254] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:45.254] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:45.254] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:45.254] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:45.254] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:45.254] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:45.254] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:45.254] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:45.254] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:45.254] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:45.254] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:45.254] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:46.382] <TB2> INFO: Test took 1128ms.
[15:03:46.383] <TB2> INFO: The DUT currently contains the following objects:
[15:03:46.383] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:46.383] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:46.383] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:46.383] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:46.383] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:46.383] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:46.383] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:46.383] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:46.383] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:46.383] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:46.383] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:46.383] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:46.383] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:46.383] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:46.383] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:46.383] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:46.383] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:46.383] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:46.383] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:46.383] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:47.483] <TB2> INFO: Test took 1100ms.
[15:03:47.483] <TB2> INFO: The DUT currently contains the following objects:
[15:03:47.483] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:47.483] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:47.483] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:47.483] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:47.483] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:47.483] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:47.483] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:47.483] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:47.483] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:47.483] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:47.483] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:47.483] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:47.483] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:47.483] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:47.483] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:47.483] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:47.483] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:47.483] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:47.483] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:47.483] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:48.583] <TB2> INFO: Test took 1100ms.
[15:03:48.584] <TB2> INFO: The DUT currently contains the following objects:
[15:03:48.584] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:48.584] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:48.584] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:48.584] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:48.584] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:48.584] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:48.584] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:48.584] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:48.584] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:48.584] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:48.584] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:48.584] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:48.584] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:48.584] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:48.584] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:48.584] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:48.584] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:48.584] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:48.584] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:48.584] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:49.741] <TB2> INFO: Test took 1157ms.
[15:03:49.742] <TB2> INFO: The DUT currently contains the following objects:
[15:03:49.742] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:49.742] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:49.742] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:49.742] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:49.742] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:49.742] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:49.742] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:49.742] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:49.742] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:49.742] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:49.742] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:49.742] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:49.742] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:49.742] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:49.742] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:49.742] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:49.742] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:49.742] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:49.742] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:49.742] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:50.856] <TB2> INFO: Test took 1114ms.
[15:03:50.856] <TB2> INFO: The DUT currently contains the following objects:
[15:03:50.856] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:50.856] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:50.856] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:50.856] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:50.856] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:50.856] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:50.856] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:50.856] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:50.856] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:50.856] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:50.856] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:50.856] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:50.856] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:50.856] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:50.856] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:50.856] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:50.856] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:50.856] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:50.856] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:50.856] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:51.985] <TB2> INFO: Test took 1129ms.
[15:03:51.986] <TB2> INFO: The DUT currently contains the following objects:
[15:03:51.986] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:51.986] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:51.986] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:51.986] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:51.986] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:51.986] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:51.986] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:51.986] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:51.986] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:51.986] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:51.986] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:51.986] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:51.986] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:51.986] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:51.986] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:51.986] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:51.986] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:51.986] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:51.986] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:51.986] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:53.086] <TB2> INFO: Test took 1100ms.
[15:03:53.086] <TB2> INFO: The DUT currently contains the following objects:
[15:03:53.086] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:53.086] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:53.086] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:53.086] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:53.086] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:53.086] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:53.086] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:53.086] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:53.086] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:53.086] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:53.086] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:53.086] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:53.086] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:53.086] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:53.086] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:53.086] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:53.086] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:53.086] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:53.086] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:53.086] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:54.186] <TB2> INFO: Test took 1100ms.
[15:03:54.187] <TB2> INFO: The DUT currently contains the following objects:
[15:03:54.187] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:54.187] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:54.187] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:54.187] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:54.187] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:54.187] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:54.187] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:54.187] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:54.187] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:54.187] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:54.187] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:54.187] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:54.187] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:54.187] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:54.187] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:54.187] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:54.187] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:54.187] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:54.187] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:54.187] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:55.301] <TB2> INFO: Test took 1114ms.
[15:03:55.302] <TB2> INFO: The DUT currently contains the following objects:
[15:03:55.302] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:55.302] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:55.302] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:55.302] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:55.302] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:55.302] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:55.302] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:55.302] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:55.302] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:55.302] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:55.302] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:55.302] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:55.302] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:55.302] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:55.302] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:55.302] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:55.302] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:55.302] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:55.302] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:55.302] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:56.417] <TB2> INFO: Test took 1115ms.
[15:03:56.418] <TB2> INFO: The DUT currently contains the following objects:
[15:03:56.418] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:56.418] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:56.418] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:56.418] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:56.418] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:56.418] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:56.418] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:56.418] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:56.418] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:56.418] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:56.418] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:56.418] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:56.418] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:56.418] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:56.418] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:56.418] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:56.418] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:56.418] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:56.418] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:56.418] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:57.533] <TB2> INFO: Test took 1115ms.
[15:03:57.534] <TB2> INFO: The DUT currently contains the following objects:
[15:03:57.534] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:57.534] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:57.534] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:57.534] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:57.534] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:57.534] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:57.534] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:57.534] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:57.534] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:57.534] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:57.534] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:57.534] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:57.534] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:57.534] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:57.534] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:57.534] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:57.534] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:57.534] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:57.534] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:57.534] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:58.632] <TB2> INFO: Test took 1098ms.
[15:03:58.632] <TB2> INFO: The DUT currently contains the following objects:
[15:03:58.632] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:58.632] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:58.632] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:58.632] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:58.632] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:58.632] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:58.633] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:58.633] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:58.633] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:58.633] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:58.633] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:58.633] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:58.633] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:58.633] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:58.633] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:58.633] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:58.633] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:58.633] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:58.633] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:58.633] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:59.763] <TB2> INFO: Test took 1130ms.
[15:03:59.763] <TB2> INFO: The DUT currently contains the following objects:
[15:03:59.763] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:59.763] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:59.763] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:59.763] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:59.763] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:59.763] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:59.763] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:59.763] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:59.764] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:59.764] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:59.764] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:59.764] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:59.764] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:59.764] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:59.764] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:59.764] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:59.764] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:59.764] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:59.764] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:59.764] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:04:00.864] <TB2> INFO: Test took 1100ms.
[15:04:00.865] <TB2> INFO: The DUT currently contains the following objects:
[15:04:00.865] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:04:00.865] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:04:00.865] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:04:00.865] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:04:00.865] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:04:00.865] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:04:00.865] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:04:00.865] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:04:00.865] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:04:00.865] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:04:00.865] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:04:00.865] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:04:00.865] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:04:00.865] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:04:00.865] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:04:00.865] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:04:00.865] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:04:00.865] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:04:00.865] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:04:00.865] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:04:01.995] <TB2> INFO: Test took 1130ms.
[15:04:01.998] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:08:06.947] <TB2> INFO: Test took 244949ms.
[15:08:08.281] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:11.764] <TB2> INFO: Test took 243483ms.
[15:12:13.212] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:13.219] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:13.225] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:13.232] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:13.238] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:13.244] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:13.251] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:13.257] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:13.263] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:13.270] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:13.276] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:13.282] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:13.288] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:13.295] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[15:12:13.301] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[15:12:13.307] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[15:12:13.313] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[15:12:13.320] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[15:12:13.326] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[15:12:13.332] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[15:12:13.338] <TB2> INFO: safety margin for low PH: adding 8, margin is now 28
[15:12:13.345] <TB2> INFO: safety margin for low PH: adding 9, margin is now 29
[15:12:13.351] <TB2> INFO: safety margin for low PH: adding 10, margin is now 30
[15:12:13.357] <TB2> INFO: safety margin for low PH: adding 11, margin is now 31
[15:12:13.363] <TB2> INFO: safety margin for low PH: adding 12, margin is now 32
[15:12:13.370] <TB2> INFO: safety margin for low PH: adding 13, margin is now 33
[15:12:13.376] <TB2> INFO: safety margin for low PH: adding 14, margin is now 34
[15:12:13.382] <TB2> INFO: safety margin for low PH: adding 15, margin is now 35
[15:12:13.388] <TB2> INFO: safety margin for low PH: adding 16, margin is now 36
[15:12:13.394] <TB2> INFO: safety margin for low PH: adding 17, margin is now 37
[15:12:13.401] <TB2> INFO: safety margin for low PH: adding 18, margin is now 38
[15:12:13.407] <TB2> INFO: safety margin for low PH: adding 19, margin is now 39
[15:12:13.413] <TB2> INFO: safety margin for low PH: adding 20, margin is now 40
[15:12:13.419] <TB2> INFO: safety margin for low PH: adding 21, margin is now 41
[15:12:13.426] <TB2> INFO: safety margin for low PH: adding 22, margin is now 42
[15:12:13.432] <TB2> INFO: safety margin for low PH: adding 23, margin is now 43
[15:12:13.438] <TB2> INFO: safety margin for low PH: adding 24, margin is now 44
[15:12:13.444] <TB2> INFO: safety margin for low PH: adding 25, margin is now 45
[15:12:13.451] <TB2> INFO: safety margin for low PH: adding 26, margin is now 46
[15:12:13.457] <TB2> INFO: safety margin for low PH: adding 27, margin is now 47
[15:12:13.463] <TB2> INFO: safety margin for low PH: adding 28, margin is now 48
[15:12:13.469] <TB2> INFO: safety margin for low PH: adding 29, margin is now 49
[15:12:13.476] <TB2> INFO: safety margin for low PH: adding 30, margin is now 50
[15:12:13.482] <TB2> INFO: safety margin for low PH: adding 31, margin is now 51
[15:12:13.488] <TB2> INFO: safety margin for low PH: adding 32, margin is now 52
[15:12:13.494] <TB2> INFO: safety margin for low PH: adding 33, margin is now 53
[15:12:13.500] <TB2> INFO: safety margin for low PH: adding 34, margin is now 54
[15:12:13.507] <TB2> INFO: safety margin for low PH: adding 35, margin is now 55
[15:12:13.513] <TB2> INFO: safety margin for low PH: adding 36, margin is now 56
[15:12:13.519] <TB2> INFO: safety margin for low PH: adding 37, margin is now 57
[15:12:13.525] <TB2> INFO: safety margin for low PH: adding 38, margin is now 58
[15:12:13.532] <TB2> INFO: safety margin for low PH: adding 39, margin is now 59
[15:12:13.538] <TB2> INFO: safety margin for low PH: adding 40, margin is now 60
[15:12:13.544] <TB2> INFO: safety margin for low PH: adding 41, margin is now 61
[15:12:13.550] <TB2> INFO: safety margin for low PH: adding 42, margin is now 62
[15:12:13.557] <TB2> INFO: safety margin for low PH: adding 43, margin is now 63
[15:12:13.563] <TB2> INFO: safety margin for low PH: adding 44, margin is now 64
[15:12:13.569] <TB2> INFO: safety margin for low PH: adding 45, margin is now 65
[15:12:13.575] <TB2> INFO: safety margin for low PH: adding 46, margin is now 66
[15:12:13.582] <TB2> INFO: safety margin for low PH: adding 47, margin is now 67
[15:12:13.588] <TB2> INFO: safety margin for low PH: adding 48, margin is now 68
[15:12:13.594] <TB2> INFO: safety margin for low PH: adding 49, margin is now 69
[15:12:13.600] <TB2> INFO: safety margin for low PH: adding 50, margin is now 70
[15:12:13.607] <TB2> INFO: safety margin for low PH: adding 51, margin is now 71
[15:12:13.613] <TB2> INFO: safety margin for low PH: adding 52, margin is now 72
[15:12:13.619] <TB2> INFO: safety margin for low PH: adding 53, margin is now 73
[15:12:13.625] <TB2> INFO: safety margin for low PH: adding 54, margin is now 74
[15:12:13.632] <TB2> INFO: safety margin for low PH: adding 55, margin is now 75
[15:12:13.638] <TB2> INFO: safety margin for low PH: adding 56, margin is now 76
[15:12:13.644] <TB2> INFO: safety margin for low PH: adding 57, margin is now 77
[15:12:13.650] <TB2> INFO: safety margin for low PH: adding 58, margin is now 78
[15:12:13.657] <TB2> INFO: safety margin for low PH: adding 59, margin is now 79
[15:12:13.663] <TB2> INFO: safety margin for low PH: adding 60, margin is now 80
[15:12:13.669] <TB2> INFO: safety margin for low PH: adding 61, margin is now 81
[15:12:13.675] <TB2> INFO: safety margin for low PH: adding 62, margin is now 82
[15:12:13.682] <TB2> INFO: safety margin for low PH: adding 63, margin is now 83
[15:12:13.688] <TB2> INFO: safety margin for low PH: adding 64, margin is now 84
[15:12:13.694] <TB2> INFO: safety margin for low PH: adding 65, margin is now 85
[15:12:13.700] <TB2> INFO: safety margin for low PH: adding 66, margin is now 86
[15:12:13.706] <TB2> INFO: safety margin for low PH: adding 67, margin is now 87
[15:12:13.713] <TB2> INFO: safety margin for low PH: adding 68, margin is now 88
[15:12:13.719] <TB2> INFO: safety margin for low PH: adding 69, margin is now 89
[15:12:13.725] <TB2> INFO: safety margin for low PH: adding 70, margin is now 90
[15:12:13.731] <TB2> INFO: safety margin for low PH: adding 71, margin is now 91
[15:12:13.738] <TB2> INFO: safety margin for low PH: adding 72, margin is now 92
[15:12:13.744] <TB2> INFO: safety margin for low PH: adding 73, margin is now 93
[15:12:13.750] <TB2> INFO: safety margin for low PH: adding 74, margin is now 94
[15:12:13.756] <TB2> INFO: safety margin for low PH: adding 75, margin is now 95
[15:12:13.763] <TB2> INFO: safety margin for low PH: adding 76, margin is now 96
[15:12:13.769] <TB2> INFO: safety margin for low PH: adding 77, margin is now 97
[15:12:13.775] <TB2> INFO: safety margin for low PH: adding 78, margin is now 98
[15:12:13.781] <TB2> INFO: safety margin for low PH: adding 79, margin is now 99
[15:12:13.787] <TB2> INFO: safety margin for low PH: adding 80, margin is now 100
[15:12:13.794] <TB2> INFO: safety margin for low PH: adding 81, margin is now 101
[15:12:13.800] <TB2> INFO: safety margin for low PH: adding 82, margin is now 102
[15:12:13.806] <TB2> INFO: safety margin for low PH: adding 83, margin is now 103
[15:12:13.812] <TB2> INFO: safety margin for low PH: adding 84, margin is now 104
[15:12:13.819] <TB2> INFO: safety margin for low PH: adding 85, margin is now 105
[15:12:13.825] <TB2> INFO: safety margin for low PH: adding 86, margin is now 106
[15:12:13.831] <TB2> INFO: safety margin for low PH: adding 87, margin is now 107
[15:12:13.837] <TB2> INFO: safety margin for low PH: adding 88, margin is now 108
[15:12:13.844] <TB2> INFO: safety margin for low PH: adding 89, margin is now 109
[15:12:13.850] <TB2> INFO: safety margin for low PH: adding 90, margin is now 110
[15:12:13.856] <TB2> INFO: safety margin for low PH: adding 91, margin is now 111
[15:12:13.862] <TB2> INFO: safety margin for low PH: adding 92, margin is now 112
[15:12:13.869] <TB2> INFO: safety margin for low PH: adding 93, margin is now 113
[15:12:13.875] <TB2> INFO: safety margin for low PH: adding 94, margin is now 114
[15:12:13.881] <TB2> INFO: safety margin for low PH: adding 95, margin is now 115
[15:12:13.887] <TB2> INFO: safety margin for low PH: adding 96, margin is now 116
[15:12:13.894] <TB2> INFO: safety margin for low PH: adding 97, margin is now 117
[15:12:13.900] <TB2> INFO: safety margin for low PH: adding 98, margin is now 118
[15:12:13.906] <TB2> INFO: safety margin for low PH: adding 99, margin is now 119
[15:12:13.912] <TB2> INFO: safety margin for low PH: adding 100, margin is now 120
[15:12:13.919] <TB2> INFO: safety margin for low PH: adding 101, margin is now 121
[15:12:13.925] <TB2> INFO: safety margin for low PH: adding 102, margin is now 122
[15:12:13.931] <TB2> INFO: safety margin for low PH: adding 103, margin is now 123
[15:12:13.937] <TB2> INFO: safety margin for low PH: adding 104, margin is now 124
[15:12:13.944] <TB2> INFO: safety margin for low PH: adding 105, margin is now 125
[15:12:13.950] <TB2> INFO: safety margin for low PH: adding 106, margin is now 126
[15:12:13.956] <TB2> INFO: safety margin for low PH: adding 107, margin is now 127
[15:12:13.962] <TB2> INFO: safety margin for low PH: adding 108, margin is now 128
[15:12:13.969] <TB2> INFO: safety margin for low PH: adding 109, margin is now 129
[15:12:13.975] <TB2> INFO: safety margin for low PH: adding 110, margin is now 130
[15:12:13.981] <TB2> INFO: safety margin for low PH: adding 111, margin is now 131
[15:12:13.987] <TB2> INFO: safety margin for low PH: adding 112, margin is now 132
[15:12:13.994] <TB2> INFO: safety margin for low PH: adding 113, margin is now 133
[15:12:14.000] <TB2> INFO: safety margin for low PH: adding 114, margin is now 134
[15:12:14.006] <TB2> INFO: safety margin for low PH: adding 115, margin is now 135
[15:12:14.014] <TB2> INFO: safety margin for low PH: adding 116, margin is now 136
[15:12:14.020] <TB2> INFO: safety margin for low PH: adding 117, margin is now 137
[15:12:14.027] <TB2> INFO: safety margin for low PH: adding 118, margin is now 138
[15:12:14.033] <TB2> INFO: safety margin for low PH: adding 119, margin is now 139
[15:12:14.039] <TB2> INFO: safety margin for low PH: adding 120, margin is now 140
[15:12:14.046] <TB2> INFO: safety margin for low PH: adding 121, margin is now 141
[15:12:14.052] <TB2> INFO: safety margin for low PH: adding 122, margin is now 142
[15:12:14.058] <TB2> INFO: safety margin for low PH: adding 123, margin is now 143
[15:12:14.065] <TB2> INFO: safety margin for low PH: adding 124, margin is now 144
[15:12:14.071] <TB2> INFO: safety margin for low PH: adding 125, margin is now 145
[15:12:14.077] <TB2> INFO: safety margin for low PH: adding 126, margin is now 146
[15:12:14.084] <TB2> INFO: safety margin for low PH: adding 127, margin is now 147
[15:12:14.090] <TB2> INFO: safety margin for low PH: adding 128, margin is now 148
[15:12:14.096] <TB2> INFO: safety margin for low PH: adding 129, margin is now 149
[15:12:14.103] <TB2> INFO: safety margin for low PH: adding 130, margin is now 150
[15:12:14.109] <TB2> INFO: safety margin for low PH: adding 131, margin is now 151
[15:12:14.115] <TB2> INFO: safety margin for low PH: adding 132, margin is now 152
[15:12:14.121] <TB2> INFO: safety margin for low PH: adding 133, margin is now 153
[15:12:14.128] <TB2> INFO: safety margin for low PH: adding 134, margin is now 154
[15:12:14.134] <TB2> INFO: safety margin for low PH: adding 135, margin is now 155
[15:12:14.140] <TB2> INFO: safety margin for low PH: adding 136, margin is now 156
[15:12:14.146] <TB2> INFO: safety margin for low PH: adding 137, margin is now 157
[15:12:14.153] <TB2> INFO: safety margin for low PH: adding 138, margin is now 158
[15:12:14.159] <TB2> INFO: safety margin for low PH: adding 139, margin is now 159
[15:12:14.165] <TB2> INFO: safety margin for low PH: adding 140, margin is now 160
[15:12:14.171] <TB2> INFO: safety margin for low PH: adding 141, margin is now 161
[15:12:14.177] <TB2> INFO: safety margin for low PH: adding 142, margin is now 162
[15:12:14.184] <TB2> INFO: safety margin for low PH: adding 143, margin is now 163
[15:12:14.190] <TB2> INFO: safety margin for low PH: adding 144, margin is now 164
[15:12:14.196] <TB2> INFO: safety margin for low PH: adding 145, margin is now 165
[15:12:14.202] <TB2> INFO: safety margin for low PH: adding 146, margin is now 166
[15:12:14.209] <TB2> INFO: safety margin for low PH: adding 147, margin is now 167
[15:12:14.215] <TB2> INFO: safety margin for low PH: adding 148, margin is now 168
[15:12:14.221] <TB2> INFO: safety margin for low PH: adding 149, margin is now 169
[15:12:14.228] <TB2> INFO: safety margin for low PH: adding 150, margin is now 170
[15:12:14.234] <TB2> INFO: safety margin for low PH: adding 151, margin is now 171
[15:12:14.240] <TB2> INFO: safety margin for low PH: adding 152, margin is now 172
[15:12:14.246] <TB2> INFO: safety margin for low PH: adding 153, margin is now 173
[15:12:14.253] <TB2> INFO: safety margin for low PH: adding 154, margin is now 174
[15:12:14.259] <TB2> INFO: safety margin for low PH: adding 155, margin is now 175
[15:12:14.265] <TB2> INFO: safety margin for low PH: adding 156, margin is now 176
[15:12:14.271] <TB2> INFO: safety margin for low PH: adding 157, margin is now 177
[15:12:14.278] <TB2> INFO: safety margin for low PH: adding 158, margin is now 178
[15:12:14.284] <TB2> INFO: safety margin for low PH: adding 159, margin is now 179
[15:12:14.290] <TB2> INFO: safety margin for low PH: adding 160, margin is now 180
[15:12:14.296] <TB2> INFO: safety margin for low PH: adding 161, margin is now 181
[15:12:14.302] <TB2> INFO: safety margin for low PH: adding 162, margin is now 182
[15:12:14.309] <TB2> INFO: safety margin for low PH: adding 163, margin is now 183
[15:12:14.315] <TB2> INFO: safety margin for low PH: adding 164, margin is now 184
[15:12:14.321] <TB2> INFO: safety margin for low PH: adding 165, margin is now 185
[15:12:14.328] <TB2> INFO: safety margin for low PH: adding 166, margin is now 186
[15:12:14.334] <TB2> INFO: safety margin for low PH: adding 167, margin is now 187
[15:12:14.340] <TB2> INFO: safety margin for low PH: adding 168, margin is now 188
[15:12:14.346] <TB2> INFO: safety margin for low PH: adding 169, margin is now 189
[15:12:14.352] <TB2> INFO: safety margin for low PH: adding 170, margin is now 190
[15:12:14.359] <TB2> INFO: safety margin for low PH: adding 171, margin is now 191
[15:12:14.365] <TB2> INFO: safety margin for low PH: adding 172, margin is now 192
[15:12:14.371] <TB2> INFO: safety margin for low PH: adding 173, margin is now 193
[15:12:14.378] <TB2> INFO: safety margin for low PH: adding 174, margin is now 194
[15:12:14.384] <TB2> INFO: safety margin for low PH: adding 175, margin is now 195
[15:12:14.390] <TB2> INFO: safety margin for low PH: adding 176, margin is now 196
[15:12:14.396] <TB2> INFO: safety margin for low PH: adding 177, margin is now 197
[15:12:14.403] <TB2> INFO: safety margin for low PH: adding 178, margin is now 198
[15:12:14.409] <TB2> INFO: safety margin for low PH: adding 179, margin is now 199
[15:12:14.415] <TB2> INFO: safety margin for low PH: adding 180, margin is now 200
[15:12:14.421] <TB2> INFO: safety margin for low PH: adding 181, margin is now 201
[15:12:14.428] <TB2> INFO: safety margin for low PH: adding 182, margin is now 202
[15:12:14.434] <TB2> INFO: safety margin for low PH: adding 183, margin is now 203
[15:12:14.440] <TB2> INFO: safety margin for low PH: adding 184, margin is now 204
[15:12:14.446] <TB2> INFO: safety margin for low PH: adding 185, margin is now 205
[15:12:14.453] <TB2> INFO: safety margin for low PH: adding 186, margin is now 206
[15:12:14.459] <TB2> INFO: safety margin for low PH: adding 187, margin is now 207
[15:12:14.465] <TB2> INFO: safety margin for low PH: adding 188, margin is now 208
[15:12:14.471] <TB2> INFO: safety margin for low PH: adding 189, margin is now 209
[15:12:14.478] <TB2> INFO: safety margin for low PH: adding 190, margin is now 210
[15:12:14.484] <TB2> INFO: safety margin for low PH: adding 191, margin is now 211
[15:12:14.490] <TB2> INFO: safety margin for low PH: adding 192, margin is now 212
[15:12:14.496] <TB2> INFO: safety margin for low PH: adding 193, margin is now 213
[15:12:14.503] <TB2> INFO: safety margin for low PH: adding 194, margin is now 214
[15:12:14.509] <TB2> INFO: safety margin for low PH: adding 195, margin is now 215
[15:12:14.515] <TB2> INFO: safety margin for low PH: adding 196, margin is now 216
[15:12:14.521] <TB2> INFO: safety margin for low PH: adding 197, margin is now 217
[15:12:14.528] <TB2> INFO: safety margin for low PH: adding 198, margin is now 218
[15:12:14.534] <TB2> INFO: safety margin for low PH: adding 199, margin is now 219
[15:12:14.540] <TB2> INFO: safety margin for low PH: adding 200, margin is now 220
[15:12:14.547] <TB2> INFO: safety margin for low PH: adding 201, margin is now 221
[15:12:14.553] <TB2> INFO: safety margin for low PH: adding 202, margin is now 222
[15:12:14.559] <TB2> INFO: safety margin for low PH: adding 203, margin is now 223
[15:12:14.565] <TB2> INFO: safety margin for low PH: adding 204, margin is now 224
[15:12:14.572] <TB2> INFO: safety margin for low PH: adding 205, margin is now 225
[15:12:14.578] <TB2> INFO: safety margin for low PH: adding 206, margin is now 226
[15:12:14.584] <TB2> INFO: safety margin for low PH: adding 207, margin is now 227
[15:12:14.591] <TB2> INFO: safety margin for low PH: adding 208, margin is now 228
[15:12:14.597] <TB2> INFO: safety margin for low PH: adding 209, margin is now 229
[15:12:14.603] <TB2> INFO: safety margin for low PH: adding 210, margin is now 230
[15:12:14.609] <TB2> INFO: safety margin for low PH: adding 211, margin is now 231
[15:12:14.616] <TB2> INFO: safety margin for low PH: adding 212, margin is now 232
[15:12:14.622] <TB2> INFO: safety margin for low PH: adding 213, margin is now 233
[15:12:14.628] <TB2> INFO: safety margin for low PH: adding 214, margin is now 234
[15:12:14.635] <TB2> INFO: safety margin for low PH: adding 215, margin is now 235
[15:12:14.641] <TB2> INFO: safety margin for low PH: adding 216, margin is now 236
[15:12:14.647] <TB2> INFO: safety margin for low PH: adding 217, margin is now 237
[15:12:14.653] <TB2> INFO: safety margin for low PH: adding 218, margin is now 238
[15:12:14.660] <TB2> INFO: safety margin for low PH: adding 219, margin is now 239
[15:12:14.666] <TB2> INFO: safety margin for low PH: adding 220, margin is now 240
[15:12:14.672] <TB2> INFO: safety margin for low PH: adding 221, margin is now 241
[15:12:14.679] <TB2> INFO: safety margin for low PH: adding 222, margin is now 242
[15:12:14.685] <TB2> INFO: safety margin for low PH: adding 223, margin is now 243
[15:12:14.691] <TB2> INFO: safety margin for low PH: adding 224, margin is now 244
[15:12:14.698] <TB2> INFO: safety margin for low PH: adding 225, margin is now 245
[15:12:14.704] <TB2> INFO: safety margin for low PH: adding 226, margin is now 246
[15:12:14.710] <TB2> INFO: safety margin for low PH: adding 227, margin is now 247
[15:12:14.716] <TB2> INFO: safety margin for low PH: adding 228, margin is now 248
[15:12:14.723] <TB2> INFO: safety margin for low PH: adding 229, margin is now 249
[15:12:14.729] <TB2> INFO: safety margin for low PH: adding 230, margin is now 250
[15:12:14.735] <TB2> INFO: safety margin for low PH: adding 231, margin is now 251
[15:12:14.742] <TB2> INFO: safety margin for low PH: adding 232, margin is now 252
[15:12:14.748] <TB2> INFO: safety margin for low PH: adding 233, margin is now 253
[15:12:14.754] <TB2> INFO: safety margin for low PH: adding 234, margin is now 254
[15:12:14.761] <TB2> INFO: safety margin for low PH: adding 235, margin is now 255
[15:12:14.767] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:14.773] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:14.779] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:14.813] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C0.dat
[15:12:14.813] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C1.dat
[15:12:14.813] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C2.dat
[15:12:14.813] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C3.dat
[15:12:14.813] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C4.dat
[15:12:14.814] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C5.dat
[15:12:14.814] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C6.dat
[15:12:14.814] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C7.dat
[15:12:14.814] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C8.dat
[15:12:14.814] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C9.dat
[15:12:14.814] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C10.dat
[15:12:14.814] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C11.dat
[15:12:14.814] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C12.dat
[15:12:14.815] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C13.dat
[15:12:14.815] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C14.dat
[15:12:14.815] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//dacParameters35_C15.dat
[15:12:18.322] <TB2> INFO: Test took 3505ms.
[15:12:22.138] <TB2> INFO: Test took 3558ms.
[15:12:25.847] <TB2> INFO: Test took 3451ms.
[15:12:26.114] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:27.027] <TB2> INFO: Test took 913ms.
[15:12:27.029] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:28.145] <TB2> INFO: Test took 1116ms.
[15:12:28.147] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:29.263] <TB2> INFO: Test took 1116ms.
[15:12:29.265] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:30.381] <TB2> INFO: Test took 1116ms.
[15:12:30.383] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:31.499] <TB2> INFO: Test took 1116ms.
[15:12:31.501] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:32.616] <TB2> INFO: Test took 1115ms.
[15:12:32.618] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:33.735] <TB2> INFO: Test took 1117ms.
[15:12:33.737] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:34.854] <TB2> INFO: Test took 1117ms.
[15:12:34.856] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:35.986] <TB2> INFO: Test took 1130ms.
[15:12:35.988] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:37.103] <TB2> INFO: Test took 1115ms.
[15:12:37.105] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:38.221] <TB2> INFO: Test took 1116ms.
[15:12:38.223] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:39.325] <TB2> INFO: Test took 1102ms.
[15:12:39.326] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:40.458] <TB2> INFO: Test took 1132ms.
[15:12:40.459] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:41.590] <TB2> INFO: Test took 1131ms.
[15:12:41.592] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:42.722] <TB2> INFO: Test took 1130ms.
[15:12:42.724] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:43.840] <TB2> INFO: Test took 1116ms.
[15:12:43.842] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:44.944] <TB2> INFO: Test took 1102ms.
[15:12:44.946] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:46.062] <TB2> INFO: Test took 1116ms.
[15:12:46.064] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:47.194] <TB2> INFO: Test took 1130ms.
[15:12:47.196] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:48.298] <TB2> INFO: Test took 1102ms.
[15:12:48.300] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:49.401] <TB2> INFO: Test took 1101ms.
[15:12:49.403] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:50.534] <TB2> INFO: Test took 1131ms.
[15:12:50.536] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:51.638] <TB2> INFO: Test took 1102ms.
[15:12:51.640] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:52.742] <TB2> INFO: Test took 1102ms.
[15:12:52.744] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:53.871] <TB2> INFO: Test took 1127ms.
[15:12:53.873] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:55.028] <TB2> INFO: Test took 1155ms.
[15:12:55.030] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:56.161] <TB2> INFO: Test took 1132ms.
[15:12:56.163] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:57.264] <TB2> INFO: Test took 1101ms.
[15:12:57.266] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:58.367] <TB2> INFO: Test took 1101ms.
[15:12:58.369] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:59.471] <TB2> INFO: Test took 1102ms.
[15:12:59.473] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:00.619] <TB2> INFO: Test took 1146ms.
[15:13:00.621] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:01.737] <TB2> INFO: Test took 1116ms.
[15:13:02.246] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 569 seconds
[15:13:02.246] <TB2> INFO: PH scale (per ROC): 79 81 79 82 84 79 89 85 98 83 93 81 0 83 81 90
[15:13:02.246] <TB2> INFO: PH offset (per ROC): 190 161 158 145 158 169 159 157 142 163 162 153 0 163 170 159
[15:13:02.414] <TB2> INFO: ######################################################################
[15:13:02.414] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[15:13:02.414] <TB2> INFO: ######################################################################
[15:13:02.423] <TB2> INFO: scanning low vcal = 50
[15:13:06.888] <TB2> INFO: Test took 4465ms.
[15:13:06.941] <TB2> INFO: scanning low vcal = 100
[15:13:11.342] <TB2> INFO: Test took 4401ms.
[15:13:11.395] <TB2> INFO: scanning low vcal = 150
[15:13:15.847] <TB2> INFO: Test took 4452ms.
[15:13:15.899] <TB2> INFO: scanning low vcal = 200
[15:13:20.328] <TB2> INFO: Test took 4429ms.
[15:13:20.380] <TB2> INFO: scanning low vcal = 250
[15:13:24.857] <TB2> INFO: Test took 4477ms.
[15:13:24.910] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[15:13:29.373] <TB2> INFO: Test took 4463ms.
[15:13:29.424] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[15:13:33.871] <TB2> INFO: Test took 4447ms.
[15:13:33.923] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[15:13:38.316] <TB2> INFO: Test took 4393ms.
[15:13:38.366] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[15:13:42.873] <TB2> INFO: Test took 4507ms.
[15:13:42.924] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[15:13:47.443] <TB2> INFO: Test took 4519ms.
[15:13:47.724] <TB2> INFO: PixTestGainPedestal::measure() done
[15:14:09.220] <TB2> INFO: PixTestGainPedestal::fit() done
[15:14:09.220] <TB2> INFO: non-linearity mean: 0.961 0.953 0.951 0.956 0.954 0.959 0.954 0.951 0.958 0.950 0.955 0.952 0.000 0.952 0.949 0.953
[15:14:09.220] <TB2> INFO: non-linearity RMS: 0.005 0.006 0.006 0.006 0.006 0.006 0.006 0.007 0.005 0.006 0.007 0.007 0.000 0.006 0.006 0.005
[15:14:09.220] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[15:14:09.238] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[15:14:09.256] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[15:14:09.273] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[15:14:09.291] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[15:14:09.309] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[15:14:09.326] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[15:14:09.344] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[15:14:09.362] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[15:14:09.380] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[15:14:09.397] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[15:14:09.415] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[15:14:09.433] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[15:14:09.446] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[15:14:09.463] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[15:14:09.481] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[15:14:09.498] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 67 seconds
[15:14:09.504] <TB2> INFO: enter test to run
[15:14:09.504] <TB2> INFO: test: exit no parameter change
[15:14:09.965] <TB2> QUIET: Connection to board 156 closed.
[15:14:10.045] <TB2> INFO: pXar: this is the end, my friend