[10:23:16.225] <TB2> INFO: *** Welcome to pxar ***
[10:23:16.225] <TB2> INFO: *** Today: 2015/07/10
[10:23:16.225] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C15.dat
[10:23:16.227] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//tbmParameters_C0b.dat
[10:23:16.227] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//defaultMaskFile.dat
[10:23:16.227] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters_C15.dat
[10:23:16.305] <TB2> INFO: clk: 4
[10:23:16.305] <TB2> INFO: ctr: 4
[10:23:16.305] <TB2> INFO: sda: 19
[10:23:16.305] <TB2> INFO: tin: 9
[10:23:16.305] <TB2> INFO: level: 15
[10:23:16.305] <TB2> INFO: triggerdelay: 0
[10:23:16.305] <TB2> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[10:23:16.305] <TB2> INFO: Log level: INFO
[10:23:16.313] <TB2> INFO: Found DTB DTB_WXC55Z
[10:23:16.324] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[10:23:16.328] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[10:23:16.331] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[10:23:17.925] <TB2> INFO: DUT info:
[10:23:17.925] <TB2> INFO: The DUT currently contains the following objects:
[10:23:17.925] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:23:17.925] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:23:17.925] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:23:17.925] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[10:23:17.925] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[10:23:17.925] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[10:23:17.925] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[10:23:17.925] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[10:23:17.925] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[10:23:17.925] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[10:23:17.925] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[10:23:17.925] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[10:23:17.925] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[10:23:17.925] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[10:23:17.925] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[10:23:17.925] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[10:23:17.925] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[10:23:17.926] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[10:23:17.926] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[10:23:17.926] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[10:23:18.327] <TB2> INFO: enter 'restricted' command line mode
[10:23:18.327] <TB2> INFO: enter test to run
[10:23:18.327] <TB2> INFO: test: pretest no parameter change
[10:23:18.327] <TB2> INFO: running: pretest
[10:23:18.333] <TB2> INFO: ######################################################################
[10:23:18.333] <TB2> INFO: PixTestPretest::doTest()
[10:23:18.333] <TB2> INFO: ######################################################################
[10:23:18.335] <TB2> INFO: ----------------------------------------------------------------------
[10:23:18.335] <TB2> INFO: PixTestPretest::programROC()
[10:23:18.335] <TB2> INFO: ----------------------------------------------------------------------
[10:23:36.352] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[10:23:36.352] <TB2> INFO: IA differences per ROC: 19.3 20.1 16.9 19.3 22.5 19.3 17.7 19.3 20.1 18.5 16.1 18.5 24.9 16.9 20.1 20.1
[10:23:36.422] <TB2> INFO: ----------------------------------------------------------------------
[10:23:36.422] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[10:23:36.422] <TB2> INFO: ----------------------------------------------------------------------
[10:23:55.970] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 376.2 mA = 23.5125 mA/ROC
[10:23:55.973] <TB2> INFO: ----------------------------------------------------------------------
[10:23:55.973] <TB2> INFO: PixTestPretest::findWorkingPixel()
[10:23:55.973] <TB2> INFO: ----------------------------------------------------------------------
[10:24:05.101] <TB2> INFO: Test took 9123ms.
[10:24:05.355] <TB2> INFO: fwp_c12_r22_C12 does not pass: vthrComp = -33 Delta(CalDel) = 61, trying another
[10:24:14.150] <TB2> INFO: Test took 8790ms.
[10:24:14.401] <TB2> INFO: fwp_c5_r5_C12 does not pass: vthrComp = -40 Delta(CalDel) = 62, trying another
[10:24:23.779] <TB2> INFO: Test took 9376ms.
[10:24:24.042] <TB2> INFO: fwp_c15_r26_C12 does not pass: vthrComp = -30 Delta(CalDel) = 61, trying another
[10:24:32.864] <TB2> INFO: Test took 8819ms.
[10:24:33.115] <TB2> INFO: fwp_c20_r32_C12 does not pass: vthrComp = -22 Delta(CalDel) = 61, trying another
[10:24:42.457] <TB2> INFO: Test took 9340ms.
[10:24:42.740] <TB2> INFO: fwp_c25_r36_C12 does not pass: vthrComp = -18 Delta(CalDel) = 63, trying another
[10:24:51.822] <TB2> INFO: Test took 9079ms.
[10:24:52.070] <TB2> INFO: fwp_c30_r42_C12 does not pass: vthrComp = -11 Delta(CalDel) = 62, trying another
[10:25:00.904] <TB2> INFO: Test took 8832ms.
[10:25:01.163] <TB2> INFO: fwp_c35_r50_C12 does not pass: vthrComp = -17 Delta(CalDel) = 61, trying another
[10:25:09.827] <TB2> INFO: Test took 8662ms.
[10:25:10.084] <TB2> INFO: fwp_c40_r60_C12 does not pass: vthrComp = -11 Delta(CalDel) = 61, trying another
[10:25:19.059] <TB2> INFO: Test took 8971ms.
[10:25:19.311] <TB2> INFO: fwp_c45_r70_C12 does not pass: vthrComp = -14 Delta(CalDel) = 62, trying another
[10:25:28.054] <TB2> INFO: Test took 8741ms.
[10:25:28.303] <TB2> INFO: fwp_c50_r75_C12 does not pass: vthrComp = -5 Delta(CalDel) = 61, trying another
[10:25:28.303] <TB2> INFO: Found working pixel in all ROCs: col/row = 50/75
[10:25:28.333] <TB2> INFO: ----------------------------------------------------------------------
[10:25:28.333] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[10:25:28.333] <TB2> INFO: ----------------------------------------------------------------------
[10:25:37.438] <TB2> INFO: Test took 9102ms.
[10:25:37.731] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[10:25:37.731] <TB2> INFO: CalDel: 136 154 125 133 150 142 145 135 132 132 136 152 _ 96 143 144 153
[10:25:37.731] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[10:25:37.734] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C0.dat
[10:25:37.734] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C1.dat
[10:25:37.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C2.dat
[10:25:37.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C3.dat
[10:25:37.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C4.dat
[10:25:37.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C5.dat
[10:25:37.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C6.dat
[10:25:37.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C7.dat
[10:25:37.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C8.dat
[10:25:37.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C9.dat
[10:25:37.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C10.dat
[10:25:37.735] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C11.dat
[10:25:37.736] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C12.dat
[10:25:37.736] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C13.dat
[10:25:37.736] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C14.dat
[10:25:37.736] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters_C15.dat
[10:25:37.736] <TB2> INFO: PixTestPretest::doTest() done, duration: 139 seconds
[10:25:37.806] <TB2> INFO: enter test to run
[10:25:37.806] <TB2> INFO: test: fulltest no parameter change
[10:25:37.806] <TB2> INFO: running: fulltest
[10:25:37.806] <TB2> INFO: ######################################################################
[10:25:37.806] <TB2> INFO: PixTestFullTest::doTest()
[10:25:37.806] <TB2> INFO: ######################################################################
[10:25:37.807] <TB2> INFO: ######################################################################
[10:25:37.807] <TB2> INFO: PixTestAlive::doTest()
[10:25:37.807] <TB2> INFO: ######################################################################
[10:25:37.809] <TB2> INFO: ----------------------------------------------------------------------
[10:25:37.809] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:25:37.809] <TB2> INFO: ----------------------------------------------------------------------
[10:25:41.360] <TB2> INFO: Test took 3550ms.
[10:25:41.379] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:25:41.600] <TB2> INFO: PixTestAlive::aliveTest() done
[10:25:41.600] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 2 0 0 0 0 0 0 4160 0 0 0
[10:25:41.601] <TB2> INFO: ----------------------------------------------------------------------
[10:25:41.601] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:25:41.601] <TB2> INFO: ----------------------------------------------------------------------
[10:25:44.400] <TB2> INFO: Test took 2797ms.
[10:25:44.403] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:25:44.403] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[10:25:44.632] <TB2> INFO: PixTestAlive::maskTest() done
[10:25:44.632] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:25:44.633] <TB2> INFO: ----------------------------------------------------------------------
[10:25:44.633] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[10:25:44.633] <TB2> INFO: ----------------------------------------------------------------------
[10:25:48.405] <TB2> INFO: Test took 3770ms.
[10:25:48.431] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:25:48.663] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[10:25:48.663] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[10:25:48.663] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[10:25:48.676] <TB2> INFO: ######################################################################
[10:25:48.676] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[10:25:48.676] <TB2> INFO: ######################################################################
[10:25:48.678] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[10:25:48.690] <TB2> INFO: dacScan step from 0 .. 29
[10:26:12.173] <TB2> INFO: Test took 23483ms.
[10:26:12.229] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:12.230] <TB2> INFO: dacScan step from 30 .. 59
[10:26:38.675] <TB2> INFO: Test took 26445ms.
[10:26:38.820] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:38.847] <TB2> INFO: dacScan step from 60 .. 89
[10:27:12.098] <TB2> INFO: Test took 33251ms.
[10:27:12.464] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:12.539] <TB2> INFO: dacScan step from 90 .. 119
[10:27:45.111] <TB2> INFO: Test took 32571ms.
[10:27:45.443] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:45.516] <TB2> INFO: dacScan step from 120 .. 149
[10:28:13.704] <TB2> INFO: Test took 28188ms.
[10:28:13.864] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:36.906] <TB2> INFO: PixTestBBMap::doTest() done, duration: 168 seconds
[10:28:36.907] <TB2> INFO: number of dead bumps (per ROC): 2 2 7 3 1 3 2 0 0 0 0 4 0 0 0 22
[10:28:36.907] <TB2> INFO: separation cut (per ROC): 115 75 87 74 94 84 72 69 72 79 68 79 256 70 78 82
[10:28:36.961] <TB2> INFO: ######################################################################
[10:28:36.961] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[10:28:36.961] <TB2> INFO: ######################################################################
[10:28:36.961] <TB2> INFO: ----------------------------------------------------------------------
[10:28:36.961] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[10:28:36.961] <TB2> INFO: ----------------------------------------------------------------------
[10:28:36.961] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[10:28:36.972] <TB2> INFO: dacScan step from 0 .. 3
[10:28:57.698] <TB2> INFO: Test took 20726ms.
[10:28:57.723] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:57.725] <TB2> INFO: dacScan step from 4 .. 7
[10:29:19.082] <TB2> INFO: Test took 21357ms.
[10:29:19.110] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:19.110] <TB2> INFO: dacScan step from 8 .. 11
[10:29:40.722] <TB2> INFO: Test took 21612ms.
[10:29:40.747] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:40.747] <TB2> INFO: dacScan step from 12 .. 15
[10:30:02.328] <TB2> INFO: Test took 21581ms.
[10:30:02.357] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:02.357] <TB2> INFO: dacScan step from 16 .. 19
[10:30:23.260] <TB2> INFO: Test took 20903ms.
[10:30:23.285] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:23.285] <TB2> INFO: dacScan step from 20 .. 23
[10:30:44.560] <TB2> INFO: Test took 21275ms.
[10:30:44.586] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:44.586] <TB2> INFO: dacScan step from 24 .. 27
[10:31:06.382] <TB2> INFO: Test took 21796ms.
[10:31:06.409] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:06.409] <TB2> INFO: dacScan step from 28 .. 31
[10:31:27.573] <TB2> INFO: Test took 21164ms.
[10:31:27.610] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:27.610] <TB2> INFO: dacScan step from 32 .. 35
[10:31:49.417] <TB2> INFO: Test took 21807ms.
[10:31:49.443] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:49.443] <TB2> INFO: dacScan step from 36 .. 39
[10:32:10.920] <TB2> INFO: Test took 21477ms.
[10:32:10.959] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:32:10.959] <TB2> INFO: dacScan step from 40 .. 43
[10:32:32.723] <TB2> INFO: Test took 21764ms.
[10:32:32.752] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:32:32.752] <TB2> INFO: dacScan step from 44 .. 47
[10:32:54.236] <TB2> INFO: Test took 21484ms.
[10:32:54.264] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:32:54.264] <TB2> INFO: dacScan step from 48 .. 51
[10:33:15.231] <TB2> INFO: Test took 20968ms.
[10:33:15.264] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:33:15.264] <TB2> INFO: dacScan step from 52 .. 55
[10:33:36.643] <TB2> INFO: Test took 21379ms.
[10:33:36.673] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:33:36.673] <TB2> INFO: dacScan step from 56 .. 59
[10:33:58.177] <TB2> INFO: Test took 21504ms.
[10:33:58.204] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:33:58.204] <TB2> INFO: dacScan step from 60 .. 63
[10:34:20.359] <TB2> INFO: Test took 22155ms.
[10:34:20.388] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:34:20.389] <TB2> INFO: dacScan step from 64 .. 67
[10:34:42.022] <TB2> INFO: Test took 21633ms.
[10:34:42.061] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:34:42.062] <TB2> INFO: dacScan step from 68 .. 71
[10:35:04.514] <TB2> INFO: Test took 22452ms.
[10:35:04.573] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:35:04.575] <TB2> INFO: dacScan step from 72 .. 75
[10:35:28.938] <TB2> INFO: Test took 24363ms.
[10:35:29.043] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:35:29.047] <TB2> INFO: dacScan step from 76 .. 79
[10:35:54.863] <TB2> INFO: Test took 25816ms.
[10:35:54.977] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:35:54.982] <TB2> INFO: dacScan step from 80 .. 83
[10:36:24.589] <TB2> INFO: Test took 29607ms.
[10:36:24.808] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:36:24.818] <TB2> INFO: dacScan step from 84 .. 87
[10:36:56.687] <TB2> INFO: Test took 31869ms.
[10:36:56.880] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:36:56.890] <TB2> INFO: dacScan step from 88 .. 91
[10:37:29.569] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (0) != Token Chain Length (4)
[10:37:29.570] <TB2> WARNING: ROC 0: Readback start marker after 15 readouts!
[10:37:29.570] <TB2> WARNING: ROC 1: Readback start marker after 15 readouts!
[10:37:29.570] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[10:37:29.570] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[10:37:29.620] <TB2> INFO: Test took 32730ms.
[10:37:29.818] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:37:29.827] <TB2> INFO: dacScan step from 92 .. 95
[10:38:02.963] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[10:38:02.963] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[10:38:02.963] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[10:38:04.002] <TB2> INFO: Test took 34175ms.
[10:38:04.218] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:38:04.228] <TB2> INFO: dacScan step from 96 .. 99
[10:38:37.960] <TB2> INFO: Test took 33732ms.
[10:38:38.203] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:38:38.213] <TB2> INFO: dacScan step from 100 .. 103
[10:39:10.107] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[10:39:10.107] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[10:39:10.107] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[10:39:11.229] <TB2> INFO: Test took 33016ms.
[10:39:11.434] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:39:11.445] <TB2> INFO: dacScan step from 104 .. 107
[10:39:43.131] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[10:39:43.131] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[10:39:43.132] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[10:39:44.644] <TB2> INFO: Test took 33199ms.
[10:39:44.932] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:39:44.945] <TB2> INFO: dacScan step from 108 .. 111
[10:40:16.375] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[10:40:16.375] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[10:40:18.053] <TB2> INFO: Test took 33108ms.
[10:40:18.265] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:40:18.274] <TB2> INFO: dacScan step from 112 .. 115
[10:40:49.429] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (8) != Token Chain Length (4)
[10:40:49.429] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (196) != TBM ID (197)
[10:40:49.429] <TB2> WARNING: ROC 0: Readback start marker after 15 readouts!
[10:40:49.429] <TB2> WARNING: ROC 1: Readback start marker after 15 readouts!
[10:40:49.429] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[10:40:49.429] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[10:40:50.549] <TB2> INFO: Test took 32275ms.
[10:40:50.752] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:40:50.761] <TB2> INFO: dacScan step from 116 .. 119
[10:41:22.379] <TB2> INFO: Test took 31618ms.
[10:41:22.578] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:41:22.588] <TB2> INFO: dacScan step from 120 .. 123
[10:41:55.261] <TB2> INFO: Test took 32673ms.
[10:41:55.469] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:41:55.478] <TB2> INFO: dacScan step from 124 .. 127
[10:42:28.536] <TB2> INFO: Test took 33058ms.
[10:42:28.738] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:42:28.748] <TB2> INFO: dacScan step from 128 .. 131
[10:43:01.935] <TB2> INFO: Test took 33187ms.
[10:43:02.184] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:43:02.195] <TB2> INFO: dacScan step from 132 .. 135
[10:43:35.174] <TB2> INFO: Test took 32979ms.
[10:43:35.382] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:43:35.392] <TB2> INFO: dacScan step from 136 .. 139
[10:44:07.147] <TB2> INFO: Test took 31755ms.
[10:44:07.474] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:44:07.486] <TB2> INFO: dacScan step from 140 .. 143
[10:44:41.063] <TB2> INFO: Test took 33577ms.
[10:44:41.267] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:44:41.276] <TB2> INFO: dacScan step from 144 .. 147
[10:45:15.054] <TB2> INFO: Test took 33778ms.
[10:45:15.262] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:15.273] <TB2> INFO: dacScan step from 148 .. 149
[10:45:34.028] <TB2> INFO: Test took 18755ms.
[10:45:34.140] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:45:34.146] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:45:35.922] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:45:37.546] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:45:39.109] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:45:40.840] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:45:42.237] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:45:43.590] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:45:44.988] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:45:46.390] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:45:47.792] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:45:49.163] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:45:50.631] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:45:52.061] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:45:52.069] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:45:53.540] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:45:54.998] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[10:45:56.578] <TB2> INFO: PixTestScurves::scurves() done
[10:45:56.578] <TB2> INFO: Vcal mean: 102.69 74.25 85.42 78.63 81.87 85.49 76.28 71.32 76.45 82.36 82.02 83.22 0.01 81.49 84.43 90.22
[10:45:56.578] <TB2> INFO: Vcal RMS: 6.23 4.69 5.59 4.69 4.77 5.83 4.58 4.49 4.03 4.64 4.89 6.55 0.43 4.76 6.26 5.57
[10:45:56.578] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1039 seconds
[10:45:56.652] <TB2> INFO: ######################################################################
[10:45:56.652] <TB2> INFO: PixTestTrim::doTest()
[10:45:56.652] <TB2> INFO: ######################################################################
[10:45:56.654] <TB2> INFO: ----------------------------------------------------------------------
[10:45:56.654] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[10:45:56.654] <TB2> INFO: ----------------------------------------------------------------------
[10:45:56.740] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[10:45:56.740] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[10:45:56.747] <TB2> INFO: dacScan step from 0 .. 19
[10:46:13.047] <TB2> INFO: Test took 16300ms.
[10:46:13.075] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:13.075] <TB2> INFO: dacScan step from 20 .. 39
[10:46:29.650] <TB2> INFO: Test took 16574ms.
[10:46:29.685] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:29.686] <TB2> INFO: dacScan step from 40 .. 59
[10:46:45.464] <TB2> INFO: Test took 15778ms.
[10:46:45.484] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:45.484] <TB2> INFO: dacScan step from 60 .. 79
[10:47:01.240] <TB2> INFO: Test took 15755ms.
[10:47:01.261] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:47:01.261] <TB2> INFO: dacScan step from 80 .. 99
[10:47:19.484] <TB2> INFO: Test took 18222ms.
[10:47:19.566] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:47:19.578] <TB2> INFO: dacScan step from 100 .. 119
[10:47:41.536] <TB2> INFO: Test took 21958ms.
[10:47:41.713] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:47:41.746] <TB2> INFO: dacScan step from 120 .. 139
[10:48:02.421] <TB2> INFO: Test took 20675ms.
[10:48:02.550] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:02.581] <TB2> INFO: dacScan step from 140 .. 159
[10:48:20.078] <TB2> INFO: Test took 17496ms.
[10:48:20.134] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:40.984] <TB2> INFO: ROC 0 VthrComp = 100
[10:48:40.984] <TB2> INFO: ROC 1 VthrComp = 78
[10:48:40.984] <TB2> INFO: ROC 2 VthrComp = 90
[10:48:40.984] <TB2> INFO: ROC 3 VthrComp = 84
[10:48:40.984] <TB2> INFO: ROC 4 VthrComp = 89
[10:48:40.984] <TB2> INFO: ROC 5 VthrComp = 91
[10:48:40.984] <TB2> INFO: ROC 6 VthrComp = 81
[10:48:40.985] <TB2> INFO: ROC 7 VthrComp = 77
[10:48:40.985] <TB2> INFO: ROC 8 VthrComp = 85
[10:48:40.985] <TB2> INFO: ROC 9 VthrComp = 90
[10:48:40.985] <TB2> INFO: ROC 10 VthrComp = 83
[10:48:40.985] <TB2> INFO: ROC 11 VthrComp = 83
[10:48:40.985] <TB2> INFO: ROC 12 VthrComp = 1
[10:48:40.985] <TB2> INFO: ROC 13 VthrComp = 85
[10:48:40.985] <TB2> INFO: ROC 14 VthrComp = 87
[10:48:40.986] <TB2> INFO: ROC 15 VthrComp = 95
[10:48:40.986] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[10:48:40.986] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[10:48:40.993] <TB2> INFO: dacScan step from 0 .. 19
[10:48:57.600] <TB2> INFO: Test took 16607ms.
[10:48:57.627] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:48:57.627] <TB2> INFO: dacScan step from 20 .. 39
[10:49:14.454] <TB2> INFO: Test took 16826ms.
[10:49:14.487] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:14.489] <TB2> INFO: dacScan step from 40 .. 59
[10:49:35.863] <TB2> INFO: Test took 21374ms.
[10:49:36.008] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:36.038] <TB2> INFO: dacScan step from 60 .. 79
[10:49:58.533] <TB2> INFO: Test took 22494ms.
[10:49:58.683] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:49:58.727] <TB2> INFO: dacScan step from 80 .. 99
[10:50:21.445] <TB2> INFO: Test took 22718ms.
[10:50:21.677] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:21.731] <TB2> INFO: dacScan step from 100 .. 119
[10:50:44.028] <TB2> INFO: Test took 22297ms.
[10:50:44.258] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:50:44.305] <TB2> INFO: dacScan step from 120 .. 139
[10:51:07.212] <TB2> INFO: Test took 22907ms.
[10:51:07.392] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:07.443] <TB2> INFO: dacScan step from 140 .. 159
[10:51:30.312] <TB2> INFO: Test took 22869ms.
[10:51:30.464] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:54.038] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 62.9748 for pixel 11/78 mean/min/max = 46.9298/30.7239/63.1357
[10:51:54.038] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 59.1294 for pixel 0/17 mean/min/max = 46.7335/34.2731/59.194
[10:51:54.039] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 59.8401 for pixel 7/77 mean/min/max = 46.0775/32.0936/60.0615
[10:51:54.039] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 57.6314 for pixel 0/78 mean/min/max = 44.8951/31.9326/57.8576
[10:51:54.039] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 57.9729 for pixel 21/68 mean/min/max = 45.4219/32.827/58.0168
[10:51:54.040] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 60.7724 for pixel 23/75 mean/min/max = 46.2588/31.6983/60.8194
[10:51:54.040] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 57.0767 for pixel 0/60 mean/min/max = 44.6791/32.2791/57.0791
[10:51:54.040] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 57.1745 for pixel 10/51 mean/min/max = 46.1748/35.1317/57.218
[10:51:54.040] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 55.5348 for pixel 11/79 mean/min/max = 43.926/32.3077/55.5444
[10:51:54.041] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 56.9971 for pixel 51/0 mean/min/max = 44.7579/32.4769/57.0389
[10:51:54.041] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 59.0747 for pixel 0/55 mean/min/max = 45.4389/31.7126/59.1652
[10:51:54.041] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 63.6806 for pixel 0/5 mean/min/max = 47.102/30.3476/63.8565
[10:51:54.042] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 150.184 for pixel 51/66 mean/min/max = 113.352/72.4612/154.242
[10:51:54.042] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 58.2869 for pixel 45/79 mean/min/max = 45.1035/31.8501/58.357
[10:51:54.042] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 61.6636 for pixel 16/14 mean/min/max = 46.148/30.4003/61.8957
[10:51:54.042] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 58.5577 for pixel 33/8 mean/min/max = 45.4558/32.0519/58.8598
[10:51:54.042] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:53:41.494] <TB2> INFO: Test took 107452ms.
[10:53:43.226] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[10:53:43.236] <TB2> INFO: dacScan step from 0 .. 19
[10:54:07.663] <TB2> INFO: Test took 24427ms.
[10:54:07.705] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:54:07.707] <TB2> INFO: dacScan step from 20 .. 39
[10:54:39.160] <TB2> INFO: Test took 31453ms.
[10:54:39.450] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:54:39.487] <TB2> INFO: dacScan step from 40 .. 59
[10:55:15.659] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[10:55:15.659] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[10:55:16.883] <TB2> INFO: Test took 37396ms.
[10:55:17.148] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:55:17.203] <TB2> INFO: dacScan step from 60 .. 79
[10:55:54.376] <TB2> INFO: Test took 37173ms.
[10:55:54.652] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:55:54.706] <TB2> INFO: dacScan step from 80 .. 99
[10:56:30.052] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (244) != TBM ID (0)
[10:56:30.052] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[10:56:30.052] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (1) != TBM ID (245)
[10:56:30.052] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[10:56:31.497] <TB2> INFO: Test took 36791ms.
[10:56:31.866] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:56:31.923] <TB2> INFO: dacScan step from 100 .. 119
[10:57:08.625] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[10:57:08.625] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[10:57:09.896] <TB2> INFO: Test took 37973ms.
[10:57:10.215] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:57:10.268] <TB2> INFO: dacScan step from 120 .. 139
[10:57:46.954] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[10:57:46.954] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[10:57:48.564] <TB2> INFO: Test took 38296ms.
[10:57:48.822] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:57:48.875] <TB2> INFO: dacScan step from 140 .. 159
[10:58:23.721] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[10:58:23.721] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[10:58:25.202] <TB2> INFO: Test took 36327ms.
[10:58:25.497] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:58:25.562] <TB2> INFO: dacScan step from 160 .. 179
[10:59:00.032] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[10:59:00.042] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[10:59:01.452] <TB2> INFO: Test took 35890ms.
[10:59:01.865] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:01.926] <TB2> INFO: dacScan step from 180 .. 199
[10:59:40.821] <TB2> INFO: Test took 38895ms.
[10:59:41.092] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:07.574] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.055510 .. 255.000000
[11:00:07.686] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[11:00:07.696] <TB2> INFO: dacScan step from 0 .. 19
[11:00:22.376] <TB2> INFO: Test took 14680ms.
[11:00:22.398] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:22.398] <TB2> INFO: dacScan step from 20 .. 39
[11:00:38.871] <TB2> INFO: Test took 16473ms.
[11:00:38.972] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:38.992] <TB2> INFO: dacScan step from 40 .. 59
[11:00:58.058] <TB2> INFO: Test took 19066ms.
[11:00:58.254] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:00:58.323] <TB2> INFO: dacScan step from 60 .. 79
[11:01:18.064] <TB2> INFO: Test took 19741ms.
[11:01:18.202] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:18.255] <TB2> INFO: dacScan step from 80 .. 99
[11:01:37.847] <TB2> INFO: Test took 19591ms.
[11:01:37.985] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:38.036] <TB2> INFO: dacScan step from 100 .. 119
[11:01:57.833] <TB2> INFO: Test took 19797ms.
[11:01:57.968] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:01:58.020] <TB2> INFO: dacScan step from 120 .. 139
[11:02:16.462] <TB2> INFO: Test took 18442ms.
[11:02:16.592] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:16.642] <TB2> INFO: dacScan step from 140 .. 159
[11:02:35.990] <TB2> INFO: Test took 19348ms.
[11:02:36.120] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:36.172] <TB2> INFO: dacScan step from 160 .. 179
[11:02:56.280] <TB2> INFO: Test took 20108ms.
[11:02:56.425] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:56.477] <TB2> INFO: dacScan step from 180 .. 199
[11:03:17.397] <TB2> INFO: Test took 20920ms.
[11:03:17.529] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:17.579] <TB2> INFO: dacScan step from 200 .. 219
[11:03:36.470] <TB2> INFO: Test took 18891ms.
[11:03:36.653] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:36.714] <TB2> INFO: dacScan step from 220 .. 239
[11:03:56.407] <TB2> INFO: Test took 19693ms.
[11:03:56.536] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:03:56.585] <TB2> INFO: dacScan step from 240 .. 255
[11:04:12.865] <TB2> INFO: Test took 16280ms.
[11:04:13.013] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:04:45.155] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 0.217261 .. 64.888647
[11:04:45.235] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 0 .. 74 (20) hits flags = 16 (plus default)
[11:04:45.243] <TB2> INFO: dacScan step from 0 .. 19
[11:05:00.003] <TB2> INFO: Test took 14760ms.
[11:05:00.027] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:00.027] <TB2> INFO: dacScan step from 20 .. 39
[11:05:16.497] <TB2> INFO: Test took 16470ms.
[11:05:16.574] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:16.590] <TB2> INFO: dacScan step from 40 .. 59
[11:05:36.533] <TB2> INFO: Test took 19943ms.
[11:05:36.755] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:05:36.811] <TB2> INFO: dacScan step from 60 .. 74
[11:05:52.460] <TB2> INFO: Test took 15649ms.
[11:05:52.586] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:11.532] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 1.031445 .. 67.153809
[11:06:11.612] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 1 .. 77 (20) hits flags = 16 (plus default)
[11:06:11.619] <TB2> INFO: dacScan step from 1 .. 20
[11:06:25.740] <TB2> INFO: Test took 14120ms.
[11:06:25.760] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:25.760] <TB2> INFO: dacScan step from 21 .. 40
[11:06:41.712] <TB2> INFO: Test took 15952ms.
[11:06:41.790] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:41.808] <TB2> INFO: dacScan step from 41 .. 60
[11:07:01.618] <TB2> INFO: Test took 19810ms.
[11:07:01.752] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:07:01.802] <TB2> INFO: dacScan step from 61 .. 77
[11:07:19.297] <TB2> INFO: Test took 17495ms.
[11:07:19.412] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:07:37.352] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 17.912882 .. 61.790330
[11:07:37.431] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 7 .. 71 (20) hits flags = 16 (plus default)
[11:07:37.438] <TB2> INFO: dacScan step from 7 .. 26
[11:07:52.359] <TB2> INFO: Test took 14920ms.
[11:07:52.387] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:07:52.387] <TB2> INFO: dacScan step from 27 .. 46
[11:08:11.061] <TB2> INFO: Test took 18674ms.
[11:08:11.245] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:08:11.286] <TB2> INFO: dacScan step from 47 .. 66
[11:08:31.063] <TB2> INFO: Test took 19777ms.
[11:08:31.204] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:08:31.250] <TB2> INFO: dacScan step from 67 .. 71
[11:08:38.217] <TB2> INFO: Test took 6967ms.
[11:08:38.253] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:08:55.657] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[11:08:55.657] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[11:08:55.665] <TB2> INFO: dacScan step from 15 .. 34
[11:09:21.999] <TB2> INFO: Test took 26334ms.
[11:09:22.069] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:09:22.077] <TB2> INFO: dacScan step from 35 .. 54
[11:09:59.334] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[11:09:59.334] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[11:09:59.334] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[11:09:59.982] <TB2> INFO: Test took 37904ms.
[11:10:00.367] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:10:00.407] <TB2> INFO: dacScan step from 55 .. 55
[11:10:05.076] <TB2> INFO: Test took 4669ms.
[11:10:05.103] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:10:17.791] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C0.dat
[11:10:17.800] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C1.dat
[11:10:17.801] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C2.dat
[11:10:17.801] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C3.dat
[11:10:17.801] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C4.dat
[11:10:17.801] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C5.dat
[11:10:17.801] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C6.dat
[11:10:17.801] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C7.dat
[11:10:17.801] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C8.dat
[11:10:17.801] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C9.dat
[11:10:17.801] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C10.dat
[11:10:17.801] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C11.dat
[11:10:17.801] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C12.dat
[11:10:17.802] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C13.dat
[11:10:17.802] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C14.dat
[11:10:17.802] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C15.dat
[11:10:17.802] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters35_C0.dat
[11:10:17.808] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters35_C1.dat
[11:10:17.814] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters35_C2.dat
[11:10:17.820] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters35_C3.dat
[11:10:17.826] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters35_C4.dat
[11:10:17.832] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters35_C5.dat
[11:10:17.838] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters35_C6.dat
[11:10:17.844] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters35_C7.dat
[11:10:17.850] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters35_C8.dat
[11:10:17.856] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters35_C9.dat
[11:10:17.863] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters35_C10.dat
[11:10:17.869] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters35_C11.dat
[11:10:17.874] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters35_C12.dat
[11:10:17.880] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters35_C13.dat
[11:10:17.886] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters35_C14.dat
[11:10:17.893] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//trimParameters35_C15.dat
[11:10:17.898] <TB2> INFO: PixTestTrim::trimTest() done
[11:10:17.899] <TB2> INFO: vtrim: 118 98 104 93 110 121 85 119 88 113 106 99 134 94 113 116
[11:10:17.899] <TB2> INFO: vthrcomp: 100 78 90 84 89 91 81 77 85 90 83 83 1 85 87 95
[11:10:17.899] <TB2> INFO: vcal mean: 35.02 35.07 35.12 35.05 35.07 35.07 35.13 35.09 35.08 35.08 35.11 35.11 34.27 35.11 35.11 35.04
[11:10:17.899] <TB2> INFO: vcal RMS: 1.06 0.92 1.02 0.98 0.96 1.31 0.95 0.92 0.95 0.99 1.11 1.09 7.94 1.03 1.12 1.06
[11:10:17.899] <TB2> INFO: bits mean: 9.61 8.98 9.54 9.66 9.65 9.98 9.78 9.51 9.93 9.87 9.94 9.46 4.96 9.91 10.10 10.02
[11:10:17.899] <TB2> INFO: bits RMS: 2.67 2.53 2.58 2.66 2.54 2.46 2.57 2.24 2.55 2.46 2.51 2.76 3.66 2.57 2.54 2.47
[11:10:17.903] <TB2> INFO: ----------------------------------------------------------------------
[11:10:17.903] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 240 150 100
[11:10:17.903] <TB2> INFO: ----------------------------------------------------------------------
[11:10:17.906] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[11:10:17.914] <TB2> INFO: dacScan step from 0 .. 19
[11:10:42.926] <TB2> INFO: Test took 25011ms.
[11:10:42.961] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:10:42.961] <TB2> INFO: dacScan step from 20 .. 39
[11:11:08.572] <TB2> INFO: Test took 25611ms.
[11:11:08.622] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:11:08.625] <TB2> INFO: dacScan step from 40 .. 59
[11:11:42.815] <TB2> INFO: Test took 34190ms.
[11:11:43.102] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:11:43.143] <TB2> INFO: dacScan step from 60 .. 79
[11:12:19.679] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (181) != TBM ID (0)
[11:12:19.679] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (1) != Token Chain Length (4)
[11:12:19.680] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (1) != TBM ID (182)
[11:12:19.691] <TB2> WARNING: ROC 1: Readback start marker after 15 readouts!
[11:12:19.691] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[11:12:19.691] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[11:12:21.089] <TB2> INFO: Test took 37946ms.
[11:12:21.330] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:21.372] <TB2> INFO: dacScan step from 80 .. 99
[11:12:59.241] <TB2> INFO: Test took 37869ms.
[11:12:59.578] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:12:59.625] <TB2> INFO: dacScan step from 100 .. 119
[11:13:35.951] <TB2> INFO: Test took 36326ms.
[11:13:36.383] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:13:36.438] <TB2> INFO: dacScan step from 120 .. 139
[11:14:14.349] <TB2> INFO: Test took 37911ms.
[11:14:14.676] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:14.724] <TB2> INFO: dacScan step from 140 .. 159
[11:14:52.141] <TB2> INFO: Test took 37417ms.
[11:14:52.399] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:14:52.448] <TB2> INFO: dacScan step from 160 .. 179
[11:15:30.733] <TB2> INFO: Test took 38285ms.
[11:15:30.989] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:15:31.041] <TB2> INFO: dacScan step from 180 .. 199
[11:16:09.830] <TB2> INFO: Test took 38789ms.
[11:16:10.160] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:34.370] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 166 (20) hits flags = 16 (plus default)
[11:16:34.378] <TB2> INFO: dacScan step from 0 .. 19
[11:16:59.547] <TB2> INFO: Test took 25169ms.
[11:16:59.589] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:59.589] <TB2> INFO: dacScan step from 20 .. 39
[11:17:27.012] <TB2> INFO: Test took 27422ms.
[11:17:27.099] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:17:27.108] <TB2> INFO: dacScan step from 40 .. 59
[11:18:04.165] <TB2> INFO: Test took 37057ms.
[11:18:04.422] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:04.456] <TB2> INFO: dacScan step from 60 .. 79
[11:18:41.408] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (93) != TBM ID (0)
[11:18:41.408] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (1) != Token Chain Length (4)
[11:18:41.408] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (1) != TBM ID (94)
[11:18:41.408] <TB2> WARNING: ROC 1: Readback start marker after 15 readouts!
[11:18:41.408] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[11:18:41.408] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[11:18:42.932] <TB2> INFO: Test took 38476ms.
[11:18:43.199] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:18:43.236] <TB2> INFO: dacScan step from 80 .. 99
[11:19:22.198] <TB2> INFO: Test took 38962ms.
[11:19:22.499] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:19:22.559] <TB2> INFO: dacScan step from 100 .. 119
[11:20:00.674] <TB2> INFO: Test took 38115ms.
[11:20:01.034] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:01.082] <TB2> INFO: dacScan step from 120 .. 139
[11:20:39.831] <TB2> INFO: Test took 38749ms.
[11:20:40.129] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:40.175] <TB2> INFO: dacScan step from 140 .. 159
[11:21:17.688] <TB2> INFO: Test took 37513ms.
[11:21:17.948] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:17.997] <TB2> INFO: dacScan step from 160 .. 166
[11:21:33.321] <TB2> INFO: Test took 15324ms.
[11:21:33.418] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:55.904] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 145 (20) hits flags = 16 (plus default)
[11:21:55.912] <TB2> INFO: dacScan step from 0 .. 19
[11:22:21.514] <TB2> INFO: Test took 25602ms.
[11:22:21.549] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:21.549] <TB2> INFO: dacScan step from 20 .. 39
[11:22:49.930] <TB2> INFO: Test took 28381ms.
[11:22:50.058] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:50.072] <TB2> INFO: dacScan step from 40 .. 59
[11:23:25.467] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[11:23:25.467] <TB2> WARNING: ROC 2: Readback start marker after 31 readouts!
[11:23:25.467] <TB2> WARNING: ROC 3: Readback start marker after 31 readouts!
[11:23:26.186] <TB2> INFO: Test took 36114ms.
[11:23:26.438] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:26.473] <TB2> INFO: dacScan step from 60 .. 79
[11:24:02.839] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[11:24:02.840] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[11:24:02.840] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[11:24:04.524] <TB2> INFO: Test took 38051ms.
[11:24:04.771] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:04.813] <TB2> INFO: dacScan step from 80 .. 99
[11:24:41.546] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[11:24:41.546] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[11:24:41.546] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[11:24:43.258] <TB2> INFO: Test took 38445ms.
[11:24:43.512] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:43.558] <TB2> INFO: dacScan step from 100 .. 119
[11:25:21.018] <TB2> INFO: Test took 37460ms.
[11:25:21.268] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:21.315] <TB2> INFO: dacScan step from 120 .. 139
[11:25:58.223] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (8) != Token Chain Length (4)
[11:25:58.224] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (195) != TBM ID (196)
[11:25:58.224] <TB2> WARNING: ROC 0: Readback start marker after 15 readouts!
[11:25:58.224] <TB2> WARNING: ROC 1: Readback start marker after 15 readouts!
[11:25:58.224] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[11:25:58.224] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[11:25:59.713] <TB2> INFO: Test took 38398ms.
[11:25:59.978] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:00.030] <TB2> INFO: dacScan step from 140 .. 145
[11:26:13.630] <TB2> INFO: Test took 13600ms.
[11:26:13.713] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:35.100] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 120 (20) hits flags = 16 (plus default)
[11:26:35.107] <TB2> INFO: dacScan step from 0 .. 19
[11:27:00.815] <TB2> INFO: Test took 25707ms.
[11:27:00.857] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:00.857] <TB2> INFO: dacScan step from 20 .. 39
[11:27:31.759] <TB2> INFO: Test took 30901ms.
[11:27:31.984] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:32.010] <TB2> INFO: dacScan step from 40 .. 59
[11:28:07.904] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[11:28:07.904] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[11:28:07.904] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[11:28:09.117] <TB2> INFO: Test took 37107ms.
[11:28:09.368] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:09.412] <TB2> INFO: dacScan step from 60 .. 79
[11:28:45.862] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[11:28:45.862] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[11:28:45.862] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[11:28:47.639] <TB2> INFO: Test took 38227ms.
[11:28:47.912] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:47.953] <TB2> INFO: dacScan step from 80 .. 99
[11:29:24.513] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (196) != TBM ID (0)
[11:29:24.513] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[11:29:24.513] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (1) != TBM ID (197)
[11:29:24.513] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[11:29:26.028] <TB2> INFO: Test took 38075ms.
[11:29:26.429] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:29:26.477] <TB2> INFO: dacScan step from 100 .. 119
[11:30:03.516] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[11:30:03.516] <TB2> WARNING: ROC 2: Readback start marker after 15 readouts!
[11:30:03.516] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[11:30:05.078] <TB2> INFO: Test took 38601ms.
[11:30:05.418] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:30:05.466] <TB2> INFO: dacScan step from 120 .. 120
[11:30:10.050] <TB2> INFO: Test took 4584ms.
[11:30:10.070] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:30:29.703] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 111 (20) hits flags = 16 (plus default)
[11:30:29.711] <TB2> INFO: dacScan step from 0 .. 19
[11:30:56.047] <TB2> INFO: Test took 26336ms.
[11:30:56.090] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:30:56.090] <TB2> INFO: dacScan step from 20 .. 39
[11:31:28.879] <TB2> INFO: Test took 32788ms.
[11:31:29.165] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:31:29.198] <TB2> INFO: dacScan step from 40 .. 59
[11:32:07.471] <TB2> INFO: Test took 38273ms.
[11:32:07.716] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:07.754] <TB2> INFO: dacScan step from 60 .. 79
[11:32:45.260] <TB2> INFO: Test took 37506ms.
[11:32:45.521] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:45.563] <TB2> INFO: dacScan step from 80 .. 99
[11:33:19.681] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (90) != TBM ID (0)
[11:33:19.681] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[11:33:19.681] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (1) != TBM ID (91)
[11:33:19.681] <TB2> WARNING: ROC 3: Readback start marker after 15 readouts!
[11:33:21.057] <TB2> INFO: Test took 35494ms.
[11:33:21.326] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:33:21.373] <TB2> INFO: dacScan step from 100 .. 111
[11:33:43.711] <TB2> INFO: Test took 22337ms.
[11:33:43.859] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:02.098] <TB2> INFO: PixTestTrim::trimBitTest() done
[11:34:02.099] <TB2> INFO: PixTestTrim::doTest() done, duration: 2885 seconds
[11:34:02.740] <TB2> INFO: ######################################################################
[11:34:02.741] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[11:34:02.741] <TB2> INFO: ######################################################################
[11:34:06.173] <TB2> INFO: Test took 3431ms.
[11:34:06.201] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:10.065] <TB2> INFO: Test took 3666ms.
[11:34:10.118] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:13.634] <TB2> INFO: Test took 3507ms.
[11:34:13.690] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:13.697] <TB2> INFO: The DUT currently contains the following objects:
[11:34:13.697] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:34:13.697] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:34:13.697] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:34:13.697] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:34:13.697] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:13.697] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:13.697] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:13.697] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:13.697] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:13.697] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:13.697] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:13.697] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:13.697] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:13.697] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:13.697] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:13.697] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:13.697] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:13.697] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:13.697] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:13.697] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:14.813] <TB2> INFO: Test took 1116ms.
[11:34:14.813] <TB2> INFO: The DUT currently contains the following objects:
[11:34:14.813] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:34:14.813] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:34:14.813] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:34:14.813] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:34:14.813] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:14.813] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:14.813] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:14.813] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:14.813] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:14.813] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:14.813] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:14.814] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:14.814] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:14.814] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:14.814] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:14.814] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:14.814] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:14.814] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:14.814] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:14.814] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:15.915] <TB2> INFO: Test took 1101ms.
[11:34:15.916] <TB2> INFO: The DUT currently contains the following objects:
[11:34:15.916] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:34:15.916] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:34:15.916] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:34:15.916] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:34:15.916] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:15.916] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:15.916] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:15.916] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:15.916] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:15.916] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:15.916] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:15.916] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:15.916] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:15.916] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:15.916] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:15.916] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:15.916] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:15.916] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:15.916] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:15.916] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:17.045] <TB2> INFO: Test took 1129ms.
[11:34:17.046] <TB2> INFO: The DUT currently contains the following objects:
[11:34:17.046] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:34:17.046] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:34:17.046] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:34:17.046] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:34:17.046] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:17.046] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:17.046] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:17.046] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:17.046] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:17.046] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:17.046] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:17.046] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:17.046] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:17.046] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:17.046] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:17.046] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:17.046] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:17.046] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:17.046] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:17.046] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:18.161] <TB2> INFO: Test took 1115ms.
[11:34:18.161] <TB2> INFO: The DUT currently contains the following objects:
[11:34:18.161] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:34:18.161] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:34:18.161] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:34:18.161] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:34:18.161] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:18.162] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:18.162] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:18.162] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:18.162] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:18.162] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:18.162] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:18.162] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:18.162] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:18.162] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:18.162] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:18.162] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:18.162] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:18.162] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:18.162] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:18.162] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:19.278] <TB2> INFO: Test took 1116ms.
[11:34:19.278] <TB2> INFO: The DUT currently contains the following objects:
[11:34:19.278] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:34:19.278] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:34:19.278] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:34:19.278] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:34:19.278] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:19.278] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:19.278] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:19.278] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:19.278] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:19.278] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:19.278] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:19.278] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:19.278] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:19.278] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:19.278] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:19.278] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:19.278] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:19.278] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:19.278] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:19.278] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:20.379] <TB2> INFO: Test took 1101ms.
[11:34:20.380] <TB2> INFO: The DUT currently contains the following objects:
[11:34:20.380] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:34:20.380] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:34:20.380] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:34:20.380] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:34:20.380] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:20.380] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:20.380] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:20.380] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:20.380] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:20.380] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:20.380] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:20.380] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:20.380] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:20.380] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:20.380] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:20.380] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:20.380] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:20.380] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:20.380] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:20.380] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:21.496] <TB2> INFO: Test took 1116ms.
[11:34:21.496] <TB2> INFO: The DUT currently contains the following objects:
[11:34:21.496] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:34:21.496] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:34:21.496] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:34:21.496] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:34:21.496] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:21.496] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:21.496] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:21.496] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:21.496] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:21.496] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:21.496] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:21.496] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:21.496] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:21.496] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:21.496] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:21.496] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:21.496] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:21.496] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:21.496] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:21.496] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:22.626] <TB2> INFO: Test took 1130ms.
[11:34:22.627] <TB2> INFO: The DUT currently contains the following objects:
[11:34:22.627] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:34:22.627] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:34:22.627] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:34:22.627] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:34:22.627] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:22.627] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:22.627] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:22.627] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:22.627] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:22.627] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:22.627] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:22.627] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:22.627] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:22.627] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:22.627] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:22.627] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:22.627] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:22.627] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:22.627] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:22.627] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:23.743] <TB2> INFO: Test took 1116ms.
[11:34:23.744] <TB2> INFO: The DUT currently contains the following objects:
[11:34:23.744] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:34:23.744] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:34:23.744] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:34:23.744] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:34:23.744] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:23.744] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:23.744] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:23.744] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:23.744] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:23.744] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:23.744] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:23.744] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:23.744] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:23.744] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:23.744] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:23.744] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:23.744] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:23.744] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:23.744] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:23.744] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:24.846] <TB2> INFO: Test took 1102ms.
[11:34:24.846] <TB2> INFO: The DUT currently contains the following objects:
[11:34:24.846] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:34:24.846] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:34:24.846] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:34:24.846] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:34:24.846] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:24.846] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:24.846] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:24.846] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:24.846] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:24.846] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:24.846] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:24.846] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:24.846] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:24.846] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:24.846] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:24.846] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:24.846] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:24.846] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:24.846] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:24.846] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:25.948] <TB2> INFO: Test took 1102ms.
[11:34:25.948] <TB2> INFO: The DUT currently contains the following objects:
[11:34:25.948] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:34:25.948] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:34:25.948] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:34:25.948] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:34:25.948] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:25.948] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:25.948] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:25.948] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:25.948] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:25.948] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:25.948] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:25.948] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:25.948] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:25.948] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:25.948] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:25.948] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:25.948] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:25.948] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:25.948] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:25.948] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:27.064] <TB2> INFO: Test took 1116ms.
[11:34:27.065] <TB2> INFO: The DUT currently contains the following objects:
[11:34:27.065] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:34:27.065] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:34:27.065] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:34:27.065] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:34:27.065] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:27.065] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:27.065] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:27.065] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:27.065] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:27.065] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:27.065] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:27.065] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:27.065] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:27.065] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:27.065] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:27.065] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:27.065] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:27.065] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:27.065] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:27.065] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:28.164] <TB2> INFO: Test took 1099ms.
[11:34:28.164] <TB2> INFO: The DUT currently contains the following objects:
[11:34:28.164] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:34:28.164] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:34:28.164] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:34:28.164] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:34:28.164] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:28.164] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:28.164] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:28.164] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:28.164] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:28.164] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:28.164] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:28.164] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:28.164] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:28.164] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:28.164] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:28.164] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:28.164] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:28.164] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:28.164] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:28.164] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:29.280] <TB2> INFO: Test took 1116ms.
[11:34:29.281] <TB2> INFO: The DUT currently contains the following objects:
[11:34:29.281] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:34:29.281] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:34:29.281] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:34:29.281] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:34:29.281] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:29.281] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:29.281] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:29.281] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:29.281] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:29.281] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:29.281] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:29.281] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:29.281] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:29.281] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:29.281] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:29.281] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:29.281] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:29.281] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:29.281] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:29.281] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:30.396] <TB2> INFO: Test took 1116ms.
[11:34:30.397] <TB2> INFO: The DUT currently contains the following objects:
[11:34:30.397] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:34:30.397] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:34:30.397] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:34:30.397] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[11:34:30.397] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:30.397] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:30.397] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:30.397] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:30.397] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:30.397] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:30.397] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:30.397] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:30.397] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:30.397] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:30.397] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:30.397] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:30.397] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:30.397] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:30.397] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:30.397] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[11:34:31.499] <TB2> INFO: Test took 1102ms.
[11:34:31.502] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:38:38.069] <TB2> INFO: Test took 246567ms.
[11:38:39.424] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:42:44.736] <TB2> INFO: Test took 245312ms.
[11:42:46.233] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:42:46.240] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:42:46.246] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:42:46.253] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:42:46.259] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:42:46.266] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:42:46.272] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:42:46.279] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:42:46.285] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:42:46.292] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:42:46.298] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:42:46.304] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:42:46.311] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:42:46.317] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:42:46.324] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:42:46.330] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[11:42:46.364] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C0.dat
[11:42:46.364] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C1.dat
[11:42:46.364] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C2.dat
[11:42:46.364] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C3.dat
[11:42:46.364] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C4.dat
[11:42:46.364] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C5.dat
[11:42:46.364] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C6.dat
[11:42:46.364] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C7.dat
[11:42:46.365] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C8.dat
[11:42:46.365] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C9.dat
[11:42:46.365] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C10.dat
[11:42:46.365] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C11.dat
[11:42:46.365] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C12.dat
[11:42:46.365] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C13.dat
[11:42:46.365] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C14.dat
[11:42:46.365] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//dacParameters35_C15.dat
[11:42:50.032] <TB2> INFO: Test took 3664ms.
[11:42:53.903] <TB2> INFO: Test took 3612ms.
[11:42:57.673] <TB2> INFO: Test took 3510ms.
[11:42:57.941] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:42:58.867] <TB2> INFO: Test took 926ms.
[11:42:58.869] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:42:59.969] <TB2> INFO: Test took 1100ms.
[11:42:59.971] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:01.071] <TB2> INFO: Test took 1100ms.
[11:43:01.073] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:02.173] <TB2> INFO: Test took 1100ms.
[11:43:02.175] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:03.290] <TB2> INFO: Test took 1115ms.
[11:43:03.292] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:04.392] <TB2> INFO: Test took 1100ms.
[11:43:04.394] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:05.494] <TB2> INFO: Test took 1100ms.
[11:43:05.495] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:06.609] <TB2> INFO: Test took 1114ms.
[11:43:06.611] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:07.726] <TB2> INFO: Test took 1115ms.
[11:43:07.728] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:08.828] <TB2> INFO: Test took 1100ms.
[11:43:08.830] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:09.973] <TB2> INFO: Test took 1143ms.
[11:43:09.974] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:11.074] <TB2> INFO: Test took 1100ms.
[11:43:11.076] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:12.176] <TB2> INFO: Test took 1100ms.
[11:43:12.178] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:13.278] <TB2> INFO: Test took 1100ms.
[11:43:13.280] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:14.380] <TB2> INFO: Test took 1100ms.
[11:43:14.381] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:15.495] <TB2> INFO: Test took 1114ms.
[11:43:15.497] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:16.611] <TB2> INFO: Test took 1114ms.
[11:43:16.612] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:17.740] <TB2> INFO: Test took 1128ms.
[11:43:17.742] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:18.871] <TB2> INFO: Test took 1129ms.
[11:43:18.873] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:19.972] <TB2> INFO: Test took 1099ms.
[11:43:19.974] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:21.089] <TB2> INFO: Test took 1115ms.
[11:43:21.091] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:22.219] <TB2> INFO: Test took 1128ms.
[11:43:22.221] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:23.321] <TB2> INFO: Test took 1100ms.
[11:43:23.323] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:24.451] <TB2> INFO: Test took 1128ms.
[11:43:24.453] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:25.565] <TB2> INFO: Test took 1112ms.
[11:43:25.566] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:26.707] <TB2> INFO: Test took 1141ms.
[11:43:26.709] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:27.808] <TB2> INFO: Test took 1099ms.
[11:43:27.810] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:28.924] <TB2> INFO: Test took 1114ms.
[11:43:28.926] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:30.040] <TB2> INFO: Test took 1114ms.
[11:43:30.042] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:31.142] <TB2> INFO: Test took 1100ms.
[11:43:31.144] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:32.271] <TB2> INFO: Test took 1129ms.
[11:43:32.273] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:43:33.388] <TB2> INFO: Test took 1115ms.
[11:43:33.890] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 571 seconds
[11:43:33.890] <TB2> INFO: PH scale (per ROC): 79 79 77 83 84 79 89 85 100 83 94 81 70 83 81 86
[11:43:33.890] <TB2> INFO: PH offset (per ROC): 189 164 159 145 158 167 159 157 142 163 162 154 172 164 170 159
[11:43:34.061] <TB2> INFO: ######################################################################
[11:43:34.061] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[11:43:34.061] <TB2> INFO: ######################################################################
[11:43:34.070] <TB2> INFO: scanning low vcal = 50
[11:43:38.670] <TB2> INFO: Test took 4600ms.
[11:43:38.723] <TB2> INFO: scanning low vcal = 100
[11:43:43.244] <TB2> INFO: Test took 4521ms.
[11:43:43.296] <TB2> INFO: scanning low vcal = 150
[11:43:47.713] <TB2> INFO: Test took 4417ms.
[11:43:47.765] <TB2> INFO: scanning low vcal = 200
[11:43:52.182] <TB2> INFO: Test took 4417ms.
[11:43:52.233] <TB2> INFO: scanning low vcal = 250
[11:43:56.654] <TB2> INFO: Test took 4421ms.
[11:43:56.706] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[11:44:01.134] <TB2> INFO: Test took 4428ms.
[11:44:01.184] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[11:44:05.694] <TB2> INFO: Test took 4510ms.
[11:44:05.743] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[11:44:10.289] <TB2> INFO: Test took 4546ms.
[11:44:10.339] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[11:44:14.817] <TB2> INFO: Test took 4478ms.
[11:44:14.866] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[11:44:19.396] <TB2> INFO: Test took 4530ms.
[11:44:19.675] <TB2> INFO: PixTestGainPedestal::measure() done
[11:44:42.520] <TB2> INFO: PixTestGainPedestal::fit() done
[11:44:42.520] <TB2> INFO: non-linearity mean: 0.960 0.950 0.948 0.958 0.954 0.958 0.954 0.952 0.961 0.950 0.956 0.953 1.017 0.954 0.949 0.948
[11:44:42.520] <TB2> INFO: non-linearity RMS: 0.006 0.006 0.006 0.006 0.006 0.006 0.006 0.007 0.004 0.006 0.007 0.006 0.117 0.006 0.006 0.006
[11:44:42.520] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[11:44:42.538] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[11:44:42.555] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[11:44:42.573] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[11:44:42.590] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[11:44:42.608] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[11:44:42.626] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[11:44:42.643] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[11:44:42.661] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[11:44:42.679] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[11:44:42.697] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[11:44:42.715] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[11:44:42.732] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[11:44:42.750] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[11:44:42.767] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[11:44:42.785] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2040_FullQualification_2015-07-10_12h10m_1436523044//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[11:44:42.802] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 68 seconds
[11:44:42.808] <TB2> INFO: enter test to run
[11:44:42.808] <TB2> INFO: test: exit no parameter change
[11:44:43.229] <TB2> QUIET: Connection to board 156 closed.
[11:44:43.309] <TB2> INFO: pXar: this is the end, my friend