[14:44:23.102] <TB2> INFO: *** Welcome to pxar ***
[14:44:23.102] <TB2> INFO: *** Today: 2015/07/08
[14:44:23.102] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C15.dat
[14:44:23.103] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//tbmParameters_C0b.dat
[14:44:23.103] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//defaultMaskFile.dat
[14:44:23.103] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters_C15.dat
[14:44:23.175] <TB2> INFO: clk: 4
[14:44:23.175] <TB2> INFO: ctr: 4
[14:44:23.175] <TB2> INFO: sda: 19
[14:44:23.175] <TB2> INFO: tin: 9
[14:44:23.175] <TB2> INFO: level: 15
[14:44:23.175] <TB2> INFO: triggerdelay: 0
[14:44:23.175] <TB2> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[14:44:23.175] <TB2> INFO: Log level: INFO
[14:44:23.182] <TB2> INFO: Found DTB DTB_WXC55Z
[14:44:23.194] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[14:44:23.197] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 0
HW version:
FW version: 4.0
SW version: 4.0
USB id:
MAC address: 000000000000
Hostname:
Comment:
------------------------------------------------------
[14:44:23.199] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[14:44:24.749] <TB2> INFO: DUT info:
[14:44:24.749] <TB2> INFO: The DUT currently contains the following objects:
[14:44:24.749] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:44:24.749] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:44:24.749] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:44:24.749] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[14:44:24.749] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:24.750] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:24.750] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:24.750] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:24.750] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:24.750] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:24.750] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:24.750] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:24.750] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:24.750] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:24.750] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:24.750] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:24.750] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:24.750] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:24.750] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:24.750] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:25.151] <TB2> INFO: enter 'restricted' command line mode
[14:44:25.151] <TB2> INFO: enter test to run
[14:44:25.151] <TB2> INFO: test: pretest no parameter change
[14:44:25.151] <TB2> INFO: running: pretest
[14:44:25.157] <TB2> INFO: ######################################################################
[14:44:25.157] <TB2> INFO: PixTestPretest::doTest()
[14:44:25.157] <TB2> INFO: ######################################################################
[14:44:25.159] <TB2> INFO: ----------------------------------------------------------------------
[14:44:25.159] <TB2> INFO: PixTestPretest::programROC()
[14:44:25.159] <TB2> INFO: ----------------------------------------------------------------------
[14:44:43.175] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[14:44:43.176] <TB2> INFO: IA differences per ROC: 16.9 17.7 18.5 20.9 19.3 19.3 20.9 20.1 19.3 18.5 18.5 18.5 19.3 18.5 20.1 18.5
[14:44:43.251] <TB2> INFO: ----------------------------------------------------------------------
[14:44:43.251] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[14:44:43.251] <TB2> INFO: ----------------------------------------------------------------------
[14:45:02.803] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 390.7 mA = 24.4187 mA/ROC
[14:45:02.806] <TB2> INFO: ----------------------------------------------------------------------
[14:45:02.808] <TB2> INFO: PixTestPretest::findWorkingPixel()
[14:45:02.808] <TB2> INFO: ----------------------------------------------------------------------
[14:45:12.297] <TB2> INFO: Test took 9484ms.
[14:45:12.594] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[14:45:12.631] <TB2> INFO: ----------------------------------------------------------------------
[14:45:12.632] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[14:45:12.632] <TB2> INFO: ----------------------------------------------------------------------
[14:45:22.210] <TB2> INFO: Test took 9571ms.
[14:45:22.517] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[14:45:22.517] <TB2> INFO: CalDel: 133 140 139 125 132 127 138 129 111 136 108 120 127 116 135 107
[14:45:22.517] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[14:45:22.522] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C0.dat
[14:45:22.522] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C1.dat
[14:45:22.522] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C2.dat
[14:45:22.523] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C3.dat
[14:45:22.523] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C4.dat
[14:45:22.523] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C5.dat
[14:45:22.523] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C6.dat
[14:45:22.524] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C7.dat
[14:45:22.524] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C8.dat
[14:45:22.524] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C9.dat
[14:45:22.524] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C10.dat
[14:45:22.524] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C11.dat
[14:45:22.525] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C12.dat
[14:45:22.525] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C13.dat
[14:45:22.525] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C14.dat
[14:45:22.525] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C15.dat
[14:45:22.525] <TB2> INFO: PixTestPretest::doTest() done, duration: 57 seconds
[14:45:22.631] <TB2> INFO: enter test to run
[14:45:22.631] <TB2> INFO: test: fulltest no parameter change
[14:45:22.631] <TB2> INFO: running: fulltest
[14:45:22.631] <TB2> INFO: ######################################################################
[14:45:22.631] <TB2> INFO: PixTestFullTest::doTest()
[14:45:22.631] <TB2> INFO: ######################################################################
[14:45:22.633] <TB2> INFO: ######################################################################
[14:45:22.633] <TB2> INFO: PixTestAlive::doTest()
[14:45:22.633] <TB2> INFO: ######################################################################
[14:45:22.634] <TB2> INFO: ----------------------------------------------------------------------
[14:45:22.635] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:45:22.635] <TB2> INFO: ----------------------------------------------------------------------
[14:45:26.430] <TB2> INFO: Test took 3794ms.
[14:45:26.453] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:26.680] <TB2> INFO: PixTestAlive::aliveTest() done
[14:45:26.680] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0
[14:45:26.682] <TB2> INFO: ----------------------------------------------------------------------
[14:45:26.682] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:45:26.682] <TB2> INFO: ----------------------------------------------------------------------
[14:45:29.659] <TB2> INFO: Test took 2975ms.
[14:45:29.661] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:29.661] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:45:29.884] <TB2> INFO: PixTestAlive::maskTest() done
[14:45:29.884] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:45:29.886] <TB2> INFO: ----------------------------------------------------------------------
[14:45:29.886] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:45:29.886] <TB2> INFO: ----------------------------------------------------------------------
[14:45:33.573] <TB2> INFO: Test took 3685ms.
[14:45:33.603] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:33.833] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[14:45:33.833] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:45:33.833] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[14:45:33.845] <TB2> INFO: ######################################################################
[14:45:33.845] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[14:45:33.845] <TB2> INFO: ######################################################################
[14:45:33.849] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[14:45:33.866] <TB2> INFO: dacScan step from 0 .. 29
[14:45:57.970] <TB2> INFO: Test took 24104ms.
[14:45:57.997] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:58.001] <TB2> INFO: dacScan step from 30 .. 59
[14:46:23.365] <TB2> INFO: Test took 25364ms.
[14:46:23.468] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:23.478] <TB2> INFO: dacScan step from 60 .. 89
[14:46:56.505] <TB2> INFO: Test took 33027ms.
[14:46:56.771] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:56.843] <TB2> INFO: dacScan step from 90 .. 119
[14:47:28.806] <TB2> INFO: Test took 31963ms.
[14:47:29.062] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:29.143] <TB2> INFO: dacScan step from 120 .. 149
[14:47:58.929] <TB2> INFO: Test took 29786ms.
[14:47:59.147] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:21.886] <TB2> INFO: PixTestBBMap::doTest() done, duration: 168 seconds
[14:48:21.886] <TB2> INFO: number of dead bumps (per ROC): 9 0 0 0 0 0 1 3 2 1 0 1 1 0 1 14
[14:48:21.886] <TB2> INFO: separation cut (per ROC): 81 101 84 106 98 88 105 96 96 71 96 82 97 105 83 102
[14:48:21.977] <TB2> INFO: ######################################################################
[14:48:21.977] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[14:48:21.977] <TB2> INFO: ######################################################################
[14:48:21.977] <TB2> INFO: ----------------------------------------------------------------------
[14:48:21.977] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[14:48:21.977] <TB2> INFO: ----------------------------------------------------------------------
[14:48:21.977] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[14:48:21.987] <TB2> INFO: dacScan step from 0 .. 3
[14:48:44.087] <TB2> INFO: Test took 22100ms.
[14:48:44.115] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:44.115] <TB2> INFO: dacScan step from 4 .. 7
[14:49:06.109] <TB2> INFO: Test took 21994ms.
[14:49:06.134] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:06.134] <TB2> INFO: dacScan step from 8 .. 11
[14:49:28.218] <TB2> INFO: Test took 22084ms.
[14:49:28.244] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:28.244] <TB2> INFO: dacScan step from 12 .. 15
[14:49:50.267] <TB2> INFO: Test took 22023ms.
[14:49:50.295] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:50.295] <TB2> INFO: dacScan step from 16 .. 19
[14:50:12.520] <TB2> INFO: Test took 22226ms.
[14:50:12.551] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:12.551] <TB2> INFO: dacScan step from 20 .. 23
[14:50:34.458] <TB2> INFO: Test took 21907ms.
[14:50:34.484] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:34.484] <TB2> INFO: dacScan step from 24 .. 27
[14:50:56.883] <TB2> INFO: Test took 22399ms.
[14:50:56.909] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:56.909] <TB2> INFO: dacScan step from 28 .. 31
[14:51:19.036] <TB2> INFO: Test took 22127ms.
[14:51:19.068] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:19.068] <TB2> INFO: dacScan step from 32 .. 35
[14:51:41.418] <TB2> INFO: Test took 22350ms.
[14:51:41.444] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:41.444] <TB2> INFO: dacScan step from 36 .. 39
[14:52:03.870] <TB2> INFO: Test took 22426ms.
[14:52:03.902] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:03.902] <TB2> INFO: dacScan step from 40 .. 43
[14:52:26.317] <TB2> INFO: Test took 22415ms.
[14:52:26.344] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:26.344] <TB2> INFO: dacScan step from 44 .. 47
[14:52:48.291] <TB2> INFO: Test took 21947ms.
[14:52:48.326] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:48.326] <TB2> INFO: dacScan step from 48 .. 51
[14:53:10.359] <TB2> INFO: Test took 22033ms.
[14:53:10.393] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:10.393] <TB2> INFO: dacScan step from 52 .. 55
[14:53:32.570] <TB2> INFO: Test took 22177ms.
[14:53:32.602] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:32.602] <TB2> INFO: dacScan step from 56 .. 59
[14:53:55.075] <TB2> INFO: Test took 22473ms.
[14:53:55.108] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:55.108] <TB2> INFO: dacScan step from 60 .. 63
[14:54:17.016] <TB2> INFO: Test took 21908ms.
[14:54:17.048] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:17.048] <TB2> INFO: dacScan step from 64 .. 67
[14:54:39.372] <TB2> INFO: Test took 22324ms.
[14:54:39.402] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:39.402] <TB2> INFO: dacScan step from 68 .. 71
[14:55:01.417] <TB2> INFO: Test took 22015ms.
[14:55:01.448] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:01.449] <TB2> INFO: dacScan step from 72 .. 75
[14:55:24.054] <TB2> INFO: Test took 22605ms.
[14:55:24.098] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:24.099] <TB2> INFO: dacScan step from 76 .. 79
[14:55:48.040] <TB2> INFO: Test took 23941ms.
[14:55:48.097] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:48.099] <TB2> INFO: dacScan step from 80 .. 83
[14:56:14.622] <TB2> INFO: Test took 26523ms.
[14:56:14.724] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:14.728] <TB2> INFO: dacScan step from 84 .. 87
[14:56:43.501] <TB2> INFO: Test took 28773ms.
[14:56:43.633] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:43.638] <TB2> INFO: dacScan step from 88 .. 91
[14:57:13.922] <TB2> INFO: Test took 30284ms.
[14:57:14.070] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:14.076] <TB2> INFO: dacScan step from 92 .. 95
[14:57:46.196] <TB2> INFO: Test took 32120ms.
[14:57:46.392] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:46.400] <TB2> INFO: dacScan step from 96 .. 99
[14:58:19.482] <TB2> INFO: Test took 33082ms.
[14:58:19.680] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:19.692] <TB2> INFO: dacScan step from 100 .. 103
[14:58:53.507] <TB2> INFO: Test took 33815ms.
[14:58:53.718] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:53.728] <TB2> INFO: dacScan step from 104 .. 107



[14:59:27.329] <TB2> INFO: Test took 33601ms.
[14:59:27.548] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:27.559] <TB2> INFO: dacScan step from 108 .. 111






[15:00:02.316] <TB2> INFO: Test took 34757ms.
[15:00:02.531] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:02.543] <TB2> INFO: dacScan step from 112 .. 115



[15:00:37.526] <TB2> INFO: Test took 34983ms.
[15:00:37.794] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:37.807] <TB2> INFO: dacScan step from 116 .. 119






[15:01:12.474] <TB2> INFO: Test took 34667ms.
[15:01:12.700] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:12.713] <TB2> INFO: dacScan step from 120 .. 123



[15:01:48.000] <TB2> INFO: Test took 35287ms.
[15:01:48.286] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:48.301] <TB2> INFO: dacScan step from 124 .. 127







[15:02:23.672] <TB2> INFO: Test took 35371ms.
[15:02:24.042] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:24.059] <TB2> INFO: dacScan step from 128 .. 131





[15:02:56.587] <TB2> INFO: Test took 32528ms.
[15:02:56.881] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:56.895] <TB2> INFO: dacScan step from 132 .. 135






[15:03:31.600] <TB2> INFO: Test took 34705ms.
[15:03:31.871] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:31.887] <TB2> INFO: dacScan step from 136 .. 139


[15:04:06.914] <TB2> INFO: Test took 35027ms.
[15:04:07.177] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:04:07.189] <TB2> INFO: dacScan step from 140 .. 143


[15:04:42.443] <TB2> INFO: Test took 35254ms.
[15:04:42.679] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:04:42.693] <TB2> INFO: dacScan step from 144 .. 147


[15:05:16.342] <TB2> INFO: Test took 33649ms.
[15:05:16.724] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:16.741] <TB2> INFO: dacScan step from 148 .. 149
[15:05:35.585] <TB2> INFO: Test took 18844ms.
[15:05:35.706] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:35.713] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:05:37.493] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:05:39.210] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:05:40.922] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:05:42.737] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:05:44.594] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:05:46.406] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:05:47.991] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:05:49.489] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:05:51.024] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:05:52.615] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:05:54.367] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:05:56.299] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:05:58.056] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:05:59.654] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:06:01.404] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:06:02.932] <TB2> INFO: PixTestScurves::scurves() done
[15:06:02.932] <TB2> INFO: Vcal mean: 84.03 93.55 77.72 92.32 95.61 83.60 98.78 90.08 93.24 81.04 104.59 84.05 104.47 97.35 89.23 107.40
[15:06:02.932] <TB2> INFO: Vcal RMS: 5.15 6.20 4.60 5.61 5.45 4.46 5.56 4.87 5.79 4.61 6.03 4.95 5.87 5.26 4.99 5.14
[15:06:02.932] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1060 seconds
[15:06:03.008] <TB2> INFO: ######################################################################
[15:06:03.008] <TB2> INFO: PixTestTrim::doTest()
[15:06:03.008] <TB2> INFO: ######################################################################
[15:06:03.009] <TB2> INFO: ----------------------------------------------------------------------
[15:06:03.009] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[15:06:03.009] <TB2> INFO: ----------------------------------------------------------------------
[15:06:03.095] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:06:03.095] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[15:06:03.103] <TB2> INFO: dacScan step from 0 .. 19
[15:06:19.814] <TB2> INFO: Test took 16711ms.
[15:06:19.836] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:19.837] <TB2> INFO: dacScan step from 20 .. 39
[15:06:36.298] <TB2> INFO: Test took 16461ms.
[15:06:36.320] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:36.320] <TB2> INFO: dacScan step from 40 .. 59
[15:06:52.838] <TB2> INFO: Test took 16518ms.
[15:06:52.865] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:52.865] <TB2> INFO: dacScan step from 60 .. 79
[15:07:09.667] <TB2> INFO: Test took 16802ms.
[15:07:09.695] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:09.695] <TB2> INFO: dacScan step from 80 .. 99
[15:07:27.240] <TB2> INFO: Test took 17545ms.
[15:07:27.296] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:27.301] <TB2> INFO: dacScan step from 100 .. 119
[15:07:48.529] <TB2> INFO: Test took 21228ms.
[15:07:48.677] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:48.704] <TB2> INFO: dacScan step from 120 .. 139


[15:08:09.951] <TB2> INFO: Test took 21247ms.
[15:08:10.101] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:10.132] <TB2> INFO: dacScan step from 140 .. 159








[15:08:28.899] <TB2> INFO: Test took 18767ms.
[15:08:28.997] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:51.787] <TB2> INFO: ROC 0 VthrComp = 86
[15:08:51.787] <TB2> INFO: ROC 1 VthrComp = 94
[15:08:51.787] <TB2> INFO: ROC 2 VthrComp = 81
[15:08:51.787] <TB2> INFO: ROC 3 VthrComp = 99
[15:08:51.787] <TB2> INFO: ROC 4 VthrComp = 101
[15:08:51.788] <TB2> INFO: ROC 5 VthrComp = 88
[15:08:51.788] <TB2> INFO: ROC 6 VthrComp = 103
[15:08:51.788] <TB2> INFO: ROC 7 VthrComp = 99
[15:08:51.788] <TB2> INFO: ROC 8 VthrComp = 99
[15:08:51.788] <TB2> INFO: ROC 9 VthrComp = 86
[15:08:51.788] <TB2> INFO: ROC 10 VthrComp = 104
[15:08:51.788] <TB2> INFO: ROC 11 VthrComp = 88
[15:08:51.788] <TB2> INFO: ROC 12 VthrComp = 102
[15:08:51.788] <TB2> INFO: ROC 13 VthrComp = 103
[15:08:51.788] <TB2> INFO: ROC 14 VthrComp = 93
[15:08:51.788] <TB2> INFO: ROC 15 VthrComp = 111
[15:08:51.788] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[15:08:51.788] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[15:08:51.797] <TB2> INFO: dacScan step from 0 .. 19
[15:09:08.392] <TB2> INFO: Test took 16595ms.
[15:09:08.415] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:08.415] <TB2> INFO: dacScan step from 20 .. 39
[15:09:25.404] <TB2> INFO: Test took 16989ms.
[15:09:25.437] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:25.441] <TB2> INFO: dacScan step from 40 .. 59
[15:09:47.039] <TB2> INFO: Test took 21598ms.
[15:09:47.190] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:47.225] <TB2> INFO: dacScan step from 60 .. 79
[15:10:10.541] <TB2> INFO: Test took 23316ms.
[15:10:10.717] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:10.767] <TB2> INFO: dacScan step from 80 .. 99
[15:10:34.159] <TB2> INFO: Test took 23392ms.
[15:10:34.334] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:34.385] <TB2> INFO: dacScan step from 100 .. 119
[15:10:57.885] <TB2> INFO: Test took 23500ms.
[15:10:58.048] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:58.102] <TB2> INFO: dacScan step from 120 .. 139
[15:11:21.353] <TB2> INFO: Test took 23251ms.
[15:11:21.514] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:21.557] <TB2> INFO: dacScan step from 140 .. 159
[15:11:44.814] <TB2> INFO: Test took 23257ms.
[15:11:44.972] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:11.051] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 58.1151 for pixel 0/54 mean/min/max = 45.0564/31.9941/58.1186
[15:12:11.051] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 60.3553 for pixel 0/39 mean/min/max = 46.2197/31.9258/60.5135
[15:12:11.051] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 57.5835 for pixel 5/79 mean/min/max = 45.0008/32.2333/57.7684
[15:12:11.051] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 57.6653 for pixel 0/69 mean/min/max = 44.4384/31.1274/57.7495
[15:12:11.052] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 57.2986 for pixel 0/75 mean/min/max = 44.83/32.2465/57.4135
[15:12:11.052] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 56.9282 for pixel 23/76 mean/min/max = 45.7576/34.4771/57.0381
[15:12:11.052] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 57.7758 for pixel 7/79 mean/min/max = 45.2411/32.4594/58.0229
[15:12:11.052] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 55.5646 for pixel 12/13 mean/min/max = 43.4647/31.1387/55.7906
[15:12:11.053] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 59.003 for pixel 6/79 mean/min/max = 45.5323/32.0266/59.038
[15:12:11.053] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 58.5009 for pixel 0/22 mean/min/max = 45.0191/31.5369/58.5013
[15:12:11.053] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 63.0597 for pixel 32/55 mean/min/max = 48.4703/33.6244/63.3161
[15:12:11.053] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 58.7567 for pixel 0/71 mean/min/max = 46.0981/33.3553/58.8409
[15:12:11.054] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 60.2713 for pixel 51/2 mean/min/max = 46.6795/32.9982/60.3609
[15:12:11.054] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 56.9156 for pixel 24/74 mean/min/max = 44.8414/32.5822/57.1005
[15:12:11.054] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 56.4665 for pixel 22/38 mean/min/max = 45.1563/33.5074/56.8052
[15:12:11.054] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 60.6075 for pixel 0/79 mean/min/max = 47.2465/33.8633/60.6298
[15:12:11.054] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:14:03.377] <TB2> INFO: Test took 112323ms.
[15:14:04.863] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[15:14:04.872] <TB2> INFO: dacScan step from 0 .. 19
[15:14:31.128] <TB2> INFO: Test took 26256ms.
[15:14:31.170] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:31.171] <TB2> INFO: dacScan step from 20 .. 39
[15:15:03.710] <TB2> INFO: Test took 32539ms.
[15:15:03.934] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:03.964] <TB2> INFO: dacScan step from 40 .. 59



[15:15:40.863] <TB2> INFO: Test took 36899ms.
[15:15:41.144] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:41.189] <TB2> INFO: dacScan step from 60 .. 79





[15:16:20.087] <TB2> INFO: Test took 38898ms.
[15:16:20.366] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:16:20.423] <TB2> INFO: dacScan step from 80 .. 99






[15:16:59.912] <TB2> INFO: Test took 39489ms.
[15:17:00.183] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:17:00.232] <TB2> INFO: dacScan step from 100 .. 119






[15:17:38.687] <TB2> INFO: Test took 38455ms.
[15:17:38.952] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:17:39.003] <TB2> INFO: dacScan step from 120 .. 139





[15:18:17.974] <TB2> INFO: Test took 38971ms.
[15:18:18.274] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:18:18.325] <TB2> INFO: dacScan step from 140 .. 159







[15:18:57.266] <TB2> INFO: Test took 38941ms.
[15:18:57.549] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:18:57.599] <TB2> INFO: dacScan step from 160 .. 179



[15:19:35.889] <TB2> INFO: Test took 38290ms.
[15:19:36.278] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:19:36.331] <TB2> INFO: dacScan step from 180 .. 199







[15:20:16.052] <TB2> INFO: Test took 39721ms.
[15:20:16.421] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:20:43.711] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.059821 .. 54.641873
[15:20:43.801] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 64 (20) hits flags = 16 (plus default)
[15:20:43.810] <TB2> INFO: dacScan step from 0 .. 19
[15:20:58.366] <TB2> INFO: Test took 14556ms.
[15:20:58.387] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:20:58.387] <TB2> INFO: dacScan step from 20 .. 39
[15:21:14.675] <TB2> INFO: Test took 16288ms.
[15:21:14.757] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:14.774] <TB2> INFO: dacScan step from 40 .. 59
[15:21:33.896] <TB2> INFO: Test took 19122ms.
[15:21:34.039] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:34.090] <TB2> INFO: dacScan step from 60 .. 64
[15:21:41.030] <TB2> INFO: Test took 6940ms.
[15:21:41.087] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:59.432] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 9.835597 .. 47.114716
[15:21:59.520] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 9 .. 57 (20) hits flags = 16 (plus default)
[15:21:59.530] <TB2> INFO: dacScan step from 9 .. 28
[15:22:14.292] <TB2> INFO: Test took 14762ms.
[15:22:14.316] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:14.316] <TB2> INFO: dacScan step from 29 .. 48
[15:22:32.042] <TB2> INFO: Test took 17726ms.
[15:22:32.196] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:32.244] <TB2> INFO: dacScan step from 49 .. 57
[15:22:42.320] <TB2> INFO: Test took 10076ms.
[15:22:42.382] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:57.939] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 16.127411 .. 44.218620
[15:22:58.020] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 6 .. 54 (20) hits flags = 16 (plus default)
[15:22:58.028] <TB2> INFO: dacScan step from 6 .. 25
[15:23:12.777] <TB2> INFO: Test took 14748ms.
[15:23:12.802] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:12.802] <TB2> INFO: dacScan step from 26 .. 45
[15:23:30.636] <TB2> INFO: Test took 17834ms.
[15:23:30.767] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:30.800] <TB2> INFO: dacScan step from 46 .. 54
[15:23:41.523] <TB2> INFO: Test took 10723ms.
[15:23:41.587] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:58.660] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 16.859791 .. 44.218620
[15:23:58.759] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 6 .. 54 (20) hits flags = 16 (plus default)
[15:23:58.769] <TB2> INFO: dacScan step from 6 .. 25
[15:24:12.995] <TB2> INFO: Test took 14226ms.
[15:24:13.014] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:13.014] <TB2> INFO: dacScan step from 26 .. 45
[15:24:30.563] <TB2> INFO: Test took 17549ms.
[15:24:30.680] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:30.711] <TB2> INFO: dacScan step from 46 .. 54
[15:24:41.382] <TB2> INFO: Test took 10671ms.
[15:24:41.450] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:57.167] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[15:24:57.167] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[15:24:57.174] <TB2> INFO: dacScan step from 15 .. 34
[15:25:23.720] <TB2> INFO: Test took 26545ms.
[15:25:23.786] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:23.795] <TB2> INFO: dacScan step from 35 .. 54




[15:26:02.111] <TB2> INFO: Test took 38316ms.
[15:26:02.418] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:02.471] <TB2> INFO: dacScan step from 55 .. 55
[15:26:07.131] <TB2> INFO: Test took 4660ms.
[15:26:07.151] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:21.561] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C0.dat
[15:26:21.568] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C1.dat
[15:26:21.568] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C2.dat
[15:26:21.568] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C3.dat
[15:26:21.568] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C4.dat
[15:26:21.569] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C5.dat
[15:26:21.569] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C6.dat
[15:26:21.569] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C7.dat
[15:26:21.569] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C8.dat
[15:26:21.569] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C9.dat
[15:26:21.570] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C10.dat
[15:26:21.570] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C11.dat
[15:26:21.570] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C12.dat
[15:26:21.570] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C13.dat
[15:26:21.571] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C14.dat
[15:26:21.571] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C15.dat
[15:26:21.571] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C0.dat
[15:26:21.582] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C1.dat
[15:26:21.588] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C2.dat
[15:26:21.594] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C3.dat
[15:26:21.600] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C4.dat
[15:26:21.610] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C5.dat
[15:26:21.617] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C6.dat
[15:26:21.623] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C7.dat
[15:26:21.629] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C8.dat
[15:26:21.635] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C9.dat
[15:26:21.642] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C10.dat
[15:26:21.648] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C11.dat
[15:26:21.655] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C12.dat
[15:26:21.661] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C13.dat
[15:26:21.667] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C14.dat
[15:26:21.674] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C15.dat
[15:26:21.681] <TB2> INFO: PixTestTrim::trimTest() done
[15:26:21.681] <TB2> INFO: vtrim: 87 106 99 103 105 99 108 117 119 106 132 99 104 115 106 114
[15:26:21.681] <TB2> INFO: vthrcomp: 86 94 81 99 101 88 103 99 99 86 104 88 102 103 93 111
[15:26:21.681] <TB2> INFO: vcal mean: 35.07 35.09 35.07 35.05 35.05 35.07 35.05 35.07 35.04 35.06 35.11 35.08 35.08 35.07 35.13 35.10
[15:26:21.681] <TB2> INFO: vcal RMS: 1.05 1.02 0.95 1.03 1.06 0.92 1.01 1.03 1.03 1.07 1.10 0.98 1.21 1.05 1.03 1.00
[15:26:21.681] <TB2> INFO: bits mean: 9.60 9.10 9.86 9.70 9.59 9.17 9.34 10.72 9.79 9.84 9.33 8.92 9.23 10.10 9.80 9.01
[15:26:21.681] <TB2> INFO: bits RMS: 2.77 2.90 2.54 2.83 2.71 2.52 2.76 2.36 2.63 2.70 2.37 2.72 2.65 2.40 2.38 2.56
[15:26:21.686] <TB2> INFO: ----------------------------------------------------------------------
[15:26:21.686] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 240 150 100
[15:26:21.686] <TB2> INFO: ----------------------------------------------------------------------
[15:26:21.688] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[15:26:21.698] <TB2> INFO: dacScan step from 0 .. 19
[15:26:47.349] <TB2> INFO: Test took 25650ms.
[15:26:47.382] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:47.384] <TB2> INFO: dacScan step from 20 .. 39
[15:27:13.772] <TB2> INFO: Test took 26388ms.
[15:27:13.824] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:13.828] <TB2> INFO: dacScan step from 40 .. 59
[15:27:49.583] <TB2> INFO: Test took 35755ms.
[15:27:49.847] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:49.888] <TB2> INFO: dacScan step from 60 .. 79






[15:28:28.524] <TB2> INFO: Test took 38636ms.
[15:28:28.816] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:28.871] <TB2> INFO: dacScan step from 80 .. 99


[15:29:07.592] <TB2> INFO: Test took 38721ms.
[15:29:07.884] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:07.939] <TB2> INFO: dacScan step from 100 .. 119


[15:29:44.346] <TB2> INFO: Test took 36407ms.
[15:29:44.606] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:44.659] <TB2> INFO: dacScan step from 120 .. 139


[15:30:23.458] <TB2> INFO: Test took 38799ms.
[15:30:23.723] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:30:23.775] <TB2> INFO: dacScan step from 140 .. 159


[15:31:02.347] <TB2> INFO: Test took 38572ms.
[15:31:02.627] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:31:02.682] <TB2> INFO: dacScan step from 160 .. 179


[15:31:41.410] <TB2> INFO: Test took 38728ms.
[15:31:41.867] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:31:41.932] <TB2> INFO: dacScan step from 180 .. 199


[15:32:20.396] <TB2> INFO: Test took 38464ms.
[15:32:20.707] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:32:45.312] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 85 (20) hits flags = 16 (plus default)
[15:32:45.320] <TB2> INFO: dacScan step from 0 .. 19
[15:33:11.164] <TB2> INFO: Test took 25844ms.
[15:33:11.202] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:33:11.202] <TB2> INFO: dacScan step from 20 .. 39
[15:33:38.256] <TB2> INFO: Test took 27054ms.
[15:33:38.349] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:33:38.359] <TB2> INFO: dacScan step from 40 .. 59
[15:34:12.764] <TB2> INFO: Test took 34405ms.
[15:34:13.035] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:34:13.076] <TB2> INFO: dacScan step from 60 .. 79





[15:34:50.891] <TB2> INFO: Test took 37814ms.
[15:34:51.183] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:34:51.236] <TB2> INFO: dacScan step from 80 .. 85
[15:35:04.659] <TB2> INFO: Test took 13423ms.
[15:35:04.754] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:35:22.411] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 73 (20) hits flags = 16 (plus default)
[15:35:22.423] <TB2> INFO: dacScan step from 0 .. 19
[15:35:48.352] <TB2> INFO: Test took 25929ms.
[15:35:48.387] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:35:48.387] <TB2> INFO: dacScan step from 20 .. 39
[15:36:15.893] <TB2> INFO: Test took 27506ms.
[15:36:16.033] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:36:16.060] <TB2> INFO: dacScan step from 40 .. 59





[15:36:53.513] <TB2> INFO: Test took 37453ms.
[15:36:53.812] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:36:53.860] <TB2> INFO: dacScan step from 60 .. 73
[15:37:22.446] <TB2> INFO: Test took 28586ms.
[15:37:22.649] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:39.006] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 68 (20) hits flags = 16 (plus default)
[15:37:39.014] <TB2> INFO: dacScan step from 0 .. 19
[15:38:03.539] <TB2> INFO: Test took 24524ms.
[15:38:03.585] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:38:03.585] <TB2> INFO: dacScan step from 20 .. 39
[15:38:31.904] <TB2> INFO: Test took 28319ms.
[15:38:32.061] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:38:32.080] <TB2> INFO: dacScan step from 40 .. 59






[15:39:11.111] <TB2> INFO: Test took 39031ms.
[15:39:11.403] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:39:11.451] <TB2> INFO: dacScan step from 60 .. 68
[15:39:30.563] <TB2> INFO: Test took 19112ms.
[15:39:30.696] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:39:47.373] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 66 (20) hits flags = 16 (plus default)
[15:39:47.382] <TB2> INFO: dacScan step from 0 .. 19
[15:40:13.227] <TB2> INFO: Test took 25845ms.
[15:40:13.266] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:40:13.267] <TB2> INFO: dacScan step from 20 .. 39
[15:40:45.519] <TB2> INFO: Test took 32252ms.
[15:40:45.719] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:40:45.744] <TB2> INFO: dacScan step from 40 .. 59





[15:41:24.936] <TB2> INFO: Test took 39192ms.
[15:41:25.210] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:41:25.256] <TB2> INFO: dacScan step from 60 .. 66
[15:41:40.434] <TB2> INFO: Test took 15178ms.
[15:41:40.565] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:41:57.165] <TB2> INFO: PixTestTrim::trimBitTest() done
[15:41:57.167] <TB2> INFO: PixTestTrim::doTest() done, duration: 2154 seconds
[15:41:57.868] <TB2> INFO: ######################################################################
[15:41:57.868] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[15:41:57.868] <TB2> INFO: ######################################################################
[15:42:01.659] <TB2> INFO: Test took 3789ms.
[15:42:01.684] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:05.728] <TB2> INFO: Test took 3846ms.
[15:42:05.800] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:09.594] <TB2> INFO: Test took 3783ms.
[15:42:09.655] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:09.661] <TB2> INFO: The DUT currently contains the following objects:
[15:42:09.661] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:09.661] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:42:09.661] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:42:09.661] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:09.661] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:09.661] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:09.661] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:09.661] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:09.662] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:09.662] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:09.662] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:09.662] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:09.662] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:09.662] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:09.662] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:09.662] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:09.662] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:09.662] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:09.662] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:09.662] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:10.797] <TB2> INFO: Test took 1135ms.
[15:42:10.798] <TB2> INFO: The DUT currently contains the following objects:
[15:42:10.798] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:10.798] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:42:10.798] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:42:10.798] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:10.798] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:10.798] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:10.798] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:10.798] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:10.798] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:10.798] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:10.798] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:10.799] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:10.799] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:10.799] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:10.799] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:10.799] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:10.799] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:10.799] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:10.799] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:10.799] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:11.920] <TB2> INFO: Test took 1121ms.
[15:42:11.922] <TB2> INFO: The DUT currently contains the following objects:
[15:42:11.922] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:11.922] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:42:11.922] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:42:11.922] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:11.922] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:11.922] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:11.922] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:11.922] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:11.922] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:11.922] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:11.922] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:11.922] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:11.922] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:11.922] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:11.922] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:11.922] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:11.922] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:11.922] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:11.922] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:11.922] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:13.045] <TB2> INFO: Test took 1123ms.
[15:42:13.047] <TB2> INFO: The DUT currently contains the following objects:
[15:42:13.047] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:13.047] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:42:13.047] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:42:13.047] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:13.047] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:13.047] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:13.047] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:13.047] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:13.047] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:13.047] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:13.047] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:13.047] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:13.047] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:13.047] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:13.047] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:13.047] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:13.047] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:13.047] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:13.047] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:13.047] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:14.184] <TB2> INFO: Test took 1137ms.
[15:42:14.185] <TB2> INFO: The DUT currently contains the following objects:
[15:42:14.185] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:14.185] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:42:14.185] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:42:14.185] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:14.185] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:14.185] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:14.185] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:14.185] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:14.185] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:14.185] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:14.185] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:14.185] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:14.185] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:14.185] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:14.185] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:14.185] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:14.185] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:14.185] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:14.185] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:14.185] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:15.337] <TB2> INFO: Test took 1152ms.
[15:42:15.338] <TB2> INFO: The DUT currently contains the following objects:
[15:42:15.338] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:15.338] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:42:15.338] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:42:15.338] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:15.339] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:15.339] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:15.339] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:15.339] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:15.339] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:15.339] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:15.339] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:15.339] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:15.339] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:15.339] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:15.339] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:15.339] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:15.339] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:15.339] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:15.339] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:15.339] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:16.462] <TB2> INFO: Test took 1123ms.
[15:42:16.463] <TB2> INFO: The DUT currently contains the following objects:
[15:42:16.463] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:16.463] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:42:16.463] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:42:16.463] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:16.463] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:16.463] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:16.463] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:16.463] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:16.463] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:16.463] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:16.463] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:16.463] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:16.463] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:16.463] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:16.463] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:16.463] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:16.464] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:16.464] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:16.464] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:16.464] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:17.594] <TB2> INFO: Test took 1130ms.
[15:42:17.594] <TB2> INFO: The DUT currently contains the following objects:
[15:42:17.596] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:17.596] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:42:17.596] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:42:17.596] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:17.596] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:17.596] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:17.596] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:17.596] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:17.596] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:17.596] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:17.596] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:17.596] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:17.596] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:17.596] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:17.596] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:17.596] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:17.596] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:17.596] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:17.597] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:17.597] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:18.716] <TB2> INFO: Test took 1119ms.
[15:42:18.717] <TB2> INFO: The DUT currently contains the following objects:
[15:42:18.717] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:18.717] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:42:18.717] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:42:18.717] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:18.717] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:18.717] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:18.717] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:18.717] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:18.717] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:18.717] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:18.717] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:18.717] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:18.717] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:18.717] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:18.717] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:18.717] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:18.717] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:18.717] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:18.717] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:18.718] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:19.843] <TB2> INFO: Test took 1125ms.
[15:42:19.845] <TB2> INFO: The DUT currently contains the following objects:
[15:42:19.845] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:19.845] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:42:19.845] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:42:19.845] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:19.845] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:19.845] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:19.845] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:19.845] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:19.845] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:19.845] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:19.845] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:19.845] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:19.845] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:19.846] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:19.846] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:19.846] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:19.846] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:19.846] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:19.846] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:19.846] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:20.962] <TB2> INFO: Test took 1116ms.
[15:42:20.963] <TB2> INFO: The DUT currently contains the following objects:
[15:42:20.963] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:20.963] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:42:20.963] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:42:20.963] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:20.963] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:20.963] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:20.963] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:20.963] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:20.963] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:20.963] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:20.963] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:20.963] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:20.963] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:20.963] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:20.963] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:20.963] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:20.963] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:20.963] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:20.963] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:20.963] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:22.065] <TB2> INFO: Test took 1102ms.
[15:42:22.066] <TB2> INFO: The DUT currently contains the following objects:
[15:42:22.066] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:22.066] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:42:22.066] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:42:22.066] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:22.066] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:22.066] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:22.066] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:22.066] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:22.066] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:22.066] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:22.066] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:22.066] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:22.066] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:22.066] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:22.066] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:22.066] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:22.066] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:22.066] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:22.066] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:22.066] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:23.176] <TB2> INFO: Test took 1110ms.
[15:42:23.177] <TB2> INFO: The DUT currently contains the following objects:
[15:42:23.177] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:23.177] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:42:23.177] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:42:23.177] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:23.177] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:23.177] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:23.177] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:23.177] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:23.177] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:23.177] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:23.177] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:23.177] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:23.177] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:23.177] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:23.177] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:23.178] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:23.178] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:23.178] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:23.178] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:23.178] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:24.284] <TB2> INFO: Test took 1106ms.
[15:42:24.285] <TB2> INFO: The DUT currently contains the following objects:
[15:42:24.285] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:24.285] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:42:24.285] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:42:24.285] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:24.285] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:24.285] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:24.285] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:24.285] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:24.285] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:24.285] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:24.285] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:24.285] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:24.285] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:24.285] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:24.285] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:24.286] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:24.286] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:24.286] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:24.286] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:24.286] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:25.423] <TB2> INFO: Test took 1137ms.
[15:42:25.424] <TB2> INFO: The DUT currently contains the following objects:
[15:42:25.424] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:25.424] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:42:25.424] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:42:25.424] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:25.424] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:25.424] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:25.424] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:25.424] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:25.424] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:25.424] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:25.424] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:25.424] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:25.424] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:25.424] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:25.424] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:25.424] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:25.424] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:25.424] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:25.424] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:25.424] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:26.531] <TB2> INFO: Test took 1107ms.
[15:42:26.533] <TB2> INFO: The DUT currently contains the following objects:
[15:42:26.533] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:26.533] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:42:26.533] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:42:26.533] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:26.533] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:26.533] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:26.533] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:26.533] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:26.533] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:26.533] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:26.533] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:26.533] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:26.533] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:26.533] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:26.533] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:26.533] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:26.533] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:26.533] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:26.533] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:26.533] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:27.669] <TB2> INFO: Test took 1136ms.
[15:42:27.674] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:02.332] <TB2> INFO: Test took 274658ms.
[15:47:04.133] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:16.309] <TB2> INFO: Test took 252176ms.
[15:51:17.811] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:51:17.817] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:51:17.824] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:51:17.830] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:51:17.837] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:51:17.843] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:51:17.849] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:51:17.856] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:51:17.862] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:51:17.869] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:51:17.875] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:51:17.882] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:51:17.888] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:51:17.895] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:51:17.901] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:51:17.907] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:51:17.955] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C0.dat
[15:51:17.959] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C1.dat
[15:51:17.959] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C2.dat
[15:51:17.959] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C3.dat
[15:51:17.965] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C4.dat
[15:51:17.965] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C5.dat
[15:51:17.965] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C6.dat
[15:51:17.966] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C7.dat
[15:51:17.970] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C8.dat
[15:51:17.970] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C9.dat
[15:51:17.970] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C10.dat
[15:51:17.971] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C11.dat
[15:51:17.971] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C12.dat
[15:51:17.971] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C13.dat
[15:51:17.972] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C14.dat
[15:51:17.972] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C15.dat
[15:51:21.513] <TB2> INFO: Test took 3538ms.
[15:51:25.342] <TB2> INFO: Test took 3567ms.
[15:51:29.102] <TB2> INFO: Test took 3498ms.
[15:51:29.368] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:30.309] <TB2> INFO: Test took 941ms.
[15:51:30.311] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:31.441] <TB2> INFO: Test took 1130ms.
[15:51:31.443] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:32.572] <TB2> INFO: Test took 1129ms.
[15:51:32.575] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:33.675] <TB2> INFO: Test took 1100ms.
[15:51:33.677] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:34.778] <TB2> INFO: Test took 1101ms.
[15:51:34.780] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:35.910] <TB2> INFO: Test took 1130ms.
[15:51:35.912] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:37.026] <TB2> INFO: Test took 1115ms.
[15:51:37.028] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:38.143] <TB2> INFO: Test took 1115ms.
[15:51:38.145] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:39.246] <TB2> INFO: Test took 1101ms.
[15:51:39.248] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:40.378] <TB2> INFO: Test took 1130ms.
[15:51:40.380] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:41.480] <TB2> INFO: Test took 1101ms.
[15:51:41.482] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:42.583] <TB2> INFO: Test took 1101ms.
[15:51:42.585] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:43.702] <TB2> INFO: Test took 1117ms.
[15:51:43.704] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:44.804] <TB2> INFO: Test took 1100ms.
[15:51:44.806] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:45.921] <TB2> INFO: Test took 1115ms.
[15:51:45.923] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:47.067] <TB2> INFO: Test took 1144ms.
[15:51:47.069] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:48.197] <TB2> INFO: Test took 1128ms.
[15:51:48.199] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:49.314] <TB2> INFO: Test took 1115ms.
[15:51:49.316] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:50.431] <TB2> INFO: Test took 1115ms.
[15:51:50.433] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:51.549] <TB2> INFO: Test took 1116ms.
[15:51:51.551] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:52.681] <TB2> INFO: Test took 1130ms.
[15:51:52.683] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:53.784] <TB2> INFO: Test took 1101ms.
[15:51:53.785] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:54.886] <TB2> INFO: Test took 1101ms.
[15:51:54.888] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:56.003] <TB2> INFO: Test took 1115ms.
[15:51:56.005] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:57.106] <TB2> INFO: Test took 1101ms.
[15:51:57.108] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:58.225] <TB2> INFO: Test took 1117ms.
[15:51:58.227] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:59.341] <TB2> INFO: Test took 1114ms.
[15:51:59.344] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:52:00.445] <TB2> INFO: Test took 1102ms.
[15:52:00.447] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:52:01.593] <TB2> INFO: Test took 1146ms.
[15:52:01.595] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:52:02.710] <TB2> INFO: Test took 1116ms.
[15:52:02.712] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:52:03.828] <TB2> INFO: Test took 1116ms.
[15:52:03.830] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:52:04.931] <TB2> INFO: Test took 1101ms.
[15:52:05.432] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 607 seconds
[15:52:05.432] <TB2> INFO: PH scale (per ROC): 75 70 81 75 81 79 72 86 79 84 70 85 69 77 78 81
[15:52:05.432] <TB2> INFO: PH offset (per ROC): 161 176 170 174 158 161 176 154 176 166 185 158 176 181 172 165
[15:52:05.610] <TB2> INFO: ######################################################################
[15:52:05.610] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[15:52:05.610] <TB2> INFO: ######################################################################
[15:52:05.619] <TB2> INFO: scanning low vcal = 50
[15:52:10.027] <TB2> INFO: Test took 4408ms.
[15:52:10.082] <TB2> INFO: scanning low vcal = 100
[15:52:14.580] <TB2> INFO: Test took 4498ms.
[15:52:14.634] <TB2> INFO: scanning low vcal = 150
[15:52:19.190] <TB2> INFO: Test took 4556ms.
[15:52:19.243] <TB2> INFO: scanning low vcal = 200
[15:52:23.692] <TB2> INFO: Test took 4449ms.
[15:52:23.747] <TB2> INFO: scanning low vcal = 250
[15:52:28.237] <TB2> INFO: Test took 4490ms.
[15:52:28.291] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[15:52:32.719] <TB2> INFO: Test took 4428ms.
[15:52:32.772] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)

[15:52:37.187] <TB2> INFO: Test took 4415ms.
[15:52:37.240] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[15:52:41.682] <TB2> INFO: Test took 4442ms.
[15:52:41.734] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[15:52:46.292] <TB2> INFO: Test took 4558ms.
[15:52:46.346] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[15:52:50.906] <TB2> INFO: Test took 4560ms.
[15:52:51.193] <TB2> INFO: PixTestGainPedestal::measure() done
[15:53:14.183] <TB2> INFO: PixTestGainPedestal::fit() done
[15:53:14.183] <TB2> INFO: non-linearity mean: 0.961 0.955 0.954 0.949 0.961 0.959 0.952 0.951 0.955 0.953 0.960 0.954 0.960 0.954 0.955 0.959
[15:53:14.183] <TB2> INFO: non-linearity RMS: 0.006 0.007 0.006 0.007 0.006 0.006 0.007 0.006 0.006 0.006 0.006 0.005 0.006 0.006 0.007 0.005
[15:53:14.184] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[15:53:14.202] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[15:53:14.221] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[15:53:14.240] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[15:53:14.258] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[15:53:14.277] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[15:53:14.296] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[15:53:14.314] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[15:53:14.333] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[15:53:14.352] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[15:53:14.370] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[15:53:14.389] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[15:53:14.408] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[15:53:14.426] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[15:53:14.445] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[15:53:14.463] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[15:53:14.482] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 68 seconds
[15:53:14.488] <TB2> INFO: enter test to run
[15:53:14.488] <TB2> INFO: test: exit no parameter change
[15:53:14.956] <TB2> QUIET: Connection to board 0 closed.
[15:53:15.035] <TB2> INFO: pXar: this is the end, my friend