[12:52:56.848] <TB2> INFO: *** Welcome to pxar ***
[12:52:56.848] <TB2> INFO: *** Today: 2015/07/08
[12:52:56.848] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C15.dat
[12:52:56.849] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:52:56.849] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//defaultMaskFile.dat
[12:52:56.849] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters_C15.dat
[12:52:56.922] <TB2> INFO: clk: 4
[12:52:56.922] <TB2> INFO: ctr: 4
[12:52:56.922] <TB2> INFO: sda: 19
[12:52:56.922] <TB2> INFO: tin: 9
[12:52:56.922] <TB2> INFO: level: 15
[12:52:56.922] <TB2> INFO: triggerdelay: 0
[12:52:56.922] <TB2> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[12:52:56.922] <TB2> INFO: Log level: INFO
[12:52:56.929] <TB2> INFO: Found DTB DTB_WXC55Z
[12:52:56.941] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[12:52:56.944] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 0
HW version:
FW version: 4.0
SW version: 4.0
USB id:
MAC address: 000000000000
Hostname:
Comment:
------------------------------------------------------
[12:52:56.946] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[12:52:58.509] <TB2> INFO: DUT info:
[12:52:58.509] <TB2> INFO: The DUT currently contains the following objects:
[12:52:58.509] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:52:58.509] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:52:58.509] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:52:58.509] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:52:58.509] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:58.509] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:58.509] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:58.509] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:58.509] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:58.509] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:58.509] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:58.509] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:58.509] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:58.509] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:58.509] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:58.509] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:58.509] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:58.509] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:58.509] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:58.509] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:52:58.910] <TB2> INFO: enter 'restricted' command line mode
[12:52:58.910] <TB2> INFO: enter test to run
[12:52:58.910] <TB2> INFO: test: pretest no parameter change
[12:52:58.910] <TB2> INFO: running: pretest
[12:52:58.920] <TB2> INFO: ######################################################################
[12:52:58.920] <TB2> INFO: PixTestPretest::doTest()
[12:52:58.920] <TB2> INFO: ######################################################################
[12:52:58.922] <TB2> INFO: ----------------------------------------------------------------------
[12:52:58.922] <TB2> INFO: PixTestPretest::programROC()
[12:52:58.922] <TB2> INFO: ----------------------------------------------------------------------
[12:53:16.939] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:53:16.939] <TB2> INFO: IA differences per ROC: 16.9 16.9 18.5 20.1 18.5 18.5 20.1 19.3 19.3 18.5 17.7 17.7 18.5 17.7 20.1 17.7
[12:53:17.012] <TB2> INFO: ----------------------------------------------------------------------
[12:53:17.012] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:53:17.012] <TB2> INFO: ----------------------------------------------------------------------
[12:53:36.558] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 383.5 mA = 23.9688 mA/ROC
[12:53:36.561] <TB2> INFO: ----------------------------------------------------------------------
[12:53:36.561] <TB2> INFO: PixTestPretest::findWorkingPixel()
[12:53:36.561] <TB2> INFO: ----------------------------------------------------------------------
[12:53:45.881] <TB2> INFO: Test took 9314ms.
[12:53:46.176] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:53:46.211] <TB2> INFO: ----------------------------------------------------------------------
[12:53:46.211] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[12:53:46.211] <TB2> INFO: ----------------------------------------------------------------------
[12:53:55.386] <TB2> INFO: Test took 9171ms.
[12:53:55.689] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[12:53:55.689] <TB2> INFO: CalDel: 142 146 145 132 140 132 145 137 115 142 113 126 133 124 142 111
[12:53:55.690] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:53:55.702] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C0.dat
[12:53:55.702] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C1.dat
[12:53:55.702] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C2.dat
[12:53:55.702] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C3.dat
[12:53:55.703] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C4.dat
[12:53:55.703] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C5.dat
[12:53:55.703] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C6.dat
[12:53:55.703] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C7.dat
[12:53:55.704] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C8.dat
[12:53:55.704] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C9.dat
[12:53:55.704] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C10.dat
[12:53:55.704] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C11.dat
[12:53:55.704] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C12.dat
[12:53:55.705] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C13.dat
[12:53:55.705] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C14.dat
[12:53:55.705] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters_C15.dat
[12:53:55.705] <TB2> INFO: PixTestPretest::doTest() done, duration: 56 seconds
[12:53:55.797] <TB2> INFO: enter test to run
[12:53:55.797] <TB2> INFO: test: fulltest no parameter change
[12:53:55.797] <TB2> INFO: running: fulltest
[12:53:55.797] <TB2> INFO: ######################################################################
[12:53:55.797] <TB2> INFO: PixTestFullTest::doTest()
[12:53:55.797] <TB2> INFO: ######################################################################
[12:53:55.798] <TB2> INFO: ######################################################################
[12:53:55.798] <TB2> INFO: PixTestAlive::doTest()
[12:53:55.798] <TB2> INFO: ######################################################################
[12:53:55.800] <TB2> INFO: ----------------------------------------------------------------------
[12:53:55.800] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:53:55.800] <TB2> INFO: ----------------------------------------------------------------------
[12:53:59.512] <TB2> INFO: Test took 3711ms.
[12:53:59.534] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:59.752] <TB2> INFO: PixTestAlive::aliveTest() done
[12:53:59.752] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:53:59.754] <TB2> INFO: ----------------------------------------------------------------------
[12:53:59.754] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:53:59.754] <TB2> INFO: ----------------------------------------------------------------------
[12:54:02.677] <TB2> INFO: Test took 2922ms.
[12:54:02.680] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:02.681] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:54:02.908] <TB2> INFO: PixTestAlive::maskTest() done
[12:54:02.908] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:54:02.910] <TB2> INFO: ----------------------------------------------------------------------
[12:54:02.910] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:54:02.910] <TB2> INFO: ----------------------------------------------------------------------
[12:54:06.692] <TB2> INFO: Test took 3781ms.
[12:54:06.713] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:06.941] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[12:54:06.941] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:54:06.941] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[12:54:06.953] <TB2> INFO: ######################################################################
[12:54:06.953] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:54:06.953] <TB2> INFO: ######################################################################
[12:54:06.955] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[12:54:06.967] <TB2> INFO: dacScan step from 0 .. 29
[12:54:30.524] <TB2> INFO: Test took 23556ms.
[12:54:30.560] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:30.560] <TB2> INFO: dacScan step from 30 .. 59
[12:54:57.785] <TB2> INFO: Test took 27225ms.
[12:54:57.920] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:57.939] <TB2> INFO: dacScan step from 60 .. 89
[12:55:31.651] <TB2> INFO: Test took 33712ms.
[12:55:31.906] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:31.989] <TB2> INFO: dacScan step from 90 .. 119
[12:56:03.383] <TB2> INFO: Test took 31394ms.
[12:56:03.676] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:03.784] <TB2> INFO: dacScan step from 120 .. 149
[12:56:31.958] <TB2> INFO: Test took 28174ms.
[12:56:32.157] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:54.609] <TB2> INFO: PixTestBBMap::doTest() done, duration: 167 seconds
[12:56:54.609] <TB2> INFO: number of dead bumps (per ROC): 10 1 0 1 0 0 1 4 2 1 0 1 1 0 1 16
[12:56:54.609] <TB2> INFO: separation cut (per ROC): 70 90 70 101 93 79 100 80 83 72 92 73 92 97 73 93
[12:56:54.694] <TB2> INFO: ######################################################################
[12:56:54.694] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[12:56:54.694] <TB2> INFO: ######################################################################
[12:56:54.695] <TB2> INFO: ----------------------------------------------------------------------
[12:56:54.695] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[12:56:54.695] <TB2> INFO: ----------------------------------------------------------------------
[12:56:54.695] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[12:56:54.704] <TB2> INFO: dacScan step from 0 .. 3
[12:57:16.523] <TB2> INFO: Test took 21819ms.
[12:57:16.551] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:16.551] <TB2> INFO: dacScan step from 4 .. 7
[12:57:38.494] <TB2> INFO: Test took 21943ms.
[12:57:38.522] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:38.522] <TB2> INFO: dacScan step from 8 .. 11
[12:58:00.358] <TB2> INFO: Test took 21836ms.
[12:58:00.384] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:00.384] <TB2> INFO: dacScan step from 12 .. 15
[12:58:22.485] <TB2> INFO: Test took 22101ms.
[12:58:22.513] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:22.513] <TB2> INFO: dacScan step from 16 .. 19
[12:58:44.124] <TB2> INFO: Test took 21610ms.
[12:58:44.150] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:44.150] <TB2> INFO: dacScan step from 20 .. 23
[12:59:06.270] <TB2> INFO: Test took 22120ms.
[12:59:06.305] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:06.305] <TB2> INFO: dacScan step from 24 .. 27
[12:59:28.373] <TB2> INFO: Test took 22067ms.
[12:59:28.406] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:28.406] <TB2> INFO: dacScan step from 28 .. 31
[12:59:50.370] <TB2> INFO: Test took 21964ms.
[12:59:50.401] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:50.401] <TB2> INFO: dacScan step from 32 .. 35
[13:00:12.204] <TB2> INFO: Test took 21803ms.
[13:00:12.232] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:12.232] <TB2> INFO: dacScan step from 36 .. 39
[13:00:34.134] <TB2> INFO: Test took 21902ms.
[13:00:34.162] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:34.162] <TB2> INFO: dacScan step from 40 .. 43
[13:00:56.109] <TB2> INFO: Test took 21947ms.
[13:00:56.133] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:56.133] <TB2> INFO: dacScan step from 44 .. 47
[13:01:18.422] <TB2> INFO: Test took 22289ms.
[13:01:18.451] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:18.451] <TB2> INFO: dacScan step from 48 .. 51
[13:01:40.717] <TB2> INFO: Test took 22266ms.
[13:01:40.744] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:40.744] <TB2> INFO: dacScan step from 52 .. 55
[13:02:02.501] <TB2> INFO: Test took 21757ms.
[13:02:02.534] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:02.534] <TB2> INFO: dacScan step from 56 .. 59
[13:02:24.706] <TB2> INFO: Test took 22172ms.
[13:02:24.737] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:24.737] <TB2> INFO: dacScan step from 60 .. 63
[13:02:47.476] <TB2> INFO: Test took 22738ms.
[13:02:47.533] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:47.534] <TB2> INFO: dacScan step from 64 .. 67
[13:03:11.316] <TB2> INFO: Test took 23782ms.
[13:03:11.377] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:11.379] <TB2> INFO: dacScan step from 68 .. 71
[13:03:36.805] <TB2> INFO: Test took 25426ms.
[13:03:36.896] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:36.900] <TB2> INFO: dacScan step from 72 .. 75
[13:04:04.544] <TB2> INFO: Test took 27644ms.
[13:04:04.656] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:04.660] <TB2> INFO: dacScan step from 76 .. 79
[13:04:34.426] <TB2> INFO: Test took 29766ms.
[13:04:34.560] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:34.565] <TB2> INFO: dacScan step from 80 .. 83
[13:05:03.594] <TB2> INFO: Test took 29029ms.
[13:05:03.764] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:03.770] <TB2> INFO: dacScan step from 84 .. 87
[13:05:36.332] <TB2> INFO: Test took 32562ms.
[13:05:36.527] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:36.536] <TB2> INFO: dacScan step from 88 .. 91
[13:06:10.248] <TB2> INFO: Test took 33712ms.
[13:06:10.478] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:10.490] <TB2> INFO: dacScan step from 92 .. 95
[13:06:45.178] <TB2> INFO: Test took 34688ms.
[13:06:45.399] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:45.409] <TB2> INFO: dacScan step from 96 .. 99







[13:07:19.169] <TB2> INFO: Test took 33759ms.
[13:07:19.385] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:19.396] <TB2> INFO: dacScan step from 100 .. 103



[13:07:53.313] <TB2> INFO: Test took 33917ms.
[13:07:53.528] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:53.540] <TB2> INFO: dacScan step from 104 .. 107




[13:08:27.986] <TB2> INFO: Test took 34445ms.
[13:08:28.222] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:28.235] <TB2> INFO: dacScan step from 108 .. 111





[13:09:03.051] <TB2> INFO: Test took 34816ms.
[13:09:03.305] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:03.320] <TB2> INFO: dacScan step from 112 .. 115



[13:09:38.052] <TB2> INFO: Test took 34731ms.
[13:09:38.313] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:38.330] <TB2> INFO: dacScan step from 116 .. 119






[13:10:13.307] <TB2> INFO: Test took 34977ms.
[13:10:13.565] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:13.578] <TB2> INFO: dacScan step from 120 .. 123



[13:10:48.678] <TB2> INFO: Test took 35100ms.
[13:10:48.931] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:48.947] <TB2> INFO: dacScan step from 124 .. 127


[13:11:22.153] <TB2> INFO: Test took 33206ms.
[13:11:22.470] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:22.487] <TB2> INFO: dacScan step from 128 .. 131


[13:11:57.256] <TB2> INFO: Test took 34768ms.
[13:11:57.482] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:57.497] <TB2> INFO: dacScan step from 132 .. 135


[13:12:32.779] <TB2> INFO: Test took 35282ms.
[13:12:33.025] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:33.037] <TB2> INFO: dacScan step from 136 .. 139


[13:13:08.214] <TB2> INFO: Test took 35177ms.
[13:13:08.442] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:08.454] <TB2> INFO: dacScan step from 140 .. 143


[13:13:42.034] <TB2> INFO: Test took 33580ms.
[13:13:42.256] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:42.268] <TB2> INFO: dacScan step from 144 .. 147


[13:14:15.592] <TB2> INFO: Test took 33324ms.
[13:14:15.834] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:15.844] <TB2> INFO: dacScan step from 148 .. 149
[13:14:34.826] <TB2> INFO: Test took 18982ms.
[13:14:34.945] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:34.952] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:14:36.494] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:14:38.034] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:14:39.606] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:14:41.109] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:14:42.583] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:14:44.074] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:14:45.511] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:14:46.996] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:14:48.379] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:14:49.789] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:14:51.142] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:14:52.551] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:14:53.898] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:14:55.258] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:14:56.652] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:14:58.028] <TB2> INFO: PixTestScurves::scurves() done
[13:14:58.028] <TB2> INFO: Vcal mean: 72.84 81.38 65.35 80.88 84.77 74.04 89.22 75.48 82.40 72.24 93.33 71.88 97.80 86.60 78.74 96.71
[13:14:58.028] <TB2> INFO: Vcal RMS: 4.93 5.28 5.11 4.94 5.10 4.25 5.47 4.14 5.11 4.87 6.10 4.84 5.88 5.26 3.98 5.41
[13:14:58.028] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1083 seconds
[13:14:58.110] <TB2> INFO: ######################################################################
[13:14:58.110] <TB2> INFO: PixTestTrim::doTest()
[13:14:58.110] <TB2> INFO: ######################################################################
[13:14:58.111] <TB2> INFO: ----------------------------------------------------------------------
[13:14:58.111] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:14:58.111] <TB2> INFO: ----------------------------------------------------------------------
[13:14:58.196] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:14:58.196] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:14:58.204] <TB2> INFO: dacScan step from 0 .. 19
[13:15:14.718] <TB2> INFO: Test took 16514ms.
[13:15:14.739] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:14.739] <TB2> INFO: dacScan step from 20 .. 39
[13:15:31.564] <TB2> INFO: Test took 16825ms.
[13:15:31.590] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:31.590] <TB2> INFO: dacScan step from 40 .. 59
[13:15:48.277] <TB2> INFO: Test took 16687ms.
[13:15:48.299] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:48.299] <TB2> INFO: dacScan step from 60 .. 79
[13:16:04.854] <TB2> INFO: Test took 16555ms.
[13:16:04.879] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:04.880] <TB2> INFO: dacScan step from 80 .. 99
[13:16:23.784] <TB2> INFO: Test took 18904ms.
[13:16:23.865] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:23.878] <TB2> INFO: dacScan step from 100 .. 119
[13:16:44.555] <TB2> INFO: Test took 20677ms.
[13:16:44.786] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:44.831] <TB2> INFO: dacScan step from 120 .. 139
[13:17:05.773] <TB2> INFO: Test took 20942ms.
[13:17:05.914] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:05.940] <TB2> INFO: dacScan step from 140 .. 159
[13:17:24.024] <TB2> INFO: Test took 18084ms.
[13:17:24.093] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:44.475] <TB2> INFO: ROC 0 VthrComp = 77
[13:17:44.475] <TB2> INFO: ROC 1 VthrComp = 85
[13:17:44.475] <TB2> INFO: ROC 2 VthrComp = 72
[13:17:44.475] <TB2> INFO: ROC 3 VthrComp = 89
[13:17:44.475] <TB2> INFO: ROC 4 VthrComp = 94
[13:17:44.475] <TB2> INFO: ROC 5 VthrComp = 81
[13:17:44.475] <TB2> INFO: ROC 6 VthrComp = 97
[13:17:44.476] <TB2> INFO: ROC 7 VthrComp = 84
[13:17:44.476] <TB2> INFO: ROC 8 VthrComp = 90
[13:17:44.476] <TB2> INFO: ROC 9 VthrComp = 79
[13:17:44.476] <TB2> INFO: ROC 10 VthrComp = 97
[13:17:44.476] <TB2> INFO: ROC 11 VthrComp = 78
[13:17:44.476] <TB2> INFO: ROC 12 VthrComp = 99
[13:17:44.476] <TB2> INFO: ROC 13 VthrComp = 96
[13:17:44.476] <TB2> INFO: ROC 14 VthrComp = 87
[13:17:44.476] <TB2> INFO: ROC 15 VthrComp = 104
[13:17:44.476] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:17:44.476] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:17:44.485] <TB2> INFO: dacScan step from 0 .. 19
[13:18:01.016] <TB2> INFO: Test took 16531ms.
[13:18:01.047] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:01.047] <TB2> INFO: dacScan step from 20 .. 39
[13:18:18.081] <TB2> INFO: Test took 17034ms.
[13:18:18.115] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:18.117] <TB2> INFO: dacScan step from 40 .. 59
[13:18:39.748] <TB2> INFO: Test took 21631ms.
[13:18:39.903] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:39.941] <TB2> INFO: dacScan step from 60 .. 79
[13:19:03.293] <TB2> INFO: Test took 23352ms.
[13:19:03.513] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:03.560] <TB2> INFO: dacScan step from 80 .. 99
[13:19:26.878] <TB2> INFO: Test took 23317ms.
[13:19:27.078] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:27.144] <TB2> INFO: dacScan step from 100 .. 119
[13:19:49.984] <TB2> INFO: Test took 22840ms.
[13:19:50.167] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:50.207] <TB2> INFO: dacScan step from 120 .. 139
[13:20:13.447] <TB2> INFO: Test took 23240ms.
[13:20:13.643] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:13.693] <TB2> INFO: dacScan step from 140 .. 159
[13:20:36.976] <TB2> INFO: Test took 23283ms.
[13:20:37.138] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:02.492] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 58.762 for pixel 16/74 mean/min/max = 46.364/33.9659/58.762
[13:21:02.493] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 59.6942 for pixel 3/5 mean/min/max = 45.6885/31.4541/59.9229
[13:21:02.493] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 57.974 for pixel 2/36 mean/min/max = 45.8536/33.6811/58.026
[13:21:02.493] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 58.3771 for pixel 0/29 mean/min/max = 45.2957/32.1425/58.4489
[13:21:02.494] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 57.1658 for pixel 8/76 mean/min/max = 44.7771/32.2012/57.3529
[13:21:02.494] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 55.7831 for pixel 18/2 mean/min/max = 44.3854/32.8805/55.8904
[13:21:02.494] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 57.7217 for pixel 17/78 mean/min/max = 45.0417/32.18/57.9034
[13:21:02.494] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 55.7656 for pixel 47/0 mean/min/max = 44.0369/32.198/55.8759
[13:21:02.495] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 59.5566 for pixel 6/7 mean/min/max = 46.0472/32.4936/59.6008
[13:21:02.495] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 59.5833 for pixel 18/39 mean/min/max = 46.6729/33.7312/59.6146
[13:21:02.495] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 61.4507 for pixel 14/75 mean/min/max = 46.5208/31.5647/61.477
[13:21:02.495] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 58.7781 for pixel 17/1 mean/min/max = 46.1041/33.4288/58.7794
[13:21:02.495] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 60.453 for pixel 2/10 mean/min/max = 45.965/31.3919/60.538
[13:21:02.496] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 56.7793 for pixel 51/11 mean/min/max = 44.0839/31.1831/56.9847
[13:21:02.496] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 55.3991 for pixel 0/16 mean/min/max = 43.6271/31.8216/55.4325
[13:21:02.496] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 60.3213 for pixel 23/79 mean/min/max = 46.8874/33.3552/60.4197
[13:21:02.496] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:22:55.603] <TB2> INFO: Test took 113107ms.
[13:22:57.070] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:22:57.078] <TB2> INFO: dacScan step from 0 .. 19
[13:23:22.588] <TB2> INFO: Test took 25510ms.
[13:23:22.647] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:22.648] <TB2> INFO: dacScan step from 20 .. 39
[13:23:53.997] <TB2> INFO: Test took 31349ms.
[13:23:54.226] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:54.258] <TB2> INFO: dacScan step from 40 .. 59






[13:24:30.580] <TB2> INFO: Test took 36322ms.
[13:24:30.925] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:30.979] <TB2> INFO: dacScan step from 60 .. 79



[13:25:08.899] <TB2> INFO: Test took 37920ms.
[13:25:09.179] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:09.232] <TB2> INFO: dacScan step from 80 .. 99






[13:25:48.348] <TB2> INFO: Test took 39116ms.
[13:25:48.634] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:48.689] <TB2> INFO: dacScan step from 100 .. 119






[13:26:25.182] <TB2> INFO: Test took 36493ms.
[13:26:25.457] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:25.504] <TB2> INFO: dacScan step from 120 .. 139






[13:27:03.429] <TB2> INFO: Test took 37925ms.
[13:27:03.885] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:03.954] <TB2> INFO: dacScan step from 140 .. 159






[13:27:42.089] <TB2> INFO: Test took 38135ms.
[13:27:42.421] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:42.477] <TB2> INFO: dacScan step from 160 .. 179





[13:28:19.788] <TB2> INFO: Test took 37311ms.
[13:28:20.112] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:20.166] <TB2> INFO: dacScan step from 180 .. 199



[13:28:59.751] <TB2> INFO: Test took 39585ms.
[13:29:00.034] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:28.171] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.065513 .. 51.073225
[13:29:28.251] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 61 (20) hits flags = 16 (plus default)
[13:29:28.259] <TB2> INFO: dacScan step from 0 .. 19
[13:29:43.404] <TB2> INFO: Test took 15145ms.
[13:29:43.426] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:43.426] <TB2> INFO: dacScan step from 20 .. 39
[13:29:59.924] <TB2> INFO: Test took 16498ms.
[13:30:00.005] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:00.021] <TB2> INFO: dacScan step from 40 .. 59
[13:30:18.845] <TB2> INFO: Test took 18824ms.
[13:30:18.993] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:19.048] <TB2> INFO: dacScan step from 60 .. 61
[13:30:23.506] <TB2> INFO: Test took 4458ms.
[13:30:23.522] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:41.330] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 12.643530 .. 44.881061
[13:30:41.420] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 2 .. 54 (20) hits flags = 16 (plus default)
[13:30:41.428] <TB2> INFO: dacScan step from 2 .. 21
[13:30:56.048] <TB2> INFO: Test took 14620ms.
[13:30:56.067] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:56.067] <TB2> INFO: dacScan step from 22 .. 41
[13:31:11.827] <TB2> INFO: Test took 15760ms.
[13:31:11.919] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:11.943] <TB2> INFO: dacScan step from 42 .. 54
[13:31:26.226] <TB2> INFO: Test took 14282ms.
[13:31:26.326] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:42.523] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 17.045247 .. 41.112744
[13:31:42.602] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 7 .. 51 (20) hits flags = 16 (plus default)
[13:31:42.610] <TB2> INFO: dacScan step from 7 .. 26
[13:31:57.404] <TB2> INFO: Test took 14794ms.
[13:31:57.426] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:57.426] <TB2> INFO: dacScan step from 27 .. 46
[13:32:15.066] <TB2> INFO: Test took 17640ms.
[13:32:15.183] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:15.223] <TB2> INFO: dacScan step from 47 .. 51
[13:32:22.390] <TB2> INFO: Test took 7166ms.
[13:32:22.446] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:37.787] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 20.333811 .. 41.110572
[13:32:37.867] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 10 .. 51 (20) hits flags = 16 (plus default)
[13:32:37.875] <TB2> INFO: dacScan step from 10 .. 29
[13:32:52.674] <TB2> INFO: Test took 14798ms.
[13:32:52.696] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:52.696] <TB2> INFO: dacScan step from 30 .. 49
[13:33:11.238] <TB2> INFO: Test took 18541ms.
[13:33:11.371] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:11.413] <TB2> INFO: dacScan step from 50 .. 51
[13:33:15.970] <TB2> INFO: Test took 4556ms.
[13:33:15.989] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:30.508] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:33:30.508] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[13:33:30.516] <TB2> INFO: dacScan step from 15 .. 34
[13:33:57.392] <TB2> INFO: Test took 26875ms.
[13:33:57.457] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:57.473] <TB2> INFO: dacScan step from 35 .. 54





[13:34:34.517] <TB2> INFO: Test took 37044ms.
[13:34:34.864] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:34.928] <TB2> INFO: dacScan step from 55 .. 55
[13:34:39.482] <TB2> INFO: Test took 4554ms.
[13:34:39.496] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:53.788] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:34:53.788] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:34:53.788] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:34:53.788] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:34:53.788] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:34:53.788] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:34:53.788] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:34:53.788] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:34:53.788] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:34:53.788] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:34:53.789] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:34:53.789] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:34:53.789] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:34:53.789] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:34:53.789] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:34:53.789] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:34:53.789] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:34:53.795] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:34:53.801] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:34:53.807] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:34:53.813] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:34:53.818] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:34:53.824] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:34:53.830] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:34:53.836] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:34:53.842] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:34:53.848] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:34:53.854] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:34:53.862] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:34:53.871] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:34:53.880] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:34:53.890] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:34:53.900] <TB2> INFO: PixTestTrim::trimTest() done
[13:34:53.900] <TB2> INFO: vtrim: 99 118 98 109 114 103 119 107 118 121 123 103 105 107 101 116
[13:34:53.900] <TB2> INFO: vthrcomp: 77 85 72 89 94 81 97 84 90 79 97 78 99 96 87 104
[13:34:53.900] <TB2> INFO: vcal mean: 35.05 35.03 35.06 35.01 35.00 35.03 34.99 35.02 35.04 35.06 35.06 35.02 34.84 34.96 35.04 35.06
[13:34:53.900] <TB2> INFO: vcal RMS: 0.97 1.03 0.90 0.94 1.02 0.92 0.99 0.94 0.99 1.01 1.08 0.97 1.03 1.00 1.00 1.00
[13:34:53.900] <TB2> INFO: bits mean: 9.56 10.02 9.40 9.50 10.14 10.05 10.06 10.03 9.51 9.52 9.88 9.20 9.70 10.08 10.30 9.35
[13:34:53.900] <TB2> INFO: bits RMS: 2.39 2.53 2.48 2.67 2.47 2.40 2.47 2.49 2.61 2.41 2.49 2.54 2.66 2.61 2.42 2.51
[13:34:53.906] <TB2> INFO: ----------------------------------------------------------------------
[13:34:53.906] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 240 150 100
[13:34:53.906] <TB2> INFO: ----------------------------------------------------------------------
[13:34:53.908] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:34:53.917] <TB2> INFO: dacScan step from 0 .. 19
[13:35:19.773] <TB2> INFO: Test took 25856ms.
[13:35:19.818] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:19.818] <TB2> INFO: dacScan step from 20 .. 39
[13:35:46.388] <TB2> INFO: Test took 26570ms.
[13:35:46.452] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:46.455] <TB2> INFO: dacScan step from 40 .. 59
[13:36:22.048] <TB2> INFO: Test took 35593ms.
[13:36:22.317] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:22.355] <TB2> INFO: dacScan step from 60 .. 79







[13:37:00.946] <TB2> INFO: Test took 38591ms.
[13:37:01.233] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:01.284] <TB2> INFO: dacScan step from 80 .. 99



[13:37:37.118] <TB2> INFO: Test took 35835ms.
[13:37:37.406] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:37.459] <TB2> INFO: dacScan step from 100 .. 119



[13:38:14.582] <TB2> INFO: Test took 37123ms.
[13:38:14.865] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:14.917] <TB2> INFO: dacScan step from 120 .. 139



[13:38:53.808] <TB2> INFO: Test took 38892ms.
[13:38:54.125] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:54.178] <TB2> INFO: dacScan step from 140 .. 159



[13:39:32.688] <TB2> INFO: Test took 38509ms.
[13:39:32.965] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:33.016] <TB2> INFO: dacScan step from 160 .. 179



[13:40:09.330] <TB2> INFO: Test took 36314ms.
[13:40:09.775] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:09.846] <TB2> INFO: dacScan step from 180 .. 199



[13:40:48.800] <TB2> INFO: Test took 38954ms.
[13:40:49.103] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:16.221] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 87 (20) hits flags = 16 (plus default)
[13:41:16.230] <TB2> INFO: dacScan step from 0 .. 19
[13:41:42.449] <TB2> INFO: Test took 26219ms.
[13:41:42.493] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:42.493] <TB2> INFO: dacScan step from 20 .. 39
[13:42:07.925] <TB2> INFO: Test took 25432ms.
[13:42:08.021] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:08.030] <TB2> INFO: dacScan step from 40 .. 59





[13:42:43.444] <TB2> INFO: Test took 35414ms.
[13:42:43.734] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:43.778] <TB2> INFO: dacScan step from 60 .. 79





[13:43:22.763] <TB2> INFO: Test took 38985ms.
[13:43:23.144] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:23.200] <TB2> INFO: dacScan step from 80 .. 87
[13:43:40.333] <TB2> INFO: Test took 17133ms.
[13:43:40.445] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:58.362] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 77 (20) hits flags = 16 (plus default)
[13:43:58.370] <TB2> INFO: dacScan step from 0 .. 19
[13:44:22.739] <TB2> INFO: Test took 24369ms.
[13:44:22.783] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:22.783] <TB2> INFO: dacScan step from 20 .. 39
[13:44:51.810] <TB2> INFO: Test took 29027ms.
[13:44:51.974] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:51.993] <TB2> INFO: dacScan step from 40 .. 59





[13:45:30.456] <TB2> INFO: Test took 38463ms.
[13:45:30.788] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:30.840] <TB2> INFO: dacScan step from 60 .. 77
[13:46:05.906] <TB2> INFO: Test took 35066ms.
[13:46:06.157] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:23.103] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 70 (20) hits flags = 16 (plus default)
[13:46:23.112] <TB2> INFO: dacScan step from 0 .. 19
[13:46:48.904] <TB2> INFO: Test took 25792ms.
[13:46:48.951] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:48.952] <TB2> INFO: dacScan step from 20 .. 39
[13:47:19.603] <TB2> INFO: Test took 30651ms.
[13:47:19.775] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:19.796] <TB2> INFO: dacScan step from 40 .. 59






[13:47:58.752] <TB2> INFO: Test took 38956ms.
[13:47:59.045] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:59.093] <TB2> INFO: dacScan step from 60 .. 70
[13:48:21.690] <TB2> INFO: Test took 22597ms.
[13:48:21.869] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:37.124] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 67 (20) hits flags = 16 (plus default)
[13:48:37.134] <TB2> INFO: dacScan step from 0 .. 19
[13:49:02.607] <TB2> INFO: Test took 25473ms.
[13:49:02.650] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:02.651] <TB2> INFO: dacScan step from 20 .. 39
[13:49:34.617] <TB2> INFO: Test took 31966ms.
[13:49:34.827] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:34.855] <TB2> INFO: dacScan step from 40 .. 59




[13:50:14.222] <TB2> INFO: Test took 39367ms.
[13:50:14.538] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:14.590] <TB2> INFO: dacScan step from 60 .. 67
[13:50:31.838] <TB2> INFO: Test took 17248ms.
[13:50:31.996] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:50.131] <TB2> INFO: PixTestTrim::trimBitTest() done
[13:50:50.132] <TB2> INFO: PixTestTrim::doTest() done, duration: 2152 seconds
[13:50:50.843] <TB2> INFO: ######################################################################
[13:50:50.843] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:50:50.843] <TB2> INFO: ######################################################################
[13:50:54.514] <TB2> INFO: Test took 3669ms.
[13:50:54.532] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:58.605] <TB2> INFO: Test took 3875ms.
[13:50:58.681] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:02.408] <TB2> INFO: Test took 3717ms.
[13:51:02.481] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:02.490] <TB2> INFO: The DUT currently contains the following objects:
[13:51:02.490] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:02.490] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:51:02.490] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:51:02.490] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:02.490] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:02.490] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:02.490] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:02.490] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:02.490] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:02.490] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:02.490] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:02.490] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:02.490] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:02.490] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:02.490] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:02.490] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:02.490] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:02.490] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:02.490] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:02.490] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:03.628] <TB2> INFO: Test took 1138ms.
[13:51:03.629] <TB2> INFO: The DUT currently contains the following objects:
[13:51:03.639] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:03.639] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:51:03.639] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:51:03.639] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:03.639] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:03.639] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:03.639] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:03.639] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:03.639] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:03.640] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:03.640] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:03.640] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:03.640] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:03.640] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:03.640] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:03.640] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:03.640] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:03.640] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:03.640] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:03.640] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:04.738] <TB2> INFO: Test took 1098ms.
[13:51:04.739] <TB2> INFO: The DUT currently contains the following objects:
[13:51:04.739] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:04.739] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:51:04.739] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:51:04.739] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:04.739] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:04.739] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:04.739] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:04.739] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:04.739] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:04.740] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:04.740] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:04.740] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:04.740] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:04.740] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:04.740] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:04.740] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:04.740] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:04.740] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:04.740] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:04.740] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:05.848] <TB2> INFO: Test took 1108ms.
[13:51:05.850] <TB2> INFO: The DUT currently contains the following objects:
[13:51:05.850] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:05.850] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:51:05.850] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:51:05.850] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:05.850] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:05.850] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:05.850] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:05.850] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:05.850] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:05.850] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:05.850] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:05.850] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:05.850] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:05.850] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:05.851] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:05.851] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:05.851] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:05.851] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:05.851] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:05.851] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:06.958] <TB2> INFO: Test took 1107ms.
[13:51:06.959] <TB2> INFO: The DUT currently contains the following objects:
[13:51:06.959] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:06.960] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:51:06.960] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:51:06.960] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:06.960] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:06.960] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:06.960] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:06.960] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:06.960] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:06.960] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:06.960] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:06.960] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:06.960] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:06.960] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:06.960] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:06.960] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:06.960] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:06.960] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:06.960] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:06.960] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:08.097] <TB2> INFO: Test took 1137ms.
[13:51:08.099] <TB2> INFO: The DUT currently contains the following objects:
[13:51:08.099] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:08.099] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:51:08.099] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:51:08.099] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:08.099] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:08.099] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:08.099] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:08.099] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:08.099] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:08.099] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:08.099] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:08.099] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:08.099] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:08.099] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:08.099] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:08.099] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:08.099] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:08.099] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:08.099] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:08.099] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:09.207] <TB2> INFO: Test took 1108ms.
[13:51:09.208] <TB2> INFO: The DUT currently contains the following objects:
[13:51:09.208] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:09.208] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:51:09.208] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:51:09.208] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:09.208] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:09.208] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:09.209] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:09.209] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:09.209] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:09.209] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:09.209] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:09.209] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:09.209] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:09.209] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:09.209] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:09.209] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:09.209] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:09.209] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:09.209] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:09.209] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:10.331] <TB2> INFO: Test took 1122ms.
[13:51:10.333] <TB2> INFO: The DUT currently contains the following objects:
[13:51:10.333] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:10.333] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:51:10.333] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:51:10.333] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:10.333] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:10.333] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:10.333] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:10.333] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:10.333] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:10.333] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:10.333] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:10.333] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:10.333] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:10.334] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:10.334] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:10.334] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:10.334] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:10.334] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:10.334] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:10.334] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:11.439] <TB2> INFO: Test took 1105ms.
[13:51:11.440] <TB2> INFO: The DUT currently contains the following objects:
[13:51:11.440] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:11.440] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:51:11.440] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:51:11.440] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:11.440] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:11.440] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:11.440] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:11.440] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:11.440] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:11.440] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:11.440] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:11.440] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:11.441] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:11.441] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:11.441] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:11.441] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:11.441] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:11.441] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:11.441] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:11.441] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:12.563] <TB2> INFO: Test took 1122ms.
[13:51:12.564] <TB2> INFO: The DUT currently contains the following objects:
[13:51:12.564] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:12.564] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:51:12.564] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:51:12.564] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:12.564] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:12.564] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:12.564] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:12.564] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:12.564] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:12.564] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:12.564] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:12.564] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:12.564] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:12.564] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:12.565] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:12.565] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:12.565] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:12.565] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:12.565] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:12.565] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:13.685] <TB2> INFO: Test took 1120ms.
[13:51:13.687] <TB2> INFO: The DUT currently contains the following objects:
[13:51:13.687] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:13.687] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:51:13.687] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:51:13.687] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:13.687] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:13.687] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:13.687] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:13.687] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:13.687] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:13.687] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:13.687] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:13.687] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:13.687] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:13.687] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:13.687] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:13.687] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:13.687] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:13.687] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:13.687] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:13.687] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:14.796] <TB2> INFO: Test took 1109ms.
[13:51:14.797] <TB2> INFO: The DUT currently contains the following objects:
[13:51:14.807] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:14.807] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:51:14.807] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:51:14.807] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:14.807] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:14.807] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:14.807] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:14.807] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:14.807] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:14.807] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:14.807] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:14.807] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:14.807] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:14.807] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:14.807] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:14.807] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:14.807] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:14.807] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:14.807] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:14.807] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:15.920] <TB2> INFO: Test took 1113ms.
[13:51:15.921] <TB2> INFO: The DUT currently contains the following objects:
[13:51:15.921] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:15.921] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:51:15.921] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:51:15.921] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:15.921] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:15.922] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:15.922] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:15.922] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:15.922] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:15.922] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:15.922] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:15.922] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:15.922] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:15.922] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:15.922] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:15.922] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:15.922] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:15.922] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:15.922] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:15.922] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:17.071] <TB2> INFO: Test took 1149ms.
[13:51:17.073] <TB2> INFO: The DUT currently contains the following objects:
[13:51:17.073] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:17.073] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:51:17.073] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:51:17.073] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:17.073] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:17.073] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:17.073] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:17.073] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:17.073] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:17.073] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:17.073] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:17.073] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:17.073] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:17.073] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:17.073] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:17.073] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:17.073] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:17.073] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:17.073] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:17.073] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:18.210] <TB2> INFO: Test took 1137ms.
[13:51:18.211] <TB2> INFO: The DUT currently contains the following objects:
[13:51:18.211] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:18.211] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:51:18.211] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:51:18.211] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:18.211] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:18.211] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:18.211] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:18.212] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:18.212] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:18.212] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:18.212] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:18.212] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:18.212] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:18.212] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:18.212] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:18.212] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:18.212] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:18.212] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:18.212] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:18.212] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:19.319] <TB2> INFO: Test took 1107ms.
[13:51:19.320] <TB2> INFO: The DUT currently contains the following objects:
[13:51:19.320] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:51:19.320] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:51:19.320] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:51:19.320] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:51:19.321] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:19.321] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:19.321] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:19.321] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:19.321] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:19.321] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:19.321] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:19.321] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:19.321] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:19.321] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:19.321] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:19.321] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:19.321] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:19.321] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:19.321] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:19.321] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:51:20.443] <TB2> INFO: Test took 1122ms.
[13:51:20.447] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:55:52.153] <TB2> INFO: Test took 271706ms.
[13:55:53.580] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:03.005] <TB2> INFO: Test took 249425ms.
[14:00:04.542] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:04.549] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:04.555] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:04.562] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:04.568] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:04.575] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:04.581] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:04.588] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:04.594] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:04.601] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:04.607] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:00:04.614] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:00:04.620] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[14:00:04.627] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[14:00:04.633] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[14:00:04.640] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[14:00:04.646] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[14:00:04.653] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:04.659] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:00:04.666] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:00:04.672] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[14:00:04.679] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:04.685] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:04.692] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:04.698] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:04.705] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:00:04.756] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:00:04.756] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:00:04.756] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:00:04.763] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:00:04.766] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:00:04.767] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:00:04.767] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:00:04.769] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:00:04.769] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:00:04.769] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:00:04.772] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:00:04.772] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:00:04.773] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:00:04.773] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:00:04.773] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:00:04.774] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:00:08.317] <TB2> INFO: Test took 3541ms.
[14:00:12.078] <TB2> INFO: Test took 3501ms.
[14:00:15.818] <TB2> INFO: Test took 3479ms.
[14:00:16.084] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:17.010] <TB2> INFO: Test took 926ms.
[14:00:17.011] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:18.126] <TB2> INFO: Test took 1115ms.
[14:00:18.127] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:19.228] <TB2> INFO: Test took 1101ms.
[14:00:19.229] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:20.344] <TB2> INFO: Test took 1115ms.
[14:00:20.345] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:21.445] <TB2> INFO: Test took 1100ms.
[14:00:21.447] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:22.577] <TB2> INFO: Test took 1130ms.
[14:00:22.579] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:23.679] <TB2> INFO: Test took 1100ms.
[14:00:23.681] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:24.781] <TB2> INFO: Test took 1100ms.
[14:00:24.783] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:25.897] <TB2> INFO: Test took 1114ms.
[14:00:25.899] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:27.013] <TB2> INFO: Test took 1114ms.
[14:00:27.015] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:28.129] <TB2> INFO: Test took 1114ms.
[14:00:28.131] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:29.230] <TB2> INFO: Test took 1099ms.
[14:00:29.232] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:30.346] <TB2> INFO: Test took 1114ms.
[14:00:30.348] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:31.448] <TB2> INFO: Test took 1100ms.
[14:00:31.450] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:32.564] <TB2> INFO: Test took 1114ms.
[14:00:32.565] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:33.665] <TB2> INFO: Test took 1100ms.
[14:00:33.667] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:34.766] <TB2> INFO: Test took 1100ms.
[14:00:34.768] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:35.868] <TB2> INFO: Test took 1100ms.
[14:00:35.870] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:36.985] <TB2> INFO: Test took 1115ms.
[14:00:36.987] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:38.086] <TB2> INFO: Test took 1099ms.
[14:00:38.088] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:39.188] <TB2> INFO: Test took 1100ms.
[14:00:39.190] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:40.289] <TB2> INFO: Test took 1099ms.
[14:00:40.291] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:41.436] <TB2> INFO: Test took 1145ms.
[14:00:41.437] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:42.580] <TB2> INFO: Test took 1143ms.
[14:00:42.582] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:43.696] <TB2> INFO: Test took 1114ms.
[14:00:43.697] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:44.811] <TB2> INFO: Test took 1114ms.
[14:00:44.813] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:45.956] <TB2> INFO: Test took 1144ms.
[14:00:45.958] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:47.058] <TB2> INFO: Test took 1100ms.
[14:00:47.060] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:48.174] <TB2> INFO: Test took 1114ms.
[14:00:48.176] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:49.305] <TB2> INFO: Test took 1129ms.
[14:00:49.307] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:50.407] <TB2> INFO: Test took 1101ms.
[14:00:50.409] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:51.537] <TB2> INFO: Test took 1129ms.
[14:00:52.041] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 601 seconds
[14:00:52.041] <TB2> INFO: PH scale (per ROC): 85 78 96 85 95 89 82 100 87 103 80 103 79 83 89 95
[14:00:52.041] <TB2> INFO: PH offset (per ROC): 141 160 146 151 139 143 156 133 158 144 166 134 157 165 149 144
[14:00:52.204] <TB2> INFO: ######################################################################
[14:00:52.204] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:00:52.204] <TB2> INFO: ######################################################################
[14:00:52.213] <TB2> INFO: scanning low vcal = 50
[14:00:56.620] <TB2> INFO: Test took 4407ms.
[14:00:56.673] <TB2> INFO: scanning low vcal = 100
[14:01:01.060] <TB2> INFO: Test took 4387ms.
[14:01:01.113] <TB2> INFO: scanning low vcal = 150
[14:01:05.528] <TB2> INFO: Test took 4415ms.
[14:01:05.579] <TB2> INFO: scanning low vcal = 200
[14:01:10.053] <TB2> INFO: Test took 4473ms.
[14:01:10.107] <TB2> INFO: scanning low vcal = 250
[14:01:14.613] <TB2> INFO: Test took 4506ms.
[14:01:14.667] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[14:01:19.199] <TB2> INFO: Test took 4532ms.
[14:01:19.251] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[14:01:23.627] <TB2> INFO: Test took 4375ms.
[14:01:23.679] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[14:01:28.271] <TB2> INFO: Test took 4592ms.
[14:01:28.324] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[14:01:32.800] <TB2> INFO: Test took 4476ms.
[14:01:32.853] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:01:37.387] <TB2> INFO: Test took 4534ms.
[14:01:37.673] <TB2> INFO: PixTestGainPedestal::measure() done
[14:02:00.270] <TB2> INFO: PixTestGainPedestal::fit() done
[14:02:00.271] <TB2> INFO: non-linearity mean: 0.961 0.952 0.951 0.949 0.960 0.956 0.951 0.947 0.948 0.958 0.960 0.954 0.957 0.949 0.953 0.959
[14:02:00.271] <TB2> INFO: non-linearity RMS: 0.005 0.006 0.006 0.006 0.005 0.005 0.007 0.006 0.006 0.004 0.005 0.004 0.006 0.006 0.006 0.005
[14:02:00.271] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[14:02:00.289] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[14:02:00.307] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[14:02:00.325] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[14:02:00.343] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[14:02:00.361] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[14:02:00.379] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[14:02:00.398] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[14:02:00.416] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[14:02:00.434] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[14:02:00.453] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[14:02:00.471] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[14:02:00.489] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[14:02:00.507] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[14:02:00.524] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[14:02:00.543] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[14:02:00.561] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 68 seconds
[14:02:00.567] <TB2> INFO: enter test to run
[14:02:00.569] <TB2> INFO: test: exit no parameter change
[14:02:01.053] <TB2> QUIET: Connection to board 0 closed.
[14:02:01.133] <TB2> INFO: pXar: this is the end, my friend