[09:12:57.212] <TB2> INFO: *** Welcome to pxar ***
[09:12:57.212] <TB2> INFO: *** Today: 2015/07/08
[09:12:57.212] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C15.dat
[09:12:57.213] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//tbmParameters_C0b.dat
[09:12:57.213] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//defaultMaskFile.dat
[09:12:57.213] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters_C15.dat
[09:12:57.312] <TB2> INFO: clk: 4
[09:12:57.312] <TB2> INFO: ctr: 4
[09:12:57.312] <TB2> INFO: sda: 19
[09:12:57.312] <TB2> INFO: tin: 9
[09:12:57.312] <TB2> INFO: level: 15
[09:12:57.312] <TB2> INFO: triggerdelay: 0
[09:12:57.312] <TB2> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[09:12:57.312] <TB2> INFO: Log level: INFO
[09:12:57.319] <TB2> INFO: Found DTB DTB_WXC55Z
[09:12:57.330] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[09:12:57.333] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 0
HW version:
FW version: 4.0
SW version: 4.0
USB id:
MAC address: 000000000000
Hostname:
Comment:
------------------------------------------------------
[09:12:57.336] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[09:12:58.888] <TB2> INFO: DUT info:
[09:12:58.888] <TB2> INFO: The DUT currently contains the following objects:
[09:12:58.888] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:12:58.888] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:12:58.888] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:12:58.888] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[09:12:58.888] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:58.888] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:58.888] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:58.888] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:58.888] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:58.888] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:58.888] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:58.888] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:58.888] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:58.889] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:58.889] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:58.889] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:58.889] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:58.889] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:58.889] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:58.889] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:59.290] <TB2> INFO: enter 'restricted' command line mode
[09:12:59.290] <TB2> INFO: enter test to run
[09:12:59.290] <TB2> INFO: test: pretest no parameter change
[09:12:59.290] <TB2> INFO: running: pretest
[09:12:59.299] <TB2> INFO: ######################################################################
[09:12:59.299] <TB2> INFO: PixTestPretest::doTest()
[09:12:59.299] <TB2> INFO: ######################################################################
[09:12:59.301] <TB2> INFO: ----------------------------------------------------------------------
[09:12:59.301] <TB2> INFO: PixTestPretest::programROC()
[09:12:59.301] <TB2> INFO: ----------------------------------------------------------------------
[09:13:17.317] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:13:17.317] <TB2> INFO: IA differences per ROC: 16.9 16.9 17.7 20.1 19.3 18.5 20.9 19.3 19.3 18.5 17.7 17.7 18.5 18.5 20.1 17.7
[09:13:17.383] <TB2> INFO: ----------------------------------------------------------------------
[09:13:17.383] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:13:17.383] <TB2> INFO: ----------------------------------------------------------------------
[09:13:36.941] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 384.3 mA = 24.0187 mA/ROC
[09:13:36.945] <TB2> INFO: ----------------------------------------------------------------------
[09:13:36.945] <TB2> INFO: PixTestPretest::findWorkingPixel()
[09:13:36.945] <TB2> INFO: ----------------------------------------------------------------------
[09:13:46.380] <TB2> INFO: Test took 9429ms.
[09:13:46.682] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:13:46.714] <TB2> INFO: ----------------------------------------------------------------------
[09:13:46.714] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[09:13:46.714] <TB2> INFO: ----------------------------------------------------------------------
[09:13:55.885] <TB2> INFO: Test took 9163ms.
[09:13:56.186] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[09:13:56.186] <TB2> INFO: CalDel: 143 146 145 132 140 133 145 137 115 142 113 126 133 124 142 111
[09:13:56.186] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[09:13:56.190] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C0.dat
[09:13:56.190] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C1.dat
[09:13:56.190] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C2.dat
[09:13:56.190] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C3.dat
[09:13:56.190] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C4.dat
[09:13:56.191] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C5.dat
[09:13:56.191] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C6.dat
[09:13:56.191] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C7.dat
[09:13:56.191] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C8.dat
[09:13:56.191] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C9.dat
[09:13:56.192] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C10.dat
[09:13:56.192] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C11.dat
[09:13:56.192] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C12.dat
[09:13:56.192] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C13.dat
[09:13:56.192] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C14.dat
[09:13:56.193] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C15.dat
[09:13:56.193] <TB2> INFO: PixTestPretest::doTest() done, duration: 56 seconds
[09:13:56.294] <TB2> INFO: enter test to run
[09:13:56.294] <TB2> INFO: test: fulltest no parameter change
[09:13:56.294] <TB2> INFO: running: fulltest
[09:13:56.294] <TB2> INFO: ######################################################################
[09:13:56.294] <TB2> INFO: PixTestFullTest::doTest()
[09:13:56.294] <TB2> INFO: ######################################################################
[09:13:56.295] <TB2> INFO: ######################################################################
[09:13:56.295] <TB2> INFO: PixTestAlive::doTest()
[09:13:56.295] <TB2> INFO: ######################################################################
[09:13:56.297] <TB2> INFO: ----------------------------------------------------------------------
[09:13:56.297] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:13:56.297] <TB2> INFO: ----------------------------------------------------------------------
[09:14:00.048] <TB2> INFO: Test took 3750ms.
[09:14:00.072] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:00.298] <TB2> INFO: PixTestAlive::aliveTest() done
[09:14:00.298] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:14:00.299] <TB2> INFO: ----------------------------------------------------------------------
[09:14:00.299] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:14:00.299] <TB2> INFO: ----------------------------------------------------------------------
[09:14:03.227] <TB2> INFO: Test took 2926ms.
[09:14:03.230] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:03.231] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:14:03.457] <TB2> INFO: PixTestAlive::maskTest() done
[09:14:03.457] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:14:03.459] <TB2> INFO: ----------------------------------------------------------------------
[09:14:03.459] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:14:03.459] <TB2> INFO: ----------------------------------------------------------------------
[09:14:07.305] <TB2> INFO: Test took 3845ms.
[09:14:07.328] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:07.555] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[09:14:07.555] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:14:07.555] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[09:14:07.570] <TB2> INFO: ######################################################################
[09:14:07.570] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:14:07.570] <TB2> INFO: ######################################################################
[09:14:07.573] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[09:14:07.593] <TB2> INFO: dacScan step from 0 .. 29
[09:14:31.620] <TB2> INFO: Test took 24027ms.
[09:14:31.654] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:31.654] <TB2> INFO: dacScan step from 30 .. 59
[09:14:58.194] <TB2> INFO: Test took 26540ms.
[09:14:58.327] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:58.346] <TB2> INFO: dacScan step from 60 .. 89
[09:15:32.089] <TB2> INFO: Test took 33743ms.
[09:15:32.372] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:15:32.452] <TB2> INFO: dacScan step from 90 .. 119
[09:16:04.057] <TB2> INFO: Test took 31605ms.
[09:16:04.366] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:04.461] <TB2> INFO: dacScan step from 120 .. 149
[09:16:32.808] <TB2> INFO: Test took 28347ms.
[09:16:32.995] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:57.062] <TB2> INFO: PixTestBBMap::doTest() done, duration: 169 seconds
[09:16:57.062] <TB2> INFO: number of dead bumps (per ROC): 10 1 0 0 0 0 2 4 2 1 0 1 1 0 1 17
[09:16:57.062] <TB2> INFO: separation cut (per ROC): 70 90 70 99 96 77 101 80 87 71 91 73 92 97 72 94
[09:16:57.149] <TB2> INFO: ######################################################################
[09:16:57.149] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[09:16:57.149] <TB2> INFO: ######################################################################
[09:16:57.149] <TB2> INFO: ----------------------------------------------------------------------
[09:16:57.149] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[09:16:57.149] <TB2> INFO: ----------------------------------------------------------------------
[09:16:57.149] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[09:16:57.157] <TB2> INFO: dacScan step from 0 .. 3
[09:17:19.320] <TB2> INFO: Test took 22163ms.
[09:17:19.352] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:19.352] <TB2> INFO: dacScan step from 4 .. 7
[09:17:41.205] <TB2> INFO: Test took 21852ms.
[09:17:41.231] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:41.231] <TB2> INFO: dacScan step from 8 .. 11
[09:18:03.094] <TB2> INFO: Test took 21863ms.
[09:18:03.122] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:03.122] <TB2> INFO: dacScan step from 12 .. 15
[09:18:25.085] <TB2> INFO: Test took 21963ms.
[09:18:25.112] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:25.112] <TB2> INFO: dacScan step from 16 .. 19
[09:18:47.070] <TB2> INFO: Test took 21958ms.
[09:18:47.097] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:47.097] <TB2> INFO: dacScan step from 20 .. 23
[09:19:09.013] <TB2> INFO: Test took 21916ms.
[09:19:09.045] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:09.046] <TB2> INFO: dacScan step from 24 .. 27
[09:19:31.029] <TB2> INFO: Test took 21983ms.
[09:19:31.056] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:31.056] <TB2> INFO: dacScan step from 28 .. 31
[09:19:52.878] <TB2> INFO: Test took 21822ms.
[09:19:52.905] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:52.905] <TB2> INFO: dacScan step from 32 .. 35
[09:20:15.045] <TB2> INFO: Test took 22140ms.
[09:20:15.074] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:15.074] <TB2> INFO: dacScan step from 36 .. 39
[09:20:36.762] <TB2> INFO: Test took 21688ms.
[09:20:36.792] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:36.792] <TB2> INFO: dacScan step from 40 .. 43
[09:20:58.768] <TB2> INFO: Test took 21976ms.
[09:20:58.795] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:58.795] <TB2> INFO: dacScan step from 44 .. 47
[09:21:20.799] <TB2> INFO: Test took 22004ms.
[09:21:20.825] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:20.825] <TB2> INFO: dacScan step from 48 .. 51
[09:21:43.268] <TB2> INFO: Test took 22443ms.
[09:21:43.295] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:43.295] <TB2> INFO: dacScan step from 52 .. 55
[09:22:05.525] <TB2> INFO: Test took 22231ms.
[09:22:05.552] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:05.552] <TB2> INFO: dacScan step from 56 .. 59
[09:22:27.682] <TB2> INFO: Test took 22130ms.
[09:22:27.715] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:27.716] <TB2> INFO: dacScan step from 60 .. 63
[09:22:50.199] <TB2> INFO: Test took 22483ms.
[09:22:50.244] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:50.245] <TB2> INFO: dacScan step from 64 .. 67
[09:23:13.858] <TB2> INFO: Test took 23613ms.
[09:23:13.917] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:23:13.919] <TB2> INFO: dacScan step from 68 .. 71
[09:23:38.917] <TB2> INFO: Test took 24998ms.
[09:23:38.999] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:23:39.002] <TB2> INFO: dacScan step from 72 .. 75
[09:24:05.694] <TB2> INFO: Test took 26692ms.
[09:24:05.803] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:05.807] <TB2> INFO: dacScan step from 76 .. 79
[09:24:34.832] <TB2> INFO: Test took 29025ms.
[09:24:34.975] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:34.980] <TB2> INFO: dacScan step from 80 .. 83
[09:25:07.101] <TB2> INFO: Test took 32121ms.
[09:25:07.274] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:07.283] <TB2> INFO: dacScan step from 84 .. 87
[09:25:40.249] <TB2> INFO: Test took 32966ms.
[09:25:40.440] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:40.450] <TB2> INFO: dacScan step from 88 .. 91
[09:26:13.829] <TB2> INFO: Test took 33379ms.
[09:26:14.037] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:26:14.049] <TB2> INFO: dacScan step from 92 .. 95
[09:26:48.168] <TB2> INFO: Test took 34119ms.
[09:26:48.391] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:26:48.402] <TB2> INFO: dacScan step from 96 .. 99






[09:27:22.849] <TB2> INFO: Test took 34447ms.
[09:27:23.068] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:27:23.083] <TB2> INFO: dacScan step from 100 .. 103






[09:27:57.270] <TB2> INFO: Test took 34187ms.
[09:27:57.537] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:27:57.548] <TB2> INFO: dacScan step from 104 .. 107






[09:28:33.028] <TB2> INFO: Test took 35479ms.
[09:28:33.274] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:33.286] <TB2> INFO: dacScan step from 108 .. 111





[09:29:07.281] <TB2> INFO: Test took 33995ms.
[09:29:07.527] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:07.540] <TB2> INFO: dacScan step from 112 .. 115






[09:29:42.171] <TB2> INFO: Test took 34631ms.
[09:29:42.408] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:42.421] <TB2> INFO: dacScan step from 116 .. 119


[09:30:16.955] <TB2> INFO: Test took 34533ms.
[09:30:17.196] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:17.208] <TB2> INFO: dacScan step from 120 .. 123


[09:30:51.957] <TB2> INFO: Test took 34749ms.
[09:30:52.184] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:52.197] <TB2> INFO: dacScan step from 124 .. 127


[09:31:23.944] <TB2> INFO: Test took 31747ms.
[09:31:24.163] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:24.175] <TB2> INFO: dacScan step from 128 .. 131


[09:31:56.480] <TB2> INFO: Test took 32305ms.
[09:31:56.726] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:56.738] <TB2> INFO: dacScan step from 132 .. 135


[09:32:32.411] <TB2> INFO: Test took 35673ms.
[09:32:32.653] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:32.665] <TB2> INFO: dacScan step from 136 .. 139


[09:33:08.038] <TB2> INFO: Test took 35373ms.
[09:33:08.307] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:08.325] <TB2> INFO: dacScan step from 140 .. 143


[09:33:42.382] <TB2> INFO: Test took 34056ms.
[09:33:42.623] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:42.635] <TB2> INFO: dacScan step from 144 .. 147


[09:34:14.844] <TB2> INFO: Test took 32209ms.
[09:34:15.179] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:15.191] <TB2> INFO: dacScan step from 148 .. 149
[09:34:33.855] <TB2> INFO: Test took 18664ms.
[09:34:33.965] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:33.976] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:34:35.661] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:34:37.173] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:34:38.746] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:34:40.146] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:34:41.511] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:34:42.941] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:34:44.319] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:34:45.781] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:34:47.440] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:34:49.334] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:34:50.883] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:34:52.358] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:34:53.806] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:34:55.394] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:34:56.952] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:34:58.621] <TB2> INFO: PixTestScurves::scurves() done
[09:34:58.621] <TB2> INFO: Vcal mean: 73.33 81.34 66.16 80.71 87.26 73.57 89.06 75.49 82.32 72.25 93.28 72.81 97.90 86.65 78.71 96.79
[09:34:58.621] <TB2> INFO: Vcal RMS: 4.95 5.29 5.08 4.91 5.36 4.30 5.45 4.15 5.13 4.87 6.09 4.80 5.89 5.27 3.98 5.42
[09:34:58.621] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1081 seconds
[09:34:58.700] <TB2> INFO: ######################################################################
[09:34:58.700] <TB2> INFO: PixTestTrim::doTest()
[09:34:58.700] <TB2> INFO: ######################################################################
[09:34:58.701] <TB2> INFO: ----------------------------------------------------------------------
[09:34:58.701] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[09:34:58.701] <TB2> INFO: ----------------------------------------------------------------------
[09:34:58.804] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:34:58.804] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:34:58.812] <TB2> INFO: dacScan step from 0 .. 19
[09:35:15.506] <TB2> INFO: Test took 16694ms.
[09:35:15.529] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:15.529] <TB2> INFO: dacScan step from 20 .. 39
[09:35:32.266] <TB2> INFO: Test took 16737ms.
[09:35:32.287] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:32.287] <TB2> INFO: dacScan step from 40 .. 59
[09:35:48.992] <TB2> INFO: Test took 16705ms.
[09:35:49.015] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:49.015] <TB2> INFO: dacScan step from 60 .. 79
[09:36:05.836] <TB2> INFO: Test took 16821ms.
[09:36:05.868] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:05.868] <TB2> INFO: dacScan step from 80 .. 99
[09:36:24.184] <TB2> INFO: Test took 18316ms.
[09:36:24.278] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:24.295] <TB2> INFO: dacScan step from 100 .. 119
[09:36:45.132] <TB2> INFO: Test took 20837ms.
[09:36:45.348] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:45.386] <TB2> INFO: dacScan step from 120 .. 139
[09:37:05.720] <TB2> INFO: Test took 20333ms.
[09:37:05.932] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:05.970] <TB2> INFO: dacScan step from 140 .. 159
[09:37:24.390] <TB2> INFO: Test took 18420ms.
[09:37:24.462] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:46.807] <TB2> INFO: ROC 0 VthrComp = 77
[09:37:46.807] <TB2> INFO: ROC 1 VthrComp = 85
[09:37:46.807] <TB2> INFO: ROC 2 VthrComp = 73
[09:37:46.807] <TB2> INFO: ROC 3 VthrComp = 89
[09:37:46.807] <TB2> INFO: ROC 4 VthrComp = 97
[09:37:46.807] <TB2> INFO: ROC 5 VthrComp = 80
[09:37:46.807] <TB2> INFO: ROC 6 VthrComp = 97
[09:37:46.807] <TB2> INFO: ROC 7 VthrComp = 84
[09:37:46.808] <TB2> INFO: ROC 8 VthrComp = 90
[09:37:46.808] <TB2> INFO: ROC 9 VthrComp = 79
[09:37:46.808] <TB2> INFO: ROC 10 VthrComp = 97
[09:37:46.808] <TB2> INFO: ROC 11 VthrComp = 78
[09:37:46.808] <TB2> INFO: ROC 12 VthrComp = 99
[09:37:46.808] <TB2> INFO: ROC 13 VthrComp = 96
[09:37:46.808] <TB2> INFO: ROC 14 VthrComp = 87
[09:37:46.808] <TB2> INFO: ROC 15 VthrComp = 105
[09:37:46.809] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:37:46.809] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:37:46.817] <TB2> INFO: dacScan step from 0 .. 19
[09:38:03.432] <TB2> INFO: Test took 16615ms.
[09:38:03.456] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:03.456] <TB2> INFO: dacScan step from 20 .. 39
[09:38:19.902] <TB2> INFO: Test took 16446ms.
[09:38:19.938] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:19.941] <TB2> INFO: dacScan step from 40 .. 59
[09:38:41.718] <TB2> INFO: Test took 21777ms.
[09:38:41.896] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:41.939] <TB2> INFO: dacScan step from 60 .. 79
[09:39:05.503] <TB2> INFO: Test took 23564ms.
[09:39:05.685] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:05.743] <TB2> INFO: dacScan step from 80 .. 99
[09:39:29.204] <TB2> INFO: Test took 23460ms.
[09:39:29.383] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:29.435] <TB2> INFO: dacScan step from 100 .. 119
[09:39:52.543] <TB2> INFO: Test took 23108ms.
[09:39:52.709] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:52.762] <TB2> INFO: dacScan step from 120 .. 139
[09:40:16.036] <TB2> INFO: Test took 23274ms.
[09:40:16.198] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:16.263] <TB2> INFO: dacScan step from 140 .. 159
[09:40:39.670] <TB2> INFO: Test took 23407ms.
[09:40:39.848] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:05.297] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 59.1057 for pixel 11/65 mean/min/max = 46.6543/34.1297/59.1789
[09:41:05.297] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 59.7734 for pixel 1/73 mean/min/max = 45.6234/31.417/59.8297
[09:41:05.298] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 57.8946 for pixel 7/14 mean/min/max = 45.718/33.5032/57.9328
[09:41:05.298] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 58.2663 for pixel 24/56 mean/min/max = 45.1974/32.0721/58.3227
[09:41:05.298] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 57.2143 for pixel 29/0 mean/min/max = 44.9431/32.41/57.4762
[09:41:05.298] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 55.9758 for pixel 0/40 mean/min/max = 44.5631/33.1446/55.9816
[09:41:05.299] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 57.6843 for pixel 25/79 mean/min/max = 45.0176/32.1964/57.8388
[09:41:05.299] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 55.5763 for pixel 22/51 mean/min/max = 44.0413/32.2406/55.842
[09:41:05.299] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 59.4136 for pixel 4/3 mean/min/max = 45.9897/32.48/59.4994
[09:41:05.299] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 59.6261 for pixel 0/30 mean/min/max = 46.7373/33.7616/59.7129
[09:41:05.300] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 61.3633 for pixel 32/55 mean/min/max = 46.4942/31.5314/61.4571
[09:41:05.300] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 59.3862 for pixel 3/79 mean/min/max = 46.8291/34.1785/59.4797
[09:41:05.300] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 60.5774 for pixel 1/8 mean/min/max = 46.1888/31.7327/60.6449
[09:41:05.301] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 56.95 for pixel 50/72 mean/min/max = 44.0966/31.1781/57.0151
[09:41:05.301] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 55.2801 for pixel 3/71 mean/min/max = 43.5804/31.703/55.4577
[09:41:05.301] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 59.6497 for pixel 7/77 mean/min/max = 46.1292/32.5858/59.6727
[09:41:05.301] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:42:58.003] <TB2> INFO: Test took 112702ms.
[09:42:59.790] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:42:59.797] <TB2> INFO: dacScan step from 0 .. 19
[09:43:25.870] <TB2> INFO: Test took 26072ms.
[09:43:25.917] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:43:25.919] <TB2> INFO: dacScan step from 20 .. 39
[09:43:57.380] <TB2> INFO: Test took 31461ms.
[09:43:57.664] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:43:57.700] <TB2> INFO: dacScan step from 40 .. 59



[09:44:33.539] <TB2> INFO: Test took 35839ms.
[09:44:33.876] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:33.939] <TB2> INFO: dacScan step from 60 .. 79



[09:45:12.483] <TB2> INFO: Test took 38544ms.
[09:45:12.778] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:12.837] <TB2> INFO: dacScan step from 80 .. 99






[09:45:51.816] <TB2> INFO: Test took 38979ms.
[09:45:52.264] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:52.357] <TB2> INFO: dacScan step from 100 .. 119





[09:46:31.502] <TB2> INFO: Test took 39145ms.
[09:46:31.822] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:31.876] <TB2> INFO: dacScan step from 120 .. 139



[09:47:10.624] <TB2> INFO: Test took 38748ms.
[09:47:10.902] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:10.965] <TB2> INFO: dacScan step from 140 .. 159






[09:47:49.195] <TB2> INFO: Test took 38229ms.
[09:47:49.483] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:49.541] <TB2> INFO: dacScan step from 160 .. 179






[09:48:25.414] <TB2> INFO: Test took 35872ms.
[09:48:25.778] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:25.849] <TB2> INFO: dacScan step from 180 .. 199






[09:49:03.850] <TB2> INFO: Test took 38001ms.
[09:49:04.146] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:29.660] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.079156 .. 255.000000
[09:49:29.739] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[09:49:29.747] <TB2> INFO: dacScan step from 0 .. 19
[09:49:44.075] <TB2> INFO: Test took 14328ms.
[09:49:44.094] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:44.095] <TB2> INFO: dacScan step from 20 .. 39
[09:50:00.554] <TB2> INFO: Test took 16459ms.
[09:50:00.636] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:00.653] <TB2> INFO: dacScan step from 40 .. 59
[09:50:19.763] <TB2> INFO: Test took 19110ms.
[09:50:19.949] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:20.004] <TB2> INFO: dacScan step from 60 .. 79
[09:50:38.985] <TB2> INFO: Test took 18981ms.
[09:50:39.209] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:39.264] <TB2> INFO: dacScan step from 80 .. 99
[09:50:59.400] <TB2> INFO: Test took 20136ms.
[09:50:59.539] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:59.588] <TB2> INFO: dacScan step from 100 .. 119
[09:51:18.689] <TB2> INFO: Test took 19101ms.
[09:51:18.827] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:18.877] <TB2> INFO: dacScan step from 120 .. 139
[09:51:38.255] <TB2> INFO: Test took 19378ms.
[09:51:38.479] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:38.546] <TB2> INFO: dacScan step from 140 .. 159
[09:51:58.674] <TB2> INFO: Test took 20128ms.
[09:51:58.834] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:58.888] <TB2> INFO: dacScan step from 160 .. 179
[09:52:18.952] <TB2> INFO: Test took 20064ms.
[09:52:19.093] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:52:19.142] <TB2> INFO: dacScan step from 180 .. 199
[09:52:39.555] <TB2> INFO: Test took 20413ms.
[09:52:39.692] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:52:39.749] <TB2> INFO: dacScan step from 200 .. 219
[09:52:59.824] <TB2> INFO: Test took 20075ms.
[09:52:59.998] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:53:00.049] <TB2> INFO: dacScan step from 220 .. 239
[09:53:20.076] <TB2> INFO: Test took 20027ms.
[09:53:20.216] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:53:20.292] <TB2> INFO: dacScan step from 240 .. 255
[09:53:37.030] <TB2> INFO: Test took 16738ms.
[09:53:37.149] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:08.440] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 14.110891 .. 45.624920
[09:54:08.521] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 4 .. 55 (20) hits flags = 16 (plus default)
[09:54:08.529] <TB2> INFO: dacScan step from 4 .. 23
[09:54:23.465] <TB2> INFO: Test took 14936ms.
[09:54:23.493] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:23.493] <TB2> INFO: dacScan step from 24 .. 43
[09:54:40.751] <TB2> INFO: Test took 17258ms.
[09:54:40.878] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:40.903] <TB2> INFO: dacScan step from 44 .. 55
[09:54:54.231] <TB2> INFO: Test took 13328ms.
[09:54:54.315] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:11.036] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 17.962368 .. 45.112660
[09:55:11.137] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 7 .. 55 (20) hits flags = 16 (plus default)
[09:55:11.146] <TB2> INFO: dacScan step from 7 .. 26
[09:55:25.954] <TB2> INFO: Test took 14807ms.
[09:55:25.976] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:25.976] <TB2> INFO: dacScan step from 27 .. 46
[09:55:43.901] <TB2> INFO: Test took 17925ms.
[09:55:44.043] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:44.080] <TB2> INFO: dacScan step from 47 .. 55
[09:55:54.741] <TB2> INFO: Test took 10661ms.
[09:55:54.818] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:10.916] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 20.443803 .. 42.378534
[09:56:10.996] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 10 .. 52 (20) hits flags = 16 (plus default)
[09:56:11.004] <TB2> INFO: dacScan step from 10 .. 29
[09:56:25.986] <TB2> INFO: Test took 14982ms.
[09:56:26.008] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:26.008] <TB2> INFO: dacScan step from 30 .. 49
[09:56:44.905] <TB2> INFO: Test took 18897ms.
[09:56:45.054] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:45.095] <TB2> INFO: dacScan step from 50 .. 52
[09:56:50.501] <TB2> INFO: Test took 5406ms.
[09:56:50.526] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:06.109] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[09:57:06.109] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[09:57:06.117] <TB2> INFO: dacScan step from 15 .. 34
[09:57:32.550] <TB2> INFO: Test took 26433ms.
[09:57:32.626] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:32.635] <TB2> INFO: dacScan step from 35 .. 54





[09:58:08.791] <TB2> INFO: Test took 36156ms.
[09:58:09.122] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:09.175] <TB2> INFO: dacScan step from 55 .. 55
[09:58:13.728] <TB2> INFO: Test took 4553ms.
[09:58:13.742] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:27.630] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:58:27.630] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:58:27.630] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:58:27.630] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:58:27.631] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:58:27.631] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:58:27.631] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:58:27.631] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:58:27.632] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:58:27.632] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:58:27.632] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:58:27.632] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:58:27.632] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:58:27.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:58:27.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:58:27.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:58:27.633] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C0.dat
[09:58:27.643] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C1.dat
[09:58:27.649] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C2.dat
[09:58:27.655] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C3.dat
[09:58:27.661] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C4.dat
[09:58:27.668] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C5.dat
[09:58:27.674] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C6.dat
[09:58:27.680] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C7.dat
[09:58:27.686] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C8.dat
[09:58:27.692] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C9.dat
[09:58:27.698] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C10.dat
[09:58:27.704] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C11.dat
[09:58:27.710] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C12.dat
[09:58:27.717] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C13.dat
[09:58:27.723] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C14.dat
[09:58:27.729] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C15.dat
[09:58:27.735] <TB2> INFO: PixTestTrim::trimTest() done
[09:58:27.735] <TB2> INFO: vtrim: 100 115 104 115 116 96 110 117 115 116 126 100 98 112 105 124
[09:58:27.735] <TB2> INFO: vthrcomp: 77 85 73 89 97 80 97 84 90 79 97 78 99 96 87 105
[09:58:27.735] <TB2> INFO: vcal mean: 35.07 35.06 35.06 35.02 35.02 35.01 35.06 35.01 35.05 35.07 35.04 35.04 34.77 35.01 35.03 35.06
[09:58:27.735] <TB2> INFO: vcal RMS: 1.00 1.02 0.91 0.96 1.00 0.90 0.97 0.97 0.95 0.98 1.15 0.92 1.06 1.03 1.01 1.04
[09:58:27.735] <TB2> INFO: bits mean: 9.51 9.92 9.68 9.93 10.01 9.65 9.59 10.55 9.37 9.30 10.01 8.54 9.26 10.38 10.43 10.01
[09:58:27.735] <TB2> INFO: bits RMS: 2.39 2.59 2.38 2.47 2.49 2.53 2.70 2.25 2.68 2.47 2.45 2.64 2.82 2.46 2.36 2.35
[09:58:27.739] <TB2> INFO: ----------------------------------------------------------------------
[09:58:27.740] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 240 150 100
[09:58:27.740] <TB2> INFO: ----------------------------------------------------------------------
[09:58:27.742] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:58:27.750] <TB2> INFO: dacScan step from 0 .. 19
[09:58:53.513] <TB2> INFO: Test took 25763ms.
[09:58:53.552] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:53.552] <TB2> INFO: dacScan step from 20 .. 39
[09:59:19.874] <TB2> INFO: Test took 26322ms.
[09:59:19.931] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:19.935] <TB2> INFO: dacScan step from 40 .. 59
[09:59:55.723] <TB2> INFO: Test took 35788ms.
[09:59:55.967] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:56.001] <TB2> INFO: dacScan step from 60 .. 79






[10:00:31.948] <TB2> INFO: Test took 35947ms.
[10:00:32.227] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:00:32.277] <TB2> INFO: dacScan step from 80 .. 99



[10:01:11.381] <TB2> INFO: Test took 39104ms.
[10:01:11.656] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:11.705] <TB2> INFO: dacScan step from 100 .. 119


[10:01:50.397] <TB2> INFO: Test took 38691ms.
[10:01:50.660] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:50.711] <TB2> INFO: dacScan step from 120 .. 139



[10:02:28.748] <TB2> INFO: Test took 38037ms.
[10:02:29.017] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:02:29.070] <TB2> INFO: dacScan step from 140 .. 159



[10:03:05.578] <TB2> INFO: Test took 36508ms.
[10:03:05.867] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:03:05.915] <TB2> INFO: dacScan step from 160 .. 179



[10:03:45.372] <TB2> INFO: Test took 39457ms.
[10:03:45.678] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:03:45.728] <TB2> INFO: dacScan step from 180 .. 199



[10:04:25.044] <TB2> INFO: Test took 39316ms.
[10:04:25.317] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:04:51.110] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 88 (20) hits flags = 16 (plus default)
[10:04:51.120] <TB2> INFO: dacScan step from 0 .. 19
[10:05:16.605] <TB2> INFO: Test took 25485ms.
[10:05:16.648] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:05:16.648] <TB2> INFO: dacScan step from 20 .. 39
[10:05:43.684] <TB2> INFO: Test took 27036ms.
[10:05:43.778] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:05:43.786] <TB2> INFO: dacScan step from 40 .. 59






[10:06:20.870] <TB2> INFO: Test took 37084ms.
[10:06:21.175] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:06:21.223] <TB2> INFO: dacScan step from 60 .. 79





[10:06:58.568] <TB2> INFO: Test took 37345ms.
[10:06:58.836] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:06:58.883] <TB2> INFO: dacScan step from 80 .. 88
[10:07:18.193] <TB2> INFO: Test took 19310ms.
[10:07:18.322] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:07:36.490] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 72 (20) hits flags = 16 (plus default)
[10:07:36.498] <TB2> INFO: dacScan step from 0 .. 19
[10:08:02.251] <TB2> INFO: Test took 25753ms.
[10:08:02.292] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:08:02.292] <TB2> INFO: dacScan step from 20 .. 39
[10:08:31.225] <TB2> INFO: Test took 28933ms.
[10:08:31.363] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:08:31.379] <TB2> INFO: dacScan step from 40 .. 59



[10:09:09.442] <TB2> INFO: Test took 38063ms.
[10:09:09.788] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:09:09.838] <TB2> INFO: dacScan step from 60 .. 72
[10:09:36.476] <TB2> INFO: Test took 26638ms.
[10:09:36.651] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:09:53.748] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 70 (20) hits flags = 16 (plus default)
[10:09:53.757] <TB2> INFO: dacScan step from 0 .. 19
[10:10:18.965] <TB2> INFO: Test took 25208ms.
[10:10:19.006] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:10:19.006] <TB2> INFO: dacScan step from 20 .. 39
[10:10:48.815] <TB2> INFO: Test took 29809ms.
[10:10:48.981] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:10:49.002] <TB2> INFO: dacScan step from 40 .. 59





[10:11:27.467] <TB2> INFO: Test took 38465ms.
[10:11:27.762] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:11:27.809] <TB2> INFO: dacScan step from 60 .. 70
[10:11:50.845] <TB2> INFO: Test took 23036ms.
[10:11:50.998] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:12:07.044] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[10:12:07.052] <TB2> INFO: dacScan step from 0 .. 19
[10:12:32.782] <TB2> INFO: Test took 25730ms.
[10:12:32.825] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:12:32.825] <TB2> INFO: dacScan step from 20 .. 39
[10:13:05.414] <TB2> INFO: Test took 32589ms.
[10:13:05.639] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:13:05.665] <TB2> INFO: dacScan step from 40 .. 59






[10:13:44.106] <TB2> INFO: Test took 38441ms.
[10:13:44.387] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:13:44.436] <TB2> INFO: dacScan step from 60 .. 79






[10:14:23.111] <TB2> INFO: Test took 38675ms.
[10:14:23.483] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:23.539] <TB2> INFO: dacScan step from 80 .. 99





[10:15:01.533] <TB2> INFO: Test took 37994ms.
[10:15:01.879] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:15:01.944] <TB2> INFO: dacScan step from 100 .. 119




[10:15:40.261] <TB2> INFO: Test took 38317ms.
[10:15:40.552] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:15:40.609] <TB2> INFO: dacScan step from 120 .. 139



[10:16:19.333] <TB2> INFO: Test took 38724ms.
[10:16:19.803] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:16:19.880] <TB2> INFO: dacScan step from 140 .. 159



[10:16:57.165] <TB2> INFO: Test took 37284ms.
[10:16:57.433] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:16:57.485] <TB2> INFO: dacScan step from 160 .. 179




[10:17:35.915] <TB2> INFO: Test took 38429ms.
[10:17:36.189] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:17:36.243] <TB2> INFO: dacScan step from 180 .. 199





[10:18:15.960] <TB2> INFO: Test took 39717ms.
[10:18:16.237] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:18:16.289] <TB2> INFO: dacScan step from 200 .. 219



[10:18:55.283] <TB2> INFO: Test took 38994ms.
[10:18:55.710] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:18:55.772] <TB2> INFO: dacScan step from 220 .. 239



[10:19:35.025] <TB2> INFO: Test took 39253ms.
[10:19:35.293] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:19:35.346] <TB2> INFO: dacScan step from 240 .. 255
[10:20:07.844] <TB2> INFO: Test took 32498ms.
[10:20:08.055] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:20:33.251] <TB2> INFO: PixTestTrim::trimBitTest() done
[10:20:33.252] <TB2> INFO: PixTestTrim::doTest() done, duration: 2734 seconds
[10:20:33.923] <TB2> INFO: ######################################################################
[10:20:33.923] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:20:33.923] <TB2> INFO: ######################################################################
[10:20:37.675] <TB2> INFO: Test took 3743ms.
[10:20:37.698] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:20:41.703] <TB2> INFO: Test took 3808ms.
[10:20:41.808] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:20:45.606] <TB2> INFO: Test took 3784ms.
[10:20:45.707] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:20:45.718] <TB2> INFO: The DUT currently contains the following objects:
[10:20:45.718] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:45.718] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:20:45.718] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:20:45.718] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:45.718] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:45.718] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:45.718] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:45.718] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:45.718] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:45.718] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:45.718] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:45.718] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:45.718] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:45.718] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:45.718] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:45.718] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:45.718] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:45.718] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:45.718] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:45.718] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.830] <TB2> INFO: Test took 1112ms.
[10:20:46.832] <TB2> INFO: The DUT currently contains the following objects:
[10:20:46.832] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:46.832] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:20:46.832] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:20:46.832] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:46.832] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.832] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.832] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.832] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.832] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.832] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.832] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.833] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.833] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.833] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.833] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.833] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.833] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.833] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.833] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:46.833] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.938] <TB2> INFO: Test took 1105ms.
[10:20:47.939] <TB2> INFO: The DUT currently contains the following objects:
[10:20:47.939] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:47.939] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:20:47.939] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:20:47.939] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:47.939] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.939] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.939] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.939] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.940] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.940] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.940] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.940] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.940] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.940] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.940] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.940] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.940] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.940] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.940] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:47.940] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:49.058] <TB2> INFO: Test took 1118ms.
[10:20:49.059] <TB2> INFO: The DUT currently contains the following objects:
[10:20:49.059] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:49.059] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:20:49.060] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:20:49.060] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:49.060] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:49.060] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:49.060] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:49.060] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:49.060] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:49.060] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:49.060] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:49.060] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:49.060] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:49.060] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:49.060] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:49.060] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:49.060] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:49.060] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:49.060] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:49.060] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:50.193] <TB2> INFO: Test took 1133ms.
[10:20:50.194] <TB2> INFO: The DUT currently contains the following objects:
[10:20:50.194] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:50.194] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:20:50.194] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:20:50.194] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:50.194] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:50.194] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:50.194] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:50.194] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:50.194] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:50.194] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:50.194] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:50.194] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:50.194] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:50.194] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:50.194] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:50.194] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:50.194] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:50.194] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:50.194] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:50.194] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:51.305] <TB2> INFO: Test took 1111ms.
[10:20:51.306] <TB2> INFO: The DUT currently contains the following objects:
[10:20:51.306] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:51.307] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:20:51.307] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:20:51.307] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:51.307] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:51.307] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:51.307] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:51.307] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:51.307] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:51.307] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:51.307] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:51.307] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:51.307] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:51.307] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:51.307] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:51.307] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:51.307] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:51.307] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:51.307] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:51.307] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:52.428] <TB2> INFO: Test took 1121ms.
[10:20:52.429] <TB2> INFO: The DUT currently contains the following objects:
[10:20:52.429] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:52.429] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:20:52.429] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:20:52.429] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:52.429] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:52.429] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:52.429] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:52.429] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:52.429] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:52.429] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:52.429] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:52.429] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:52.429] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:52.429] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:52.429] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:52.429] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:52.429] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:52.429] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:52.430] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:52.430] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:53.540] <TB2> INFO: Test took 1111ms.
[10:20:53.542] <TB2> INFO: The DUT currently contains the following objects:
[10:20:53.542] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:53.542] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:20:53.542] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:20:53.542] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:53.542] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:53.542] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:53.542] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:53.542] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:53.543] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:53.543] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:53.543] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:53.543] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:53.543] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:53.543] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:53.543] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:53.543] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:53.543] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:53.543] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:53.543] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:53.543] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:54.667] <TB2> INFO: Test took 1124ms.
[10:20:54.668] <TB2> INFO: The DUT currently contains the following objects:
[10:20:54.668] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:54.668] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:20:54.668] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:20:54.668] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:54.668] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:54.668] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:54.668] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:54.669] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:54.669] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:54.669] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:54.669] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:54.669] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:54.669] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:54.669] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:54.669] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:54.669] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:54.669] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:54.669] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:54.669] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:54.669] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:55.775] <TB2> INFO: Test took 1106ms.
[10:20:55.776] <TB2> INFO: The DUT currently contains the following objects:
[10:20:55.776] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:55.776] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:20:55.776] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:20:55.776] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:55.776] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:55.776] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:55.776] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:55.777] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:55.777] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:55.777] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:55.777] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:55.777] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:55.777] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:55.777] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:55.777] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:55.777] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:55.777] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:55.777] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:55.777] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:55.777] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:56.899] <TB2> INFO: Test took 1122ms.
[10:20:56.900] <TB2> INFO: The DUT currently contains the following objects:
[10:20:56.900] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:56.900] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:20:56.900] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:20:56.900] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:56.900] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:56.900] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:56.900] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:56.900] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:56.901] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:56.901] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:56.901] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:56.901] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:56.901] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:56.901] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:56.901] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:56.901] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:56.901] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:56.901] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:56.901] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:56.901] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:58.035] <TB2> INFO: Test took 1134ms.
[10:20:58.036] <TB2> INFO: The DUT currently contains the following objects:
[10:20:58.036] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:58.036] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:20:58.036] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:20:58.036] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:58.036] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:58.037] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:58.037] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:58.037] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:58.037] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:58.037] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:58.037] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:58.037] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:58.037] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:58.037] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:58.037] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:58.037] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:58.037] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:58.037] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:58.037] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:58.037] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:59.146] <TB2> INFO: Test took 1109ms.
[10:20:59.148] <TB2> INFO: The DUT currently contains the following objects:
[10:20:59.148] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:20:59.148] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:20:59.148] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:20:59.148] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:20:59.148] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:59.148] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:59.148] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:59.148] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:59.148] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:59.148] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:59.148] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:59.148] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:59.148] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:59.148] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:59.148] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:59.148] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:59.148] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:59.149] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:59.149] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:20:59.149] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:00.273] <TB2> INFO: Test took 1124ms.
[10:21:00.274] <TB2> INFO: The DUT currently contains the following objects:
[10:21:00.274] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:21:00.274] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:21:00.274] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:21:00.274] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:21:00.274] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:00.275] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:00.275] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:00.275] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:00.275] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:00.275] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:00.275] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:00.275] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:00.275] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:00.275] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:00.275] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:00.275] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:00.275] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:00.275] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:00.275] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:00.275] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:01.394] <TB2> INFO: Test took 1119ms.
[10:21:01.395] <TB2> INFO: The DUT currently contains the following objects:
[10:21:01.395] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:21:01.395] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:21:01.395] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:21:01.395] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:21:01.395] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:01.395] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:01.395] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:01.396] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:01.396] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:01.396] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:01.396] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:01.396] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:01.396] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:01.396] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:01.396] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:01.396] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:01.396] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:01.396] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:01.396] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:01.396] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:02.515] <TB2> INFO: Test took 1119ms.
[10:21:02.516] <TB2> INFO: The DUT currently contains the following objects:
[10:21:02.516] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:21:02.516] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:21:02.516] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:21:02.516] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:21:02.516] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:02.516] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:02.516] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:02.516] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:02.516] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:02.516] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:02.516] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:02.516] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:02.516] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:02.516] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:02.516] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:02.517] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:02.517] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:02.517] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:02.517] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:02.517] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:21:03.636] <TB2> INFO: Test took 1119ms.
[10:21:03.640] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:25:15.837] <TB2> INFO: Test took 252197ms.
[10:25:17.239] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:24.892] <TB2> INFO: Test took 247653ms.
[10:29:26.413] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:26.420] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:26.426] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[10:29:26.432] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:26.439] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:26.445] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:26.451] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:26.458] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:26.464] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:26.470] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:26.477] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:26.483] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[10:29:26.490] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[10:29:26.496] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[10:29:26.502] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[10:29:26.509] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[10:29:26.515] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[10:29:26.521] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:26.527] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[10:29:26.534] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[10:29:26.540] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[10:29:26.547] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:26.553] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:26.559] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:26.566] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:26.572] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:29:26.614] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:29:26.620] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:29:26.626] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:29:26.626] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:29:26.626] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:29:26.627] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:29:26.627] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:29:26.627] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:29:26.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:29:26.633] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:29:26.639] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:29:26.639] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:29:26.640] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:29:26.640] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:29:26.642] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:29:26.645] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:29:30.151] <TB2> INFO: Test took 3504ms.
[10:29:33.915] <TB2> INFO: Test took 3504ms.
[10:29:37.795] <TB2> INFO: Test took 3620ms.
[10:29:38.060] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:38.985] <TB2> INFO: Test took 925ms.
[10:29:38.987] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:40.101] <TB2> INFO: Test took 1114ms.
[10:29:40.103] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:41.217] <TB2> INFO: Test took 1114ms.
[10:29:41.219] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:42.347] <TB2> INFO: Test took 1128ms.
[10:29:42.349] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:43.463] <TB2> INFO: Test took 1114ms.
[10:29:43.465] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:44.579] <TB2> INFO: Test took 1114ms.
[10:29:44.581] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:45.694] <TB2> INFO: Test took 1113ms.
[10:29:45.696] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:46.810] <TB2> INFO: Test took 1114ms.
[10:29:46.812] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:47.940] <TB2> INFO: Test took 1128ms.
[10:29:47.942] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:49.042] <TB2> INFO: Test took 1100ms.
[10:29:49.044] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:50.157] <TB2> INFO: Test took 1114ms.
[10:29:50.159] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:51.274] <TB2> INFO: Test took 1115ms.
[10:29:51.276] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:52.375] <TB2> INFO: Test took 1100ms.
[10:29:52.377] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:53.492] <TB2> INFO: Test took 1115ms.
[10:29:53.494] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:54.608] <TB2> INFO: Test took 1114ms.
[10:29:54.610] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:55.724] <TB2> INFO: Test took 1114ms.
[10:29:55.726] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:56.840] <TB2> INFO: Test took 1114ms.
[10:29:56.842] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:57.955] <TB2> INFO: Test took 1113ms.
[10:29:57.957] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:29:59.056] <TB2> INFO: Test took 1099ms.
[10:29:59.058] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:00.171] <TB2> INFO: Test took 1113ms.
[10:30:00.173] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:01.317] <TB2> INFO: Test took 1144ms.
[10:30:01.319] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:02.418] <TB2> INFO: Test took 1100ms.
[10:30:02.420] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:03.534] <TB2> INFO: Test took 1114ms.
[10:30:03.536] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:04.635] <TB2> INFO: Test took 1099ms.
[10:30:04.637] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:05.751] <TB2> INFO: Test took 1114ms.
[10:30:05.753] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:06.867] <TB2> INFO: Test took 1114ms.
[10:30:06.869] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:07.968] <TB2> INFO: Test took 1099ms.
[10:30:07.970] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:09.070] <TB2> INFO: Test took 1100ms.
[10:30:09.072] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:10.172] <TB2> INFO: Test took 1100ms.
[10:30:10.173] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:11.273] <TB2> INFO: Test took 1100ms.
[10:30:11.275] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:12.389] <TB2> INFO: Test took 1114ms.
[10:30:12.391] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:30:13.490] <TB2> INFO: Test took 1099ms.
[10:30:13.992] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 580 seconds
[10:30:13.992] <TB2> INFO: PH scale (per ROC): 86 80 95 84 96 89 83 100 86 105 80 104 78 87 90 94
[10:30:13.992] <TB2> INFO: PH offset (per ROC): 141 159 146 150 138 143 156 133 158 144 166 133 157 163 149 144
[10:30:14.155] <TB2> INFO: ######################################################################
[10:30:14.155] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:30:14.155] <TB2> INFO: ######################################################################
[10:30:14.164] <TB2> INFO: scanning low vcal = 50
[10:30:18.574] <TB2> INFO: Test took 4410ms.
[10:30:18.626] <TB2> INFO: scanning low vcal = 100
[10:30:23.081] <TB2> INFO: Test took 4455ms.
[10:30:23.133] <TB2> INFO: scanning low vcal = 150
[10:30:27.719] <TB2> INFO: Test took 4586ms.
[10:30:27.771] <TB2> INFO: scanning low vcal = 200
[10:30:32.315] <TB2> INFO: Test took 4544ms.
[10:30:32.367] <TB2> INFO: scanning low vcal = 250
[10:30:36.925] <TB2> INFO: Test took 4558ms.
[10:30:36.978] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[10:30:41.548] <TB2> INFO: Test took 4570ms.
[10:30:41.599] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[10:30:46.144] <TB2> INFO: Test took 4545ms.
[10:30:46.196] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[10:30:50.784] <TB2> INFO: Test took 4588ms.
[10:30:50.836] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[10:30:55.343] <TB2> INFO: Test took 4508ms.
[10:30:55.395] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:30:59.830] <TB2> INFO: Test took 4435ms.
[10:31:00.118] <TB2> INFO: PixTestGainPedestal::measure() done
[10:31:22.772] <TB2> INFO: PixTestGainPedestal::fit() done
[10:31:22.772] <TB2> INFO: non-linearity mean: 0.962 0.957 0.949 0.945 0.960 0.955 0.953 0.947 0.946 0.959 0.960 0.953 0.954 0.954 0.954 0.957
[10:31:22.773] <TB2> INFO: non-linearity RMS: 0.005 0.005 0.006 0.007 0.006 0.005 0.007 0.006 0.006 0.004 0.005 0.005 0.006 0.005 0.006 0.005
[10:31:22.773] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[10:31:22.791] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[10:31:22.809] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[10:31:22.827] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[10:31:22.844] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[10:31:22.862] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[10:31:22.880] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[10:31:22.898] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[10:31:22.915] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[10:31:22.933] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[10:31:22.950] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[10:31:22.968] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[10:31:22.986] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[10:31:23.004] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[10:31:23.023] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[10:31:23.041] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2038_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[10:31:23.059] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 68 seconds
[10:31:23.078] <TB2> INFO: enter test to run
[10:31:23.080] <TB2> INFO: test: exit no parameter change
[10:31:23.599] <TB2> QUIET: Connection to board 0 closed.
[10:31:23.679] <TB2> INFO: pXar: this is the end, my friend