Test Date: 2015-07-09 11:22
Analysis date: 2016-05-25 21:47
Logfile
LogfileView
[14:50:18.311] <TB3> INFO: *** Welcome to pxar ***
[14:50:18.311] <TB3> INFO: *** Today: 2015/07/09
[14:50:18.311] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C15.dat
[14:50:18.313] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//tbmParameters_C0b.dat
[14:50:18.313] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//defaultMaskFile.dat
[14:50:18.313] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters_C15.dat
[14:50:18.396] <TB3> INFO: clk: 4
[14:50:18.396] <TB3> INFO: ctr: 4
[14:50:18.396] <TB3> INFO: sda: 19
[14:50:18.396] <TB3> INFO: tin: 9
[14:50:18.396] <TB3> INFO: level: 15
[14:50:18.396] <TB3> INFO: triggerdelay: 0
[14:50:18.396] <TB3> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[14:50:18.396] <TB3> INFO: Log level: INFO
[14:50:18.402] <TB3> INFO: Found DTB DTB_WZ4I6J
[14:50:18.416] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[14:50:18.419] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
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[14:50:18.422] <TB3> INFO: RPC call hashes of host and DTB match: 447413373
[14:50:19.978] <TB3> INFO: DUT info:
[14:50:19.978] <TB3> INFO: The DUT currently contains the following objects:
[14:50:19.978] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:50:19.978] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:50:19.978] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:50:19.978] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[14:50:19.978] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:19.978] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:19.978] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:19.978] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:19.979] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:19.979] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:19.979] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:19.979] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:19.979] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:19.979] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:19.979] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:19.979] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:19.979] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:19.979] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:19.979] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:19.979] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:20.380] <TB3> INFO: enter 'restricted' command line mode
[14:50:20.380] <TB3> INFO: enter test to run
[14:50:20.380] <TB3> INFO: test: pretest no parameter change
[14:50:20.380] <TB3> INFO: running: pretest
[14:50:20.387] <TB3> INFO: ######################################################################
[14:50:20.387] <TB3> INFO: PixTestPretest::doTest()
[14:50:20.387] <TB3> INFO: ######################################################################
[14:50:20.389] <TB3> INFO: ----------------------------------------------------------------------
[14:50:20.389] <TB3> INFO: PixTestPretest::programROC()
[14:50:20.389] <TB3> INFO: ----------------------------------------------------------------------
[14:50:38.407] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[14:50:38.407] <TB3> INFO: IA differences per ROC: 17.7 19.3 18.5 19.3 19.3 19.3 18.5 20.1 16.9 19.3 16.9 18.5 19.3 19.3 18.5 18.5
[14:50:38.475] <TB3> INFO: ----------------------------------------------------------------------
[14:50:38.475] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[14:50:38.475] <TB3> INFO: ----------------------------------------------------------------------
[14:50:58.045] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 379.4 mA = 23.7125 mA/ROC
[14:50:58.048] <TB3> INFO: ----------------------------------------------------------------------
[14:50:58.048] <TB3> INFO: PixTestPretest::findWorkingPixel()
[14:50:58.048] <TB3> INFO: ----------------------------------------------------------------------
[14:51:06.289] <TB3> INFO: Test took 8235ms.
[14:51:06.596] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[14:51:06.635] <TB3> INFO: ----------------------------------------------------------------------
[14:51:06.636] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[14:51:06.636] <TB3> INFO: ----------------------------------------------------------------------
[14:51:14.843] <TB3> INFO: Test took 8200ms.
[14:51:15.148] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[14:51:15.148] <TB3> INFO: CalDel: 143 146 123 137 140 147 139 158 126 125 132 124 122 120 125 136
[14:51:15.148] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[14:51:15.152] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C0.dat
[14:51:15.152] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C1.dat
[14:51:15.152] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C2.dat
[14:51:15.153] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C3.dat
[14:51:15.153] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C4.dat
[14:51:15.153] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C5.dat
[14:51:15.153] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C6.dat
[14:51:15.153] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C7.dat
[14:51:15.153] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C8.dat
[14:51:15.153] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C9.dat
[14:51:15.153] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C10.dat
[14:51:15.153] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C11.dat
[14:51:15.153] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C12.dat
[14:51:15.154] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C13.dat
[14:51:15.154] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C14.dat
[14:51:15.154] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C15.dat
[14:51:15.154] <TB3> INFO: PixTestPretest::doTest() done, duration: 54 seconds
[14:51:15.243] <TB3> INFO: enter test to run
[14:51:15.243] <TB3> INFO: test: fulltest no parameter change
[14:51:15.243] <TB3> INFO: running: fulltest
[14:51:15.243] <TB3> INFO: ######################################################################
[14:51:15.243] <TB3> INFO: PixTestFullTest::doTest()
[14:51:15.243] <TB3> INFO: ######################################################################
[14:51:15.244] <TB3> INFO: ######################################################################
[14:51:15.245] <TB3> INFO: PixTestAlive::doTest()
[14:51:15.245] <TB3> INFO: ######################################################################
[14:51:15.246] <TB3> INFO: ----------------------------------------------------------------------
[14:51:15.246] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:51:15.246] <TB3> INFO: ----------------------------------------------------------------------
[14:51:18.657] <TB3> INFO: Test took 3409ms.
[14:51:18.678] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:18.898] <TB3> INFO: PixTestAlive::aliveTest() done
[14:51:18.898] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:51:18.900] <TB3> INFO: ----------------------------------------------------------------------
[14:51:18.900] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:51:18.900] <TB3> INFO: ----------------------------------------------------------------------
[14:51:21.606] <TB3> INFO: Test took 2705ms.
[14:51:21.610] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:21.610] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:51:21.843] <TB3> INFO: PixTestAlive::maskTest() done
[14:51:21.843] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:51:21.845] <TB3> INFO: ----------------------------------------------------------------------
[14:51:21.845] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:51:21.845] <TB3> INFO: ----------------------------------------------------------------------
[14:51:25.292] <TB3> INFO: Test took 3446ms.
[14:51:25.314] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:25.544] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[14:51:25.544] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:51:25.544] <TB3> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[14:51:25.554] <TB3> INFO: ######################################################################
[14:51:25.554] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[14:51:25.554] <TB3> INFO: ######################################################################
[14:51:25.557] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[14:51:25.568] <TB3> INFO: dacScan step from 0 .. 29
[14:51:46.990] <TB3> INFO: Test took 21422ms.
[14:51:47.025] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:47.025] <TB3> INFO: dacScan step from 30 .. 59
[14:52:09.694] <TB3> INFO: Test took 22669ms.
[14:52:09.765] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:09.779] <TB3> INFO: dacScan step from 60 .. 89
[14:52:38.689] <TB3> INFO: Test took 28910ms.
[14:52:38.958] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:39.038] <TB3> INFO: dacScan step from 90 .. 119
[14:53:05.961] <TB3> INFO: Test took 26923ms.
[14:53:06.276] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:06.358] <TB3> INFO: dacScan step from 120 .. 149
[14:53:30.128] <TB3> INFO: Test took 23770ms.
[14:53:30.304] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:53.676] <TB3> INFO: PixTestBBMap::doTest() done, duration: 148 seconds
[14:53:53.676] <TB3> INFO: number of dead bumps (per ROC): 5 0 0 0 0 0 0 0 0 0 0 1 1 0 31 8
[14:53:53.676] <TB3> INFO: separation cut (per ROC): 83 87 95 94 92 87 87 95 81 79 74 100 91 91 69 90
[14:53:53.756] <TB3> INFO: ######################################################################
[14:53:53.756] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50
[14:53:53.756] <TB3> INFO: ######################################################################
[14:53:53.756] <TB3> INFO: ----------------------------------------------------------------------
[14:53:53.756] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[14:53:53.756] <TB3> INFO: ----------------------------------------------------------------------
[14:53:53.756] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[14:53:53.765] <TB3> INFO: dacScan step from 0 .. 3
[14:54:12.238] <TB3> INFO: Test took 18473ms.
[14:54:12.266] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:12.266] <TB3> INFO: dacScan step from 4 .. 7
[14:54:31.215] <TB3> INFO: Test took 18949ms.
[14:54:31.242] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:31.242] <TB3> INFO: dacScan step from 8 .. 11
[14:54:50.123] <TB3> INFO: Test took 18881ms.
[14:54:50.152] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:50.152] <TB3> INFO: dacScan step from 12 .. 15
[14:55:09.045] <TB3> INFO: Test took 18893ms.
[14:55:09.073] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:09.073] <TB3> INFO: dacScan step from 16 .. 19
[14:55:27.943] <TB3> INFO: Test took 18870ms.
[14:55:27.971] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:27.971] <TB3> INFO: dacScan step from 20 .. 23
[14:55:46.939] <TB3> INFO: Test took 18967ms.
[14:55:46.970] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:46.970] <TB3> INFO: dacScan step from 24 .. 27
[14:56:05.914] <TB3> INFO: Test took 18944ms.
[14:56:05.943] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:05.943] <TB3> INFO: dacScan step from 28 .. 31
[14:56:24.606] <TB3> INFO: Test took 18663ms.
[14:56:24.633] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:24.633] <TB3> INFO: dacScan step from 32 .. 35
[14:56:43.456] <TB3> INFO: Test took 18823ms.
[14:56:43.483] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:43.483] <TB3> INFO: dacScan step from 36 .. 39
[14:57:02.301] <TB3> INFO: Test took 18818ms.
[14:57:02.332] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:02.332] <TB3> INFO: dacScan step from 40 .. 43
[14:57:21.144] <TB3> INFO: Test took 18812ms.
[14:57:21.172] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:21.172] <TB3> INFO: dacScan step from 44 .. 47
[14:57:39.932] <TB3> INFO: Test took 18760ms.
[14:57:39.962] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:39.962] <TB3> INFO: dacScan step from 48 .. 51
[14:57:58.741] <TB3> INFO: Test took 18779ms.
[14:57:58.770] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:58.770] <TB3> INFO: dacScan step from 52 .. 55
[14:58:17.615] <TB3> INFO: Test took 18845ms.
[14:58:17.643] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:17.643] <TB3> INFO: dacScan step from 56 .. 59
[14:58:36.423] <TB3> INFO: Test took 18780ms.
[14:58:36.453] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:36.453] <TB3> INFO: dacScan step from 60 .. 63
[14:58:55.229] <TB3> INFO: Test took 18776ms.
[14:58:55.260] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:55.260] <TB3> INFO: dacScan step from 64 .. 67
[14:59:13.917] <TB3> INFO: Test took 18657ms.
[14:59:13.944] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:13.944] <TB3> INFO: dacScan step from 68 .. 71
[14:59:32.799] <TB3> INFO: Test took 18855ms.
[14:59:32.831] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:32.831] <TB3> INFO: dacScan step from 72 .. 75
[14:59:51.880] <TB3> INFO: Test took 19049ms.
[14:59:51.917] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:51.918] <TB3> INFO: dacScan step from 76 .. 79
[15:00:11.525] <TB3> INFO: Test took 19607ms.
[15:00:11.580] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:11.583] <TB3> INFO: dacScan step from 80 .. 83
[15:00:33.511] <TB3> INFO: Test took 21928ms.
[15:00:33.631] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:33.637] <TB3> INFO: dacScan step from 84 .. 87
[15:00:57.598] <TB3> INFO: Test took 23961ms.
[15:00:57.756] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:57.763] <TB3> INFO: dacScan step from 88 .. 91
[15:01:23.418] <TB3> INFO: Test took 25655ms.
[15:01:23.616] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:23.624] <TB3> INFO: dacScan step from 92 .. 95
[15:01:51.163] <TB3> INFO: Test took 27539ms.
[15:01:51.394] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:51.403] <TB3> INFO: dacScan step from 96 .. 99
[15:02:19.751] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (145) != TBM ID (0)

[15:02:19.751] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)

[15:02:19.751] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (1) != TBM ID (146)

[15:02:19.751] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:02:20.025] <TB3> INFO: Test took 28621ms.
[15:02:20.262] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:20.275] <TB3> INFO: dacScan step from 100 .. 103
[15:02:48.134] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)

[15:02:48.134] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!

[15:02:48.134] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:02:49.090] <TB3> INFO: Test took 28815ms.
[15:02:49.337] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:49.350] <TB3> INFO: dacScan step from 104 .. 107
[15:03:17.559] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (8) != Token Chain Length (4)

[15:03:17.559] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (228) != TBM ID (229)

[15:03:17.559] <TB3> WARNING: ROC 0: Readback start marker after 15 readouts!

[15:03:17.559] <TB3> WARNING: ROC 1: Readback start marker after 15 readouts!

[15:03:17.559] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!

[15:03:17.559] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:03:18.763] <TB3> INFO: Test took 29413ms.
[15:03:19.009] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:19.024] <TB3> INFO: dacScan step from 108 .. 111
[15:03:46.945] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (8) != Token Chain Length (4)

[15:03:46.945] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (63) != TBM ID (64)

[15:03:46.945] <TB3> WARNING: ROC 0: Readback start marker after 31 readouts!

[15:03:46.945] <TB3> WARNING: ROC 1: Readback start marker after 31 readouts!

[15:03:46.945] <TB3> WARNING: ROC 2: Readback start marker after 31 readouts!

[15:03:46.945] <TB3> WARNING: ROC 3: Readback start marker after 31 readouts!

[15:03:48.163] <TB3> INFO: Test took 29139ms.
[15:03:48.399] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:48.410] <TB3> INFO: dacScan step from 112 .. 115
[15:04:16.174] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)

[15:04:16.174] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!

[15:04:16.174] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:04:17.438] <TB3> INFO: Test took 29028ms.
[15:04:17.680] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:04:17.692] <TB3> INFO: dacScan step from 116 .. 119
[15:04:45.626] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)

[15:04:45.626] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!

[15:04:45.626] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:04:46.855] <TB3> INFO: Test took 29163ms.
[15:04:47.097] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:04:47.109] <TB3> INFO: dacScan step from 120 .. 123
[15:05:14.934] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (8) != Token Chain Length (4)

[15:05:14.934] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (195) != TBM ID (196)

[15:05:14.934] <TB3> WARNING: ROC 0: Readback start marker after 15 readouts!

[15:05:14.934] <TB3> WARNING: ROC 1: Readback start marker after 15 readouts!

[15:05:14.934] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!

[15:05:14.934] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:05:16.167] <TB3> INFO: Test took 29058ms.
[15:05:16.410] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:16.422] <TB3> INFO: dacScan step from 124 .. 127
[15:05:45.675] <TB3> INFO: Test took 29253ms.
[15:05:45.892] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:45.903] <TB3> INFO: dacScan step from 128 .. 131
[15:06:15.085] <TB3> INFO: Test took 29182ms.
[15:06:15.325] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:15.337] <TB3> INFO: dacScan step from 132 .. 135
[15:06:44.264] <TB3> INFO: Test took 28927ms.
[15:06:44.508] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:44.520] <TB3> INFO: dacScan step from 136 .. 139
[15:07:13.784] <TB3> INFO: Test took 29264ms.
[15:07:14.040] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:14.055] <TB3> INFO: dacScan step from 140 .. 143
[15:07:43.044] <TB3> INFO: Test took 28989ms.
[15:07:43.289] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:43.299] <TB3> INFO: dacScan step from 144 .. 147
[15:08:09.884] <TB3> INFO: Test took 26584ms.
[15:08:10.111] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:10.122] <TB3> INFO: dacScan step from 148 .. 149
[15:08:24.559] <TB3> INFO: Test took 14437ms.
[15:08:24.667] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:24.673] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:08:26.110] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:08:27.687] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:08:29.227] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:08:31.046] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:08:32.938] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:08:34.659] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:08:36.165] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:08:37.837] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:08:39.575] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:08:41.171] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:08:42.676] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:08:44.174] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:08:45.712] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:08:47.357] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:08:48.923] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[15:08:50.452] <TB3> INFO: PixTestScurves::scurves() done
[15:08:50.452] <TB3> INFO: Vcal mean: 88.68 83.31 91.92 87.04 83.24 82.77 87.61 89.20 94.49 84.48 88.39 99.34 91.58 82.89 88.58 93.05
[15:08:50.452] <TB3> INFO: Vcal RMS: 5.89 4.39 5.47 6.13 4.86 5.36 5.01 5.36 5.54 4.23 5.41 4.95 5.27 4.86 5.29 5.86
[15:08:50.452] <TB3> INFO: PixTestScurves::fullTest() done, duration: 896 seconds
[15:08:50.522] <TB3> INFO: ######################################################################
[15:08:50.522] <TB3> INFO: PixTestTrim::doTest()
[15:08:50.522] <TB3> INFO: ######################################################################
[15:08:50.523] <TB3> INFO: ----------------------------------------------------------------------
[15:08:50.523] <TB3> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[15:08:50.523] <TB3> INFO: ----------------------------------------------------------------------
[15:08:50.606] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:08:50.606] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[15:08:50.614] <TB3> INFO: dacScan step from 0 .. 19
[15:09:05.570] <TB3> INFO: Test took 14956ms.
[15:09:05.590] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:05.590] <TB3> INFO: dacScan step from 20 .. 39
[15:09:20.654] <TB3> INFO: Test took 15064ms.
[15:09:20.677] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:20.677] <TB3> INFO: dacScan step from 40 .. 59
[15:09:35.795] <TB3> INFO: Test took 15118ms.
[15:09:35.817] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:35.817] <TB3> INFO: dacScan step from 60 .. 79
[15:09:50.875] <TB3> INFO: Test took 15058ms.
[15:09:50.905] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:50.905] <TB3> INFO: dacScan step from 80 .. 99
[15:10:06.769] <TB3> INFO: Test took 15864ms.
[15:10:06.828] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:06.836] <TB3> INFO: dacScan step from 100 .. 119
[15:10:24.851] <TB3> INFO: Test took 18015ms.
[15:10:25.044] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:25.081] <TB3> INFO: dacScan step from 120 .. 139
[15:10:42.637] <TB3> INFO: Test took 17556ms.
[15:10:42.841] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:42.878] <TB3> INFO: dacScan step from 140 .. 159
[15:10:58.268] <TB3> INFO: Test took 15390ms.
[15:10:58.322] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:22.223] <TB3> INFO: ROC 0 VthrComp = 88
[15:11:22.223] <TB3> INFO: ROC 1 VthrComp = 88
[15:11:22.234] <TB3> INFO: ROC 2 VthrComp = 94
[15:11:22.234] <TB3> INFO: ROC 3 VthrComp = 86
[15:11:22.235] <TB3> INFO: ROC 4 VthrComp = 88
[15:11:22.235] <TB3> INFO: ROC 5 VthrComp = 84
[15:11:22.235] <TB3> INFO: ROC 6 VthrComp = 88
[15:11:22.235] <TB3> INFO: ROC 7 VthrComp = 94
[15:11:22.235] <TB3> INFO: ROC 8 VthrComp = 94
[15:11:22.235] <TB3> INFO: ROC 9 VthrComp = 90
[15:11:22.235] <TB3> INFO: ROC 10 VthrComp = 90
[15:11:22.235] <TB3> INFO: ROC 11 VthrComp = 103
[15:11:22.235] <TB3> INFO: ROC 12 VthrComp = 95
[15:11:22.235] <TB3> INFO: ROC 13 VthrComp = 88
[15:11:22.235] <TB3> INFO: ROC 14 VthrComp = 85
[15:11:22.236] <TB3> INFO: ROC 15 VthrComp = 94
[15:11:22.236] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[15:11:22.236] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[15:11:22.244] <TB3> INFO: dacScan step from 0 .. 19
[15:11:37.386] <TB3> INFO: Test took 15142ms.
[15:11:37.409] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:37.410] <TB3> INFO: dacScan step from 20 .. 39
[15:11:52.672] <TB3> INFO: Test took 15262ms.
[15:11:52.705] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:52.708] <TB3> INFO: dacScan step from 40 .. 59
[15:12:11.573] <TB3> INFO: Test took 18865ms.
[15:12:11.727] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:11.761] <TB3> INFO: dacScan step from 60 .. 79
[15:12:31.845] <TB3> INFO: Test took 20084ms.
[15:12:32.051] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:32.096] <TB3> INFO: dacScan step from 80 .. 99
[15:12:52.242] <TB3> INFO: Test took 20146ms.
[15:12:52.408] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:52.453] <TB3> INFO: dacScan step from 100 .. 119
[15:13:11.667] <TB3> INFO: Test took 19214ms.
[15:13:11.843] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:11.896] <TB3> INFO: dacScan step from 120 .. 139
[15:13:30.792] <TB3> INFO: Test took 18896ms.
[15:13:30.985] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:31.041] <TB3> INFO: dacScan step from 140 .. 159
[15:13:50.135] <TB3> INFO: Test took 19094ms.
[15:13:50.301] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:18.437] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 60.3548 for pixel 23/61 mean/min/max = 46.7252/33.027/60.4234
[15:14:18.438] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 57.0375 for pixel 23/79 mean/min/max = 45.6818/34.0878/57.2758
[15:14:18.438] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 58.8182 for pixel 2/1 mean/min/max = 45.9107/32.6063/59.215
[15:14:18.438] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 60.5634 for pixel 18/70 mean/min/max = 46.2711/31.9672/60.575
[15:14:18.439] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 56.3132 for pixel 0/76 mean/min/max = 44.9692/33.3721/56.5664
[15:14:18.439] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 57.9193 for pixel 2/78 mean/min/max = 45.0839/32.225/57.9429
[15:14:18.439] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 57.6769 for pixel 16/57 mean/min/max = 45.6991/33.6555/57.7427
[15:14:18.439] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 57.8256 for pixel 0/70 mean/min/max = 45.5019/33.1729/57.8309
[15:14:18.440] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 59.1782 for pixel 5/3 mean/min/max = 46.2667/33.1864/59.3471
[15:14:18.440] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 55.5435 for pixel 3/4 mean/min/max = 44.8682/34.1834/55.553
[15:14:18.440] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 57.7257 for pixel 11/17 mean/min/max = 45.6137/33.2894/57.938
[15:14:18.441] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 57.313 for pixel 14/4 mean/min/max = 44.9312/32.404/57.4584
[15:14:18.441] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 57.3168 for pixel 3/74 mean/min/max = 45.1689/32.7867/57.5511
[15:14:18.441] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 57.9692 for pixel 2/22 mean/min/max = 45.7989/33.5352/58.0627
[15:14:18.442] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 58.9272 for pixel 7/74 mean/min/max = 46.1374/33.2013/59.0734
[15:14:18.442] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 60.9449 for pixel 3/66 mean/min/max = 46.6826/32.3816/60.9836
[15:14:18.442] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:15:53.172] <TB3> INFO: Test took 94730ms.
[15:15:54.518] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[15:15:54.526] <TB3> INFO: dacScan step from 0 .. 19
[15:16:17.125] <TB3> INFO: Test took 22599ms.
[15:16:17.168] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:16:17.169] <TB3> INFO: dacScan step from 20 .. 39
[15:16:43.549] <TB3> INFO: Test took 26380ms.
[15:16:43.773] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:16:43.806] <TB3> INFO: dacScan step from 40 .. 59
[15:17:14.571] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (8) != Token Chain Length (4)

[15:17:14.571] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (39) != TBM ID (40)

[15:17:14.571] <TB3> WARNING: ROC 0: Readback start marker after 15 readouts!

[15:17:14.571] <TB3> WARNING: ROC 1: Readback start marker after 15 readouts!

[15:17:14.571] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!

[15:17:14.571] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:17:15.821] <TB3> INFO: Test took 32015ms.
[15:17:16.102] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:17:16.158] <TB3> INFO: dacScan step from 60 .. 79
[15:17:47.935] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (208) != TBM ID (0)

[15:17:47.935] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)

[15:17:47.935] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (1) != TBM ID (209)

[15:17:47.935] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:17:49.155] <TB3> INFO: Test took 32996ms.
[15:17:49.457] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:17:49.513] <TB3> INFO: dacScan step from 80 .. 99
[15:18:21.017] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)

[15:18:21.017] <TB3> WARNING: ROC 2: Readback start marker after 31 readouts!

[15:18:21.017] <TB3> WARNING: ROC 3: Readback start marker after 31 readouts!

[15:18:22.243] <TB3> INFO: Test took 32730ms.
[15:18:22.540] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:18:22.589] <TB3> INFO: dacScan step from 100 .. 119
[15:18:53.929] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)

[15:18:53.929] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!

[15:18:53.929] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:18:55.155] <TB3> INFO: Test took 32566ms.
[15:18:55.468] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:18:55.521] <TB3> INFO: dacScan step from 120 .. 139
[15:19:27.208] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)

[15:19:27.209] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!

[15:19:27.209] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:19:28.415] <TB3> INFO: Test took 32894ms.
[15:19:28.702] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:19:28.757] <TB3> INFO: dacScan step from 140 .. 159
[15:20:00.425] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (213) != TBM ID (0)

[15:20:00.425] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)

[15:20:00.425] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (1) != TBM ID (214)

[15:20:00.425] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:20:01.670] <TB3> INFO: Test took 32913ms.
[15:20:02.004] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:20:02.127] <TB3> INFO: dacScan step from 160 .. 179
[15:20:32.497] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (8) != Token Chain Length (4)

[15:20:32.497] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (214) != TBM ID (215)

[15:20:32.497] <TB3> WARNING: ROC 0: Readback start marker after 15 readouts!

[15:20:32.497] <TB3> WARNING: ROC 1: Readback start marker after 15 readouts!

[15:20:32.497] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!

[15:20:32.497] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:20:33.595] <TB3> INFO: Test took 31467ms.
[15:20:33.875] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:20:33.929] <TB3> INFO: dacScan step from 180 .. 199
[15:21:04.087] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (8) != Token Chain Length (4)

[15:21:04.088] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (215) != TBM ID (216)

[15:21:04.088] <TB3> WARNING: ROC 0: Readback start marker after 15 readouts!

[15:21:04.088] <TB3> WARNING: ROC 1: Readback start marker after 15 readouts!

[15:21:04.088] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!

[15:21:04.088] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:21:05.200] <TB3> INFO: Test took 31271ms.
[15:21:05.472] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:30.935] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.025189 .. 255.000000
[15:21:31.020] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[15:21:31.029] <TB3> INFO: dacScan step from 0 .. 19
[15:21:44.424] <TB3> INFO: Test took 13395ms.
[15:21:44.445] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:44.445] <TB3> INFO: dacScan step from 20 .. 39
[15:21:59.137] <TB3> INFO: Test took 14692ms.
[15:21:59.227] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:59.242] <TB3> INFO: dacScan step from 40 .. 59
[15:22:16.790] <TB3> INFO: Test took 17548ms.
[15:22:16.942] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:17.000] <TB3> INFO: dacScan step from 60 .. 79
[15:22:34.738] <TB3> INFO: Test took 17738ms.
[15:22:34.872] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:34.918] <TB3> INFO: dacScan step from 80 .. 99
[15:22:52.571] <TB3> INFO: Test took 17653ms.
[15:22:52.757] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:52.815] <TB3> INFO: dacScan step from 100 .. 119
[15:23:10.377] <TB3> INFO: Test took 17562ms.
[15:23:10.529] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:10.573] <TB3> INFO: dacScan step from 120 .. 139
[15:23:28.257] <TB3> INFO: Test took 17684ms.
[15:23:28.424] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:28.481] <TB3> INFO: dacScan step from 140 .. 159
[15:23:46.062] <TB3> INFO: Test took 17581ms.
[15:23:46.195] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:46.236] <TB3> INFO: dacScan step from 160 .. 179
[15:24:04.097] <TB3> INFO: Test took 17861ms.
[15:24:04.256] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:04.309] <TB3> INFO: dacScan step from 180 .. 199
[15:24:22.732] <TB3> INFO: Test took 18423ms.
[15:24:22.922] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:22.963] <TB3> INFO: dacScan step from 200 .. 219
[15:24:39.567] <TB3> INFO: Test took 16604ms.
[15:24:39.744] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:39.807] <TB3> INFO: dacScan step from 220 .. 239
[15:24:56.509] <TB3> INFO: Test took 16702ms.
[15:24:56.738] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:56.805] <TB3> INFO: dacScan step from 240 .. 255
[15:25:10.857] <TB3> INFO: Test took 14052ms.
[15:25:11.037] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:43.357] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 10.117211 .. 43.968535
[15:25:43.454] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 0 .. 53 (20) hits flags = 16 (plus default)
[15:25:43.464] <TB3> INFO: dacScan step from 0 .. 19
[15:25:56.670] <TB3> INFO: Test took 13206ms.
[15:25:56.693] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:56.693] <TB3> INFO: dacScan step from 20 .. 39
[15:26:10.879] <TB3> INFO: Test took 14186ms.
[15:26:10.979] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:10.999] <TB3> INFO: dacScan step from 40 .. 53
[15:26:23.345] <TB3> INFO: Test took 12346ms.
[15:26:23.467] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:39.700] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 2.852146 .. 39.375027
[15:26:39.780] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 2 .. 49 (20) hits flags = 16 (plus default)
[15:26:39.787] <TB3> INFO: dacScan step from 2 .. 21
[15:26:53.388] <TB3> INFO: Test took 13600ms.
[15:26:53.412] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:53.412] <TB3> INFO: dacScan step from 22 .. 41
[15:27:07.688] <TB3> INFO: Test took 14276ms.
[15:27:07.783] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:07.809] <TB3> INFO: dacScan step from 42 .. 49
[15:27:16.138] <TB3> INFO: Test took 8329ms.
[15:27:16.194] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:31.527] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 1.330952 .. 38.735373
[15:27:31.607] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 48 (20) hits flags = 16 (plus default)
[15:27:31.615] <TB3> INFO: dacScan step from 1 .. 20
[15:27:45.174] <TB3> INFO: Test took 13559ms.
[15:27:45.196] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:45.196] <TB3> INFO: dacScan step from 21 .. 40
[15:27:59.460] <TB3> INFO: Test took 14264ms.
[15:27:59.543] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:59.564] <TB3> INFO: dacScan step from 41 .. 48
[15:28:07.856] <TB3> INFO: Test took 8292ms.
[15:28:07.917] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:22.104] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[15:28:22.104] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[15:28:22.112] <TB3> INFO: dacScan step from 15 .. 34
[15:28:44.003] <TB3> INFO: Test took 21891ms.
[15:28:44.079] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:44.092] <TB3> INFO: dacScan step from 35 .. 54
[15:29:15.374] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)

[15:29:15.374] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!

[15:29:15.374] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:29:15.957] <TB3> INFO: Test took 31865ms.
[15:29:16.240] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:16.301] <TB3> INFO: dacScan step from 55 .. 55
[15:29:20.532] <TB3> INFO: Test took 4231ms.
[15:29:20.547] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:35.436] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C0.dat
[15:29:35.436] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C1.dat
[15:29:35.436] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C2.dat
[15:29:35.437] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C3.dat
[15:29:35.437] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C4.dat
[15:29:35.437] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C5.dat
[15:29:35.437] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C6.dat
[15:29:35.437] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C7.dat
[15:29:35.437] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C8.dat
[15:29:35.437] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C9.dat
[15:29:35.438] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C10.dat
[15:29:35.438] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C11.dat
[15:29:35.438] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C12.dat
[15:29:35.438] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C13.dat
[15:29:35.438] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C14.dat
[15:29:35.438] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C15.dat
[15:29:35.438] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C0.dat
[15:29:35.446] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C1.dat
[15:29:35.455] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C2.dat
[15:29:35.465] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C3.dat
[15:29:35.474] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C4.dat
[15:29:35.483] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C5.dat
[15:29:35.493] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C6.dat
[15:29:35.503] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C7.dat
[15:29:35.511] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C8.dat
[15:29:35.519] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C9.dat
[15:29:35.525] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C10.dat
[15:29:35.531] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C11.dat
[15:29:35.537] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C12.dat
[15:29:35.546] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C13.dat
[15:29:35.556] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C14.dat
[15:29:35.564] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C15.dat
[15:29:35.573] <TB3> INFO: PixTestTrim::trimTest() done
[15:29:35.573] <TB3> INFO: vtrim: 116 110 99 117 100 97 104 108 112 110 96 116 99 106 102 115
[15:29:35.573] <TB3> INFO: vthrcomp: 88 88 94 86 88 84 88 94 94 90 90 103 95 88 85 94
[15:29:35.573] <TB3> INFO: vcal mean: 35.05 35.08 35.12 35.05 35.05 35.05 35.10 35.06 35.08 35.09 35.07 35.05 35.08 35.06 35.07 35.07
[15:29:35.573] <TB3> INFO: vcal RMS: 1.20 0.95 0.99 1.03 0.93 1.02 0.96 1.01 1.21 1.00 1.05 1.09 0.98 0.96 1.09 1.06
[15:29:35.573] <TB3> INFO: bits mean: 9.74 9.21 9.44 9.71 9.87 10.09 9.56 9.80 9.89 9.86 9.89 10.13 9.72 9.51 9.83 9.73
[15:29:35.573] <TB3> INFO: bits RMS: 2.37 2.55 2.69 2.54 2.40 2.42 2.48 2.45 2.33 2.28 2.36 2.40 2.54 2.46 2.40 2.47
[15:29:35.578] <TB3> INFO: ----------------------------------------------------------------------
[15:29:35.578] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 240 150 100
[15:29:35.578] <TB3> INFO: ----------------------------------------------------------------------
[15:29:35.580] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[15:29:35.589] <TB3> INFO: dacScan step from 0 .. 19
[15:29:56.713] <TB3> INFO: Test took 21124ms.
[15:29:56.762] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:56.762] <TB3> INFO: dacScan step from 20 .. 39
[15:30:19.761] <TB3> INFO: Test took 22999ms.
[15:30:19.810] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:30:19.813] <TB3> INFO: dacScan step from 40 .. 59
[15:30:49.153] <TB3> INFO: Test took 29340ms.
[15:30:49.406] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:30:49.446] <TB3> INFO: dacScan step from 60 .. 79
[15:31:20.754] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (99) != TBM ID (0)

[15:31:20.754] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)

[15:31:20.754] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (1) != TBM ID (100)

[15:31:20.754] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:31:21.966] <TB3> INFO: Test took 32520ms.
[15:31:22.226] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:31:22.275] <TB3> INFO: dacScan step from 80 .. 99
[15:31:53.408] <TB3> INFO: Test took 31133ms.
[15:31:53.719] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:31:53.787] <TB3> INFO: dacScan step from 100 .. 119
[15:32:26.810] <TB3> INFO: Test took 33023ms.
[15:32:27.121] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:32:27.171] <TB3> INFO: dacScan step from 120 .. 139
[15:32:59.915] <TB3> INFO: Test took 32744ms.
[15:33:00.299] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:33:00.349] <TB3> INFO: dacScan step from 140 .. 159
[15:33:30.937] <TB3> INFO: Test took 30587ms.
[15:33:31.210] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:33:31.258] <TB3> INFO: dacScan step from 160 .. 179
[15:34:02.991] <TB3> INFO: Test took 31733ms.
[15:34:03.296] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:34:03.350] <TB3> INFO: dacScan step from 180 .. 199
[15:34:35.064] <TB3> INFO: Test took 31714ms.
[15:34:35.398] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:35:01.816] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 76 (20) hits flags = 16 (plus default)
[15:35:01.825] <TB3> INFO: dacScan step from 0 .. 19
[15:35:24.310] <TB3> INFO: Test took 22485ms.
[15:35:24.344] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:35:24.344] <TB3> INFO: dacScan step from 20 .. 39
[15:35:48.038] <TB3> INFO: Test took 23694ms.
[15:35:48.127] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:35:48.137] <TB3> INFO: dacScan step from 40 .. 59
[15:36:18.649] <TB3> INFO: Test took 30512ms.
[15:36:18.998] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:36:19.045] <TB3> INFO: dacScan step from 60 .. 76
[15:36:47.686] <TB3> INFO: Test took 28641ms.
[15:36:48.003] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:03.863] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 71 (20) hits flags = 16 (plus default)
[15:37:03.871] <TB3> INFO: dacScan step from 0 .. 19
[15:37:26.586] <TB3> INFO: Test took 22714ms.
[15:37:26.624] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:26.624] <TB3> INFO: dacScan step from 20 .. 39
[15:37:51.690] <TB3> INFO: Test took 25066ms.
[15:37:51.833] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:51.852] <TB3> INFO: dacScan step from 40 .. 59
[15:38:21.652] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)

[15:38:21.657] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!

[15:38:21.657] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:38:22.578] <TB3> INFO: Test took 30726ms.
[15:38:22.864] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:38:22.906] <TB3> INFO: dacScan step from 60 .. 71
[15:38:43.461] <TB3> INFO: Test took 20555ms.
[15:38:43.654] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:39:01.038] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 67 (20) hits flags = 16 (plus default)
[15:39:01.047] <TB3> INFO: dacScan step from 0 .. 19
[15:39:22.179] <TB3> INFO: Test took 21132ms.
[15:39:22.215] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:39:22.215] <TB3> INFO: dacScan step from 20 .. 39
[15:39:48.257] <TB3> INFO: Test took 26042ms.
[15:39:48.462] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:39:48.487] <TB3> INFO: dacScan step from 40 .. 59
[15:40:18.344] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (133) != TBM ID (0)

[15:40:18.345] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)

[15:40:18.345] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (1) != TBM ID (134)

[15:40:18.345] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:40:19.447] <TB3> INFO: Test took 30960ms.
[15:40:19.789] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:40:19.839] <TB3> INFO: dacScan step from 60 .. 67
[15:40:34.598] <TB3> INFO: Test took 14759ms.
[15:40:34.733] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:40:51.985] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 65 (20) hits flags = 16 (plus default)
[15:40:51.994] <TB3> INFO: dacScan step from 0 .. 19
[15:41:13.385] <TB3> INFO: Test took 21391ms.
[15:41:13.425] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:41:13.425] <TB3> INFO: dacScan step from 20 .. 39
[15:41:40.459] <TB3> INFO: Test took 27033ms.
[15:41:40.750] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:41:40.787] <TB3> INFO: dacScan step from 40 .. 59
[15:42:11.695] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (84) != TBM ID (0)

[15:42:11.695] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)

[15:42:11.695] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (1) != TBM ID (85)

[15:42:11.695] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!

[15:42:12.898] <TB3> INFO: Test took 32111ms.
[15:42:13.201] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:13.242] <TB3> INFO: dacScan step from 60 .. 65
[15:42:25.116] <TB3> INFO: Test took 11874ms.
[15:42:25.199] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:40.842] <TB3> INFO: PixTestTrim::trimBitTest() done
[15:42:40.844] <TB3> INFO: PixTestTrim::doTest() done, duration: 2030 seconds
[15:42:41.594] <TB3> INFO: ######################################################################
[15:42:41.594] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[15:42:41.594] <TB3> INFO: ######################################################################
[15:42:45.051] <TB3> INFO: Test took 3456ms.
[15:42:45.075] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:48.709] <TB3> INFO: Test took 3436ms.
[15:42:48.778] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:52.240] <TB3> INFO: Test took 3451ms.
[15:42:52.312] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:52.319] <TB3> INFO: The DUT currently contains the following objects:
[15:42:52.319] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:52.319] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:42:52.319] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:42:52.319] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:52.319] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:52.319] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:52.319] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:52.319] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:52.319] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:52.319] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:52.319] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:52.319] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:52.319] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:52.319] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:52.319] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:52.319] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:52.319] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:52.319] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:52.319] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:52.319] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:53.427] <TB3> INFO: Test took 1108ms.
[15:42:53.429] <TB3> INFO: The DUT currently contains the following objects:
[15:42:53.434] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:53.434] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:42:53.434] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:42:53.434] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:53.434] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:53.434] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:53.434] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:53.434] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:53.435] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:53.435] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:53.435] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:53.435] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:53.435] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:53.435] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:53.435] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:53.435] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:53.435] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:53.435] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:53.435] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:53.435] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:54.538] <TB3> INFO: Test took 1103ms.
[15:42:54.539] <TB3> INFO: The DUT currently contains the following objects:
[15:42:54.539] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:54.539] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:42:54.539] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:42:54.539] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:54.539] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:54.539] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:54.539] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:54.539] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:54.539] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:54.539] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:54.539] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:54.540] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:54.540] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:54.540] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:54.540] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:54.540] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:54.540] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:54.540] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:54.540] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:54.540] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:55.647] <TB3> INFO: Test took 1107ms.
[15:42:55.648] <TB3> INFO: The DUT currently contains the following objects:
[15:42:55.648] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:55.648] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:42:55.648] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:42:55.648] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:55.648] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:55.648] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:55.648] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:55.648] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:55.648] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:55.648] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:55.648] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:55.648] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:55.648] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:55.648] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:55.648] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:55.648] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:55.648] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:55.649] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:55.649] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:55.649] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:56.756] <TB3> INFO: Test took 1107ms.
[15:42:56.757] <TB3> INFO: The DUT currently contains the following objects:
[15:42:56.757] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:56.757] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:42:56.757] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:42:56.757] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:56.757] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:56.757] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:56.757] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:56.757] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:56.757] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:56.757] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:56.757] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:56.757] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:56.757] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:56.758] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:56.758] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:56.758] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:56.758] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:56.758] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:56.758] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:56.758] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:57.866] <TB3> INFO: Test took 1108ms.
[15:42:57.867] <TB3> INFO: The DUT currently contains the following objects:
[15:42:57.867] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:57.867] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:42:57.867] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:42:57.867] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:57.867] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:57.867] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:57.867] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:57.867] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:57.867] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:57.867] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:57.867] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:57.867] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:57.867] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:57.867] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:57.868] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:57.868] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:57.868] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:57.868] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:57.868] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:57.868] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:58.976] <TB3> INFO: Test took 1108ms.
[15:42:58.977] <TB3> INFO: The DUT currently contains the following objects:
[15:42:58.977] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:42:58.977] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:42:58.977] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:42:58.977] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:42:58.977] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:58.977] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:58.977] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:58.977] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:58.977] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:58.977] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:58.978] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:58.978] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:58.978] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:58.978] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:58.978] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:58.978] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:58.978] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:58.978] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:58.978] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:42:58.978] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:00.086] <TB3> INFO: Test took 1108ms.
[15:43:00.088] <TB3> INFO: The DUT currently contains the following objects:
[15:43:00.088] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:43:00.088] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:43:00.088] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:43:00.088] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:43:00.088] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:00.088] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:00.088] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:00.088] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:00.088] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:00.088] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:00.088] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:00.088] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:00.088] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:00.088] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:00.088] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:00.088] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:00.088] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:00.088] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:00.088] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:00.088] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:01.195] <TB3> INFO: Test took 1107ms.
[15:43:01.197] <TB3> INFO: The DUT currently contains the following objects:
[15:43:01.197] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:43:01.197] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:43:01.197] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:43:01.197] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:43:01.197] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:01.197] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:01.197] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:01.197] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:01.197] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:01.197] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:01.197] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:01.198] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:01.198] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:01.198] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:01.198] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:01.198] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:01.198] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:01.198] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:01.198] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:01.198] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:02.298] <TB3> INFO: Test took 1100ms.
[15:43:02.299] <TB3> INFO: The DUT currently contains the following objects:
[15:43:02.299] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:43:02.299] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:43:02.299] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:43:02.299] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:43:02.299] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:02.299] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:02.299] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:02.299] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:02.299] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:02.299] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:02.299] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:02.299] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:02.299] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:02.299] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:02.299] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:02.299] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:02.299] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:02.299] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:02.299] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:02.299] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:03.400] <TB3> INFO: Test took 1101ms.
[15:43:03.400] <TB3> INFO: The DUT currently contains the following objects:
[15:43:03.400] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:43:03.400] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:43:03.400] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:43:03.400] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:43:03.400] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:03.400] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:03.400] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:03.400] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:03.400] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:03.400] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:03.400] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:03.400] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:03.400] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:03.400] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:03.401] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:03.401] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:03.401] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:03.401] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:03.401] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:03.401] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:04.501] <TB3> INFO: Test took 1100ms.
[15:43:04.501] <TB3> INFO: The DUT currently contains the following objects:
[15:43:04.501] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:43:04.502] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:43:04.502] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:43:04.502] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:43:04.502] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:04.502] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:04.502] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:04.502] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:04.502] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:04.502] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:04.502] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:04.502] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:04.502] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:04.502] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:04.502] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:04.502] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:04.502] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:04.502] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:04.502] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:04.502] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:05.602] <TB3> INFO: Test took 1100ms.
[15:43:05.603] <TB3> INFO: The DUT currently contains the following objects:
[15:43:05.603] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:43:05.603] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:43:05.603] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:43:05.603] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:43:05.603] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:05.603] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:05.603] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:05.603] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:05.603] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:05.603] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:05.603] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:05.603] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:05.603] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:05.603] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:05.603] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:05.603] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:05.603] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:05.603] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:05.603] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:05.603] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:06.704] <TB3> INFO: Test took 1101ms.
[15:43:06.705] <TB3> INFO: The DUT currently contains the following objects:
[15:43:06.705] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:43:06.705] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:43:06.705] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:43:06.705] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:43:06.705] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:06.705] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:06.705] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:06.705] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:06.705] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:06.705] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:06.705] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:06.705] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:06.705] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:06.705] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:06.705] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:06.705] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:06.705] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:06.705] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:06.705] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:06.705] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:07.806] <TB3> INFO: Test took 1101ms.
[15:43:07.806] <TB3> INFO: The DUT currently contains the following objects:
[15:43:07.806] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:43:07.806] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:43:07.806] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:43:07.806] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:43:07.806] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:07.806] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:07.806] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:07.806] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:07.806] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:07.806] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:07.806] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:07.806] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:07.806] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:07.806] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:07.806] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:07.806] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:07.806] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:07.806] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:07.806] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:07.806] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:08.908] <TB3> INFO: Test took 1102ms.
[15:43:08.909] <TB3> INFO: The DUT currently contains the following objects:
[15:43:08.909] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[15:43:08.909] <TB3> INFO: TBM Core alpha (0): 7 registers set
[15:43:08.909] <TB3> INFO: TBM Core beta (1): 7 registers set
[15:43:08.909] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:43:08.909] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:08.909] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:08.909] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:08.909] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:08.909] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:08.909] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:08.909] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:08.909] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:08.909] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:08.909] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:08.909] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:08.909] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:08.909] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:08.909] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:08.909] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:08.909] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:43:10.010] <TB3> INFO: Test took 1101ms.
[15:43:10.013] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:46:52.411] <TB3> INFO: Test took 222398ms.
[15:46:53.932] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:37.322] <TB3> INFO: Test took 223390ms.
[15:50:39.162] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:39.169] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:39.176] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:39.183] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:39.191] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:39.197] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:39.205] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:39.212] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:39.219] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:39.226] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:39.233] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:39.239] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:39.247] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:39.254] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:39.264] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:39.274] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:50:39.314] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C0.dat
[15:50:39.314] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C1.dat
[15:50:39.314] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C2.dat
[15:50:39.314] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C3.dat
[15:50:39.315] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C4.dat
[15:50:39.315] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C5.dat
[15:50:39.315] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C6.dat
[15:50:39.315] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C7.dat
[15:50:39.315] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C8.dat
[15:50:39.315] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C9.dat
[15:50:39.315] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C10.dat
[15:50:39.316] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C11.dat
[15:50:39.316] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C12.dat
[15:50:39.316] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C13.dat
[15:50:39.316] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C14.dat
[15:50:39.316] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C15.dat
[15:50:42.599] <TB3> INFO: Test took 3281ms.
[15:50:46.170] <TB3> INFO: Test took 3299ms.
[15:50:49.721] <TB3> INFO: Test took 3285ms.
[15:50:49.991] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:50.903] <TB3> INFO: Test took 912ms.
[15:50:50.905] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:52.007] <TB3> INFO: Test took 1102ms.
[15:50:52.010] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:53.111] <TB3> INFO: Test took 1101ms.
[15:50:53.113] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:54.214] <TB3> INFO: Test took 1101ms.
[15:50:54.215] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:55.324] <TB3> INFO: Test took 1109ms.
[15:50:55.326] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:56.434] <TB3> INFO: Test took 1108ms.
[15:50:56.437] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:57.546] <TB3> INFO: Test took 1109ms.
[15:50:57.550] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:58.651] <TB3> INFO: Test took 1102ms.
[15:50:58.653] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:50:59.760] <TB3> INFO: Test took 1107ms.
[15:50:59.763] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:00.873] <TB3> INFO: Test took 1110ms.
[15:51:00.877] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:01.987] <TB3> INFO: Test took 1111ms.
[15:51:01.992] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:03.098] <TB3> INFO: Test took 1107ms.
[15:51:03.115] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:04.224] <TB3> INFO: Test took 1109ms.
[15:51:04.228] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:05.337] <TB3> INFO: Test took 1109ms.
[15:51:05.341] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:06.450] <TB3> INFO: Test took 1110ms.
[15:51:06.454] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:07.561] <TB3> INFO: Test took 1107ms.
[15:51:07.564] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:08.673] <TB3> INFO: Test took 1109ms.
[15:51:08.676] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:09.802] <TB3> INFO: Test took 1126ms.
[15:51:09.806] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:10.913] <TB3> INFO: Test took 1107ms.
[15:51:10.917] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:12.023] <TB3> INFO: Test took 1107ms.
[15:51:12.027] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:13.133] <TB3> INFO: Test took 1107ms.
[15:51:13.137] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:14.247] <TB3> INFO: Test took 1110ms.
[15:51:14.250] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:15.357] <TB3> INFO: Test took 1107ms.
[15:51:15.360] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:16.468] <TB3> INFO: Test took 1108ms.
[15:51:16.472] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:17.580] <TB3> INFO: Test took 1108ms.
[15:51:17.584] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:18.686] <TB3> INFO: Test took 1103ms.
[15:51:18.688] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:19.791] <TB3> INFO: Test took 1103ms.
[15:51:19.794] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:20.895] <TB3> INFO: Test took 1101ms.
[15:51:20.897] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:21.999] <TB3> INFO: Test took 1102ms.
[15:51:22.001] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:23.102] <TB3> INFO: Test took 1101ms.
[15:51:23.104] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:24.207] <TB3> INFO: Test took 1103ms.
[15:51:24.209] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:51:25.311] <TB3> INFO: Test took 1102ms.
[15:51:25.826] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 524 seconds
[15:51:25.826] <TB3> INFO: PH scale (per ROC): 82 77 85 69 85 74 77 75 80 80 74 72 84 78 70 73
[15:51:25.826] <TB3> INFO: PH offset (per ROC): 172 174 171 178 162 167 159 174 189 171 163 167 164 170 187 165
[15:51:26.084] <TB3> INFO: ######################################################################
[15:51:26.084] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[15:51:26.084] <TB3> INFO: ######################################################################
[15:51:26.094] <TB3> INFO: scanning low vcal = 50
[15:51:30.283] <TB3> INFO: Test took 4189ms.
[15:51:30.339] <TB3> INFO: scanning low vcal = 100
[15:51:34.615] <TB3> INFO: Test took 4276ms.
[15:51:34.710] <TB3> INFO: scanning low vcal = 150
[15:51:38.977] <TB3> INFO: Test took 4267ms.
[15:51:39.034] <TB3> INFO: scanning low vcal = 200
[15:51:43.239] <TB3> INFO: Test took 4205ms.
[15:51:43.298] <TB3> INFO: scanning low vcal = 250
[15:51:47.499] <TB3> INFO: Test took 4201ms.
[15:51:47.555] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[15:51:51.906] <TB3> INFO: Test took 4351ms.
[15:51:51.976] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[15:51:56.337] <TB3> INFO: Test took 4361ms.
[15:51:56.401] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[15:52:00.837] <TB3> INFO: Test took 4436ms.
[15:52:00.901] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[15:52:05.289] <TB3> INFO: Test took 4388ms.
[15:52:05.352] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[15:52:09.714] <TB3> INFO: Test took 4362ms.
[15:52:10.043] <TB3> INFO: PixTestGainPedestal::measure() done
[15:52:34.239] <TB3> INFO: PixTestGainPedestal::fit() done
[15:52:34.239] <TB3> INFO: non-linearity mean: 0.959 0.958 0.961 0.953 0.957 0.955 0.958 0.962 0.961 0.958 0.955 0.953 0.960 0.955 0.957 0.959
[15:52:34.239] <TB3> INFO: non-linearity RMS: 0.006 0.006 0.005 0.007 0.007 0.006 0.005 0.007 0.005 0.006 0.005 0.008 0.005 0.005 0.007 0.006
[15:52:34.240] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[15:52:34.261] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[15:52:34.281] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[15:52:34.300] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[15:52:34.321] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[15:52:34.341] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[15:52:34.360] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[15:52:34.381] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[15:52:34.401] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[15:52:34.420] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[15:52:34.440] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[15:52:34.459] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[15:52:34.479] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[15:52:34.498] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[15:52:34.518] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[15:52:34.538] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[15:52:34.557] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 68 seconds
[15:52:34.563] <TB3> INFO: enter test to run
[15:52:34.563] <TB3> INFO: test: exit no parameter change
[15:52:35.044] <TB3> QUIET: Connection to board 170 closed.
[15:52:35.124] <TB3> INFO: pXar: this is the end, my friend
MoReWeb-v1.0.0-5-g82d9ff6 on branch psi46master