[14:50:08.228] <TB2> INFO: *** Welcome to pxar ***
[14:50:08.228] <TB2> INFO: *** Today: 2015/07/09
[14:50:08.228] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C15.dat
[14:50:08.229] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//tbmParameters_C0b.dat
[14:50:08.229] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//defaultMaskFile.dat
[14:50:08.229] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters_C15.dat
[14:50:08.299] <TB2> INFO: clk: 4
[14:50:08.299] <TB2> INFO: ctr: 4
[14:50:08.299] <TB2> INFO: sda: 19
[14:50:08.299] <TB2> INFO: tin: 9
[14:50:08.299] <TB2> INFO: level: 15
[14:50:08.299] <TB2> INFO: triggerdelay: 0
[14:50:08.299] <TB2> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[14:50:08.299] <TB2> INFO: Log level: INFO
[14:50:08.306] <TB2> INFO: Found DTB DTB_WXC55Z
[14:50:08.321] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[14:50:08.325] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[14:50:08.327] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[14:50:09.906] <TB2> INFO: DUT info:
[14:50:09.906] <TB2> INFO: The DUT currently contains the following objects:
[14:50:09.906] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:50:09.906] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:50:09.906] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:50:09.906] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[14:50:09.906] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:09.906] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:09.906] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:09.906] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:09.906] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:09.906] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:09.906] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:09.906] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:09.906] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:09.906] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:09.906] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:09.906] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:09.906] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:09.906] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:09.906] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:09.906] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[14:50:10.307] <TB2> INFO: enter 'restricted' command line mode
[14:50:10.307] <TB2> INFO: enter test to run
[14:50:10.308] <TB2> INFO: test: pretest no parameter change
[14:50:10.308] <TB2> INFO: running: pretest
[14:50:10.315] <TB2> INFO: ######################################################################
[14:50:10.315] <TB2> INFO: PixTestPretest::doTest()
[14:50:10.315] <TB2> INFO: ######################################################################
[14:50:10.317] <TB2> INFO: ----------------------------------------------------------------------
[14:50:10.317] <TB2> INFO: PixTestPretest::programROC()
[14:50:10.317] <TB2> INFO: ----------------------------------------------------------------------
[14:50:28.334] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[14:50:28.334] <TB2> INFO: IA differences per ROC: 16.9 17.7 17.7 20.1 17.7 18.5 16.1 17.7 16.9 17.7 20.1 19.3 18.5 19.3 15.3 16.9
[14:50:28.420] <TB2> INFO: ----------------------------------------------------------------------
[14:50:28.420] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[14:50:28.420] <TB2> INFO: ----------------------------------------------------------------------
[14:50:47.970] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 389.1 mA = 24.3188 mA/ROC
[14:50:47.973] <TB2> INFO: ----------------------------------------------------------------------
[14:50:47.973] <TB2> INFO: PixTestPretest::findWorkingPixel()
[14:50:47.973] <TB2> INFO: ----------------------------------------------------------------------
[14:50:57.387] <TB2> INFO: Test took 9408ms.
[14:50:57.688] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[14:50:57.724] <TB2> INFO: ----------------------------------------------------------------------
[14:50:57.724] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[14:50:57.724] <TB2> INFO: ----------------------------------------------------------------------
[14:51:06.866] <TB2> INFO: Test took 9135ms.
[14:51:07.182] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[14:51:07.182] <TB2> INFO: CalDel: 124 127 122 144 145 116 141 138 129 119 127 116 113 113 113 127
[14:51:07.182] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[14:51:07.187] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C0.dat
[14:51:07.188] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C1.dat
[14:51:07.188] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C2.dat
[14:51:07.188] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C3.dat
[14:51:07.189] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C4.dat
[14:51:07.189] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C5.dat
[14:51:07.189] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C6.dat
[14:51:07.189] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C7.dat
[14:51:07.189] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C8.dat
[14:51:07.190] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C9.dat
[14:51:07.190] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C10.dat
[14:51:07.190] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C11.dat
[14:51:07.190] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C12.dat
[14:51:07.190] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C13.dat
[14:51:07.191] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C14.dat
[14:51:07.191] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters_C15.dat
[14:51:07.191] <TB2> INFO: PixTestPretest::doTest() done, duration: 56 seconds
[14:51:07.285] <TB2> INFO: enter test to run
[14:51:07.285] <TB2> INFO: test: fulltest no parameter change
[14:51:07.285] <TB2> INFO: running: fulltest
[14:51:07.285] <TB2> INFO: ######################################################################
[14:51:07.285] <TB2> INFO: PixTestFullTest::doTest()
[14:51:07.285] <TB2> INFO: ######################################################################
[14:51:07.287] <TB2> INFO: ######################################################################
[14:51:07.287] <TB2> INFO: PixTestAlive::doTest()
[14:51:07.287] <TB2> INFO: ######################################################################
[14:51:07.288] <TB2> INFO: ----------------------------------------------------------------------
[14:51:07.288] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:51:07.288] <TB2> INFO: ----------------------------------------------------------------------
[14:51:11.115] <TB2> INFO: Test took 3826ms.
[14:51:11.144] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:11.371] <TB2> INFO: PixTestAlive::aliveTest() done
[14:51:11.371] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:51:11.373] <TB2> INFO: ----------------------------------------------------------------------
[14:51:11.373] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:51:11.373] <TB2> INFO: ----------------------------------------------------------------------
[14:51:14.239] <TB2> INFO: Test took 2864ms.
[14:51:14.242] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:14.245] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:51:14.474] <TB2> INFO: PixTestAlive::maskTest() done
[14:51:14.474] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:51:14.476] <TB2> INFO: ----------------------------------------------------------------------
[14:51:14.476] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:51:14.476] <TB2> INFO: ----------------------------------------------------------------------
[14:51:18.195] <TB2> INFO: Test took 3718ms.
[14:51:18.221] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:18.450] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[14:51:18.450] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:51:18.450] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[14:51:18.462] <TB2> INFO: ######################################################################
[14:51:18.462] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[14:51:18.462] <TB2> INFO: ######################################################################
[14:51:18.465] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[14:51:18.476] <TB2> INFO: dacScan step from 0 .. 29
[14:51:42.141] <TB2> INFO: Test took 23665ms.
[14:51:42.178] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:42.178] <TB2> INFO: dacScan step from 30 .. 59
[14:52:06.594] <TB2> INFO: Test took 24416ms.
[14:52:06.652] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:06.657] <TB2> INFO: dacScan step from 60 .. 89
[14:52:39.134] <TB2> INFO: Test took 32477ms.
[14:52:39.379] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:39.437] <TB2> INFO: dacScan step from 90 .. 119
[14:53:10.994] <TB2> INFO: Test took 31556ms.
[14:53:11.317] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:11.425] <TB2> INFO: dacScan step from 120 .. 149
[14:53:41.053] <TB2> INFO: Test took 29628ms.
[14:53:41.285] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:04.114] <TB2> INFO: PixTestBBMap::doTest() done, duration: 165 seconds
[14:54:04.114] <TB2> INFO: number of dead bumps (per ROC): 13 0 0 0 0 0 0 0 3 0 0 1 1 1 0 16
[14:54:04.114] <TB2> INFO: separation cut (per ROC): 90 105 100 97 86 91 86 89 96 95 93 106 98 107 109 105
[14:54:04.183] <TB2> INFO: ######################################################################
[14:54:04.183] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[14:54:04.183] <TB2> INFO: ######################################################################
[14:54:04.183] <TB2> INFO: ----------------------------------------------------------------------
[14:54:04.184] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[14:54:04.184] <TB2> INFO: ----------------------------------------------------------------------
[14:54:04.184] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[14:54:04.192] <TB2> INFO: dacScan step from 0 .. 3
[14:54:26.039] <TB2> INFO: Test took 21847ms.
[14:54:26.065] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:26.065] <TB2> INFO: dacScan step from 4 .. 7
[14:54:47.798] <TB2> INFO: Test took 21733ms.
[14:54:47.823] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:47.824] <TB2> INFO: dacScan step from 8 .. 11
[14:55:09.482] <TB2> INFO: Test took 21658ms.
[14:55:09.513] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:09.513] <TB2> INFO: dacScan step from 12 .. 15
[14:55:31.113] <TB2> INFO: Test took 21600ms.
[14:55:31.142] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:31.142] <TB2> INFO: dacScan step from 16 .. 19
[14:55:52.943] <TB2> INFO: Test took 21801ms.
[14:55:52.977] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:52.977] <TB2> INFO: dacScan step from 20 .. 23
[14:56:14.668] <TB2> INFO: Test took 21691ms.
[14:56:14.694] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:14.694] <TB2> INFO: dacScan step from 24 .. 27
[14:56:37.038] <TB2> INFO: Test took 22344ms.
[14:56:37.064] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:37.064] <TB2> INFO: dacScan step from 28 .. 31
[14:56:58.900] <TB2> INFO: Test took 21836ms.
[14:56:58.925] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:58.925] <TB2> INFO: dacScan step from 32 .. 35
[14:57:20.742] <TB2> INFO: Test took 21817ms.
[14:57:20.774] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:20.774] <TB2> INFO: dacScan step from 36 .. 39
[14:57:42.587] <TB2> INFO: Test took 21813ms.
[14:57:42.615] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:42.615] <TB2> INFO: dacScan step from 40 .. 43
[14:58:04.539] <TB2> INFO: Test took 21924ms.
[14:58:04.565] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:04.565] <TB2> INFO: dacScan step from 44 .. 47
[14:58:26.492] <TB2> INFO: Test took 21926ms.
[14:58:26.523] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:26.523] <TB2> INFO: dacScan step from 48 .. 51
[14:58:48.323] <TB2> INFO: Test took 21800ms.
[14:58:48.351] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:48.351] <TB2> INFO: dacScan step from 52 .. 55
[14:59:10.191] <TB2> INFO: Test took 21840ms.
[14:59:10.216] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:10.216] <TB2> INFO: dacScan step from 56 .. 59
[14:59:32.222] <TB2> INFO: Test took 22005ms.
[14:59:32.252] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:32.252] <TB2> INFO: dacScan step from 60 .. 63
[14:59:54.591] <TB2> INFO: Test took 22338ms.
[14:59:54.616] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:54.616] <TB2> INFO: dacScan step from 64 .. 67
[15:00:16.391] <TB2> INFO: Test took 21775ms.
[15:00:16.419] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:16.419] <TB2> INFO: dacScan step from 68 .. 71
[15:00:38.189] <TB2> INFO: Test took 21770ms.
[15:00:38.218] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:38.218] <TB2> INFO: dacScan step from 72 .. 75
[15:01:00.415] <TB2> INFO: Test took 22197ms.
[15:01:00.445] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:00.445] <TB2> INFO: dacScan step from 76 .. 79
[15:01:22.740] <TB2> INFO: Test took 22295ms.
[15:01:22.766] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:22.766] <TB2> INFO: dacScan step from 80 .. 83
[15:01:45.352] <TB2> INFO: Test took 22586ms.
[15:01:45.393] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:45.393] <TB2> INFO: dacScan step from 84 .. 87
[15:02:07.710] <TB2> INFO: Test took 22317ms.
[15:02:07.762] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:07.764] <TB2> INFO: dacScan step from 88 .. 91
[15:02:31.442] <TB2> INFO: Test took 23678ms.
[15:02:31.525] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:31.529] <TB2> INFO: dacScan step from 92 .. 95
[15:02:57.396] <TB2> INFO: Test took 25867ms.
[15:02:57.522] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:57.532] <TB2> INFO: dacScan step from 96 .. 99
[15:03:26.842] <TB2> INFO: Test took 29310ms.
[15:03:27.036] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:27.046] <TB2> INFO: dacScan step from 100 .. 103
[15:03:58.573] <TB2> INFO: Test took 31527ms.
[15:03:58.784] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:58.793] <TB2> INFO: dacScan step from 104 .. 107
[15:04:31.564] <TB2> INFO: Test took 32771ms.
[15:04:31.785] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:04:31.795] <TB2> INFO: dacScan step from 108 .. 111




[15:05:05.450] <TB2> INFO: Test took 33655ms.
[15:05:05.689] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:05.700] <TB2> INFO: dacScan step from 112 .. 115



[15:05:40.275] <TB2> INFO: Test took 34575ms.
[15:05:40.529] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:40.540] <TB2> INFO: dacScan step from 116 .. 119



[15:06:15.355] <TB2> INFO: Test took 34815ms.
[15:06:15.577] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:15.587] <TB2> INFO: dacScan step from 120 .. 123


[15:06:49.673] <TB2> INFO: Test took 34085ms.
[15:06:49.889] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:49.900] <TB2> INFO: dacScan step from 124 .. 127






[15:07:25.014] <TB2> INFO: Test took 35114ms.
[15:07:25.259] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:25.271] <TB2> INFO: dacScan step from 128 .. 131
[15:07:57.798] <TB2> INFO: Test took 32527ms.
[15:07:58.036] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:58.048] <TB2> INFO: dacScan step from 132 .. 135




[15:08:30.648] <TB2> INFO: Test took 32599ms.
[15:08:30.903] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:30.915] <TB2> INFO: dacScan step from 136 .. 139
[15:09:04.039] <TB2> INFO: Test took 33124ms.
[15:09:04.257] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:04.268] <TB2> INFO: dacScan step from 140 .. 143
[15:09:39.537] <TB2> INFO: Test took 35269ms.
[15:09:39.834] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:39.845] <TB2> INFO: dacScan step from 144 .. 147
[15:10:14.819] <TB2> INFO: Test took 34974ms.
[15:10:15.077] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:15.091] <TB2> INFO: dacScan step from 148 .. 149
[15:10:32.574] <TB2> INFO: Test took 17483ms.
[15:10:32.681] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:32.687] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:10:34.174] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:10:35.627] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:10:36.983] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:10:38.308] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:10:39.695] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:10:41.035] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:10:42.409] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:10:43.783] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:10:45.257] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:10:46.627] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:10:48.042] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:10:49.543] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:10:51.093] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:10:52.629] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:10:54.106] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[15:10:55.512] <TB2> INFO: PixTestScurves::scurves() done
[15:10:55.512] <TB2> INFO: Vcal mean: 99.93 100.76 105.16 108.29 94.67 98.03 100.69 98.78 103.06 90.77 97.05 107.53 99.56 94.24 99.59 90.93
[15:10:55.512] <TB2> INFO: Vcal RMS: 6.11 6.05 6.02 6.15 5.26 5.23 5.72 5.23 6.37 5.63 5.90 5.00 5.11 4.85 5.45 5.73
[15:10:55.512] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1011 seconds
[15:10:55.591] <TB2> INFO: ######################################################################
[15:10:55.591] <TB2> INFO: PixTestTrim::doTest()
[15:10:55.591] <TB2> INFO: ######################################################################
[15:10:55.592] <TB2> INFO: ----------------------------------------------------------------------
[15:10:55.592] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[15:10:55.592] <TB2> INFO: ----------------------------------------------------------------------
[15:10:55.687] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:10:55.687] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[15:10:55.696] <TB2> INFO: dacScan step from 0 .. 19
[15:11:11.540] <TB2> INFO: Test took 15844ms.
[15:11:11.564] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:11.564] <TB2> INFO: dacScan step from 20 .. 39
[15:11:27.927] <TB2> INFO: Test took 16363ms.
[15:11:27.949] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:27.949] <TB2> INFO: dacScan step from 40 .. 59
[15:11:44.395] <TB2> INFO: Test took 16447ms.
[15:11:44.419] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:44.419] <TB2> INFO: dacScan step from 60 .. 79
[15:12:00.878] <TB2> INFO: Test took 16458ms.
[15:12:00.904] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:00.904] <TB2> INFO: dacScan step from 80 .. 99
[15:12:17.593] <TB2> INFO: Test took 16689ms.
[15:12:17.624] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:17.625] <TB2> INFO: dacScan step from 100 .. 119
[15:12:37.805] <TB2> INFO: Test took 20179ms.
[15:12:37.938] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:37.962] <TB2> INFO: dacScan step from 120 .. 139
[15:13:00.514] <TB2> INFO: Test took 22552ms.
[15:13:00.693] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:00.728] <TB2> INFO: dacScan step from 140 .. 159
[15:13:18.306] <TB2> INFO: Test took 17578ms.
[15:13:18.405] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:41.929] <TB2> INFO: ROC 0 VthrComp = 96
[15:13:41.929] <TB2> INFO: ROC 1 VthrComp = 101
[15:13:41.929] <TB2> INFO: ROC 2 VthrComp = 101
[15:13:41.929] <TB2> INFO: ROC 3 VthrComp = 103
[15:13:41.929] <TB2> INFO: ROC 4 VthrComp = 93
[15:13:41.929] <TB2> INFO: ROC 5 VthrComp = 102
[15:13:41.929] <TB2> INFO: ROC 6 VthrComp = 95
[15:13:41.929] <TB2> INFO: ROC 7 VthrComp = 99
[15:13:41.929] <TB2> INFO: ROC 8 VthrComp = 100
[15:13:41.930] <TB2> INFO: ROC 9 VthrComp = 93
[15:13:41.930] <TB2> INFO: ROC 10 VthrComp = 96
[15:13:41.930] <TB2> INFO: ROC 11 VthrComp = 109
[15:13:41.930] <TB2> INFO: ROC 12 VthrComp = 101
[15:13:41.930] <TB2> INFO: ROC 13 VthrComp = 102
[15:13:41.930] <TB2> INFO: ROC 14 VthrComp = 102
[15:13:41.930] <TB2> INFO: ROC 15 VthrComp = 95
[15:13:41.930] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[15:13:41.930] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[15:13:41.939] <TB2> INFO: dacScan step from 0 .. 19
[15:13:57.698] <TB2> INFO: Test took 15759ms.
[15:13:57.717] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:57.717] <TB2> INFO: dacScan step from 20 .. 39
[15:14:13.761] <TB2> INFO: Test took 16044ms.
[15:14:13.790] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:13.793] <TB2> INFO: dacScan step from 40 .. 59
[15:14:35.264] <TB2> INFO: Test took 21468ms.
[15:14:35.412] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:35.445] <TB2> INFO: dacScan step from 60 .. 79
[15:14:58.699] <TB2> INFO: Test took 23254ms.
[15:14:58.885] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:58.938] <TB2> INFO: dacScan step from 80 .. 99
[15:15:22.238] <TB2> INFO: Test took 23300ms.
[15:15:22.405] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:22.452] <TB2> INFO: dacScan step from 100 .. 119
[15:15:45.774] <TB2> INFO: Test took 23322ms.
[15:15:45.936] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:45.985] <TB2> INFO: dacScan step from 120 .. 139
[15:16:09.026] <TB2> INFO: Test took 23041ms.
[15:16:09.200] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:16:09.250] <TB2> INFO: dacScan step from 140 .. 159
[15:16:32.532] <TB2> INFO: Test took 23282ms.
[15:16:32.718] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:16:59.974] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 62.445 for pixel 0/19 mean/min/max = 46.7451/31.0271/62.4632
[15:16:59.975] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 61.769 for pixel 2/76 mean/min/max = 46.8014/31.8138/61.789
[15:16:59.975] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 62.5806 for pixel 23/79 mean/min/max = 47.3499/32.0353/62.6645
[15:16:59.975] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 65.9772 for pixel 2/0 mean/min/max = 49.3855/32.7258/66.0451
[15:16:59.975] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 60.6818 for pixel 17/6 mean/min/max = 46.5937/32.4193/60.7682
[15:16:59.976] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 58.2216 for pixel 0/62 mean/min/max = 44.9742/31.6443/58.3042
[15:16:59.976] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 62.1681 for pixel 15/12 mean/min/max = 47.1968/32.1448/62.2489
[15:16:59.976] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.3899 for pixel 0/77 mean/min/max = 45.447/32.4705/58.4234
[15:16:59.977] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 61.7325 for pixel 0/71 mean/min/max = 46.7096/31.5692/61.85
[15:16:59.977] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 57.6905 for pixel 42/79 mean/min/max = 45.1601/32.5489/57.7713
[15:16:59.977] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 60.6728 for pixel 15/14 mean/min/max = 46.1424/31.6039/60.6808
[15:16:59.978] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 60.3138 for pixel 2/63 mean/min/max = 47.4125/34.3409/60.4842
[15:16:59.978] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 57.569 for pixel 17/79 mean/min/max = 44.9901/32.2994/57.6808
[15:16:59.978] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 55.5832 for pixel 21/79 mean/min/max = 43.946/32.1216/55.7704
[15:16:59.979] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 58.1198 for pixel 15/69 mean/min/max = 44.9766/31.6614/58.2918
[15:16:59.979] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 59.3126 for pixel 3/2 mean/min/max = 45.6533/31.9235/59.3831
[15:16:59.979] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:51.029] <TB2> INFO: Test took 111050ms.
[15:18:52.438] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[15:18:52.446] <TB2> INFO: dacScan step from 0 .. 19
[15:19:18.161] <TB2> INFO: Test took 25715ms.
[15:19:18.210] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:19:18.212] <TB2> INFO: dacScan step from 20 .. 39
[15:19:51.210] <TB2> INFO: Test took 32998ms.
[15:19:51.459] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:19:51.488] <TB2> INFO: dacScan step from 40 .. 59



[15:20:29.155] <TB2> INFO: Test took 37666ms.
[15:20:29.447] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:20:29.503] <TB2> INFO: dacScan step from 60 .. 79




[15:21:04.381] <TB2> INFO: Test took 34878ms.
[15:21:04.666] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:04.716] <TB2> INFO: dacScan step from 80 .. 99



[15:21:40.842] <TB2> INFO: Test took 36125ms.
[15:21:41.230] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:41.280] <TB2> INFO: dacScan step from 100 .. 119




[15:22:19.874] <TB2> INFO: Test took 38594ms.
[15:22:20.246] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:20.295] <TB2> INFO: dacScan step from 120 .. 139



[15:22:58.912] <TB2> INFO: Test took 38617ms.
[15:22:59.190] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:59.249] <TB2> INFO: dacScan step from 140 .. 159






[15:23:37.413] <TB2> INFO: Test took 38164ms.
[15:23:37.706] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:37.750] <TB2> INFO: dacScan step from 160 .. 179



[15:24:16.035] <TB2> INFO: Test took 38285ms.
[15:24:16.349] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:16.396] <TB2> INFO: dacScan step from 180 .. 199



[15:24:52.641] <TB2> INFO: Test took 36245ms.
[15:24:52.907] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:20.179] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.019356 .. 255.000000
[15:25:20.299] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[15:25:20.310] <TB2> INFO: dacScan step from 0 .. 19
[15:25:34.307] <TB2> INFO: Test took 13997ms.
[15:25:34.327] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:34.327] <TB2> INFO: dacScan step from 20 .. 39
[15:25:49.544] <TB2> INFO: Test took 15217ms.
[15:25:49.623] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:49.639] <TB2> INFO: dacScan step from 40 .. 59
[15:26:09.365] <TB2> INFO: Test took 19726ms.
[15:26:09.541] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:09.597] <TB2> INFO: dacScan step from 60 .. 79
[15:26:28.868] <TB2> INFO: Test took 19271ms.
[15:26:29.007] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:29.057] <TB2> INFO: dacScan step from 80 .. 99
[15:26:48.064] <TB2> INFO: Test took 19007ms.
[15:26:48.243] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:48.302] <TB2> INFO: dacScan step from 100 .. 119
[15:27:07.451] <TB2> INFO: Test took 19149ms.
[15:27:07.607] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:07.662] <TB2> INFO: dacScan step from 120 .. 139
[15:27:26.617] <TB2> INFO: Test took 18955ms.
[15:27:26.761] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:26.813] <TB2> INFO: dacScan step from 140 .. 159
[15:27:46.603] <TB2> INFO: Test took 19790ms.
[15:27:46.749] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:46.794] <TB2> INFO: dacScan step from 160 .. 179
[15:28:05.901] <TB2> INFO: Test took 19107ms.
[15:28:06.048] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:06.102] <TB2> INFO: dacScan step from 180 .. 199
[15:28:26.619] <TB2> INFO: Test took 20517ms.
[15:28:26.766] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:26.816] <TB2> INFO: dacScan step from 200 .. 219
[15:28:45.709] <TB2> INFO: Test took 18892ms.
[15:28:45.855] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:45.904] <TB2> INFO: dacScan step from 220 .. 239
[15:29:06.192] <TB2> INFO: Test took 20288ms.
[15:29:06.355] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:06.409] <TB2> INFO: dacScan step from 240 .. 255
[15:29:22.003] <TB2> INFO: Test took 15594ms.
[15:29:22.183] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:56.650] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 16.428316 .. 47.232478
[15:29:56.748] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 6 .. 57 (20) hits flags = 16 (plus default)
[15:29:56.759] <TB2> INFO: dacScan step from 6 .. 25
[15:30:11.742] <TB2> INFO: Test took 14983ms.
[15:30:11.767] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:30:11.767] <TB2> INFO: dacScan step from 26 .. 45
[15:30:29.586] <TB2> INFO: Test took 17819ms.
[15:30:29.722] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:30:29.750] <TB2> INFO: dacScan step from 46 .. 57
[15:30:43.024] <TB2> INFO: Test took 13273ms.
[15:30:43.108] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:31:00.700] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 20.836316 .. 44.146954
[15:31:00.786] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 10 .. 54 (20) hits flags = 16 (plus default)
[15:31:00.794] <TB2> INFO: dacScan step from 10 .. 29
[15:31:15.686] <TB2> INFO: Test took 14892ms.
[15:31:15.706] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:31:15.707] <TB2> INFO: dacScan step from 30 .. 49
[15:31:34.334] <TB2> INFO: Test took 18627ms.
[15:31:34.476] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:31:34.516] <TB2> INFO: dacScan step from 50 .. 54
[15:31:41.624] <TB2> INFO: Test took 7108ms.
[15:31:41.662] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:31:57.774] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 2.798590 .. 65.748810
[15:31:57.855] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 2 .. 75 (20) hits flags = 16 (plus default)
[15:31:57.863] <TB2> INFO: dacScan step from 2 .. 21
[15:32:12.401] <TB2> INFO: Test took 14538ms.
[15:32:12.424] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:32:12.424] <TB2> INFO: dacScan step from 22 .. 41
[15:32:29.100] <TB2> INFO: Test took 16676ms.
[15:32:29.190] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:32:29.211] <TB2> INFO: dacScan step from 42 .. 61
[15:32:49.593] <TB2> INFO: Test took 20382ms.
[15:32:49.761] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:32:49.809] <TB2> INFO: dacScan step from 62 .. 75
[15:33:04.749] <TB2> INFO: Test took 14940ms.
[15:33:04.848] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:33:25.051] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[15:33:25.051] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[15:33:25.059] <TB2> INFO: dacScan step from 15 .. 34
[15:33:51.334] <TB2> INFO: Test took 26275ms.
[15:33:51.409] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:33:51.418] <TB2> INFO: dacScan step from 35 .. 54



[15:34:27.050] <TB2> INFO: Test took 35632ms.
[15:34:27.358] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:34:27.405] <TB2> INFO: dacScan step from 55 .. 55
[15:34:31.943] <TB2> INFO: Test took 4538ms.
[15:34:31.957] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:34:46.817] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C0.dat
[15:34:46.817] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C1.dat
[15:34:46.817] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C2.dat
[15:34:46.818] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C3.dat
[15:34:46.818] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C4.dat
[15:34:46.818] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C5.dat
[15:34:46.818] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C6.dat
[15:34:46.818] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C7.dat
[15:34:46.818] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C8.dat
[15:34:46.818] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C9.dat
[15:34:46.818] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C10.dat
[15:34:46.819] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C11.dat
[15:34:46.819] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C12.dat
[15:34:46.819] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C13.dat
[15:34:46.819] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C14.dat
[15:34:46.819] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C15.dat
[15:34:46.819] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C0.dat
[15:34:46.826] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C1.dat
[15:34:46.833] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C2.dat
[15:34:46.840] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C3.dat
[15:34:46.847] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C4.dat
[15:34:46.854] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C5.dat
[15:34:46.861] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C6.dat
[15:34:46.868] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C7.dat
[15:34:46.874] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C8.dat
[15:34:46.881] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C9.dat
[15:34:46.887] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C10.dat
[15:34:46.893] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C11.dat
[15:34:46.899] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C12.dat
[15:34:46.905] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C13.dat
[15:34:46.911] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C14.dat
[15:34:46.918] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//trimParameters35_C15.dat
[15:34:46.924] <TB2> INFO: PixTestTrim::trimTest() done
[15:34:46.924] <TB2> INFO: vtrim: 109 125 118 130 116 116 123 101 112 106 118 126 103 104 114 116
[15:34:46.924] <TB2> INFO: vthrcomp: 96 101 101 103 93 102 95 99 100 93 96 109 101 102 102 95
[15:34:46.924] <TB2> INFO: vcal mean: 35.07 35.05 35.09 35.11 35.03 35.08 35.10 35.06 35.10 35.03 35.07 35.08 35.05 35.05 35.02 35.02
[15:34:46.924] <TB2> INFO: vcal RMS: 1.06 1.02 1.14 1.25 1.13 1.05 1.22 1.07 1.12 1.03 1.08 1.02 1.06 0.96 1.08 1.06
[15:34:46.924] <TB2> INFO: bits mean: 9.50 9.43 9.77 9.05 9.92 10.08 10.06 9.88 9.64 9.96 9.87 9.30 9.91 10.01 10.43 10.07
[15:34:46.924] <TB2> INFO: bits RMS: 2.80 2.69 2.47 2.53 2.37 2.53 2.35 2.49 2.64 2.47 2.54 2.37 2.52 2.62 2.33 2.50
[15:34:46.929] <TB2> INFO: ----------------------------------------------------------------------
[15:34:46.929] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 240 150 100
[15:34:46.929] <TB2> INFO: ----------------------------------------------------------------------
[15:34:46.930] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[15:34:46.938] <TB2> INFO: dacScan step from 0 .. 19
[15:35:12.320] <TB2> INFO: Test took 25382ms.
[15:35:12.354] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:35:12.354] <TB2> INFO: dacScan step from 20 .. 39
[15:35:38.380] <TB2> INFO: Test took 26026ms.
[15:35:38.437] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:35:38.440] <TB2> INFO: dacScan step from 40 .. 59
[15:36:12.976] <TB2> INFO: Test took 34536ms.
[15:36:13.240] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:36:13.279] <TB2> INFO: dacScan step from 60 .. 79



[15:36:50.741] <TB2> INFO: Test took 37462ms.
[15:36:51.018] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:36:51.066] <TB2> INFO: dacScan step from 80 .. 99
[15:37:28.161] <TB2> INFO: Test took 37095ms.
[15:37:28.435] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:28.487] <TB2> INFO: dacScan step from 100 .. 119
[15:38:06.972] <TB2> INFO: Test took 38485ms.
[15:38:07.250] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:38:07.299] <TB2> INFO: dacScan step from 120 .. 139
[15:38:44.749] <TB2> INFO: Test took 37450ms.
[15:38:45.031] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:38:45.085] <TB2> INFO: dacScan step from 140 .. 159
[15:39:21.091] <TB2> INFO: Test took 36000ms.
[15:39:21.374] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:39:21.423] <TB2> INFO: dacScan step from 160 .. 179
[15:39:59.471] <TB2> INFO: Test took 38048ms.
[15:39:59.743] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:39:59.792] <TB2> INFO: dacScan step from 180 .. 199
[15:40:38.598] <TB2> INFO: Test took 38805ms.
[15:40:38.872] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:41:06.851] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 86 (20) hits flags = 16 (plus default)
[15:41:06.860] <TB2> INFO: dacScan step from 0 .. 19
[15:41:32.190] <TB2> INFO: Test took 25330ms.
[15:41:32.229] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:41:32.229] <TB2> INFO: dacScan step from 20 .. 39
[15:41:57.812] <TB2> INFO: Test took 25583ms.
[15:41:57.905] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:41:57.915] <TB2> INFO: dacScan step from 40 .. 59
[15:42:33.898] <TB2> INFO: Test took 35983ms.
[15:42:34.169] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:42:34.214] <TB2> INFO: dacScan step from 60 .. 79




[15:43:11.160] <TB2> INFO: Test took 36946ms.
[15:43:11.444] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:43:11.492] <TB2> INFO: dacScan step from 80 .. 86
[15:43:26.824] <TB2> INFO: Test took 15332ms.
[15:43:26.916] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:43:44.866] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 79 (20) hits flags = 16 (plus default)
[15:43:44.873] <TB2> INFO: dacScan step from 0 .. 19
[15:44:10.693] <TB2> INFO: Test took 25820ms.
[15:44:10.736] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:44:10.737] <TB2> INFO: dacScan step from 20 .. 39
[15:44:39.507] <TB2> INFO: Test took 28770ms.
[15:44:39.646] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:44:39.661] <TB2> INFO: dacScan step from 40 .. 59


[15:45:17.027] <TB2> INFO: Test took 37366ms.
[15:45:17.321] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:45:17.366] <TB2> INFO: dacScan step from 60 .. 79
[15:45:55.242] <TB2> INFO: Test took 37876ms.
[15:45:55.522] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:46:12.975] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 74 (20) hits flags = 16 (plus default)
[15:46:12.985] <TB2> INFO: dacScan step from 0 .. 19
[15:46:38.702] <TB2> INFO: Test took 25717ms.
[15:46:38.748] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:46:38.748] <TB2> INFO: dacScan step from 20 .. 39
[15:47:08.575] <TB2> INFO: Test took 29827ms.
[15:47:08.733] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:47:08.755] <TB2> INFO: dacScan step from 40 .. 59


[15:47:46.091] <TB2> INFO: Test took 37336ms.
[15:47:46.399] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:47:46.446] <TB2> INFO: dacScan step from 60 .. 74
[15:48:16.309] <TB2> INFO: Test took 29859ms.
[15:48:16.526] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:48:32.803] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 73 (20) hits flags = 16 (plus default)
[15:48:32.811] <TB2> INFO: dacScan step from 0 .. 19
[15:48:58.595] <TB2> INFO: Test took 25783ms.
[15:48:58.635] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:48:58.635] <TB2> INFO: dacScan step from 20 .. 39
[15:49:30.771] <TB2> INFO: Test took 32135ms.
[15:49:30.978] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:49:31.004] <TB2> INFO: dacScan step from 40 .. 59



[15:50:09.203] <TB2> INFO: Test took 38199ms.
[15:50:09.488] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:50:09.528] <TB2> INFO: dacScan step from 60 .. 73
[15:50:37.666] <TB2> INFO: Test took 28138ms.
[15:50:37.995] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:50:53.923] <TB2> INFO: PixTestTrim::trimBitTest() done
[15:50:53.924] <TB2> INFO: PixTestTrim::doTest() done, duration: 2398 seconds
[15:50:54.659] <TB2> INFO: ######################################################################
[15:50:54.659] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[15:50:54.659] <TB2> INFO: ######################################################################
[15:50:58.310] <TB2> INFO: Test took 3651ms.
[15:50:58.334] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:51:02.162] <TB2> INFO: Test took 3631ms.
[15:51:02.230] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:51:06.036] <TB2> INFO: Test took 3795ms.
[15:51:06.102] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:51:06.108] <TB2> INFO: The DUT currently contains the following objects:
[15:51:06.108] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:51:06.108] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:51:06.108] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:51:06.108] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:51:06.108] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:06.108] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:06.108] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:06.108] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:06.108] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:06.108] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:06.108] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:06.108] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:06.108] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:06.108] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:06.108] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:06.108] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:06.108] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:06.109] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:06.109] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:06.109] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:07.260] <TB2> INFO: Test took 1151ms.
[15:51:07.261] <TB2> INFO: The DUT currently contains the following objects:
[15:51:07.261] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:51:07.261] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:51:07.261] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:51:07.261] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:51:07.261] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:07.262] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:07.262] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:07.262] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:07.262] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:07.262] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:07.262] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:07.262] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:07.262] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:07.262] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:07.262] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:07.262] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:07.262] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:07.262] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:07.262] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:07.262] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:08.368] <TB2> INFO: Test took 1106ms.
[15:51:08.369] <TB2> INFO: The DUT currently contains the following objects:
[15:51:08.369] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:51:08.369] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:51:08.369] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:51:08.369] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:51:08.369] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:08.369] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:08.369] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:08.369] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:08.369] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:08.369] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:08.369] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:08.369] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:08.369] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:08.369] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:08.369] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:08.369] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:08.369] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:08.369] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:08.370] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:08.370] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:09.476] <TB2> INFO: Test took 1106ms.
[15:51:09.477] <TB2> INFO: The DUT currently contains the following objects:
[15:51:09.477] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:51:09.477] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:51:09.477] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:51:09.477] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:51:09.477] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:09.477] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:09.477] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:09.477] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:09.477] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:09.477] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:09.478] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:09.478] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:09.478] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:09.478] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:09.478] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:09.478] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:09.478] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:09.478] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:09.478] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:09.478] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:10.600] <TB2> INFO: Test took 1122ms.
[15:51:10.601] <TB2> INFO: The DUT currently contains the following objects:
[15:51:10.601] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:51:10.601] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:51:10.601] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:51:10.601] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:51:10.601] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:10.601] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:10.601] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:10.601] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:10.601] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:10.601] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:10.601] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:10.602] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:10.602] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:10.602] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:10.602] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:10.602] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:10.602] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:10.602] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:10.602] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:10.602] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:11.736] <TB2> INFO: Test took 1134ms.
[15:51:11.737] <TB2> INFO: The DUT currently contains the following objects:
[15:51:11.737] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:51:11.737] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:51:11.737] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:51:11.737] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:51:11.737] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:11.737] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:11.737] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:11.737] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:11.737] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:11.737] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:11.738] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:11.738] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:11.738] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:11.738] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:11.738] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:11.738] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:11.738] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:11.738] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:11.738] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:11.738] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:12.844] <TB2> INFO: Test took 1106ms.
[15:51:12.846] <TB2> INFO: The DUT currently contains the following objects:
[15:51:12.846] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:51:12.846] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:51:12.846] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:51:12.846] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:51:12.846] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:12.846] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:12.846] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:12.846] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:12.846] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:12.846] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:12.846] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:12.846] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:12.846] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:12.846] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:12.846] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:12.846] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:12.846] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:12.846] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:12.846] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:12.846] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:13.982] <TB2> INFO: Test took 1136ms.
[15:51:13.983] <TB2> INFO: The DUT currently contains the following objects:
[15:51:13.983] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:51:13.983] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:51:13.983] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:51:13.983] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:51:13.983] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:13.983] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:13.983] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:13.984] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:13.984] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:13.984] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:13.984] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:13.984] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:13.984] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:13.984] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:13.984] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:13.984] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:13.984] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:13.984] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:13.984] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:13.984] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:15.105] <TB2> INFO: Test took 1121ms.
[15:51:15.106] <TB2> INFO: The DUT currently contains the following objects:
[15:51:15.106] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:51:15.106] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:51:15.106] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:51:15.106] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:51:15.106] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:15.106] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:15.106] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:15.106] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:15.106] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:15.106] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:15.106] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:15.106] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:15.106] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:15.106] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:15.106] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:15.106] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:15.106] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:15.106] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:15.106] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:15.106] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:16.228] <TB2> INFO: Test took 1122ms.
[15:51:16.229] <TB2> INFO: The DUT currently contains the following objects:
[15:51:16.229] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:51:16.229] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:51:16.229] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:51:16.229] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:51:16.229] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:16.229] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:16.229] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:16.229] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:16.229] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:16.229] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:16.229] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:16.229] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:16.229] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:16.229] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:16.229] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:16.230] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:16.230] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:16.230] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:16.230] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:16.230] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:17.336] <TB2> INFO: Test took 1106ms.
[15:51:17.337] <TB2> INFO: The DUT currently contains the following objects:
[15:51:17.338] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:51:17.338] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:51:17.338] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:51:17.338] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:51:17.338] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:17.338] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:17.338] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:17.338] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:17.338] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:17.338] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:17.338] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:17.338] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:17.338] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:17.338] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:17.338] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:17.338] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:17.338] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:17.338] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:17.338] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:17.338] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:18.439] <TB2> INFO: Test took 1101ms.
[15:51:18.439] <TB2> INFO: The DUT currently contains the following objects:
[15:51:18.444] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:51:18.444] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:51:18.444] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:51:18.444] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:51:18.444] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:18.444] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:18.444] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:18.444] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:18.444] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:18.444] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:18.444] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:18.444] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:18.444] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:18.444] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:18.444] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:18.444] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:18.444] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:18.444] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:18.444] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:18.444] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:19.570] <TB2> INFO: Test took 1126ms.
[15:51:19.571] <TB2> INFO: The DUT currently contains the following objects:
[15:51:19.571] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:51:19.571] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:51:19.571] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:51:19.571] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:51:19.571] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:19.571] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:19.571] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:19.571] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:19.571] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:19.571] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:19.571] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:19.571] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:19.571] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:19.571] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:19.571] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:19.571] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:19.571] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:19.571] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:19.571] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:19.571] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:20.687] <TB2> INFO: Test took 1116ms.
[15:51:20.687] <TB2> INFO: The DUT currently contains the following objects:
[15:51:20.687] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:51:20.687] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:51:20.687] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:51:20.687] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:51:20.687] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:20.687] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:20.687] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:20.687] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:20.687] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:20.687] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:20.687] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:20.687] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:20.687] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:20.687] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:20.687] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:20.687] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:20.687] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:20.688] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:20.688] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:20.688] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:21.789] <TB2> INFO: Test took 1101ms.
[15:51:21.789] <TB2> INFO: The DUT currently contains the following objects:
[15:51:21.789] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:51:21.789] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:51:21.789] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:51:21.789] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:51:21.789] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:21.789] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:21.789] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:21.790] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:21.790] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:21.790] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:21.790] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:21.790] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:21.790] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:21.790] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:21.790] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:21.790] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:21.790] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:21.790] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:21.790] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:21.790] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:22.903] <TB2> INFO: Test took 1113ms.
[15:51:22.904] <TB2> INFO: The DUT currently contains the following objects:
[15:51:22.904] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:51:22.904] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:51:22.904] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:51:22.904] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:51:22.904] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:22.904] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:22.904] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:22.904] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:22.904] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:22.904] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:22.904] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:22.904] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:22.904] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:22.904] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:22.904] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:22.904] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:22.904] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:22.904] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:22.904] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:22.904] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:51:24.019] <TB2> INFO: Test took 1115ms.
[15:51:24.022] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:55:31.510] <TB2> INFO: Test took 247488ms.
[15:55:32.893] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:59:35.887] <TB2> INFO: Test took 242994ms.
[15:59:37.401] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:59:37.408] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:59:37.414] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:59:37.421] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:59:37.427] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:59:37.433] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:59:37.440] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:59:37.446] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:59:37.453] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[15:59:37.459] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[15:59:37.466] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:59:37.472] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:59:37.479] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:59:37.485] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:59:37.491] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:59:37.498] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:59:37.504] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:59:37.511] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:59:37.545] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C0.dat
[15:59:37.546] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C1.dat
[15:59:37.546] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C2.dat
[15:59:37.547] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C3.dat
[15:59:37.547] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C4.dat
[15:59:37.547] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C5.dat
[15:59:37.547] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C6.dat
[15:59:37.547] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C7.dat
[15:59:37.547] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C8.dat
[15:59:37.547] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C9.dat
[15:59:37.548] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C10.dat
[15:59:37.548] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C11.dat
[15:59:37.548] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C12.dat
[15:59:37.548] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C13.dat
[15:59:37.548] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C14.dat
[15:59:37.548] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//dacParameters35_C15.dat
[15:59:41.160] <TB2> INFO: Test took 3609ms.
[15:59:44.953] <TB2> INFO: Test took 3531ms.
[15:59:48.708] <TB2> INFO: Test took 3492ms.
[15:59:48.975] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:59:49.900] <TB2> INFO: Test took 925ms.
[15:59:49.902] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:59:51.016] <TB2> INFO: Test took 1114ms.
[15:59:51.018] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:59:52.146] <TB2> INFO: Test took 1128ms.
[15:59:52.148] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:59:53.247] <TB2> INFO: Test took 1099ms.
[15:59:53.249] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:59:54.378] <TB2> INFO: Test took 1129ms.
[15:59:54.380] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:59:55.495] <TB2> INFO: Test took 1115ms.
[15:59:55.497] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:59:56.626] <TB2> INFO: Test took 1129ms.
[15:59:56.628] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:59:57.728] <TB2> INFO: Test took 1100ms.
[15:59:57.729] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:59:58.843] <TB2> INFO: Test took 1114ms.
[15:59:58.845] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:59:59.945] <TB2> INFO: Test took 1100ms.
[15:59:59.946] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:01.074] <TB2> INFO: Test took 1128ms.
[16:00:01.076] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:02.191] <TB2> INFO: Test took 1115ms.
[16:00:02.193] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:03.294] <TB2> INFO: Test took 1101ms.
[16:00:03.296] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:04.426] <TB2> INFO: Test took 1130ms.
[16:00:04.428] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:05.528] <TB2> INFO: Test took 1100ms.
[16:00:05.530] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:06.646] <TB2> INFO: Test took 1116ms.
[16:00:06.647] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:07.763] <TB2> INFO: Test took 1116ms.
[16:00:07.765] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:08.880] <TB2> INFO: Test took 1116ms.
[16:00:08.882] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:10.026] <TB2> INFO: Test took 1144ms.
[16:00:10.028] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:11.143] <TB2> INFO: Test took 1115ms.
[16:00:11.145] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:12.260] <TB2> INFO: Test took 1115ms.
[16:00:12.262] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:13.377] <TB2> INFO: Test took 1115ms.
[16:00:13.379] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:14.494] <TB2> INFO: Test took 1115ms.
[16:00:14.496] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:15.612] <TB2> INFO: Test took 1116ms.
[16:00:15.614] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:16.743] <TB2> INFO: Test took 1129ms.
[16:00:16.745] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:17.875] <TB2> INFO: Test took 1130ms.
[16:00:17.877] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:19.007] <TB2> INFO: Test took 1130ms.
[16:00:19.009] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:20.110] <TB2> INFO: Test took 1101ms.
[16:00:20.112] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:21.226] <TB2> INFO: Test took 1115ms.
[16:00:21.228] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:22.357] <TB2> INFO: Test took 1129ms.
[16:00:22.359] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:23.474] <TB2> INFO: Test took 1115ms.
[16:00:23.476] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:00:24.577] <TB2> INFO: Test took 1101ms.
[16:00:25.079] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 570 seconds
[16:00:25.079] <TB2> INFO: PH scale (per ROC): 80 78 68 68 74 69 75 67 76 81 75 69 69 80 78 73
[16:00:25.079] <TB2> INFO: PH offset (per ROC): 184 161 171 179 167 174 203 170 170 159 167 173 173 161 178 170
[16:00:25.244] <TB2> INFO: ######################################################################
[16:00:25.244] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[16:00:25.244] <TB2> INFO: ######################################################################
[16:00:25.254] <TB2> INFO: scanning low vcal = 50
[16:00:29.687] <TB2> INFO: Test took 4433ms.
[16:00:29.739] <TB2> INFO: scanning low vcal = 100
[16:00:34.098] <TB2> INFO: Test took 4359ms.
[16:00:34.150] <TB2> INFO: scanning low vcal = 150
[16:00:38.566] <TB2> INFO: Test took 4416ms.
[16:00:38.619] <TB2> INFO: scanning low vcal = 200
[16:00:43.093] <TB2> INFO: Test took 4474ms.
[16:00:43.147] <TB2> INFO: scanning low vcal = 250
[16:00:47.505] <TB2> INFO: Test took 4358ms.
[16:00:47.560] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[16:00:52.047] <TB2> INFO: Test took 4487ms.
[16:00:52.100] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[16:00:56.515] <TB2> INFO: Test took 4415ms.
[16:00:56.570] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[16:01:01.112] <TB2> INFO: Test took 4542ms.
[16:01:01.165] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[16:01:05.583] <TB2> INFO: Test took 4418ms.
[16:01:05.637] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[16:01:10.123] <TB2> INFO: Test took 4486ms.
[16:01:10.407] <TB2> INFO: PixTestGainPedestal::measure() done
[16:01:33.120] <TB2> INFO: PixTestGainPedestal::fit() done
[16:01:33.120] <TB2> INFO: non-linearity mean: 0.961 0.956 0.955 0.961 0.957 0.957 0.960 0.963 0.959 0.960 0.954 0.961 0.962 0.953 0.955 0.953
[16:01:33.120] <TB2> INFO: non-linearity RMS: 0.007 0.007 0.006 0.008 0.005 0.006 0.006 0.005 0.007 0.005 0.006 0.007 0.006 0.006 0.008 0.007
[16:01:33.120] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[16:01:33.139] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[16:01:33.157] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[16:01:33.175] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[16:01:33.194] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[16:01:33.212] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[16:01:33.231] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[16:01:33.249] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[16:01:33.267] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[16:01:33.286] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[16:01:33.304] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[16:01:33.322] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[16:01:33.341] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[16:01:33.359] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[16:01:33.377] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[16:01:33.396] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[16:01:33.414] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 68 seconds
[16:01:33.420] <TB2> INFO: enter test to run
[16:01:33.420] <TB2> INFO: test: exit no parameter change
[16:01:33.906] <TB2> QUIET: Connection to board 156 closed.
[16:01:33.985] <TB2> INFO: pXar: this is the end, my friend