[12:55:59.373] <TB2> INFO: *** Welcome to pxar ***
[12:55:59.373] <TB2> INFO: *** Today: 2015/07/09
[12:55:59.373] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C15.dat
[12:55:59.375] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:55:59.375] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//defaultMaskFile.dat
[12:55:59.375] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters_C15.dat
[12:55:59.462] <TB2> INFO: clk: 4
[12:55:59.463] <TB2> INFO: ctr: 4
[12:55:59.463] <TB2> INFO: sda: 19
[12:55:59.463] <TB2> INFO: tin: 9
[12:55:59.463] <TB2> INFO: level: 15
[12:55:59.463] <TB2> INFO: triggerdelay: 0
[12:55:59.463] <TB2> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[12:55:59.463] <TB2> INFO: Log level: INFO
[12:55:59.470] <TB2> INFO: Found DTB DTB_WXC55Z
[12:55:59.484] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[12:55:59.487] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[12:55:59.490] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[12:56:01.041] <TB2> INFO: DUT info:
[12:56:01.041] <TB2> INFO: The DUT currently contains the following objects:
[12:56:01.041] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:56:01.041] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:56:01.041] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:56:01.041] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:56:01.041] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:01.041] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:01.041] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:01.041] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:01.041] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:01.041] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:01.041] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:01.041] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:01.041] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:01.041] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:01.041] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:01.041] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:01.041] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:01.042] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:01.042] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:01.042] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:01.443] <TB2> INFO: enter 'restricted' command line mode
[12:56:01.443] <TB2> INFO: enter test to run
[12:56:01.443] <TB2> INFO: test: pretest no parameter change
[12:56:01.443] <TB2> INFO: running: pretest
[12:56:01.449] <TB2> INFO: ######################################################################
[12:56:01.449] <TB2> INFO: PixTestPretest::doTest()
[12:56:01.449] <TB2> INFO: ######################################################################
[12:56:01.451] <TB2> INFO: ----------------------------------------------------------------------
[12:56:01.451] <TB2> INFO: PixTestPretest::programROC()
[12:56:01.451] <TB2> INFO: ----------------------------------------------------------------------
[12:56:19.468] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:56:19.468] <TB2> INFO: IA differences per ROC: 17.7 18.5 18.5 20.1 17.7 19.3 16.1 17.7 16.9 18.5 20.9 20.1 18.5 20.9 16.9 18.5
[12:56:19.541] <TB2> INFO: ----------------------------------------------------------------------
[12:56:19.541] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:56:19.541] <TB2> INFO: ----------------------------------------------------------------------
[12:56:39.093] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 410 mA = 25.625 mA/ROC
[12:56:39.096] <TB2> INFO: ----------------------------------------------------------------------
[12:56:39.096] <TB2> INFO: PixTestPretest::findWorkingPixel()
[12:56:39.096] <TB2> INFO: ----------------------------------------------------------------------
[12:56:48.480] <TB2> INFO: Test took 9378ms.
[12:56:48.780] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:56:48.817] <TB2> INFO: ----------------------------------------------------------------------
[12:56:48.817] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[12:56:48.817] <TB2> INFO: ----------------------------------------------------------------------
[12:56:58.149] <TB2> INFO: Test took 9327ms.
[12:56:58.463] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[12:56:58.463] <TB2> INFO: CalDel: 129 132 129 148 151 123 146 143 137 124 132 124 120 118 118 133
[12:56:58.463] <TB2> INFO: VthrComp: 51 51 52 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:56:58.467] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C0.dat
[12:56:58.467] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C1.dat
[12:56:58.467] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C2.dat
[12:56:58.467] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C3.dat
[12:56:58.467] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C4.dat
[12:56:58.468] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C5.dat
[12:56:58.468] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C6.dat
[12:56:58.468] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C7.dat
[12:56:58.468] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C8.dat
[12:56:58.469] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C9.dat
[12:56:58.469] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C10.dat
[12:56:58.469] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C11.dat
[12:56:58.469] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C12.dat
[12:56:58.470] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C13.dat
[12:56:58.470] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C14.dat
[12:56:58.470] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C15.dat
[12:56:58.470] <TB2> INFO: PixTestPretest::doTest() done, duration: 57 seconds
[12:56:58.555] <TB2> INFO: enter test to run
[12:56:58.555] <TB2> INFO: test: fulltest no parameter change
[12:56:58.555] <TB2> INFO: running: fulltest
[12:56:58.555] <TB2> INFO: ######################################################################
[12:56:58.555] <TB2> INFO: PixTestFullTest::doTest()
[12:56:58.555] <TB2> INFO: ######################################################################
[12:56:58.557] <TB2> INFO: ######################################################################
[12:56:58.557] <TB2> INFO: PixTestAlive::doTest()
[12:56:58.557] <TB2> INFO: ######################################################################
[12:56:58.558] <TB2> INFO: ----------------------------------------------------------------------
[12:56:58.558] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:56:58.558] <TB2> INFO: ----------------------------------------------------------------------
[12:57:02.272] <TB2> INFO: Test took 3713ms.
[12:57:02.294] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:02.522] <TB2> INFO: PixTestAlive::aliveTest() done
[12:57:02.522] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:57:02.524] <TB2> INFO: ----------------------------------------------------------------------
[12:57:02.524] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:57:02.524] <TB2> INFO: ----------------------------------------------------------------------
[12:57:05.451] <TB2> INFO: Test took 2926ms.
[12:57:05.455] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:05.455] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:57:05.684] <TB2> INFO: PixTestAlive::maskTest() done
[12:57:05.684] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:57:05.686] <TB2> INFO: ----------------------------------------------------------------------
[12:57:05.686] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:57:05.686] <TB2> INFO: ----------------------------------------------------------------------
[12:57:09.406] <TB2> INFO: Test took 3718ms.
[12:57:09.434] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:09.656] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[12:57:09.656] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:57:09.656] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[12:57:09.664] <TB2> INFO: ######################################################################
[12:57:09.664] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:57:09.664] <TB2> INFO: ######################################################################
[12:57:09.666] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[12:57:09.678] <TB2> INFO: dacScan step from 0 .. 29
[12:57:33.429] <TB2> INFO: Test took 23751ms.
[12:57:33.464] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:33.466] <TB2> INFO: dacScan step from 30 .. 59
[12:57:57.661] <TB2> INFO: Test took 24195ms.
[12:57:57.721] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:57.727] <TB2> INFO: dacScan step from 60 .. 89
[12:58:30.106] <TB2> INFO: Test took 32378ms.
[12:58:30.340] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:30.400] <TB2> INFO: dacScan step from 90 .. 119
[12:59:01.937] <TB2> INFO: Test took 31537ms.
[12:59:02.178] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:02.254] <TB2> INFO: dacScan step from 120 .. 149
[12:59:32.398] <TB2> INFO: Test took 30144ms.
[12:59:32.654] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:59.710] <TB2> INFO: PixTestBBMap::doTest() done, duration: 170 seconds
[12:59:59.710] <TB2> INFO: number of dead bumps (per ROC): 6 0 0 0 0 0 0 0 3 0 0 1 0 0 0 17
[12:59:59.710] <TB2> INFO: separation cut (per ROC): 102 106 106 101 85 100 81 101 90 97 103 109 106 111 111 103
[12:59:59.807] <TB2> INFO: ######################################################################
[12:59:59.807] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[12:59:59.807] <TB2> INFO: ######################################################################
[12:59:59.807] <TB2> INFO: ----------------------------------------------------------------------
[12:59:59.807] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[12:59:59.807] <TB2> INFO: ----------------------------------------------------------------------
[12:59:59.808] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[12:59:59.817] <TB2> INFO: dacScan step from 0 .. 3
[13:00:21.821] <TB2> INFO: Test took 22004ms.
[13:00:21.851] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:21.852] <TB2> INFO: dacScan step from 4 .. 7
[13:00:43.843] <TB2> INFO: Test took 21992ms.
[13:00:43.876] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:43.876] <TB2> INFO: dacScan step from 8 .. 11
[13:01:06.050] <TB2> INFO: Test took 22174ms.
[13:01:06.081] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:06.081] <TB2> INFO: dacScan step from 12 .. 15
[13:01:28.509] <TB2> INFO: Test took 22428ms.
[13:01:28.534] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:28.535] <TB2> INFO: dacScan step from 16 .. 19
[13:01:50.252] <TB2> INFO: Test took 21717ms.
[13:01:50.278] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:50.278] <TB2> INFO: dacScan step from 20 .. 23
[13:02:12.145] <TB2> INFO: Test took 21867ms.
[13:02:12.172] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:12.172] <TB2> INFO: dacScan step from 24 .. 27
[13:02:34.130] <TB2> INFO: Test took 21958ms.
[13:02:34.157] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:34.157] <TB2> INFO: dacScan step from 28 .. 31
[13:02:56.319] <TB2> INFO: Test took 22162ms.
[13:02:56.344] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:56.344] <TB2> INFO: dacScan step from 32 .. 35
[13:03:18.223] <TB2> INFO: Test took 21879ms.
[13:03:18.252] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:18.252] <TB2> INFO: dacScan step from 36 .. 39
[13:03:40.282] <TB2> INFO: Test took 22030ms.
[13:03:40.312] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:40.312] <TB2> INFO: dacScan step from 40 .. 43
[13:04:02.200] <TB2> INFO: Test took 21888ms.
[13:04:02.227] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:02.227] <TB2> INFO: dacScan step from 44 .. 47
[13:04:24.330] <TB2> INFO: Test took 22103ms.
[13:04:24.357] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:24.357] <TB2> INFO: dacScan step from 48 .. 51
[13:04:46.755] <TB2> INFO: Test took 22398ms.
[13:04:46.784] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:46.784] <TB2> INFO: dacScan step from 52 .. 55
[13:05:07.981] <TB2> INFO: Test took 21196ms.
[13:05:08.007] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:08.007] <TB2> INFO: dacScan step from 56 .. 59
[13:05:29.903] <TB2> INFO: Test took 21895ms.
[13:05:29.931] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:29.931] <TB2> INFO: dacScan step from 60 .. 63
[13:05:51.888] <TB2> INFO: Test took 21957ms.
[13:05:51.920] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:51.920] <TB2> INFO: dacScan step from 64 .. 67
[13:06:13.690] <TB2> INFO: Test took 21770ms.
[13:06:13.716] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:13.716] <TB2> INFO: dacScan step from 68 .. 71
[13:06:35.408] <TB2> INFO: Test took 21692ms.
[13:06:35.439] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:35.439] <TB2> INFO: dacScan step from 72 .. 75
[13:06:57.750] <TB2> INFO: Test took 22311ms.
[13:06:57.777] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:57.777] <TB2> INFO: dacScan step from 76 .. 79
[13:07:19.689] <TB2> INFO: Test took 21912ms.
[13:07:19.726] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:19.727] <TB2> INFO: dacScan step from 80 .. 83
[13:07:43.090] <TB2> INFO: Test took 23363ms.
[13:07:43.153] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:43.155] <TB2> INFO: dacScan step from 84 .. 87
[13:08:07.248] <TB2> INFO: Test took 24093ms.
[13:08:07.328] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:07.332] <TB2> INFO: dacScan step from 88 .. 91
[13:08:33.165] <TB2> INFO: Test took 25833ms.
[13:08:33.276] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:33.281] <TB2> INFO: dacScan step from 92 .. 95
[13:09:02.204] <TB2> INFO: Test took 28923ms.
[13:09:02.353] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:02.363] <TB2> INFO: dacScan step from 96 .. 99
[13:09:33.474] <TB2> INFO: Test took 31111ms.
[13:09:33.678] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:33.687] <TB2> INFO: dacScan step from 100 .. 103






[13:10:06.761] <TB2> INFO: Test took 33074ms.
[13:10:06.974] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:06.984] <TB2> INFO: dacScan step from 104 .. 107






[13:10:40.744] <TB2> INFO: Test took 33760ms.
[13:10:41.082] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:41.094] <TB2> INFO: dacScan step from 108 .. 111






[13:11:14.911] <TB2> INFO: Test took 33816ms.
[13:11:15.157] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:15.168] <TB2> INFO: dacScan step from 112 .. 115



[13:11:49.691] <TB2> INFO: Test took 34523ms.
[13:11:49.938] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:49.951] <TB2> INFO: dacScan step from 116 .. 119




[13:12:24.954] <TB2> INFO: Test took 35003ms.
[13:12:25.217] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:25.229] <TB2> INFO: dacScan step from 120 .. 123






[13:13:00.082] <TB2> INFO: Test took 34853ms.
[13:13:00.307] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:00.319] <TB2> INFO: dacScan step from 124 .. 127



[13:13:34.218] <TB2> INFO: Test took 33898ms.
[13:13:34.453] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:34.464] <TB2> INFO: dacScan step from 128 .. 131



[13:14:07.554] <TB2> INFO: Test took 33090ms.
[13:14:07.779] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:07.791] <TB2> INFO: dacScan step from 132 .. 135
[13:14:40.396] <TB2> INFO: Test took 32605ms.
[13:14:40.778] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:40.793] <TB2> INFO: dacScan step from 136 .. 139
[13:15:14.519] <TB2> INFO: Test took 33726ms.
[13:15:14.758] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:14.770] <TB2> INFO: dacScan step from 140 .. 143
[13:15:49.844] <TB2> INFO: Test took 35074ms.
[13:15:50.141] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:50.155] <TB2> INFO: dacScan step from 144 .. 147
[13:16:24.880] <TB2> INFO: Test took 34725ms.
[13:16:25.130] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:25.142] <TB2> INFO: dacScan step from 148 .. 149
[13:16:42.541] <TB2> INFO: Test took 17399ms.
[13:16:42.661] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:42.669] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:16:44.194] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:16:45.736] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:16:47.447] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:16:48.923] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:16:50.414] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:16:51.838] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:16:53.274] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:16:54.746] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:16:56.217] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:16:57.861] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:16:59.672] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:17:01.185] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:17:02.622] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:17:04.017] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:17:05.513] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:17:07.091] <TB2> INFO: PixTestScurves::scurves() done
[13:17:07.091] <TB2> INFO: Vcal mean: 97.25 94.78 101.45 104.82 91.37 99.69 91.45 106.02 92.58 86.70 98.76 103.83 98.89 91.92 96.02 83.55
[13:17:07.091] <TB2> INFO: Vcal RMS: 6.00 6.09 6.29 6.54 5.46 5.46 5.78 5.30 6.06 5.25 5.98 5.53 5.27 4.91 5.58 5.14
[13:17:07.091] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1027 seconds
[13:17:07.162] <TB2> INFO: ######################################################################
[13:17:07.162] <TB2> INFO: PixTestTrim::doTest()
[13:17:07.162] <TB2> INFO: ######################################################################
[13:17:07.164] <TB2> INFO: ----------------------------------------------------------------------
[13:17:07.164] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:17:07.164] <TB2> INFO: ----------------------------------------------------------------------
[13:17:07.246] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:17:07.246] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:17:07.254] <TB2> INFO: dacScan step from 0 .. 19
[13:17:23.185] <TB2> INFO: Test took 15931ms.
[13:17:23.205] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:23.205] <TB2> INFO: dacScan step from 20 .. 39
[13:17:39.562] <TB2> INFO: Test took 16357ms.
[13:17:39.587] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:39.587] <TB2> INFO: dacScan step from 40 .. 59
[13:17:56.207] <TB2> INFO: Test took 16620ms.
[13:17:56.228] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:56.228] <TB2> INFO: dacScan step from 60 .. 79
[13:18:12.930] <TB2> INFO: Test took 16702ms.
[13:18:12.957] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:12.957] <TB2> INFO: dacScan step from 80 .. 99
[13:18:29.840] <TB2> INFO: Test took 16883ms.
[13:18:29.873] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:29.874] <TB2> INFO: dacScan step from 100 .. 119
[13:18:48.946] <TB2> INFO: Test took 19072ms.
[13:18:49.067] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:49.086] <TB2> INFO: dacScan step from 120 .. 139
[13:19:11.287] <TB2> INFO: Test took 22201ms.
[13:19:11.468] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:11.506] <TB2> INFO: dacScan step from 140 .. 159
[13:19:30.943] <TB2> INFO: Test took 19437ms.
[13:19:31.092] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:54.537] <TB2> INFO: ROC 0 VthrComp = 98
[13:19:54.537] <TB2> INFO: ROC 1 VthrComp = 100
[13:19:54.537] <TB2> INFO: ROC 2 VthrComp = 102
[13:19:54.537] <TB2> INFO: ROC 3 VthrComp = 104
[13:19:54.538] <TB2> INFO: ROC 4 VthrComp = 96
[13:19:54.538] <TB2> INFO: ROC 5 VthrComp = 105
[13:19:54.538] <TB2> INFO: ROC 6 VthrComp = 89
[13:19:54.538] <TB2> INFO: ROC 7 VthrComp = 109
[13:19:54.538] <TB2> INFO: ROC 8 VthrComp = 94
[13:19:54.538] <TB2> INFO: ROC 9 VthrComp = 95
[13:19:54.538] <TB2> INFO: ROC 10 VthrComp = 102
[13:19:54.538] <TB2> INFO: ROC 11 VthrComp = 108
[13:19:54.538] <TB2> INFO: ROC 12 VthrComp = 105
[13:19:54.538] <TB2> INFO: ROC 13 VthrComp = 106
[13:19:54.538] <TB2> INFO: ROC 14 VthrComp = 102
[13:19:54.539] <TB2> INFO: ROC 15 VthrComp = 92
[13:19:54.539] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:19:54.539] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:19:54.547] <TB2> INFO: dacScan step from 0 .. 19
[13:20:10.587] <TB2> INFO: Test took 16040ms.
[13:20:10.607] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:10.607] <TB2> INFO: dacScan step from 20 .. 39
[13:20:26.597] <TB2> INFO: Test took 15990ms.
[13:20:26.624] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:26.626] <TB2> INFO: dacScan step from 40 .. 59
[13:20:47.897] <TB2> INFO: Test took 21271ms.
[13:20:48.062] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:48.096] <TB2> INFO: dacScan step from 60 .. 79
[13:21:11.536] <TB2> INFO: Test took 23440ms.
[13:21:11.719] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:11.777] <TB2> INFO: dacScan step from 80 .. 99
[13:21:35.024] <TB2> INFO: Test took 23247ms.
[13:21:35.198] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:35.250] <TB2> INFO: dacScan step from 100 .. 119
[13:21:58.488] <TB2> INFO: Test took 23238ms.
[13:21:58.649] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:58.700] <TB2> INFO: dacScan step from 120 .. 139
[13:22:21.658] <TB2> INFO: Test took 22958ms.
[13:22:21.843] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:21.897] <TB2> INFO: dacScan step from 140 .. 159
[13:22:44.983] <TB2> INFO: Test took 23086ms.
[13:22:45.158] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:11.957] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 62.6971 for pixel 0/38 mean/min/max = 47.2082/31.4586/62.9578
[13:23:11.957] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 61.7315 for pixel 19/77 mean/min/max = 46.5651/31.2588/61.8714
[13:23:11.957] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 63.2546 for pixel 45/79 mean/min/max = 47.7674/31.9993/63.5355
[13:23:11.957] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 66.366 for pixel 5/0 mean/min/max = 49.5043/32.5953/66.4134
[13:23:11.958] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 59.8147 for pixel 29/3 mean/min/max = 45.7012/31.3622/60.0402
[13:23:11.958] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 60.8688 for pixel 18/79 mean/min/max = 47.4644/33.9037/61.0251
[13:23:11.958] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 62.7599 for pixel 0/1 mean/min/max = 47.7955/32.6659/62.9251
[13:23:11.958] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 61.9288 for pixel 20/4 mean/min/max = 48.1918/34.4064/61.9772
[13:23:11.959] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 61.7507 for pixel 15/79 mean/min/max = 47.071/32.1876/61.9545
[13:23:11.959] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 57.2491 for pixel 19/57 mean/min/max = 44.5554/31.8397/57.271
[13:23:11.959] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 61.4505 for pixel 9/79 mean/min/max = 46.6646/31.7648/61.5643
[13:23:11.959] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 62.0675 for pixel 3/79 mean/min/max = 48.0599/34.0035/62.1163
[13:23:11.960] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 59.3939 for pixel 4/2 mean/min/max = 46.4546/33.4873/59.4219
[13:23:11.960] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 56.5252 for pixel 18/79 mean/min/max = 45.2599/33.9711/56.5486
[13:23:11.960] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 59.1284 for pixel 0/68 mean/min/max = 45.516/31.8598/59.1722
[13:23:11.960] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 58.9598 for pixel 51/79 mean/min/max = 45.5555/32.1378/58.9733
[13:23:11.961] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:25:04.350] <TB2> INFO: Test took 112389ms.
[13:25:05.968] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:25:05.977] <TB2> INFO: dacScan step from 0 .. 19
[13:25:31.678] <TB2> INFO: Test took 25701ms.
[13:25:31.721] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:31.722] <TB2> INFO: dacScan step from 20 .. 39
[13:26:04.436] <TB2> INFO: Test took 32714ms.
[13:26:04.719] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:04.754] <TB2> INFO: dacScan step from 40 .. 59
[13:26:43.165] <TB2> INFO: Test took 38411ms.
[13:26:43.443] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:43.500] <TB2> INFO: dacScan step from 60 .. 79



[13:27:18.246] <TB2> INFO: Test took 34746ms.
[13:27:18.511] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:18.562] <TB2> INFO: dacScan step from 80 .. 99


[13:27:54.993] <TB2> INFO: Test took 36431ms.
[13:27:55.291] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:55.346] <TB2> INFO: dacScan step from 100 .. 119



[13:28:34.152] <TB2> INFO: Test took 38806ms.
[13:28:34.433] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:34.486] <TB2> INFO: dacScan step from 120 .. 139


[13:29:11.036] <TB2> INFO: Test took 36550ms.
[13:29:11.322] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:11.376] <TB2> INFO: dacScan step from 140 .. 159



[13:29:48.703] <TB2> INFO: Test took 37327ms.
[13:29:48.982] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:49.035] <TB2> INFO: dacScan step from 160 .. 179



[13:30:27.269] <TB2> INFO: Test took 38234ms.
[13:30:27.717] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:27.799] <TB2> INFO: dacScan step from 180 .. 199



[13:31:06.568] <TB2> INFO: Test took 38769ms.
[13:31:06.842] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:34.175] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.170240 .. 255.000000
[13:31:34.267] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[13:31:34.277] <TB2> INFO: dacScan step from 0 .. 19
[13:31:48.453] <TB2> INFO: Test took 14176ms.
[13:31:48.479] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:48.479] <TB2> INFO: dacScan step from 20 .. 39
[13:32:04.691] <TB2> INFO: Test took 16212ms.
[13:32:04.777] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:04.794] <TB2> INFO: dacScan step from 40 .. 59
[13:32:24.352] <TB2> INFO: Test took 19558ms.
[13:32:24.495] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:24.553] <TB2> INFO: dacScan step from 60 .. 79
[13:32:43.915] <TB2> INFO: Test took 19361ms.
[13:32:44.062] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:44.118] <TB2> INFO: dacScan step from 80 .. 99
[13:33:04.273] <TB2> INFO: Test took 20155ms.
[13:33:04.427] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:04.486] <TB2> INFO: dacScan step from 100 .. 119
[13:33:23.473] <TB2> INFO: Test took 18987ms.
[13:33:23.626] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:23.688] <TB2> INFO: dacScan step from 120 .. 139
[13:33:42.315] <TB2> INFO: Test took 18627ms.
[13:33:42.450] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:42.502] <TB2> INFO: dacScan step from 140 .. 159
[13:34:02.842] <TB2> INFO: Test took 20340ms.
[13:34:02.989] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:03.043] <TB2> INFO: dacScan step from 160 .. 179
[13:34:21.862] <TB2> INFO: Test took 18818ms.
[13:34:22.002] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:22.057] <TB2> INFO: dacScan step from 180 .. 199
[13:34:41.866] <TB2> INFO: Test took 19809ms.
[13:34:42.007] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:42.061] <TB2> INFO: dacScan step from 200 .. 219
[13:35:02.086] <TB2> INFO: Test took 20025ms.
[13:35:02.239] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:02.296] <TB2> INFO: dacScan step from 220 .. 239
[13:35:22.129] <TB2> INFO: Test took 19833ms.
[13:35:22.286] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:22.337] <TB2> INFO: dacScan step from 240 .. 255
[13:35:37.747] <TB2> INFO: Test took 15410ms.
[13:35:37.860] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:09.001] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 16.852720 .. 46.648752
[13:36:09.087] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 6 .. 56 (20) hits flags = 16 (plus default)
[13:36:09.096] <TB2> INFO: dacScan step from 6 .. 25
[13:36:23.898] <TB2> INFO: Test took 14802ms.
[13:36:23.917] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:23.917] <TB2> INFO: dacScan step from 26 .. 45
[13:36:42.188] <TB2> INFO: Test took 18271ms.
[13:36:42.331] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:42.367] <TB2> INFO: dacScan step from 46 .. 56
[13:36:54.183] <TB2> INFO: Test took 11816ms.
[13:36:54.259] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:10.667] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 22.811908 .. 42.509612
[13:37:10.752] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 12 .. 52 (20) hits flags = 16 (plus default)
[13:37:10.760] <TB2> INFO: dacScan step from 12 .. 31
[13:37:25.503] <TB2> INFO: Test took 14743ms.
[13:37:25.529] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:25.530] <TB2> INFO: dacScan step from 32 .. 51
[13:37:44.735] <TB2> INFO: Test took 19205ms.
[13:37:44.898] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:44.948] <TB2> INFO: dacScan step from 52 .. 52
[13:37:48.667] <TB2> INFO: Test took 3719ms.
[13:37:48.682] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:05.079] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 5.487170 .. 42.352269
[13:38:05.169] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 5 .. 52 (20) hits flags = 16 (plus default)
[13:38:05.178] <TB2> INFO: dacScan step from 5 .. 24
[13:38:19.896] <TB2> INFO: Test took 14717ms.
[13:38:19.915] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:19.915] <TB2> INFO: dacScan step from 25 .. 44
[13:38:37.355] <TB2> INFO: Test took 17440ms.
[13:38:37.475] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:37.505] <TB2> INFO: dacScan step from 45 .. 52
[13:38:47.324] <TB2> INFO: Test took 9819ms.
[13:38:47.387] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:02.931] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:39:02.931] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[13:39:02.939] <TB2> INFO: dacScan step from 15 .. 34
[13:39:29.262] <TB2> INFO: Test took 26323ms.
[13:39:29.332] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:29.340] <TB2> INFO: dacScan step from 35 .. 54



[13:40:07.680] <TB2> INFO: Test took 38340ms.
[13:40:08.053] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:08.109] <TB2> INFO: dacScan step from 55 .. 55
[13:40:12.614] <TB2> INFO: Test took 4505ms.
[13:40:12.631] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:27.058] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:40:27.058] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:40:27.058] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:40:27.059] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:40:27.059] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:40:27.059] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:40:27.059] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:40:27.059] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:40:27.059] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:40:27.059] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:40:27.059] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:40:27.060] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:40:27.060] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:40:27.060] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:40:27.060] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:40:27.060] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:40:27.060] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:40:27.070] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:40:27.077] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:40:27.084] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:40:27.091] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:40:27.097] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:40:27.104] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:40:27.112] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:40:27.118] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:40:27.125] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:40:27.132] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:40:27.139] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:40:27.146] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:40:27.152] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:40:27.159] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:40:27.166] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:40:27.173] <TB2> INFO: PixTestTrim::trimTest() done
[13:40:27.173] <TB2> INFO: vtrim: 120 138 116 138 112 127 112 129 115 114 130 133 119 123 113 102
[13:40:27.173] <TB2> INFO: vthrcomp: 98 100 102 104 96 105 89 109 94 95 102 108 105 106 102 92
[13:40:27.173] <TB2> INFO: vcal mean: 35.01 35.04 35.08 35.07 35.06 35.05 35.04 35.08 35.07 34.96 35.05 35.09 35.05 35.06 35.06 35.03
[13:40:27.173] <TB2> INFO: vcal RMS: 1.00 1.00 1.09 1.17 1.01 0.97 1.04 1.02 1.14 1.00 0.98 1.00 1.00 0.90 1.01 0.97
[13:40:27.173] <TB2> INFO: bits mean: 9.32 9.75 9.25 9.11 9.72 8.79 9.25 9.11 9.44 10.25 9.35 9.09 9.42 9.51 9.86 9.11
[13:40:27.173] <TB2> INFO: bits RMS: 2.74 2.59 2.65 2.49 2.63 2.59 2.55 2.34 2.60 2.44 2.67 2.42 2.45 2.45 2.54 2.90
[13:40:27.178] <TB2> INFO: ----------------------------------------------------------------------
[13:40:27.178] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 240 150 100
[13:40:27.178] <TB2> INFO: ----------------------------------------------------------------------
[13:40:27.180] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:40:27.190] <TB2> INFO: dacScan step from 0 .. 19
[13:40:51.595] <TB2> INFO: Test took 24405ms.
[13:40:51.629] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:51.629] <TB2> INFO: dacScan step from 20 .. 39
[13:41:16.462] <TB2> INFO: Test took 24833ms.
[13:41:16.518] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:16.521] <TB2> INFO: dacScan step from 40 .. 59
[13:41:51.513] <TB2> INFO: Test took 34992ms.
[13:41:51.757] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:51.793] <TB2> INFO: dacScan step from 60 .. 79






[13:42:30.638] <TB2> INFO: Test took 38845ms.
[13:42:30.971] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:31.028] <TB2> INFO: dacScan step from 80 .. 99
[13:43:08.227] <TB2> INFO: Test took 37199ms.
[13:43:08.556] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:08.620] <TB2> INFO: dacScan step from 100 .. 119
[13:43:46.241] <TB2> INFO: Test took 37621ms.
[13:43:46.529] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:46.581] <TB2> INFO: dacScan step from 120 .. 139
[13:44:24.948] <TB2> INFO: Test took 38367ms.
[13:44:25.220] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:25.272] <TB2> INFO: dacScan step from 140 .. 159
[13:45:02.022] <TB2> INFO: Test took 36750ms.
[13:45:02.303] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:02.357] <TB2> INFO: dacScan step from 160 .. 179
[13:45:38.936] <TB2> INFO: Test took 36579ms.
[13:45:39.256] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:39.297] <TB2> INFO: dacScan step from 180 .. 199
[13:46:18.844] <TB2> INFO: Test took 39547ms.
[13:46:19.107] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:45.487] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 86 (20) hits flags = 16 (plus default)
[13:46:45.496] <TB2> INFO: dacScan step from 0 .. 19
[13:47:09.680] <TB2> INFO: Test took 24184ms.
[13:47:09.712] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:09.712] <TB2> INFO: dacScan step from 20 .. 39
[13:47:34.521] <TB2> INFO: Test took 24809ms.
[13:47:34.608] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:34.618] <TB2> INFO: dacScan step from 40 .. 59
[13:48:11.713] <TB2> INFO: Test took 37095ms.
[13:48:12.066] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:12.115] <TB2> INFO: dacScan step from 60 .. 79



[13:48:49.918] <TB2> INFO: Test took 37803ms.
[13:48:50.214] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:50.263] <TB2> INFO: dacScan step from 80 .. 86
[13:49:04.687] <TB2> INFO: Test took 14424ms.
[13:49:04.788] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:21.683] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 80 (20) hits flags = 16 (plus default)
[13:49:21.692] <TB2> INFO: dacScan step from 0 .. 19
[13:49:46.648] <TB2> INFO: Test took 24956ms.
[13:49:46.682] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:46.682] <TB2> INFO: dacScan step from 20 .. 39
[13:50:15.013] <TB2> INFO: Test took 28330ms.
[13:50:15.125] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:15.138] <TB2> INFO: dacScan step from 40 .. 59



[13:50:53.198] <TB2> INFO: Test took 38060ms.
[13:50:53.479] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:53.526] <TB2> INFO: dacScan step from 60 .. 79
[13:51:31.926] <TB2> INFO: Test took 38400ms.
[13:51:32.213] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:32.268] <TB2> INFO: dacScan step from 80 .. 80
[13:51:36.838] <TB2> INFO: Test took 4570ms.
[13:51:36.860] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:55.201] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 76 (20) hits flags = 16 (plus default)
[13:51:55.211] <TB2> INFO: dacScan step from 0 .. 19
[13:52:20.690] <TB2> INFO: Test took 25479ms.
[13:52:20.732] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:20.732] <TB2> INFO: dacScan step from 20 .. 39
[13:52:49.995] <TB2> INFO: Test took 29263ms.
[13:52:50.161] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:50.177] <TB2> INFO: dacScan step from 40 .. 59




[13:53:28.358] <TB2> INFO: Test took 38181ms.
[13:53:28.631] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:53:28.677] <TB2> INFO: dacScan step from 60 .. 76
[13:54:01.753] <TB2> INFO: Test took 33076ms.
[13:54:02.006] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:20.441] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 73 (20) hits flags = 16 (plus default)
[13:54:20.450] <TB2> INFO: dacScan step from 0 .. 19
[13:54:44.714] <TB2> INFO: Test took 24264ms.
[13:54:44.761] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:44.761] <TB2> INFO: dacScan step from 20 .. 39
[13:55:16.673] <TB2> INFO: Test took 31912ms.
[13:55:16.853] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:16.874] <TB2> INFO: dacScan step from 40 .. 59



[13:55:54.871] <TB2> INFO: Test took 37997ms.
[13:55:55.143] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:55.189] <TB2> INFO: dacScan step from 60 .. 73
[13:56:23.222] <TB2> INFO: Test took 28033ms.
[13:56:23.406] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:39.721] <TB2> INFO: PixTestTrim::trimBitTest() done
[13:56:39.722] <TB2> INFO: PixTestTrim::doTest() done, duration: 2372 seconds
[13:56:40.447] <TB2> INFO: ######################################################################
[13:56:40.447] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:56:40.447] <TB2> INFO: ######################################################################
[13:56:44.246] <TB2> INFO: Test took 3797ms.
[13:56:44.273] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:48.294] <TB2> INFO: Test took 3822ms.
[13:56:48.360] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:52.059] <TB2> INFO: Test took 3689ms.
[13:56:52.157] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:52.166] <TB2> INFO: The DUT currently contains the following objects:
[13:56:52.166] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:56:52.166] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:56:52.166] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:56:52.166] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:56:52.166] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:52.166] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:52.166] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:52.166] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:52.166] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:52.166] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:52.166] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:52.166] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:52.166] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:52.166] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:52.166] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:52.166] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:52.166] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:52.166] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:52.167] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:52.167] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:53.287] <TB2> INFO: Test took 1120ms.
[13:56:53.288] <TB2> INFO: The DUT currently contains the following objects:
[13:56:53.288] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:56:53.288] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:56:53.288] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:56:53.288] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:56:53.289] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:53.289] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:53.289] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:53.289] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:53.289] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:53.289] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:53.289] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:53.289] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:53.289] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:53.289] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:53.289] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:53.289] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:53.289] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:53.289] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:53.289] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:53.289] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:54.395] <TB2> INFO: Test took 1106ms.
[13:56:54.396] <TB2> INFO: The DUT currently contains the following objects:
[13:56:54.396] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:56:54.396] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:56:54.396] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:56:54.396] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:56:54.396] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:54.396] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:54.396] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:54.396] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:54.396] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:54.396] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:54.396] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:54.396] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:54.396] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:54.396] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:54.396] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:54.396] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:54.396] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:54.396] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:54.396] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:54.396] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:55.544] <TB2> INFO: Test took 1148ms.
[13:56:55.546] <TB2> INFO: The DUT currently contains the following objects:
[13:56:55.546] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:56:55.546] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:56:55.546] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:56:55.546] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:56:55.546] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:55.546] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:55.546] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:55.546] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:55.546] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:55.546] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:55.546] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:55.546] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:55.547] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:55.547] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:55.547] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:55.547] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:55.547] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:55.547] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:55.547] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:55.549] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:56.653] <TB2> INFO: Test took 1104ms.
[13:56:56.654] <TB2> INFO: The DUT currently contains the following objects:
[13:56:56.654] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:56:56.654] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:56:56.654] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:56:56.654] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:56:56.654] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:56.654] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:56.654] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:56.654] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:56.654] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:56.654] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:56.654] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:56.654] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:56.654] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:56.654] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:56.654] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:56.654] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:56.654] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:56.654] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:56.654] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:56.654] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:57.777] <TB2> INFO: Test took 1123ms.
[13:56:57.778] <TB2> INFO: The DUT currently contains the following objects:
[13:56:57.778] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:56:57.778] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:56:57.778] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:56:57.778] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:56:57.778] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:57.778] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:57.779] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:57.779] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:57.779] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:57.779] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:57.779] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:57.779] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:57.779] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:57.779] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:57.779] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:57.779] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:57.779] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:57.779] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:57.779] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:57.779] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:58.886] <TB2> INFO: Test took 1107ms.
[13:56:58.887] <TB2> INFO: The DUT currently contains the following objects:
[13:56:58.887] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:56:58.887] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:56:58.887] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:56:58.887] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:56:58.887] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:58.887] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:58.887] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:58.887] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:58.887] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:58.887] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:58.887] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:58.887] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:58.887] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:58.887] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:58.887] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:58.887] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:58.887] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:58.887] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:58.887] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:58.887] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:59.996] <TB2> INFO: Test took 1108ms.
[13:56:59.997] <TB2> INFO: The DUT currently contains the following objects:
[13:56:59.997] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:56:59.997] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:56:59.997] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:56:59.997] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:56:59.997] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:59.997] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:59.997] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:59.997] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:59.997] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:59.997] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:59.997] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:59.998] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:59.998] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:59.998] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:59.998] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:59.998] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:59.998] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:59.998] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:59.998] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:56:59.998] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:01.128] <TB2> INFO: Test took 1130ms.
[13:57:01.128] <TB2> INFO: The DUT currently contains the following objects:
[13:57:01.128] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:57:01.128] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:57:01.128] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:57:01.128] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:57:01.128] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:01.128] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:01.128] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:01.128] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:01.128] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:01.128] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:01.128] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:01.129] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:01.129] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:01.129] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:01.129] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:01.129] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:01.129] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:01.129] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:01.129] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:01.129] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:02.245] <TB2> INFO: Test took 1116ms.
[13:57:02.246] <TB2> INFO: The DUT currently contains the following objects:
[13:57:02.246] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:57:02.246] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:57:02.246] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:57:02.246] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:57:02.246] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:02.246] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:02.246] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:02.246] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:02.246] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:02.246] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:02.246] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:02.246] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:02.246] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:02.246] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:02.246] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:02.246] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:02.246] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:02.246] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:02.246] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:02.246] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:03.367] <TB2> INFO: Test took 1121ms.
[13:57:03.368] <TB2> INFO: The DUT currently contains the following objects:
[13:57:03.368] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:57:03.368] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:57:03.368] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:57:03.368] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:57:03.368] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:03.368] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:03.368] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:03.368] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:03.368] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:03.369] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:03.369] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:03.369] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:03.369] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:03.369] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:03.369] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:03.369] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:03.369] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:03.369] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:03.369] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:03.369] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:04.475] <TB2> INFO: Test took 1106ms.
[13:57:04.476] <TB2> INFO: The DUT currently contains the following objects:
[13:57:04.477] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:57:04.477] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:57:04.477] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:57:04.477] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:57:04.477] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:04.477] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:04.477] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:04.477] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:04.477] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:04.477] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:04.477] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:04.477] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:04.477] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:04.477] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:04.477] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:04.477] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:04.477] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:04.477] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:04.477] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:04.477] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:05.586] <TB2> INFO: Test took 1109ms.
[13:57:05.588] <TB2> INFO: The DUT currently contains the following objects:
[13:57:05.588] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:57:05.588] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:57:05.588] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:57:05.588] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:57:05.588] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:05.588] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:05.588] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:05.588] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:05.588] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:05.588] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:05.588] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:05.588] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:05.588] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:05.588] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:05.588] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:05.588] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:05.588] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:05.588] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:05.588] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:05.589] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:06.709] <TB2> INFO: Test took 1120ms.
[13:57:06.710] <TB2> INFO: The DUT currently contains the following objects:
[13:57:06.710] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:57:06.710] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:57:06.710] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:57:06.710] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:57:06.710] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:06.710] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:06.710] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:06.710] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:06.710] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:06.710] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:06.710] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:06.710] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:06.710] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:06.710] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:06.710] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:06.710] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:06.710] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:06.710] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:06.710] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:06.710] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:07.836] <TB2> INFO: Test took 1126ms.
[13:57:07.837] <TB2> INFO: The DUT currently contains the following objects:
[13:57:07.837] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:57:07.837] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:57:07.837] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:57:07.837] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:57:07.837] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:07.837] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:07.838] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:07.838] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:07.838] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:07.838] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:07.838] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:07.838] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:07.838] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:07.838] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:07.838] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:07.838] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:07.838] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:07.838] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:07.838] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:07.838] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:08.946] <TB2> INFO: Test took 1108ms.
[13:57:08.947] <TB2> INFO: The DUT currently contains the following objects:
[13:57:08.947] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:57:08.947] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:57:08.947] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:57:08.947] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:57:08.947] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:08.947] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:08.947] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:08.947] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:08.948] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:08.948] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:08.948] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:08.948] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:08.948] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:08.948] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:08.948] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:08.948] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:08.948] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:08.948] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:08.948] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:08.948] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:57:10.078] <TB2> INFO: Test took 1130ms.
[13:57:10.081] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:01:22.194] <TB2> INFO: Test took 252113ms.
[14:01:23.576] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:29.612] <TB2> INFO: Test took 246036ms.
[14:05:31.126] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:05:31.132] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:05:31.139] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:05:31.145] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:05:31.152] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:05:31.158] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:05:31.165] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:05:31.171] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:05:31.178] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:05:31.184] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:05:31.190] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:05:31.197] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:05:31.203] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:05:31.210] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:05:31.216] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:05:31.222] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:05:31.257] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C0.dat
[14:05:31.258] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C1.dat
[14:05:31.258] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C2.dat
[14:05:31.258] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C3.dat
[14:05:31.258] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C4.dat
[14:05:31.258] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C5.dat
[14:05:31.258] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C6.dat
[14:05:31.258] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C7.dat
[14:05:31.259] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C8.dat
[14:05:31.259] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C9.dat
[14:05:31.259] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C10.dat
[14:05:31.259] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C11.dat
[14:05:31.259] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C12.dat
[14:05:31.259] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C13.dat
[14:05:31.259] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C14.dat
[14:05:31.259] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C15.dat
[14:05:34.803] <TB2> INFO: Test took 3541ms.
[14:05:38.604] <TB2> INFO: Test took 3537ms.
[14:05:42.465] <TB2> INFO: Test took 3598ms.
[14:05:42.731] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:43.659] <TB2> INFO: Test took 928ms.
[14:05:43.661] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:44.763] <TB2> INFO: Test took 1102ms.
[14:05:44.765] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:45.895] <TB2> INFO: Test took 1131ms.
[14:05:45.897] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:47.027] <TB2> INFO: Test took 1130ms.
[14:05:47.029] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:48.129] <TB2> INFO: Test took 1100ms.
[14:05:48.131] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:49.232] <TB2> INFO: Test took 1101ms.
[14:05:49.234] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:50.349] <TB2> INFO: Test took 1115ms.
[14:05:50.351] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:51.467] <TB2> INFO: Test took 1116ms.
[14:05:51.469] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:52.598] <TB2> INFO: Test took 1130ms.
[14:05:52.600] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:53.701] <TB2> INFO: Test took 1101ms.
[14:05:53.703] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:54.804] <TB2> INFO: Test took 1101ms.
[14:05:54.806] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:55.921] <TB2> INFO: Test took 1115ms.
[14:05:55.923] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:57.024] <TB2> INFO: Test took 1101ms.
[14:05:57.026] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:58.141] <TB2> INFO: Test took 1115ms.
[14:05:58.143] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:05:59.259] <TB2> INFO: Test took 1116ms.
[14:05:59.261] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:00.361] <TB2> INFO: Test took 1100ms.
[14:06:00.363] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:01.494] <TB2> INFO: Test took 1131ms.
[14:06:01.496] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:02.639] <TB2> INFO: Test took 1143ms.
[14:06:02.641] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:03.755] <TB2> INFO: Test took 1114ms.
[14:06:03.757] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:04.887] <TB2> INFO: Test took 1130ms.
[14:06:04.889] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:05.990] <TB2> INFO: Test took 1101ms.
[14:06:05.992] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:07.093] <TB2> INFO: Test took 1101ms.
[14:06:07.095] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:08.196] <TB2> INFO: Test took 1101ms.
[14:06:08.198] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:09.329] <TB2> INFO: Test took 1132ms.
[14:06:09.331] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:10.432] <TB2> INFO: Test took 1101ms.
[14:06:10.434] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:11.550] <TB2> INFO: Test took 1116ms.
[14:06:11.552] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:12.667] <TB2> INFO: Test took 1116ms.
[14:06:12.669] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:13.798] <TB2> INFO: Test took 1130ms.
[14:06:13.800] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:14.902] <TB2> INFO: Test took 1102ms.
[14:06:14.903] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:16.005] <TB2> INFO: Test took 1102ms.
[14:06:16.007] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:17.108] <TB2> INFO: Test took 1102ms.
[14:06:17.110] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:06:18.225] <TB2> INFO: Test took 1115ms.
[14:06:18.730] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 578 seconds
[14:06:18.730] <TB2> INFO: PH scale (per ROC): 86 81 81 75 84 79 83 73 85 94 84 79 79 97 87 83
[14:06:18.730] <TB2> INFO: PH offset (per ROC): 167 144 147 163 146 155 183 147 147 140 147 152 150 140 158 146
[14:06:18.894] <TB2> INFO: ######################################################################
[14:06:18.894] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:06:18.894] <TB2> INFO: ######################################################################
[14:06:18.903] <TB2> INFO: scanning low vcal = 50
[14:06:23.239] <TB2> INFO: Test took 4336ms.
[14:06:23.292] <TB2> INFO: scanning low vcal = 100
[14:06:27.826] <TB2> INFO: Test took 4534ms.
[14:06:27.878] <TB2> INFO: scanning low vcal = 150
[14:06:32.382] <TB2> INFO: Test took 4504ms.
[14:06:32.433] <TB2> INFO: scanning low vcal = 200
[14:06:36.873] <TB2> INFO: Test took 4439ms.
[14:06:36.926] <TB2> INFO: scanning low vcal = 250
[14:06:41.416] <TB2> INFO: Test took 4490ms.
[14:06:41.471] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[14:06:45.802] <TB2> INFO: Test took 4331ms.
[14:06:45.855] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[14:06:50.303] <TB2> INFO: Test took 4448ms.
[14:06:50.355] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[14:06:54.825] <TB2> INFO: Test took 4470ms.
[14:06:54.878] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[14:06:59.364] <TB2> INFO: Test took 4486ms.
[14:06:59.416] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:07:03.776] <TB2> INFO: Test took 4359ms.
[14:07:04.067] <TB2> INFO: PixTestGainPedestal::measure() done
[14:07:26.809] <TB2> INFO: PixTestGainPedestal::fit() done
[14:07:26.809] <TB2> INFO: non-linearity mean: 0.953 0.949 0.958 0.957 0.955 0.953 0.957 0.950 0.957 0.957 0.953 0.959 0.957 0.955 0.950 0.951
[14:07:26.809] <TB2> INFO: non-linearity RMS: 0.007 0.007 0.005 0.007 0.005 0.006 0.007 0.007 0.006 0.005 0.006 0.006 0.006 0.005 0.008 0.006
[14:07:26.809] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[14:07:26.826] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[14:07:26.844] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[14:07:26.862] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[14:07:26.880] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[14:07:26.897] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[14:07:26.915] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[14:07:26.933] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[14:07:26.950] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[14:07:26.968] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[14:07:26.985] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[14:07:27.003] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[14:07:27.021] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[14:07:27.039] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[14:07:27.057] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[14:07:27.075] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[14:07:27.092] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 68 seconds
[14:07:27.098] <TB2> INFO: enter test to run
[14:07:27.098] <TB2> INFO: test: exit no parameter change
[14:07:27.516] <TB2> QUIET: Connection to board 156 closed.
[14:07:27.595] <TB2> INFO: pXar: this is the end, my friend