[09:35:03.709] <TB2> INFO: *** Welcome to pxar ***
[09:35:03.709] <TB2> INFO: *** Today: 2015/07/09
[09:35:03.709] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C15.dat
[09:35:03.711] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//tbmParameters_C0b.dat
[09:35:03.711] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//defaultMaskFile.dat
[09:35:03.711] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters_C15.dat
[09:35:03.794] <TB2> INFO: clk: 4
[09:35:03.795] <TB2> INFO: ctr: 4
[09:35:03.795] <TB2> INFO: sda: 19
[09:35:03.795] <TB2> INFO: tin: 9
[09:35:03.795] <TB2> INFO: level: 15
[09:35:03.795] <TB2> INFO: triggerdelay: 0
[09:35:03.795] <TB2> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[09:35:03.795] <TB2> INFO: Log level: INFO
[09:35:03.802] <TB2> INFO: Found DTB DTB_WXC55Z
[09:35:03.816] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[09:35:03.819] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[09:35:03.822] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[09:35:05.377] <TB2> INFO: DUT info:
[09:35:05.377] <TB2> INFO: The DUT currently contains the following objects:
[09:35:05.377] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:35:05.377] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:35:05.377] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:35:05.377] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[09:35:05.377] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:05.377] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:05.377] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:05.377] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:05.377] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:05.377] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:05.377] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:05.377] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:05.377] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:05.377] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:05.377] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:05.377] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:05.377] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:05.377] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:05.378] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:05.378] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:35:05.779] <TB2> INFO: enter 'restricted' command line mode
[09:35:05.779] <TB2> INFO: enter test to run
[09:35:05.779] <TB2> INFO: test: pretest no parameter change
[09:35:05.779] <TB2> INFO: running: pretest
[09:35:05.788] <TB2> INFO: ######################################################################
[09:35:05.788] <TB2> INFO: PixTestPretest::doTest()
[09:35:05.788] <TB2> INFO: ######################################################################
[09:35:05.790] <TB2> INFO: ----------------------------------------------------------------------
[09:35:05.790] <TB2> INFO: PixTestPretest::programROC()
[09:35:05.790] <TB2> INFO: ----------------------------------------------------------------------
[09:35:23.807] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:35:23.807] <TB2> INFO: IA differences per ROC: 17.7 18.5 18.5 20.9 18.5 19.3 16.9 17.7 16.9 18.5 20.9 19.3 18.5 20.9 16.9 18.5
[09:35:23.874] <TB2> INFO: ----------------------------------------------------------------------
[09:35:23.874] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:35:23.874] <TB2> INFO: ----------------------------------------------------------------------
[09:35:43.422] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 387.5 mA = 24.2188 mA/ROC
[09:35:43.425] <TB2> INFO: ----------------------------------------------------------------------
[09:35:43.425] <TB2> INFO: PixTestPretest::findWorkingPixel()
[09:35:43.425] <TB2> INFO: ----------------------------------------------------------------------















































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































[09:35:53.306] <TB2> INFO: Test took 9878ms.
[09:35:53.594] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:35:53.632] <TB2> INFO: ----------------------------------------------------------------------
[09:35:53.632] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[09:35:53.632] <TB2> INFO: ----------------------------------------------------------------------
[09:36:02.905] <TB2> INFO: Test took 9269ms.
[09:36:03.216] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[09:36:03.216] <TB2> INFO: CalDel: 129 132 129 150 152 123 146 143 136 124 133 124 120 119 118 133
[09:36:03.216] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[09:36:03.220] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C0.dat
[09:36:03.220] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C1.dat
[09:36:03.221] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C2.dat
[09:36:03.221] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C3.dat
[09:36:03.221] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C4.dat
[09:36:03.221] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C5.dat
[09:36:03.221] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C6.dat
[09:36:03.221] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C7.dat
[09:36:03.221] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C8.dat
[09:36:03.221] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C9.dat
[09:36:03.221] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C10.dat
[09:36:03.222] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C11.dat
[09:36:03.222] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C12.dat
[09:36:03.222] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C13.dat
[09:36:03.222] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C14.dat
[09:36:03.222] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters_C15.dat
[09:36:03.222] <TB2> INFO: PixTestPretest::doTest() done, duration: 57 seconds
[09:36:03.328] <TB2> INFO: enter test to run
[09:36:03.328] <TB2> INFO: test: fulltest no parameter change
[09:36:03.328] <TB2> INFO: running: fulltest
[09:36:03.328] <TB2> INFO: ######################################################################
[09:36:03.328] <TB2> INFO: PixTestFullTest::doTest()
[09:36:03.328] <TB2> INFO: ######################################################################
[09:36:03.330] <TB2> INFO: ######################################################################
[09:36:03.330] <TB2> INFO: PixTestAlive::doTest()
[09:36:03.330] <TB2> INFO: ######################################################################
[09:36:03.331] <TB2> INFO: ----------------------------------------------------------------------
[09:36:03.331] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:36:03.331] <TB2> INFO: ----------------------------------------------------------------------
[09:36:07.023] <TB2> INFO: Test took 3690ms.
[09:36:07.047] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:07.276] <TB2> INFO: PixTestAlive::aliveTest() done
[09:36:07.276] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:36:07.278] <TB2> INFO: ----------------------------------------------------------------------
[09:36:07.278] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:36:07.278] <TB2> INFO: ----------------------------------------------------------------------
[09:36:10.138] <TB2> INFO: Test took 2859ms.
[09:36:10.142] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:10.142] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:36:10.371] <TB2> INFO: PixTestAlive::maskTest() done
[09:36:10.371] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:36:10.373] <TB2> INFO: ----------------------------------------------------------------------
[09:36:10.373] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:36:10.373] <TB2> INFO: ----------------------------------------------------------------------
[09:36:14.124] <TB2> INFO: Test took 3749ms.
[09:36:14.149] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:14.374] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[09:36:14.375] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:36:14.375] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[09:36:14.385] <TB2> INFO: ######################################################################
[09:36:14.385] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:36:14.385] <TB2> INFO: ######################################################################
[09:36:14.388] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[09:36:14.529] <TB2> INFO: dacScan step from 0 .. 29
[09:36:38.205] <TB2> INFO: Test took 23675ms.
[09:36:38.237] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:38.241] <TB2> INFO: dacScan step from 30 .. 59
[09:37:03.689] <TB2> INFO: Test took 25448ms.
[09:37:03.771] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:03.789] <TB2> INFO: dacScan step from 60 .. 89
[09:37:36.771] <TB2> INFO: Test took 32981ms.
[09:37:37.027] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:37.095] <TB2> INFO: dacScan step from 90 .. 119
[09:38:09.042] <TB2> INFO: Test took 31947ms.
[09:38:09.313] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:09.383] <TB2> INFO: dacScan step from 120 .. 149
[09:38:38.378] <TB2> INFO: Test took 28994ms.
[09:38:38.623] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:04.446] <TB2> INFO: PixTestBBMap::doTest() done, duration: 170 seconds
[09:39:04.446] <TB2> INFO: number of dead bumps (per ROC): 12 0 0 0 0 0 0 0 3 0 0 1 1 2 0 17
[09:39:04.446] <TB2> INFO: separation cut (per ROC): 86 100 102 89 67 95 71 80 90 91 89 109 101 103 101 96
[09:39:04.527] <TB2> INFO: ######################################################################
[09:39:04.527] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[09:39:04.527] <TB2> INFO: ######################################################################
[09:39:04.528] <TB2> INFO: ----------------------------------------------------------------------
[09:39:04.528] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[09:39:04.528] <TB2> INFO: ----------------------------------------------------------------------
[09:39:04.528] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[09:39:04.536] <TB2> INFO: dacScan step from 0 .. 3
[09:39:26.441] <TB2> INFO: Test took 21905ms.
[09:39:26.467] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:26.468] <TB2> INFO: dacScan step from 4 .. 7
[09:39:48.109] <TB2> INFO: Test took 21641ms.
[09:39:48.136] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:48.136] <TB2> INFO: dacScan step from 8 .. 11
[09:40:10.285] <TB2> INFO: Test took 22149ms.
[09:40:10.312] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:10.312] <TB2> INFO: dacScan step from 12 .. 15
[09:40:32.405] <TB2> INFO: Test took 22092ms.
[09:40:32.436] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:32.436] <TB2> INFO: dacScan step from 16 .. 19
[09:40:54.281] <TB2> INFO: Test took 21845ms.
[09:40:54.307] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:54.307] <TB2> INFO: dacScan step from 20 .. 23
[09:41:16.277] <TB2> INFO: Test took 21970ms.
[09:41:16.311] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:16.311] <TB2> INFO: dacScan step from 24 .. 27
[09:41:38.109] <TB2> INFO: Test took 21798ms.
[09:41:38.135] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:38.135] <TB2> INFO: dacScan step from 28 .. 31
[09:42:00.260] <TB2> INFO: Test took 22125ms.
[09:42:00.290] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:00.290] <TB2> INFO: dacScan step from 32 .. 35
[09:42:22.547] <TB2> INFO: Test took 22257ms.
[09:42:22.574] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:22.574] <TB2> INFO: dacScan step from 36 .. 39
[09:42:44.847] <TB2> INFO: Test took 22272ms.
[09:42:44.873] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:44.873] <TB2> INFO: dacScan step from 40 .. 43
[09:43:06.435] <TB2> INFO: Test took 21562ms.
[09:43:06.462] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:43:06.462] <TB2> INFO: dacScan step from 44 .. 47
[09:43:28.445] <TB2> INFO: Test took 21983ms.
[09:43:28.474] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:43:28.474] <TB2> INFO: dacScan step from 48 .. 51
[09:43:50.553] <TB2> INFO: Test took 22079ms.
[09:43:50.582] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:43:50.582] <TB2> INFO: dacScan step from 52 .. 55
[09:44:12.397] <TB2> INFO: Test took 21815ms.
[09:44:12.426] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:12.427] <TB2> INFO: dacScan step from 56 .. 59
[09:44:34.451] <TB2> INFO: Test took 22024ms.
[09:44:34.477] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:34.477] <TB2> INFO: dacScan step from 60 .. 63
[09:44:56.448] <TB2> INFO: Test took 21971ms.
[09:44:56.483] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:56.483] <TB2> INFO: dacScan step from 64 .. 67
[09:45:18.421] <TB2> INFO: Test took 21938ms.
[09:45:18.452] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:18.453] <TB2> INFO: dacScan step from 68 .. 71
[09:45:40.551] <TB2> INFO: Test took 22098ms.
[09:45:40.591] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:40.592] <TB2> INFO: dacScan step from 72 .. 75
[09:46:03.225] <TB2> INFO: Test took 22633ms.
[09:46:03.272] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:03.273] <TB2> INFO: dacScan step from 76 .. 79
[09:46:26.610] <TB2> INFO: Test took 23337ms.
[09:46:26.675] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:26.677] <TB2> INFO: dacScan step from 80 .. 83
[09:46:52.583] <TB2> INFO: Test took 25906ms.
[09:46:52.688] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:52.694] <TB2> INFO: dacScan step from 84 .. 87
[09:47:21.506] <TB2> INFO: Test took 28812ms.
[09:47:21.644] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:21.652] <TB2> INFO: dacScan step from 88 .. 91
[09:47:52.090] <TB2> INFO: Test took 30438ms.
[09:47:52.284] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:52.292] <TB2> INFO: dacScan step from 92 .. 95
[09:48:24.319] <TB2> INFO: Test took 32027ms.
[09:48:24.518] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:24.527] <TB2> INFO: dacScan step from 96 .. 99



[09:48:57.806] <TB2> INFO: Test took 33279ms.
[09:48:58.033] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:58.043] <TB2> INFO: dacScan step from 100 .. 103



[09:49:31.951] <TB2> INFO: Test took 33908ms.
[09:49:32.185] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:32.197] <TB2> INFO: dacScan step from 104 .. 107






[09:50:06.711] <TB2> INFO: Test took 34514ms.
[09:50:06.948] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:06.959] <TB2> INFO: dacScan step from 108 .. 111




[09:50:41.342] <TB2> INFO: Test took 34383ms.
[09:50:41.612] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:41.625] <TB2> INFO: dacScan step from 112 .. 115



[09:51:16.370] <TB2> INFO: Test took 34744ms.
[09:51:16.601] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:16.615] <TB2> INFO: dacScan step from 116 .. 119


[09:51:50.434] <TB2> INFO: Test took 33819ms.
[09:51:50.668] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:50.679] <TB2> INFO: dacScan step from 120 .. 123


[09:52:25.022] <TB2> INFO: Test took 34343ms.
[09:52:25.257] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:52:25.268] <TB2> INFO: dacScan step from 124 .. 127
[09:53:00.000] <TB2> INFO: Test took 34731ms.
[09:53:00.240] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:53:00.252] <TB2> INFO: dacScan step from 128 .. 131
[09:53:32.176] <TB2> INFO: Test took 31924ms.
[09:53:32.424] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:53:32.435] <TB2> INFO: dacScan step from 132 .. 135
[09:54:04.976] <TB2> INFO: Test took 32541ms.
[09:54:05.191] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:05.202] <TB2> INFO: dacScan step from 136 .. 139
[09:54:39.762] <TB2> INFO: Test took 34560ms.
[09:54:40.047] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:40.060] <TB2> INFO: dacScan step from 140 .. 143
[09:55:14.357] <TB2> INFO: Test took 34296ms.
[09:55:14.572] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:14.582] <TB2> INFO: dacScan step from 144 .. 147
[09:55:48.478] <TB2> INFO: Test took 33896ms.
[09:55:48.781] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:48.794] <TB2> INFO: dacScan step from 148 .. 149
[09:56:06.400] <TB2> INFO: Test took 17606ms.
[09:56:06.512] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:06.519] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:56:07.965] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:56:09.398] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:56:10.844] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:56:12.299] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:56:13.914] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:56:15.503] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:56:16.947] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:56:18.511] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:56:19.942] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:56:21.372] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:56:22.787] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:56:24.303] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:56:25.698] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:56:27.148] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:56:28.667] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[09:56:30.218] <TB2> INFO: PixTestScurves::scurves() done
[09:56:30.218] <TB2> INFO: Vcal mean: 90.80 92.67 99.52 95.49 77.17 96.56 86.16 89.15 92.02 83.36 87.97 101.70 95.62 84.10 87.40 80.00
[09:56:30.218] <TB2> INFO: Vcal RMS: 6.00 6.05 6.30 6.53 4.74 5.33 5.57 5.23 5.99 4.88 5.74 5.59 5.23 4.61 5.43 4.72
[09:56:30.218] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1045 seconds
[09:56:30.290] <TB2> INFO: ######################################################################
[09:56:30.290] <TB2> INFO: PixTestTrim::doTest()
[09:56:30.290] <TB2> INFO: ######################################################################
[09:56:30.291] <TB2> INFO: ----------------------------------------------------------------------
[09:56:30.291] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[09:56:30.291] <TB2> INFO: ----------------------------------------------------------------------
[09:56:30.374] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:56:30.374] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:56:30.382] <TB2> INFO: dacScan step from 0 .. 19
[09:56:46.970] <TB2> INFO: Test took 16588ms.
[09:56:46.995] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:46.995] <TB2> INFO: dacScan step from 20 .. 39
[09:57:03.314] <TB2> INFO: Test took 16319ms.
[09:57:03.338] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:03.338] <TB2> INFO: dacScan step from 40 .. 59
[09:57:20.107] <TB2> INFO: Test took 16769ms.
[09:57:20.129] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:20.129] <TB2> INFO: dacScan step from 60 .. 79
[09:57:36.558] <TB2> INFO: Test took 16429ms.
[09:57:36.586] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:36.586] <TB2> INFO: dacScan step from 80 .. 99
[09:57:54.048] <TB2> INFO: Test took 17462ms.
[09:57:54.103] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:54.109] <TB2> INFO: dacScan step from 100 .. 119
[09:58:14.880] <TB2> INFO: Test took 20771ms.
[09:58:15.060] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:15.094] <TB2> INFO: dacScan step from 120 .. 139
[09:58:36.202] <TB2> INFO: Test took 21108ms.
[09:58:36.360] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:36.392] <TB2> INFO: dacScan step from 140 .. 159
[09:58:54.093] <TB2> INFO: Test took 17701ms.
[09:58:54.176] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:18.078] <TB2> INFO: ROC 0 VthrComp = 91
[09:59:18.078] <TB2> INFO: ROC 1 VthrComp = 98
[09:59:18.078] <TB2> INFO: ROC 2 VthrComp = 99
[09:59:18.078] <TB2> INFO: ROC 3 VthrComp = 95
[09:59:18.078] <TB2> INFO: ROC 4 VthrComp = 78
[09:59:18.078] <TB2> INFO: ROC 5 VthrComp = 103
[09:59:18.078] <TB2> INFO: ROC 6 VthrComp = 83
[09:59:18.078] <TB2> INFO: ROC 7 VthrComp = 93
[09:59:18.079] <TB2> INFO: ROC 8 VthrComp = 94
[09:59:18.079] <TB2> INFO: ROC 9 VthrComp = 90
[09:59:18.079] <TB2> INFO: ROC 10 VthrComp = 91
[09:59:18.079] <TB2> INFO: ROC 11 VthrComp = 106
[09:59:18.079] <TB2> INFO: ROC 12 VthrComp = 102
[09:59:18.079] <TB2> INFO: ROC 13 VthrComp = 96
[09:59:18.079] <TB2> INFO: ROC 14 VthrComp = 92
[09:59:18.079] <TB2> INFO: ROC 15 VthrComp = 87
[09:59:18.079] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:59:18.079] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:59:18.091] <TB2> INFO: dacScan step from 0 .. 19
[09:59:34.078] <TB2> INFO: Test took 15987ms.
[09:59:34.105] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:34.105] <TB2> INFO: dacScan step from 20 .. 39
[09:59:50.782] <TB2> INFO: Test took 16677ms.
[09:59:50.817] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:50.821] <TB2> INFO: dacScan step from 40 .. 59
[10:00:12.079] <TB2> INFO: Test took 21258ms.
[10:00:12.236] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:00:12.270] <TB2> INFO: dacScan step from 60 .. 79
[10:00:35.275] <TB2> INFO: Test took 23005ms.
[10:00:35.449] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:00:35.495] <TB2> INFO: dacScan step from 80 .. 99
[10:00:58.552] <TB2> INFO: Test took 23056ms.
[10:00:58.722] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:00:58.764] <TB2> INFO: dacScan step from 100 .. 119
[10:01:21.912] <TB2> INFO: Test took 23148ms.
[10:01:22.132] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:22.182] <TB2> INFO: dacScan step from 120 .. 139
[10:01:45.367] <TB2> INFO: Test took 23185ms.
[10:01:45.546] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:45.599] <TB2> INFO: dacScan step from 140 .. 159
[10:02:08.572] <TB2> INFO: Test took 22972ms.
[10:02:08.761] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:02:36.513] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 62.6044 for pixel 0/58 mean/min/max = 47.0264/31.4099/62.6428
[10:02:36.514] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 61.3048 for pixel 21/77 mean/min/max = 46.1721/30.9259/61.4183
[10:02:36.514] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 62.8785 for pixel 0/75 mean/min/max = 47.2628/31.5793/62.9464
[10:02:36.514] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 63.5614 for pixel 27/5 mean/min/max = 47.4986/31.3732/63.624
[10:02:36.515] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 61.7348 for pixel 17/0 mean/min/max = 48.0149/34.2422/61.7876
[10:02:36.515] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 59.1274 for pixel 34/0 mean/min/max = 45.6349/32.0042/59.2656
[10:02:36.515] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 62.1312 for pixel 0/1 mean/min/max = 47.3895/32.3338/62.4452
[10:02:36.516] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.3256 for pixel 19/1 mean/min/max = 45.2093/31.974/58.4446
[10:02:36.516] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 61.6773 for pixel 51/41 mean/min/max = 46.9363/32.1062/61.7665
[10:02:36.516] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 57.5832 for pixel 13/79 mean/min/max = 45.2112/32.8202/57.6021
[10:02:36.517] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 60.4347 for pixel 0/74 mean/min/max = 45.8767/31.1982/60.5552
[10:02:36.517] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 61.3713 for pixel 0/27 mean/min/max = 47.5652/33.738/61.3924
[10:02:36.517] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 58.3308 for pixel 41/68 mean/min/max = 45.3488/32.2835/58.414
[10:02:36.518] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 55.5174 for pixel 16/79 mean/min/max = 43.9108/32.2998/55.5218
[10:02:36.518] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 59.3967 for pixel 17/79 mean/min/max = 45.9324/32.4471/59.4177
[10:02:36.518] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 58.1075 for pixel 25/77 mean/min/max = 44.8119/31.3551/58.2688
[10:02:36.518] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:04:27.708] <TB2> INFO: Test took 111190ms.
[10:04:29.282] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[10:04:29.290] <TB2> INFO: dacScan step from 0 .. 19
[10:04:55.224] <TB2> INFO: Test took 25933ms.
[10:04:55.274] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:04:55.276] <TB2> INFO: dacScan step from 20 .. 39
[10:05:28.790] <TB2> INFO: Test took 33514ms.
[10:05:29.017] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:05:29.048] <TB2> INFO: dacScan step from 40 .. 59



[10:06:05.659] <TB2> INFO: Test took 36611ms.
[10:06:05.973] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:06:06.030] <TB2> INFO: dacScan step from 60 .. 79
[10:06:41.610] <TB2> INFO: Test took 35580ms.
[10:06:41.966] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:06:42.016] <TB2> INFO: dacScan step from 80 .. 99
[10:07:19.781] <TB2> INFO: Test took 37765ms.
[10:07:20.078] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:07:20.125] <TB2> INFO: dacScan step from 100 .. 119



[10:07:58.147] <TB2> INFO: Test took 38022ms.
[10:07:58.496] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:07:58.568] <TB2> INFO: dacScan step from 120 .. 139






[10:08:36.835] <TB2> INFO: Test took 38267ms.
[10:08:37.158] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:08:37.201] <TB2> INFO: dacScan step from 140 .. 159






[10:09:15.937] <TB2> INFO: Test took 38736ms.
[10:09:16.231] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:09:16.280] <TB2> INFO: dacScan step from 160 .. 179



[10:09:54.769] <TB2> INFO: Test took 38488ms.
[10:09:55.041] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:09:55.087] <TB2> INFO: dacScan step from 180 .. 199



[10:10:31.168] <TB2> INFO: Test took 36081ms.
[10:10:31.623] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:10:57.813] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.008673 .. 255.000000
[10:10:57.894] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[10:10:57.903] <TB2> INFO: dacScan step from 0 .. 19
[10:11:12.383] <TB2> INFO: Test took 14480ms.
[10:11:12.404] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:11:12.404] <TB2> INFO: dacScan step from 20 .. 39
[10:11:27.672] <TB2> INFO: Test took 15268ms.
[10:11:27.758] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:11:27.776] <TB2> INFO: dacScan step from 40 .. 59
[10:11:46.851] <TB2> INFO: Test took 19075ms.
[10:11:47.085] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:11:47.158] <TB2> INFO: dacScan step from 60 .. 79
[10:12:06.891] <TB2> INFO: Test took 19733ms.
[10:12:07.034] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:12:07.088] <TB2> INFO: dacScan step from 80 .. 99
[10:12:25.646] <TB2> INFO: Test took 18558ms.
[10:12:25.793] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:12:25.843] <TB2> INFO: dacScan step from 100 .. 119
[10:12:44.607] <TB2> INFO: Test took 18764ms.
[10:12:44.749] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:12:44.798] <TB2> INFO: dacScan step from 120 .. 139
[10:13:04.516] <TB2> INFO: Test took 19718ms.
[10:13:04.660] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:13:04.710] <TB2> INFO: dacScan step from 140 .. 159
[10:13:23.283] <TB2> INFO: Test took 18573ms.
[10:13:23.458] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:13:23.509] <TB2> INFO: dacScan step from 160 .. 179
[10:13:42.966] <TB2> INFO: Test took 19457ms.
[10:13:43.142] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:13:43.198] <TB2> INFO: dacScan step from 180 .. 199
[10:14:04.262] <TB2> INFO: Test took 21064ms.
[10:14:04.411] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:04.461] <TB2> INFO: dacScan step from 200 .. 219
[10:14:23.360] <TB2> INFO: Test took 18900ms.
[10:14:23.500] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:23.553] <TB2> INFO: dacScan step from 220 .. 239
[10:14:42.443] <TB2> INFO: Test took 18889ms.
[10:14:42.610] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:42.670] <TB2> INFO: dacScan step from 240 .. 255
[10:14:59.601] <TB2> INFO: Test took 16931ms.
[10:14:59.762] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:15:30.710] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 15.361977 .. 45.114988
[10:15:30.795] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 5 .. 55 (20) hits flags = 16 (plus default)
[10:15:30.804] <TB2> INFO: dacScan step from 5 .. 24
[10:15:45.679] <TB2> INFO: Test took 14876ms.
[10:15:45.705] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:15:45.705] <TB2> INFO: dacScan step from 25 .. 44
[10:16:03.306] <TB2> INFO: Test took 17601ms.
[10:16:03.426] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:16:03.468] <TB2> INFO: dacScan step from 45 .. 55
[10:16:16.027] <TB2> INFO: Test took 12558ms.
[10:16:16.112] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:16:32.754] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 21.362816 .. 42.622675
[10:16:32.840] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 11 .. 52 (20) hits flags = 16 (plus default)
[10:16:32.849] <TB2> INFO: dacScan step from 11 .. 30
[10:16:47.664] <TB2> INFO: Test took 14815ms.
[10:16:47.688] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:16:47.689] <TB2> INFO: dacScan step from 31 .. 50
[10:17:06.828] <TB2> INFO: Test took 19139ms.
[10:17:06.999] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:17:07.051] <TB2> INFO: dacScan step from 51 .. 52
[10:17:11.569] <TB2> INFO: Test took 4518ms.
[10:17:11.584] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:17:27.539] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 4.392458 .. 41.367136
[10:17:27.619] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 4 .. 51 (20) hits flags = 16 (plus default)
[10:17:27.627] <TB2> INFO: dacScan step from 4 .. 23
[10:17:42.396] <TB2> INFO: Test took 14769ms.
[10:17:42.424] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:17:42.424] <TB2> INFO: dacScan step from 24 .. 43
[10:17:59.690] <TB2> INFO: Test took 17266ms.
[10:17:59.799] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:17:59.826] <TB2> INFO: dacScan step from 44 .. 51
[10:18:09.515] <TB2> INFO: Test took 9689ms.
[10:18:09.576] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:18:25.578] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:18:25.578] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[10:18:25.586] <TB2> INFO: dacScan step from 15 .. 34
[10:18:51.632] <TB2> INFO: Test took 26045ms.
[10:18:51.702] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:18:51.711] <TB2> INFO: dacScan step from 35 .. 54






[10:19:30.132] <TB2> INFO: Test took 38421ms.
[10:19:30.426] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:19:30.484] <TB2> INFO: dacScan step from 55 .. 55
[10:19:35.001] <TB2> INFO: Test took 4516ms.
[10:19:35.018] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:19:48.925] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:19:48.925] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:19:48.925] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:19:48.925] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:19:48.925] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:19:48.926] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:19:48.926] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:19:48.926] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:19:48.926] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:19:48.926] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:19:48.926] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:19:48.926] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:19:48.926] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:19:48.926] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:19:48.926] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:19:48.926] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:19:48.927] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C0.dat
[10:19:48.936] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C1.dat
[10:19:48.945] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C2.dat
[10:19:48.954] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C3.dat
[10:19:48.963] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C4.dat
[10:19:48.973] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C5.dat
[10:19:48.983] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C6.dat
[10:19:48.991] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C7.dat
[10:19:49.000] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C8.dat
[10:19:49.009] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C9.dat
[10:19:49.017] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C10.dat
[10:19:49.026] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C11.dat
[10:19:49.031] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C12.dat
[10:19:49.037] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C13.dat
[10:19:49.043] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C14.dat
[10:19:49.049] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//trimParameters35_C15.dat
[10:19:49.055] <TB2> INFO: PixTestTrim::trimTest() done
[10:19:49.055] <TB2> INFO: vtrim: 112 137 119 128 105 115 104 103 109 108 114 118 119 103 102 112
[10:19:49.055] <TB2> INFO: vthrcomp: 91 98 99 95 78 103 83 93 94 90 91 106 102 96 92 87
[10:19:49.055] <TB2> INFO: vcal mean: 34.95 35.01 35.03 35.02 35.07 35.03 35.07 35.07 35.08 35.09 34.99 35.06 35.04 35.00 35.07 35.01
[10:19:49.055] <TB2> INFO: vcal RMS: 1.02 1.03 1.09 1.21 1.00 0.96 1.24 1.06 1.06 0.96 0.99 0.97 1.00 0.91 1.00 1.00
[10:19:49.055] <TB2> INFO: bits mean: 9.41 9.92 9.73 9.95 8.97 9.38 9.27 10.11 9.11 9.69 9.61 8.72 10.12 9.91 9.49 10.27
[10:19:49.055] <TB2> INFO: bits RMS: 2.72 2.54 2.51 2.41 2.44 2.72 2.61 2.43 2.78 2.53 2.69 2.65 2.37 2.63 2.60 2.50
[10:19:49.060] <TB2> INFO: ----------------------------------------------------------------------
[10:19:49.060] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 240 150 100
[10:19:49.060] <TB2> INFO: ----------------------------------------------------------------------
[10:19:49.062] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[10:19:49.070] <TB2> INFO: dacScan step from 0 .. 19
[10:20:13.711] <TB2> INFO: Test took 24641ms.
[10:20:13.746] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:20:13.746] <TB2> INFO: dacScan step from 20 .. 39
[10:20:39.880] <TB2> INFO: Test took 26134ms.
[10:20:39.936] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:20:39.940] <TB2> INFO: dacScan step from 40 .. 59
[10:21:14.876] <TB2> INFO: Test took 34936ms.
[10:21:15.136] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:21:15.173] <TB2> INFO: dacScan step from 60 .. 79



[10:21:53.181] <TB2> INFO: Test took 38008ms.
[10:21:53.550] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:21:53.604] <TB2> INFO: dacScan step from 80 .. 99
[10:22:29.265] <TB2> INFO: Test took 35661ms.
[10:22:29.622] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:22:29.681] <TB2> INFO: dacScan step from 100 .. 119
[10:23:08.061] <TB2> INFO: Test took 38380ms.
[10:23:08.340] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:08.388] <TB2> INFO: dacScan step from 120 .. 139
[10:23:46.068] <TB2> INFO: Test took 37680ms.
[10:23:46.353] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:46.404] <TB2> INFO: dacScan step from 140 .. 159
[10:24:23.365] <TB2> INFO: Test took 36961ms.
[10:24:23.720] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:24:23.761] <TB2> INFO: dacScan step from 160 .. 179
[10:25:00.855] <TB2> INFO: Test took 37094ms.
[10:25:01.206] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:25:01.256] <TB2> INFO: dacScan step from 180 .. 199
[10:25:40.297] <TB2> INFO: Test took 39041ms.
[10:25:40.577] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:07.608] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 83 (20) hits flags = 16 (plus default)
[10:26:07.618] <TB2> INFO: dacScan step from 0 .. 19
[10:26:33.047] <TB2> INFO: Test took 25429ms.
[10:26:33.082] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:33.082] <TB2> INFO: dacScan step from 20 .. 39
[10:26:59.662] <TB2> INFO: Test took 26580ms.
[10:26:59.759] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:59.768] <TB2> INFO: dacScan step from 40 .. 59
[10:27:33.939] <TB2> INFO: Test took 34171ms.
[10:27:34.218] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:34.266] <TB2> INFO: dacScan step from 60 .. 79



[10:28:10.492] <TB2> INFO: Test took 36226ms.
[10:28:10.774] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:10.821] <TB2> INFO: dacScan step from 80 .. 83
[10:28:20.839] <TB2> INFO: Test took 10018ms.
[10:28:20.903] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:37.518] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 76 (20) hits flags = 16 (plus default)
[10:28:37.527] <TB2> INFO: dacScan step from 0 .. 19
[10:29:02.973] <TB2> INFO: Test took 25446ms.
[10:29:03.012] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:03.012] <TB2> INFO: dacScan step from 20 .. 39
[10:29:32.036] <TB2> INFO: Test took 29024ms.
[10:29:32.165] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:32.180] <TB2> INFO: dacScan step from 40 .. 59



[10:30:09.814] <TB2> INFO: Test took 37634ms.
[10:30:10.177] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:10.227] <TB2> INFO: dacScan step from 60 .. 76
[10:30:44.034] <TB2> INFO: Test took 33807ms.
[10:30:44.264] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:59.904] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 72 (20) hits flags = 16 (plus default)
[10:30:59.914] <TB2> INFO: dacScan step from 0 .. 19
[10:31:25.664] <TB2> INFO: Test took 25750ms.
[10:31:25.703] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:25.703] <TB2> INFO: dacScan step from 20 .. 39
[10:31:55.502] <TB2> INFO: Test took 29799ms.
[10:31:55.672] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:55.693] <TB2> INFO: dacScan step from 40 .. 59



[10:32:33.634] <TB2> INFO: Test took 37941ms.
[10:32:34.051] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:32:34.107] <TB2> INFO: dacScan step from 60 .. 72
[10:33:00.268] <TB2> INFO: Test took 26161ms.
[10:33:00.473] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:33:16.920] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 70 (20) hits flags = 16 (plus default)
[10:33:16.928] <TB2> INFO: dacScan step from 0 .. 19
[10:33:42.923] <TB2> INFO: Test took 25995ms.
[10:33:42.966] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:33:42.967] <TB2> INFO: dacScan step from 20 .. 39
[10:34:14.924] <TB2> INFO: Test took 31957ms.
[10:34:15.145] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:34:15.175] <TB2> INFO: dacScan step from 40 .. 59



[10:34:53.999] <TB2> INFO: Test took 38823ms.
[10:34:54.308] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:34:54.359] <TB2> INFO: dacScan step from 60 .. 70
[10:35:17.166] <TB2> INFO: Test took 22807ms.
[10:35:17.359] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:35:34.350] <TB2> INFO: PixTestTrim::trimBitTest() done
[10:35:34.352] <TB2> INFO: PixTestTrim::doTest() done, duration: 2344 seconds
[10:35:35.093] <TB2> INFO: ######################################################################
[10:35:35.093] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:35:35.093] <TB2> INFO: ######################################################################
[10:35:38.818] <TB2> INFO: Test took 3724ms.
[10:35:38.850] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:35:42.790] <TB2> INFO: Test took 3742ms.
[10:35:42.878] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:35:46.656] <TB2> INFO: Test took 3765ms.
[10:35:46.720] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:35:46.727] <TB2> INFO: The DUT currently contains the following objects:
[10:35:46.727] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:35:46.727] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:35:46.727] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:35:46.727] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:35:46.727] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:46.727] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:46.727] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:46.727] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:46.727] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:46.727] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:46.727] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:46.727] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:46.727] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:46.727] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:46.727] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:46.727] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:46.727] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:46.727] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:46.727] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:46.727] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:47.850] <TB2> INFO: Test took 1123ms.
[10:35:47.851] <TB2> INFO: The DUT currently contains the following objects:
[10:35:47.851] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:35:47.851] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:35:47.851] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:35:47.851] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:35:47.851] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:47.851] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:47.851] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:47.851] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:47.851] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:47.852] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:47.852] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:47.852] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:47.852] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:47.852] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:47.852] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:47.852] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:47.852] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:47.852] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:47.852] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:47.852] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:48.987] <TB2> INFO: Test took 1135ms.
[10:35:48.989] <TB2> INFO: The DUT currently contains the following objects:
[10:35:48.989] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:35:48.989] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:35:48.989] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:35:48.989] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:35:48.989] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:48.989] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:48.989] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:48.990] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:48.990] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:48.990] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:48.990] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:48.990] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:48.990] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:48.990] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:48.990] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:48.990] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:48.990] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:48.990] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:48.990] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:48.990] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:50.108] <TB2> INFO: Test took 1118ms.
[10:35:50.109] <TB2> INFO: The DUT currently contains the following objects:
[10:35:50.109] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:35:50.109] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:35:50.109] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:35:50.109] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:35:50.109] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:50.109] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:50.109] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:50.109] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:50.109] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:50.109] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:50.109] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:50.109] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:50.110] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:50.110] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:50.110] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:50.110] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:50.110] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:50.110] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:50.110] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:50.110] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:51.231] <TB2> INFO: Test took 1121ms.
[10:35:51.232] <TB2> INFO: The DUT currently contains the following objects:
[10:35:51.232] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:35:51.232] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:35:51.232] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:35:51.232] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:35:51.232] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:51.232] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:51.232] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:51.232] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:51.232] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:51.232] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:51.232] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:51.232] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:51.232] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:51.232] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:51.232] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:51.232] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:51.232] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:51.232] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:51.232] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:51.232] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:52.352] <TB2> INFO: Test took 1120ms.
[10:35:52.353] <TB2> INFO: The DUT currently contains the following objects:
[10:35:52.353] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:35:52.353] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:35:52.353] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:35:52.353] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:35:52.354] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:52.354] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:52.354] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:52.354] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:52.354] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:52.354] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:52.354] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:52.354] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:52.354] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:52.354] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:52.354] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:52.354] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:52.354] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:52.354] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:52.354] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:52.354] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:53.470] <TB2> INFO: Test took 1116ms.
[10:35:53.470] <TB2> INFO: The DUT currently contains the following objects:
[10:35:53.470] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:35:53.470] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:35:53.470] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:35:53.470] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:35:53.470] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:53.470] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:53.470] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:53.470] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:53.470] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:53.470] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:53.470] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:53.470] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:53.470] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:53.470] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:53.470] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:53.470] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:53.470] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:53.470] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:53.470] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:53.470] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:54.585] <TB2> INFO: Test took 1115ms.
[10:35:54.585] <TB2> INFO: The DUT currently contains the following objects:
[10:35:54.585] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:35:54.585] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:35:54.585] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:35:54.585] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:35:54.585] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:54.586] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:54.586] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:54.586] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:54.586] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:54.586] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:54.586] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:54.586] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:54.586] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:54.586] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:54.586] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:54.586] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:54.586] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:54.586] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:54.586] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:54.586] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:55.687] <TB2> INFO: Test took 1101ms.
[10:35:55.688] <TB2> INFO: The DUT currently contains the following objects:
[10:35:55.688] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:35:55.688] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:35:55.688] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:35:55.688] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:35:55.688] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:55.688] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:55.688] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:55.688] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:55.688] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:55.688] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:55.688] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:55.688] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:55.688] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:55.688] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:55.688] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:55.688] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:55.688] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:55.688] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:55.688] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:55.688] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:56.810] <TB2> INFO: Test took 1122ms.
[10:35:56.811] <TB2> INFO: The DUT currently contains the following objects:
[10:35:56.811] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:35:56.811] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:35:56.811] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:35:56.811] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:35:56.811] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:56.811] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:56.811] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:56.811] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:56.811] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:56.811] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:56.811] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:56.812] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:56.812] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:56.812] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:56.812] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:56.812] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:56.812] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:56.812] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:56.812] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:56.812] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:57.920] <TB2> INFO: Test took 1108ms.
[10:35:57.921] <TB2> INFO: The DUT currently contains the following objects:
[10:35:57.921] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:35:57.922] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:35:57.922] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:35:57.922] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:35:57.922] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:57.922] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:57.922] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:57.922] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:57.922] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:57.922] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:57.922] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:57.922] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:57.922] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:57.922] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:57.922] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:57.922] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:57.922] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:57.922] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:57.922] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:57.922] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:59.024] <TB2> INFO: Test took 1102ms.
[10:35:59.024] <TB2> INFO: The DUT currently contains the following objects:
[10:35:59.024] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:35:59.024] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:35:59.024] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:35:59.024] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:35:59.024] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:59.024] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:59.024] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:59.024] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:59.024] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:59.024] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:59.024] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:59.024] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:59.024] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:59.024] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:59.024] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:59.024] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:59.024] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:59.024] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:59.024] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:35:59.024] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:00.147] <TB2> INFO: Test took 1123ms.
[10:36:00.148] <TB2> INFO: The DUT currently contains the following objects:
[10:36:00.148] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:36:00.148] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:36:00.148] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:36:00.148] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:36:00.148] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:00.149] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:00.149] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:00.149] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:00.149] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:00.149] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:00.149] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:00.149] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:00.149] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:00.149] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:00.149] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:00.149] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:00.149] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:00.149] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:00.149] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:00.149] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:01.257] <TB2> INFO: Test took 1108ms.
[10:36:01.258] <TB2> INFO: The DUT currently contains the following objects:
[10:36:01.258] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:36:01.258] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:36:01.258] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:36:01.258] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:36:01.258] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:01.258] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:01.258] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:01.258] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:01.258] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:01.258] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:01.259] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:01.259] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:01.259] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:01.259] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:01.259] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:01.259] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:01.259] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:01.259] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:01.259] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:01.259] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:02.367] <TB2> INFO: Test took 1108ms.
[10:36:02.368] <TB2> INFO: The DUT currently contains the following objects:
[10:36:02.368] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:36:02.368] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:36:02.368] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:36:02.368] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:36:02.368] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:02.368] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:02.368] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:02.368] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:02.369] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:02.369] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:02.369] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:02.369] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:02.369] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:02.369] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:02.369] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:02.369] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:02.369] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:02.369] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:02.369] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:02.369] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:03.491] <TB2> INFO: Test took 1122ms.
[10:36:03.492] <TB2> INFO: The DUT currently contains the following objects:
[10:36:03.492] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[10:36:03.492] <TB2> INFO: TBM Core alpha (0): 7 registers set
[10:36:03.492] <TB2> INFO: TBM Core beta (1): 7 registers set
[10:36:03.492] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:36:03.492] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:03.492] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:03.492] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:03.492] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:03.492] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:03.492] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:03.492] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:03.492] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:03.492] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:03.492] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:03.492] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:03.493] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:03.493] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:03.493] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:03.493] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:03.493] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:36:04.615] <TB2> INFO: Test took 1122ms.
[10:36:04.618] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:17.466] <TB2> INFO: Test took 252848ms.
[10:40:18.853] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:21.844] <TB2> INFO: Test took 242992ms.
[10:44:23.371] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:23.378] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:23.384] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[10:44:23.391] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[10:44:23.397] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[10:44:23.404] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[10:44:23.410] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[10:44:23.417] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:23.423] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:23.429] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:23.436] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:23.442] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:23.449] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:23.455] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:23.462] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:23.468] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:23.474] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:23.481] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:23.487] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:23.494] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:23.500] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[10:44:23.534] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:44:23.534] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:44:23.535] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:44:23.535] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:44:23.535] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:44:23.535] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:44:23.535] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:44:23.535] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:44:23.535] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:44:23.535] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:44:23.535] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:44:23.535] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:44:23.535] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:44:23.536] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:44:23.536] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:44:23.536] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:44:26.950] <TB2> INFO: Test took 3411ms.
[10:44:30.805] <TB2> INFO: Test took 3594ms.
[10:44:34.629] <TB2> INFO: Test took 3563ms.
[10:44:34.896] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:35.807] <TB2> INFO: Test took 911ms.
[10:44:35.809] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:36.923] <TB2> INFO: Test took 1115ms.
[10:44:36.925] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:38.052] <TB2> INFO: Test took 1128ms.
[10:44:38.054] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:39.154] <TB2> INFO: Test took 1100ms.
[10:44:39.156] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:40.298] <TB2> INFO: Test took 1142ms.
[10:44:40.300] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:41.429] <TB2> INFO: Test took 1129ms.
[10:44:41.431] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:42.531] <TB2> INFO: Test took 1100ms.
[10:44:42.532] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:43.661] <TB2> INFO: Test took 1129ms.
[10:44:43.663] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:44.778] <TB2> INFO: Test took 1116ms.
[10:44:44.780] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:45.880] <TB2> INFO: Test took 1100ms.
[10:44:45.882] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:46.982] <TB2> INFO: Test took 1100ms.
[10:44:46.983] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:48.112] <TB2> INFO: Test took 1129ms.
[10:44:48.114] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:49.228] <TB2> INFO: Test took 1114ms.
[10:44:49.230] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:50.344] <TB2> INFO: Test took 1114ms.
[10:44:50.346] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:51.445] <TB2> INFO: Test took 1099ms.
[10:44:51.447] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:52.575] <TB2> INFO: Test took 1128ms.
[10:44:52.577] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:53.677] <TB2> INFO: Test took 1100ms.
[10:44:53.679] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:54.779] <TB2> INFO: Test took 1101ms.
[10:44:54.781] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:55.894] <TB2> INFO: Test took 1114ms.
[10:44:55.896] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:57.038] <TB2> INFO: Test took 1143ms.
[10:44:57.040] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:58.154] <TB2> INFO: Test took 1114ms.
[10:44:58.155] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:59.284] <TB2> INFO: Test took 1129ms.
[10:44:59.286] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:45:00.386] <TB2> INFO: Test took 1100ms.
[10:45:00.388] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:45:01.502] <TB2> INFO: Test took 1115ms.
[10:45:01.503] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:45:02.604] <TB2> INFO: Test took 1101ms.
[10:45:02.606] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:45:03.720] <TB2> INFO: Test took 1115ms.
[10:45:03.722] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:45:04.851] <TB2> INFO: Test took 1129ms.
[10:45:04.853] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:45:05.953] <TB2> INFO: Test took 1100ms.
[10:45:05.955] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:45:07.054] <TB2> INFO: Test took 1099ms.
[10:45:07.056] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:45:08.156] <TB2> INFO: Test took 1100ms.
[10:45:08.158] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:45:09.257] <TB2> INFO: Test took 1100ms.
[10:45:09.259] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:45:10.358] <TB2> INFO: Test took 1099ms.
[10:45:10.863] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 575 seconds
[10:45:10.863] <TB2> INFO: PH scale (per ROC): 87 86 80 76 82 80 83 75 86 94 84 79 79 92 86 83
[10:45:10.863] <TB2> INFO: PH offset (per ROC): 166 144 148 163 147 155 185 149 148 140 147 152 150 141 159 146
[10:45:11.028] <TB2> INFO: ######################################################################
[10:45:11.028] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:45:11.028] <TB2> INFO: ######################################################################
[10:45:11.037] <TB2> INFO: scanning low vcal = 50
[10:45:15.484] <TB2> INFO: Test took 4447ms.
[10:45:15.536] <TB2> INFO: scanning low vcal = 100
[10:45:20.063] <TB2> INFO: Test took 4527ms.
[10:45:20.115] <TB2> INFO: scanning low vcal = 150
[10:45:24.671] <TB2> INFO: Test took 4556ms.
[10:45:24.723] <TB2> INFO: scanning low vcal = 200
[10:45:29.147] <TB2> INFO: Test took 4424ms.
[10:45:29.199] <TB2> INFO: scanning low vcal = 250
[10:45:33.608] <TB2> INFO: Test took 4409ms.
[10:45:33.662] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[10:45:38.176] <TB2> INFO: Test took 4514ms.
[10:45:38.228] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[10:45:42.668] <TB2> INFO: Test took 4440ms.
[10:45:42.719] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[10:45:47.216] <TB2> INFO: Test took 4497ms.
[10:45:47.268] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[10:45:51.784] <TB2> INFO: Test took 4516ms.
[10:45:51.836] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:45:56.308] <TB2> INFO: Test took 4472ms.
[10:45:56.598] <TB2> INFO: PixTestGainPedestal::measure() done
[10:46:19.349] <TB2> INFO: PixTestGainPedestal::fit() done
[10:46:19.349] <TB2> INFO: non-linearity mean: 0.954 0.957 0.958 0.958 0.953 0.958 0.959 0.958 0.960 0.957 0.953 0.958 0.957 0.948 0.950 0.951
[10:46:19.349] <TB2> INFO: non-linearity RMS: 0.007 0.005 0.005 0.007 0.005 0.005 0.008 0.005 0.005 0.005 0.006 0.006 0.006 0.006 0.007 0.006
[10:46:19.349] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[10:46:19.367] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[10:46:19.385] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[10:46:19.403] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[10:46:19.421] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[10:46:19.439] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[10:46:19.457] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[10:46:19.475] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[10:46:19.493] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[10:46:19.511] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[10:46:19.528] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[10:46:19.546] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[10:46:19.564] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[10:46:19.582] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[10:46:19.600] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[10:46:19.618] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2032_FullQualification_2015-07-09_11h22m_1436433757//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[10:46:19.635] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 68 seconds
[10:46:19.641] <TB2> INFO: enter test to run
[10:46:19.642] <TB2> INFO: test: exit no parameter change
[10:46:20.070] <TB2> QUIET: Connection to board 156 closed.
[10:46:20.150] <TB2> INFO: pXar: this is the end, my friend