[14:44:03.367] <TB0> INFO: *** Welcome to pxar ***
[14:44:03.367] <TB0> INFO: *** Today: 2015/07/08
[14:44:03.367] <TB0> INFO: readRocDacs: /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C15.dat
[14:44:03.368] <TB0> INFO: readTbmDacs: /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//tbmParameters_C0b.dat
[14:44:03.368] <TB0> INFO: readMaskFile: /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//defaultMaskFile.dat
[14:44:03.368] <TB0> INFO: readTrimFile: /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters_C15.dat
[14:44:03.434] <TB0> INFO: clk: 4
[14:44:03.434] <TB0> INFO: ctr: 4
[14:44:03.434] <TB0> INFO: sda: 19
[14:44:03.434] <TB0> INFO: tin: 9
[14:44:03.434] <TB0> INFO: level: 15
[14:44:03.434] <TB0> INFO: triggerdelay: 0
[14:44:03.434] <TB0> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[14:44:03.434] <TB0> INFO: Log level: INFO
[14:44:03.442] <TB0> INFO: Found DTB DTB_WWVASW
[14:44:03.451] <TB0> QUIET: Connection to board DTB_WWVASW opened.
[14:44:03.454] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[14:44:03.457] <TB0> INFO: RPC call hashes of host and DTB match: 447413373
[14:44:04.995] <TB0> INFO: DUT info:
[14:44:04.995] <TB0> INFO: The DUT currently contains the following objects:
[14:44:04.995] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:44:04.995] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:44:04.995] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:44:04.995] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[14:44:04.995] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:04.995] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:04.995] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:04.995] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:04.995] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:04.995] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:04.995] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:04.995] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:04.995] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:04.995] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:04.995] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:04.995] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:04.995] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:04.995] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:04.995] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:04.995] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[14:44:05.396] <TB0> INFO: enter 'restricted' command line mode
[14:44:05.396] <TB0> INFO: enter test to run
[14:44:05.396] <TB0> INFO: test: pretest no parameter change
[14:44:05.396] <TB0> INFO: running: pretest
[14:44:05.400] <TB0> INFO: ######################################################################
[14:44:05.400] <TB0> INFO: PixTestPretest::doTest()
[14:44:05.400] <TB0> INFO: ######################################################################
[14:44:05.402] <TB0> INFO: ----------------------------------------------------------------------
[14:44:05.402] <TB0> INFO: PixTestPretest::programROC()
[14:44:05.402] <TB0> INFO: ----------------------------------------------------------------------
[14:44:23.420] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[14:44:23.420] <TB0> INFO: IA differences per ROC: 19.3 17.7 20.9 18.5 20.1 21.7 16.1 19.3 19.3 18.5 19.3 19.3 17.7 18.5 19.3 22.5
[14:44:23.503] <TB0> INFO: ----------------------------------------------------------------------
[14:44:23.503] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[14:44:23.503] <TB0> INFO: ----------------------------------------------------------------------
[14:44:29.893] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 381 mA = 23.8125 mA/ROC
[14:44:29.896] <TB0> INFO: ----------------------------------------------------------------------
[14:44:29.896] <TB0> INFO: PixTestPretest::findWorkingPixel()
[14:44:29.896] <TB0> INFO: ----------------------------------------------------------------------
[14:44:38.200] <TB0> INFO: Test took 8298ms.
[14:44:38.503] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[14:44:38.534] <TB0> INFO: ----------------------------------------------------------------------
[14:44:38.534] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[14:44:38.534] <TB0> INFO: ----------------------------------------------------------------------
[14:44:46.793] <TB0> INFO: Test took 8251ms.
[14:44:47.100] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[14:44:47.100] <TB0> INFO: CalDel: 119 131 129 121 119 128 119 138 138 123 127 125 122 124 114 123
[14:44:47.100] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[14:44:47.104] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C0.dat
[14:44:47.104] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C1.dat
[14:44:47.105] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C2.dat
[14:44:47.105] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C3.dat
[14:44:47.105] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C4.dat
[14:44:47.106] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C5.dat
[14:44:47.106] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C6.dat
[14:44:47.106] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C7.dat
[14:44:47.107] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C8.dat
[14:44:47.107] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C9.dat
[14:44:47.107] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C10.dat
[14:44:47.107] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C11.dat
[14:44:47.108] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C12.dat
[14:44:47.108] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C13.dat
[14:44:47.108] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C14.dat
[14:44:47.109] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters_C15.dat
[14:44:47.109] <TB0> INFO: PixTestPretest::doTest() done, duration: 41 seconds
[14:44:47.199] <TB0> INFO: enter test to run
[14:44:47.199] <TB0> INFO: test: fulltest no parameter change
[14:44:47.199] <TB0> INFO: running: fulltest
[14:44:47.199] <TB0> INFO: ######################################################################
[14:44:47.199] <TB0> INFO: PixTestFullTest::doTest()
[14:44:47.199] <TB0> INFO: ######################################################################
[14:44:47.200] <TB0> INFO: ######################################################################
[14:44:47.200] <TB0> INFO: PixTestAlive::doTest()
[14:44:47.200] <TB0> INFO: ######################################################################
[14:44:47.202] <TB0> INFO: ----------------------------------------------------------------------
[14:44:47.202] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:44:47.202] <TB0> INFO: ----------------------------------------------------------------------
[14:44:50.650] <TB0> INFO: Test took 3447ms.
[14:44:50.674] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:50.895] <TB0> INFO: PixTestAlive::aliveTest() done
[14:44:50.895] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0
[14:44:50.897] <TB0> INFO: ----------------------------------------------------------------------
[14:44:50.897] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:44:50.897] <TB0> INFO: ----------------------------------------------------------------------
[14:44:53.604] <TB0> INFO: Test took 2705ms.
[14:44:53.607] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:53.608] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:44:53.838] <TB0> INFO: PixTestAlive::maskTest() done
[14:44:53.838] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:44:53.839] <TB0> INFO: ----------------------------------------------------------------------
[14:44:53.839] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:44:53.839] <TB0> INFO: ----------------------------------------------------------------------
[14:44:57.258] <TB0> INFO: Test took 3417ms.
[14:44:57.276] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:57.508] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[14:44:57.508] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:44:57.508] <TB0> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[14:44:57.517] <TB0> INFO: ######################################################################
[14:44:57.517] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[14:44:57.517] <TB0> INFO: ######################################################################
[14:44:57.522] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[14:44:57.536] <TB0> INFO: dacScan step from 0 .. 29
[14:45:18.720] <TB0> INFO: Test took 21184ms.
[14:45:18.748] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:18.748] <TB0> INFO: dacScan step from 30 .. 59
[14:45:41.954] <TB0> INFO: Test took 23206ms.
[14:45:42.044] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:42.073] <TB0> INFO: dacScan step from 60 .. 89
[14:46:11.055] <TB0> INFO: Test took 28982ms.
[14:46:11.369] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:11.456] <TB0> INFO: dacScan step from 90 .. 119




[14:46:40.466] <TB0> INFO: Test took 29010ms.
[14:46:40.742] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:40.818] <TB0> INFO: dacScan step from 120 .. 149
[14:47:05.851] <TB0> INFO: Test took 25033ms.
[14:47:06.036] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:32.747] <TB0> INFO: PixTestBBMap::doTest() done, duration: 155 seconds
[14:47:32.747] <TB0> INFO: number of dead bumps (per ROC): 0 0 1 1 18 0 0 16 1 1 1 0 0 0 1 3
[14:47:32.747] <TB0> INFO: separation cut (per ROC): 82 70 87 87 73 73 83 73 93 80 83 68 88 69 80 85
[14:47:32.818] <TB0> INFO: ######################################################################
[14:47:32.818] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50
[14:47:32.818] <TB0> INFO: ######################################################################
[14:47:32.818] <TB0> INFO: ----------------------------------------------------------------------
[14:47:32.818] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[14:47:32.818] <TB0> INFO: ----------------------------------------------------------------------
[14:47:32.818] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[14:47:32.826] <TB0> INFO: dacScan step from 0 .. 3






[14:47:50.323] <TB0> INFO: Test took 17497ms.
[14:47:50.349] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:50.349] <TB0> INFO: dacScan step from 4 .. 7
[14:48:07.632] <TB0> INFO: Test took 17283ms.
[14:48:07.656] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:07.660] <TB0> INFO: dacScan step from 8 .. 11
[14:48:25.570] <TB0> INFO: Test took 17910ms.
[14:48:25.595] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:25.595] <TB0> INFO: dacScan step from 12 .. 15
[14:48:44.331] <TB0> INFO: Test took 18735ms.
[14:48:44.358] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:44.358] <TB0> INFO: dacScan step from 16 .. 19
[14:49:03.179] <TB0> INFO: Test took 18821ms.
[14:49:03.211] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:03.211] <TB0> INFO: dacScan step from 20 .. 23
[14:49:22.036] <TB0> INFO: Test took 18825ms.
[14:49:22.061] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:22.063] <TB0> INFO: dacScan step from 24 .. 27
[14:49:40.855] <TB0> INFO: Test took 18792ms.
[14:49:40.884] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:40.884] <TB0> INFO: dacScan step from 28 .. 31
[14:49:59.650] <TB0> INFO: Test took 18766ms.
[14:49:59.680] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:59.680] <TB0> INFO: dacScan step from 32 .. 35
[14:50:18.434] <TB0> INFO: Test took 18754ms.
[14:50:18.463] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:18.463] <TB0> INFO: dacScan step from 36 .. 39
[14:50:37.305] <TB0> INFO: Test took 18842ms.
[14:50:37.332] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:37.332] <TB0> INFO: dacScan step from 40 .. 43
[14:50:56.308] <TB0> INFO: Test took 18976ms.
[14:50:56.332] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:56.332] <TB0> INFO: dacScan step from 44 .. 47
[14:51:15.197] <TB0> INFO: Test took 18865ms.
[14:51:15.222] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:15.222] <TB0> INFO: dacScan step from 48 .. 51
[14:51:33.989] <TB0> INFO: Test took 18767ms.
[14:51:34.012] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:34.012] <TB0> INFO: dacScan step from 52 .. 55
[14:51:52.930] <TB0> INFO: Test took 18918ms.
[14:51:52.955] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:52.956] <TB0> INFO: dacScan step from 56 .. 59
[14:52:11.765] <TB0> INFO: Test took 18809ms.
[14:52:11.792] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:11.793] <TB0> INFO: dacScan step from 60 .. 63
[14:52:30.673] <TB0> INFO: Test took 18880ms.
[14:52:30.703] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:30.704] <TB0> INFO: dacScan step from 64 .. 67
[14:52:49.535] <TB0> INFO: Test took 18831ms.
[14:52:49.566] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:49.567] <TB0> INFO: dacScan step from 68 .. 71
[14:53:08.500] <TB0> INFO: Test took 18933ms.
[14:53:08.534] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:08.535] <TB0> INFO: dacScan step from 72 .. 75
[14:53:27.856] <TB0> INFO: Test took 19321ms.
[14:53:27.901] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:27.902] <TB0> INFO: dacScan step from 76 .. 79



[14:53:48.064] <TB0> INFO: Test took 20162ms.
[14:53:48.136] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:48.138] <TB0> INFO: dacScan step from 80 .. 83
[14:54:10.292] <TB0> INFO: Test took 22154ms.
[14:54:10.406] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:10.412] <TB0> INFO: dacScan step from 84 .. 87
[14:54:34.260] <TB0> INFO: Test took 23848ms.
[14:54:34.407] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:34.414] <TB0> INFO: dacScan step from 88 .. 91
[14:54:59.822] <TB0> INFO: Test took 25408ms.
[14:55:00.038] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:00.050] <TB0> INFO: dacScan step from 92 .. 95
[14:55:27.250] <TB0> INFO: Test took 27200ms.
[14:55:27.508] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:27.521] <TB0> INFO: dacScan step from 96 .. 99
[14:55:55.826] <TB0> INFO: Test took 28304ms.
[14:55:56.073] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:56.085] <TB0> INFO: dacScan step from 100 .. 103



[14:56:24.977] <TB0> INFO: Test took 28892ms.
[14:56:25.201] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:25.212] <TB0> INFO: dacScan step from 104 .. 107



[14:56:54.409] <TB0> INFO: Test took 29197ms.
[14:56:54.650] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:54.663] <TB0> INFO: dacScan step from 108 .. 111



[14:57:23.957] <TB0> INFO: Test took 29294ms.
[14:57:24.190] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:24.201] <TB0> INFO: dacScan step from 112 .. 115



[14:57:53.119] <TB0> INFO: Test took 28918ms.
[14:57:53.374] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:53.386] <TB0> INFO: dacScan step from 116 .. 119



[14:58:22.491] <TB0> INFO: Test took 29105ms.
[14:58:22.716] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:22.727] <TB0> INFO: dacScan step from 120 .. 123






[14:58:51.807] <TB0> INFO: Test took 29080ms.
[14:58:52.044] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:52.055] <TB0> INFO: dacScan step from 124 .. 127
[14:59:21.189] <TB0> INFO: Test took 29133ms.
[14:59:21.420] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:21.433] <TB0> INFO: dacScan step from 128 .. 131









[15:00:19.303] <TB0> INFO: Test took 28836ms.
[15:00:19.526] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:19.539] <TB0> INFO: dacScan step from 132 .. 135
[15:00:48.367] <TB0> INFO: Test took 28828ms.
[15:00:48.643] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:48.656] <TB0> INFO: dacScan step from 136 .. 139
[15:01:17.632] <TB0> INFO: Test took 28977ms.
[15:01:17.871] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:17.885] <TB0> INFO: dacScan step from 140 .. 143
[15:01:46.876] <TB0> INFO: Test took 28991ms.
[15:01:47.109] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:47.120] <TB0> INFO: dacScan step from 144 .. 147
[15:02:16.240] <TB0> INFO: Test took 29119ms.
[15:02:16.458] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:16.468] <TB0> INFO: dacScan step from 148 .. 149
[15:02:31.065] <TB0> INFO: Test took 14597ms.
[15:02:31.264] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:31.274] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:33.002] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:34.568] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:36.067] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:37.604] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:39.265] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:40.716] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:42.162] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:43.621] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:45.089] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:46.599] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:48.057] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:49.580] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:51.143] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:52.871] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:54.452] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[15:02:56.244] <TB0> INFO: PixTestScurves::scurves() done
[15:02:56.244] <TB0> INFO: Vcal mean: 90.63 77.05 91.18 94.77 80.47 84.33 91.53 91.70 103.13 89.16 92.99 79.93 96.41 87.15 83.30 89.44
[15:02:56.244] <TB0> INFO: Vcal RMS: 4.93 3.86 6.66 6.28 4.30 5.00 5.01 5.35 5.40 5.19 5.64 4.21 6.09 5.31 4.34 4.91
[15:02:56.245] <TB0> INFO: PixTestScurves::fullTest() done, duration: 923 seconds
[15:02:56.333] <TB0> INFO: ######################################################################
[15:02:56.333] <TB0> INFO: PixTestTrim::doTest()
[15:02:56.333] <TB0> INFO: ######################################################################
[15:02:56.334] <TB0> INFO: ----------------------------------------------------------------------
[15:02:56.334] <TB0> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[15:02:56.334] <TB0> INFO: ----------------------------------------------------------------------
[15:02:56.442] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[15:02:56.442] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[15:02:56.452] <TB0> INFO: dacScan step from 0 .. 19
[15:03:11.595] <TB0> INFO: Test took 15143ms.
[15:03:11.618] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:11.618] <TB0> INFO: dacScan step from 20 .. 39
[15:03:26.649] <TB0> INFO: Test took 15031ms.
[15:03:26.678] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:26.678] <TB0> INFO: dacScan step from 40 .. 59
[15:03:41.790] <TB0> INFO: Test took 15112ms.
[15:03:41.816] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:41.816] <TB0> INFO: dacScan step from 60 .. 79
[15:03:56.930] <TB0> INFO: Test took 15114ms.
[15:03:56.958] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:56.958] <TB0> INFO: dacScan step from 80 .. 99
[15:04:12.855] <TB0> INFO: Test took 15897ms.
[15:04:12.937] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:04:12.951] <TB0> INFO: dacScan step from 100 .. 119
[15:04:32.043] <TB0> INFO: Test took 19092ms.
[15:04:32.259] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:04:32.297] <TB0> INFO: dacScan step from 120 .. 139
[15:04:50.469] <TB0> INFO: Test took 18172ms.
[15:04:50.660] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:04:50.692] <TB0> INFO: dacScan step from 140 .. 159
[15:05:05.668] <TB0> INFO: Test took 14976ms.
[15:05:05.733] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:28.085] <TB0> INFO: ROC 0 VthrComp = 95
[15:05:28.085] <TB0> INFO: ROC 1 VthrComp = 79
[15:05:28.085] <TB0> INFO: ROC 2 VthrComp = 92
[15:05:28.086] <TB0> INFO: ROC 3 VthrComp = 92
[15:05:28.086] <TB0> INFO: ROC 4 VthrComp = 83
[15:05:28.086] <TB0> INFO: ROC 5 VthrComp = 89
[15:05:28.086] <TB0> INFO: ROC 6 VthrComp = 92
[15:05:28.086] <TB0> INFO: ROC 7 VthrComp = 95
[15:05:28.086] <TB0> INFO: ROC 8 VthrComp = 102
[15:05:28.086] <TB0> INFO: ROC 9 VthrComp = 90
[15:05:28.087] <TB0> INFO: ROC 10 VthrComp = 94
[15:05:28.087] <TB0> INFO: ROC 11 VthrComp = 82
[15:05:28.087] <TB0> INFO: ROC 12 VthrComp = 94
[15:05:28.087] <TB0> INFO: ROC 13 VthrComp = 89
[15:05:28.087] <TB0> INFO: ROC 14 VthrComp = 86
[15:05:28.087] <TB0> INFO: ROC 15 VthrComp = 95
[15:05:28.088] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[15:05:28.088] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[15:05:28.096] <TB0> INFO: dacScan step from 0 .. 19
[15:05:42.449] <TB0> INFO: Test took 14353ms.
[15:05:42.470] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:42.470] <TB0> INFO: dacScan step from 20 .. 39
[15:05:56.898] <TB0> INFO: Test took 14428ms.
[15:05:56.930] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:56.933] <TB0> INFO: dacScan step from 40 .. 59
[15:06:15.578] <TB0> INFO: Test took 18645ms.
[15:06:15.758] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:15.799] <TB0> INFO: dacScan step from 60 .. 79
[15:06:35.814] <TB0> INFO: Test took 20015ms.
[15:06:36.001] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:36.048] <TB0> INFO: dacScan step from 80 .. 99
[15:06:56.060] <TB0> INFO: Test took 20011ms.
[15:06:56.239] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:56.294] <TB0> INFO: dacScan step from 100 .. 119
[15:07:16.276] <TB0> INFO: Test took 19982ms.
[15:07:16.443] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:16.496] <TB0> INFO: dacScan step from 120 .. 139
[15:07:36.358] <TB0> INFO: Test took 19862ms.
[15:07:36.568] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:36.620] <TB0> INFO: dacScan step from 140 .. 159
[15:07:55.934] <TB0> INFO: Test took 19313ms.
[15:07:56.147] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:22.329] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 56.5653 for pixel 23/16 mean/min/max = 44.4392/32.2736/56.6048
[15:08:22.329] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 57.2244 for pixel 24/55 mean/min/max = 46.6439/35.9274/57.3603
[15:08:22.329] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 63.9391 for pixel 0/57 mean/min/max = 47.7869/31.4739/64.1
[15:08:22.330] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 62.3121 for pixel 4/13 mean/min/max = 47.4381/32.5134/62.3627
[15:08:22.330] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 57.3497 for pixel 1/9 mean/min/max = 44.8698/32.3854/57.3542
[15:08:22.330] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 58.3579 for pixel 0/70 mean/min/max = 46.0126/33.6489/58.3763
[15:08:22.331] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 57.4355 for pixel 7/21 mean/min/max = 45.772/33.9907/57.5533
[15:08:22.331] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 57.0981 for pixel 4/20 mean/min/max = 44.3374/31.3979/57.2769
[15:08:22.331] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 57.6777 for pixel 1/78 mean/min/max = 45.4271/32.8309/58.0233
[15:08:22.331] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 59.3099 for pixel 4/2 mean/min/max = 46.8108/34.2641/59.3575
[15:08:22.332] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 59.1267 for pixel 27/79 mean/min/max = 45.8057/32.3521/59.2593
[15:08:22.332] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 57.2033 for pixel 0/3 mean/min/max = 45.0161/32.7464/57.2858
[15:08:22.332] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 62.199 for pixel 0/3 mean/min/max = 47.6279/33.017/62.2387
[15:08:22.332] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 58.9341 for pixel 1/77 mean/min/max = 46.2954/33.5671/59.0238
[15:08:22.332] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 56.968 for pixel 48/11 mean/min/max = 45.0639/32.8656/57.2623
[15:08:22.333] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 56.3523 for pixel 51/68 mean/min/max = 44.6964/32.898/56.4947
[15:08:22.333] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.














[15:09:54.923] <TB0> INFO: Test took 92590ms.
[15:09:56.653] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[15:09:56.662] <TB0> INFO: dacScan step from 0 .. 19
[15:10:19.300] <TB0> INFO: Test took 22637ms.
[15:10:19.350] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:19.351] <TB0> INFO: dacScan step from 20 .. 39
[15:10:47.410] <TB0> INFO: Test took 28059ms.
[15:10:47.694] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:47.724] <TB0> INFO: dacScan step from 40 .. 59
[15:11:20.574] <TB0> INFO: Test took 32849ms.
[15:11:20.860] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:20.911] <TB0> INFO: dacScan step from 60 .. 79



[15:11:52.926] <TB0> INFO: Test took 32015ms.
[15:11:53.229] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:53.282] <TB0> INFO: dacScan step from 80 .. 99



[15:12:24.834] <TB0> INFO: Test took 31552ms.
[15:12:25.119] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:25.186] <TB0> INFO: dacScan step from 100 .. 119


[15:12:58.160] <TB0> INFO: Test took 32974ms.
[15:12:58.490] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:58.551] <TB0> INFO: dacScan step from 120 .. 139




[15:13:31.378] <TB0> INFO: Test took 32827ms.
[15:13:31.668] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:31.717] <TB0> INFO: dacScan step from 140 .. 159



[15:14:04.396] <TB0> INFO: Test took 32679ms.
[15:14:04.714] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:04.774] <TB0> INFO: dacScan step from 160 .. 179
[15:14:37.962] <TB0> INFO: Test took 33188ms.
[15:14:38.249] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:14:38.304] <TB0> INFO: dacScan step from 180 .. 199












[15:15:11.960] <TB0> INFO: Test took 33656ms.
[15:15:12.411] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:39.348] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.126693 .. 255.000000
[15:15:39.428] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[15:15:39.436] <TB0> INFO: dacScan step from 0 .. 19
[15:15:52.916] <TB0> INFO: Test took 13480ms.
[15:15:52.939] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:15:52.939] <TB0> INFO: dacScan step from 20 .. 39
[15:16:07.772] <TB0> INFO: Test took 14833ms.
[15:16:07.865] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:16:07.882] <TB0> INFO: dacScan step from 40 .. 59
[15:16:25.386] <TB0> INFO: Test took 17504ms.
[15:16:25.539] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:16:25.586] <TB0> INFO: dacScan step from 60 .. 79
[15:16:43.182] <TB0> INFO: Test took 17596ms.
[15:16:43.334] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:16:43.388] <TB0> INFO: dacScan step from 80 .. 99
[15:17:00.909] <TB0> INFO: Test took 17521ms.
[15:17:01.083] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:17:01.137] <TB0> INFO: dacScan step from 100 .. 119
[15:17:18.766] <TB0> INFO: Test took 17629ms.
[15:17:18.912] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:17:18.971] <TB0> INFO: dacScan step from 120 .. 139
[15:17:36.542] <TB0> INFO: Test took 17571ms.
[15:17:36.682] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:17:36.734] <TB0> INFO: dacScan step from 140 .. 159
[15:17:54.301] <TB0> INFO: Test took 17567ms.
[15:17:54.523] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:17:54.585] <TB0> INFO: dacScan step from 160 .. 179
[15:18:12.281] <TB0> INFO: Test took 17696ms.
[15:18:12.430] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:18:12.481] <TB0> INFO: dacScan step from 180 .. 199
[15:18:31.000] <TB0> INFO: Test took 18519ms.
[15:18:31.159] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:18:31.214] <TB0> INFO: dacScan step from 200 .. 219
[15:18:48.901] <TB0> INFO: Test took 17687ms.
[15:18:49.048] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:18:49.115] <TB0> INFO: dacScan step from 220 .. 239
[15:19:06.673] <TB0> INFO: Test took 17558ms.
[15:19:06.841] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:19:06.906] <TB0> INFO: dacScan step from 240 .. 255
[15:19:21.546] <TB0> INFO: Test took 14640ms.
[15:19:21.671] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:19:54.725] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 15.500003 .. 50.432096
[15:19:54.808] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 5 .. 60 (20) hits flags = 16 (plus default)
[15:19:54.816] <TB0> INFO: dacScan step from 5 .. 24
[15:20:08.349] <TB0> INFO: Test took 13532ms.
[15:20:08.373] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:20:08.373] <TB0> INFO: dacScan step from 25 .. 44
[15:20:23.197] <TB0> INFO: Test took 14823ms.
[15:20:23.314] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:20:23.345] <TB0> INFO: dacScan step from 45 .. 60
[15:20:37.129] <TB0> INFO: Test took 13784ms.
[15:20:37.309] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:20:55.914] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 1.461450 .. 46.115470
[15:20:56.001] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 1 .. 56 (20) hits flags = 16 (plus default)
[15:20:56.011] <TB0> INFO: dacScan step from 1 .. 20
[15:21:09.449] <TB0> INFO: Test took 13438ms.
[15:21:09.474] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:09.474] <TB0> INFO: dacScan step from 21 .. 40
[15:21:24.264] <TB0> INFO: Test took 14790ms.
[15:21:24.350] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:24.372] <TB0> INFO: dacScan step from 41 .. 56
[15:21:38.350] <TB0> INFO: Test took 13978ms.
[15:21:38.462] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:21:55.603] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 2.200277 .. 45.962230
[15:21:55.682] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 2 .. 55 (20) hits flags = 16 (plus default)
[15:21:55.690] <TB0> INFO: dacScan step from 2 .. 21
[15:22:09.185] <TB0> INFO: Test took 13495ms.
[15:22:09.206] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:09.206] <TB0> INFO: dacScan step from 22 .. 41
[15:22:24.112] <TB0> INFO: Test took 14906ms.
[15:22:24.202] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:24.224] <TB0> INFO: dacScan step from 42 .. 55
[15:22:36.690] <TB0> INFO: Test took 12466ms.
[15:22:36.793] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:22:52.590] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[15:22:52.590] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[15:22:52.598] <TB0> INFO: dacScan step from 15 .. 34
[15:23:15.790] <TB0> INFO: Test took 23192ms.
[15:23:15.863] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:15.872] <TB0> INFO: dacScan step from 35 .. 54
[15:23:47.536] <TB0> INFO: Test took 31663ms.
[15:23:47.901] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:23:47.967] <TB0> INFO: dacScan step from 55 .. 55
[15:23:52.173] <TB0> INFO: Test took 4206ms.
[15:23:52.192] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:06.249] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C0.dat
[15:24:06.250] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C1.dat
[15:24:06.250] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C2.dat
[15:24:06.250] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C3.dat
[15:24:06.250] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C4.dat
[15:24:06.250] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C5.dat
[15:24:06.250] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C6.dat
[15:24:06.250] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C7.dat
[15:24:06.250] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C8.dat
[15:24:06.250] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C9.dat
[15:24:06.251] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C10.dat
[15:24:06.251] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C11.dat
[15:24:06.251] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C12.dat
[15:24:06.251] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C13.dat
[15:24:06.251] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C14.dat
[15:24:06.251] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C15.dat
[15:24:06.251] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C0.dat
[15:24:06.258] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C1.dat
[15:24:06.264] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C2.dat
[15:24:06.270] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C3.dat
[15:24:06.276] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C4.dat
[15:24:06.282] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C5.dat
[15:24:06.289] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C6.dat
[15:24:06.295] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C7.dat
[15:24:06.302] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C8.dat
[15:24:06.308] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C9.dat
[15:24:06.314] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C10.dat
[15:24:06.321] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C11.dat
[15:24:06.327] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C12.dat
[15:24:06.333] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C13.dat
[15:24:06.339] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C14.dat
[15:24:06.345] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//trimParameters35_C15.dat
[15:24:06.351] <TB0> INFO: PixTestTrim::trimTest() done
[15:24:06.351] <TB0> INFO: vtrim: 103 101 125 104 107 96 103 108 109 115 107 98 113 115 102 98
[15:24:06.351] <TB0> INFO: vthrcomp: 95 79 92 92 83 89 92 95 102 90 94 82 94 89 86 95
[15:24:06.351] <TB0> INFO: vcal mean: 35.13 35.14 35.13 35.04 35.10 35.11 35.14 35.10 35.05 35.03 34.87 35.10 35.20 35.14 35.07 35.04
[15:24:06.351] <TB0> INFO: vcal RMS: 1.07 1.03 1.11 1.46 1.07 0.97 1.18 1.13 1.04 1.08 1.05 1.05 1.16 1.09 1.00 1.13
[15:24:06.351] <TB0> INFO: bits mean: 10.09 9.30 9.35 9.50 10.14 9.03 10.01 10.43 9.98 9.71 9.42 9.82 9.64 9.81 9.79 9.57
[15:24:06.351] <TB0> INFO: bits RMS: 2.51 2.28 2.76 2.55 2.43 2.72 2.30 2.47 2.44 2.26 2.75 2.56 2.44 2.38 2.59 2.65
[15:24:06.356] <TB0> INFO: ----------------------------------------------------------------------
[15:24:06.356] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 240 150 100
[15:24:06.356] <TB0> INFO: ----------------------------------------------------------------------
[15:24:06.358] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[15:24:06.366] <TB0> INFO: dacScan step from 0 .. 19
[15:24:28.907] <TB0> INFO: Test took 22541ms.
[15:24:28.949] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:28.949] <TB0> INFO: dacScan step from 20 .. 39
[15:24:50.360] <TB0> INFO: Test took 21411ms.
[15:24:50.412] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:24:50.417] <TB0> INFO: dacScan step from 40 .. 59
[15:25:20.561] <TB0> INFO: Test took 30144ms.
[15:25:20.830] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:20.870] <TB0> INFO: dacScan step from 60 .. 79




[15:25:53.831] <TB0> INFO: Test took 32961ms.
[15:25:54.123] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:25:54.178] <TB0> INFO: dacScan step from 80 .. 99
[15:26:25.173] <TB0> INFO: Test took 30995ms.
[15:26:25.444] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:25.497] <TB0> INFO: dacScan step from 100 .. 119
[15:26:58.171] <TB0> INFO: Test took 32674ms.
[15:26:58.447] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:26:58.495] <TB0> INFO: dacScan step from 120 .. 139
[15:27:31.096] <TB0> INFO: Test took 32601ms.
[15:27:31.377] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:27:31.436] <TB0> INFO: dacScan step from 140 .. 159
[15:28:04.030] <TB0> INFO: Test took 32594ms.
[15:28:04.298] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:04.344] <TB0> INFO: dacScan step from 160 .. 179
[15:28:37.036] <TB0> INFO: Test took 32692ms.
[15:28:37.350] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:28:37.393] <TB0> INFO: dacScan step from 180 .. 199
[15:29:10.543] <TB0> INFO: Test took 33150ms.
[15:29:10.804] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:37.208] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 90 (20) hits flags = 16 (plus default)
[15:29:37.216] <TB0> INFO: dacScan step from 0 .. 19
[15:29:59.659] <TB0> INFO: Test took 22443ms.
[15:29:59.693] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:29:59.693] <TB0> INFO: dacScan step from 20 .. 39
[15:30:23.457] <TB0> INFO: Test took 23764ms.
[15:30:23.548] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:30:23.559] <TB0> INFO: dacScan step from 40 .. 59
[15:30:55.505] <TB0> INFO: Test took 31945ms.
[15:30:55.859] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:30:55.909] <TB0> INFO: dacScan step from 60 .. 79


[15:31:28.781] <TB0> INFO: Test took 32872ms.
[15:31:29.095] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:31:29.151] <TB0> INFO: dacScan step from 80 .. 90
[15:31:46.858] <TB0> INFO: Test took 17706ms.
[15:31:47.005] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:32:04.856] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 85 (20) hits flags = 16 (plus default)
[15:32:04.864] <TB0> INFO: dacScan step from 0 .. 19
[15:32:26.338] <TB0> INFO: Test took 21472ms.
[15:32:26.375] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:32:26.375] <TB0> INFO: dacScan step from 20 .. 39
[15:32:50.300] <TB0> INFO: Test took 23925ms.
[15:32:50.461] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:32:50.481] <TB0> INFO: dacScan step from 40 .. 59


[15:33:22.846] <TB0> INFO: Test took 32365ms.
[15:33:23.139] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:33:23.197] <TB0> INFO: dacScan step from 60 .. 79
[15:33:55.281] <TB0> INFO: Test took 32084ms.
[15:33:55.713] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:33:55.764] <TB0> INFO: dacScan step from 80 .. 85
[15:34:06.666] <TB0> INFO: Test took 10902ms.
[15:34:06.753] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:34:24.172] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 79 (20) hits flags = 16 (plus default)
[15:34:24.180] <TB0> INFO: dacScan step from 0 .. 19
[15:34:46.879] <TB0> INFO: Test took 22695ms.
[15:34:46.920] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:34:46.921] <TB0> INFO: dacScan step from 20 .. 39
[15:35:11.863] <TB0> INFO: Test took 24942ms.
[15:35:12.025] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:35:12.048] <TB0> INFO: dacScan step from 40 .. 59



[15:35:44.733] <TB0> INFO: Test took 32685ms.
[15:35:45.037] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:35:45.089] <TB0> INFO: dacScan step from 60 .. 79
[15:36:15.802] <TB0> INFO: Test took 30713ms.
[15:36:16.065] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:36:32.370] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 71 (20) hits flags = 16 (plus default)
[15:36:32.378] <TB0> INFO: dacScan step from 0 .. 19
[15:36:55.037] <TB0> INFO: Test took 22659ms.
[15:36:55.086] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:36:55.087] <TB0> INFO: dacScan step from 20 .. 39
[15:37:22.928] <TB0> INFO: Test took 27841ms.
[15:37:23.145] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:23.177] <TB0> INFO: dacScan step from 40 .. 59




[15:37:54.358] <TB0> INFO: Test took 31181ms.
[15:37:54.682] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:37:54.754] <TB0> INFO: dacScan step from 60 .. 71
[15:38:14.429] <TB0> INFO: Test took 19674ms.
[15:38:14.596] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:38:32.027] <TB0> INFO: PixTestTrim::trimBitTest() done
[15:38:32.028] <TB0> INFO: PixTestTrim::doTest() done, duration: 2135 seconds
[15:38:32.746] <TB0> INFO: ######################################################################
[15:38:32.746] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[15:38:32.746] <TB0> INFO: ######################################################################
[15:38:36.197] <TB0> INFO: Test took 3449ms.
[15:38:36.222] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:38:39.825] <TB0> INFO: Test took 3406ms.
[15:38:39.896] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:38:43.337] <TB0> INFO: Test took 3430ms.
[15:38:43.409] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:38:43.416] <TB0> INFO: The DUT currently contains the following objects:
[15:38:43.416] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:38:43.416] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:38:43.416] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:38:43.416] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:38:43.416] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:43.416] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:43.416] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:43.416] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:43.416] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:43.416] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:43.416] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:43.416] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:43.416] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:43.416] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:43.416] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:43.416] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:43.416] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:43.416] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:43.416] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:43.416] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:44.525] <TB0> INFO: Test took 1109ms.
[15:38:44.526] <TB0> INFO: The DUT currently contains the following objects:
[15:38:44.526] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:38:44.526] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:38:44.526] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:38:44.526] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:38:44.526] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:44.526] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:44.526] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:44.526] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:44.526] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:44.526] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:44.526] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:44.526] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:44.526] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:44.526] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:44.526] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:44.526] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:44.526] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:44.526] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:44.526] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:44.526] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:45.634] <TB0> INFO: Test took 1108ms.
[15:38:45.635] <TB0> INFO: The DUT currently contains the following objects:
[15:38:45.636] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:38:45.636] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:38:45.636] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:38:45.636] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:38:45.636] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:45.636] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:45.636] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:45.636] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:45.636] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:45.636] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:45.636] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:45.636] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:45.636] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:45.636] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:45.636] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:45.636] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:45.636] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:45.636] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:45.636] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:45.636] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:46.744] <TB0> INFO: Test took 1108ms.
[15:38:46.746] <TB0> INFO: The DUT currently contains the following objects:
[15:38:46.746] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:38:46.746] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:38:46.746] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:38:46.746] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:38:46.746] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:46.746] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:46.746] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:46.746] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:46.746] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:46.746] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:46.746] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:46.746] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:46.746] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:46.746] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:46.746] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:46.747] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:46.747] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:46.747] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:46.747] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:46.747] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:47.854] <TB0> INFO: Test took 1107ms.
[15:38:47.855] <TB0> INFO: The DUT currently contains the following objects:
[15:38:47.855] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:38:47.855] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:38:47.855] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:38:47.855] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:38:47.855] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:47.855] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:47.855] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:47.855] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:47.855] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:47.855] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:47.855] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:47.855] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:47.855] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:47.855] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:47.855] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:47.855] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:47.855] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:47.855] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:47.855] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:47.855] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:48.961] <TB0> INFO: Test took 1106ms.
[15:38:48.961] <TB0> INFO: The DUT currently contains the following objects:
[15:38:48.961] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:38:48.961] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:38:48.961] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:38:48.961] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:38:48.961] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:48.961] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:48.961] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:48.961] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:48.961] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:48.961] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:48.961] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:48.961] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:48.962] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:48.962] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:48.962] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:48.962] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:48.962] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:48.962] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:48.962] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:48.962] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:50.069] <TB0> INFO: Test took 1107ms.
[15:38:50.071] <TB0> INFO: The DUT currently contains the following objects:
[15:38:50.071] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:38:50.071] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:38:50.071] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:38:50.071] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:38:50.071] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:50.071] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:50.071] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:50.071] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:50.071] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:50.071] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:50.071] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:50.071] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:50.071] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:50.071] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:50.071] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:50.071] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:50.072] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:50.072] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:50.072] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:50.072] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:51.177] <TB0> INFO: Test took 1105ms.
[15:38:51.178] <TB0> INFO: The DUT currently contains the following objects:
[15:38:51.178] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:38:51.178] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:38:51.178] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:38:51.178] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:38:51.178] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:51.178] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:51.178] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:51.178] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:51.179] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:51.179] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:51.179] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:51.179] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:51.179] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:51.179] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:51.179] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:51.179] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:51.179] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:51.179] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:51.179] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:51.179] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:52.286] <TB0> INFO: Test took 1107ms.
[15:38:52.288] <TB0> INFO: The DUT currently contains the following objects:
[15:38:52.288] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:38:52.288] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:38:52.288] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:38:52.288] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:38:52.288] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:52.289] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:52.289] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:52.289] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:52.289] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:52.289] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:52.289] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:52.289] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:52.289] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:52.289] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:52.289] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:52.289] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:52.289] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:52.289] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:52.289] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:52.289] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:53.398] <TB0> INFO: Test took 1109ms.
[15:38:53.400] <TB0> INFO: The DUT currently contains the following objects:
[15:38:53.400] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:38:53.400] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:38:53.400] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:38:53.400] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:38:53.400] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:53.400] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:53.400] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:53.400] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:53.400] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:53.400] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:53.400] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:53.400] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:53.400] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:53.400] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:53.400] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:53.400] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:53.400] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:53.400] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:53.400] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:53.400] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:54.507] <TB0> INFO: Test took 1107ms.
[15:38:54.508] <TB0> INFO: The DUT currently contains the following objects:
[15:38:54.508] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:38:54.508] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:38:54.508] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:38:54.508] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:38:54.508] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:54.508] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:54.508] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:54.508] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:54.508] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:54.508] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:54.508] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:54.508] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:54.508] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:54.508] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:54.508] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:54.508] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:54.508] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:54.508] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:54.508] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:54.509] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:55.616] <TB0> INFO: Test took 1107ms.
[15:38:55.618] <TB0> INFO: The DUT currently contains the following objects:
[15:38:55.618] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:38:55.618] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:38:55.618] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:38:55.618] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:38:55.618] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:55.618] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:55.618] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:55.618] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:55.618] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:55.618] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:55.618] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:55.618] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:55.618] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:55.618] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:55.618] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:55.618] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:55.618] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:55.618] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:55.618] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:55.618] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:56.727] <TB0> INFO: Test took 1109ms.
[15:38:56.728] <TB0> INFO: The DUT currently contains the following objects:
[15:38:56.728] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:38:56.728] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:38:56.728] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:38:56.728] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:38:56.728] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:56.728] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:56.728] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:56.728] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:56.728] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:56.729] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:56.729] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:56.729] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:56.729] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:56.729] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:56.729] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:56.729] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:56.729] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:56.729] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:56.729] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:56.729] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:57.838] <TB0> INFO: Test took 1109ms.
[15:38:57.839] <TB0> INFO: The DUT currently contains the following objects:
[15:38:57.839] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:38:57.839] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:38:57.839] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:38:57.839] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:38:57.839] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:57.839] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:57.839] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:57.839] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:57.839] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:57.839] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:57.839] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:57.839] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:57.840] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:57.840] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:57.840] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:57.840] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:57.840] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:57.840] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:57.840] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:57.840] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:58.947] <TB0> INFO: Test took 1107ms.
[15:38:58.948] <TB0> INFO: The DUT currently contains the following objects:
[15:38:58.948] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:38:58.948] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:38:58.948] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:38:58.948] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:38:58.948] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:58.948] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:58.948] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:58.948] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:58.949] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:58.949] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:58.949] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:58.949] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:58.949] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:58.949] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:58.949] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:58.949] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:58.949] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:58.949] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:58.949] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:38:58.949] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:00.056] <TB0> INFO: Test took 1107ms.
[15:39:00.057] <TB0> INFO: The DUT currently contains the following objects:
[15:39:00.057] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[15:39:00.057] <TB0> INFO: TBM Core alpha (0): 7 registers set
[15:39:00.057] <TB0> INFO: TBM Core beta (1): 7 registers set
[15:39:00.057] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:39:00.057] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:00.057] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:00.057] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:00.057] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:00.057] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:00.057] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:00.057] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:00.057] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:00.057] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:00.057] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:00.057] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:00.057] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:00.057] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:00.057] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:00.057] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:00.057] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:39:01.162] <TB0> INFO: Test took 1105ms.
[15:39:01.165] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.






[15:42:46.251] <TB0> INFO: Test took 225086ms.
[15:42:48.427] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:46:33.836] <TB0> INFO: Test took 225409ms.
[15:46:36.614] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:46:36.621] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:46:36.628] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[15:46:36.635] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:46:36.641] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:46:36.648] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:46:36.655] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:46:36.663] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[15:46:36.670] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[15:46:36.677] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[15:46:36.683] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[15:46:36.690] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[15:46:36.697] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:46:36.704] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[15:46:36.711] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:46:36.718] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:46:36.725] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:46:36.732] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:46:36.739] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:46:36.746] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:46:36.752] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:46:36.759] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[15:46:36.766] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[15:46:36.773] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[15:46:36.779] <TB0> INFO: safety margin for low PH: adding 4, margin is now 24
[15:46:36.786] <TB0> INFO: safety margin for low PH: adding 5, margin is now 25
[15:46:36.793] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:46:36.799] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[15:46:36.862] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C0.dat
[15:46:36.863] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C1.dat
[15:46:36.865] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C2.dat
[15:46:36.865] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C3.dat
[15:46:36.866] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C4.dat
[15:46:36.888] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C5.dat
[15:46:36.888] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C6.dat
[15:46:36.888] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C7.dat
[15:46:36.889] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C8.dat
[15:46:36.889] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C9.dat
[15:46:36.889] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C10.dat
[15:46:36.890] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C11.dat
[15:46:36.890] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C12.dat
[15:46:36.891] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C13.dat
[15:46:36.891] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C14.dat
[15:46:36.891] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//dacParameters35_C15.dat
[15:46:40.333] <TB0> INFO: Test took 3438ms.
[15:46:44.066] <TB0> INFO: Test took 3443ms.
[15:46:47.804] <TB0> INFO: Test took 3449ms.
[15:46:48.081] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:46:49.000] <TB0> INFO: Test took 919ms.
[15:46:49.004] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:46:50.114] <TB0> INFO: Test took 1110ms.
[15:46:50.118] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:46:51.225] <TB0> INFO: Test took 1107ms.
[15:46:51.229] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:46:52.336] <TB0> INFO: Test took 1107ms.
[15:46:52.340] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:46:53.447] <TB0> INFO: Test took 1107ms.
[15:46:53.450] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:46:54.560] <TB0> INFO: Test took 1110ms.
[15:46:54.564] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:46:55.671] <TB0> INFO: Test took 1108ms.
[15:46:55.675] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:46:56.784] <TB0> INFO: Test took 1110ms.
[15:46:56.788] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:46:57.898] <TB0> INFO: Test took 1110ms.
[15:46:57.901] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:46:59.010] <TB0> INFO: Test took 1109ms.
[15:46:59.013] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:00.122] <TB0> INFO: Test took 1109ms.
[15:47:00.126] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:01.234] <TB0> INFO: Test took 1108ms.
[15:47:01.237] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:02.341] <TB0> INFO: Test took 1104ms.
[15:47:02.344] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:03.445] <TB0> INFO: Test took 1102ms.
[15:47:03.447] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:04.555] <TB0> INFO: Test took 1108ms.
[15:47:04.558] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:05.668] <TB0> INFO: Test took 1110ms.
[15:47:05.671] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:06.778] <TB0> INFO: Test took 1107ms.
[15:47:06.782] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:07.888] <TB0> INFO: Test took 1107ms.
[15:47:07.891] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:08.997] <TB0> INFO: Test took 1106ms.
[15:47:09.000] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:10.110] <TB0> INFO: Test took 1110ms.
[15:47:10.113] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:11.222] <TB0> INFO: Test took 1109ms.
[15:47:11.225] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:12.336] <TB0> INFO: Test took 1111ms.
[15:47:12.340] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:13.445] <TB0> INFO: Test took 1105ms.
[15:47:13.449] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:14.556] <TB0> INFO: Test took 1108ms.
[15:47:14.559] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:15.667] <TB0> INFO: Test took 1108ms.
[15:47:15.671] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:16.779] <TB0> INFO: Test took 1108ms.
[15:47:16.783] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:17.889] <TB0> INFO: Test took 1106ms.
[15:47:17.892] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:19.002] <TB0> INFO: Test took 1110ms.
[15:47:19.006] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:20.114] <TB0> INFO: Test took 1109ms.
[15:47:20.118] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:21.228] <TB0> INFO: Test took 1110ms.
[15:47:21.231] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:22.340] <TB0> INFO: Test took 1109ms.
[15:47:22.343] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:47:23.450] <TB0> INFO: Test took 1107ms.
[15:47:23.988] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 531 seconds
[15:47:23.988] <TB0> INFO: PH scale (per ROC): 84 80 75 75 79 80 79 74 71 79 78 78 69 77 84 79
[15:47:23.988] <TB0> INFO: PH offset (per ROC): 163 167 186 174 179 160 158 172 171 169 181 148 191 177 170 176
[15:47:24.187] <TB0> INFO: ######################################################################
[15:47:24.188] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[15:47:24.188] <TB0> INFO: ######################################################################
[15:47:24.197] <TB0> INFO: scanning low vcal = 50
[15:47:28.533] <TB0> INFO: Test took 4336ms.
[15:47:28.596] <TB0> INFO: scanning low vcal = 100
[15:47:32.943] <TB0> INFO: Test took 4347ms.
[15:47:33.019] <TB0> INFO: scanning low vcal = 150
[15:47:37.371] <TB0> INFO: Test took 4352ms.
[15:47:37.437] <TB0> INFO: scanning low vcal = 200
[15:47:41.806] <TB0> INFO: Test took 4369ms.
[15:47:41.873] <TB0> INFO: scanning low vcal = 250
[15:47:46.109] <TB0> INFO: Test took 4236ms.
[15:47:46.183] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[15:47:50.378] <TB0> INFO: Test took 4195ms.
[15:47:50.433] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[15:47:54.674] <TB0> INFO: Test took 4241ms.
[15:47:54.769] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[15:47:59.035] <TB0> INFO: Test took 4266ms.
[15:47:59.091] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[15:48:03.279] <TB0> INFO: Test took 4188ms.
[15:48:03.336] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[15:48:07.526] <TB0> INFO: Test took 4190ms.
[15:48:07.830] <TB0> INFO: PixTestGainPedestal::measure() done
[15:48:31.788] <TB0> INFO: PixTestGainPedestal::fit() done
[15:48:31.789] <TB0> INFO: non-linearity mean: 0.961 0.955 0.948 0.947 0.952 0.956 0.957 0.957 0.955 0.955 0.953 0.956 0.950 0.955 0.960 0.955
[15:48:31.789] <TB0> INFO: non-linearity RMS: 0.006 0.005 0.007 0.007 0.006 0.004 0.005 0.006 0.006 0.006 0.006 0.005 0.007 0.005 0.005 0.007
[15:48:31.789] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[15:48:31.828] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[15:48:31.868] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[15:48:31.886] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[15:48:31.904] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[15:48:31.923] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[15:48:31.941] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[15:48:31.959] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[15:48:31.978] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[15:48:31.996] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[15:48:32.014] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[15:48:32.032] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[15:48:32.051] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[15:48:32.069] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[15:48:32.087] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[15:48:32.105] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[15:48:32.124] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 67 seconds
[15:48:32.130] <TB0> INFO: enter test to run
[15:48:32.130] <TB0> INFO: test: exit no parameter change
[15:48:32.549] <TB0> QUIET: Connection to board 126 closed.
[15:48:32.629] <TB0> INFO: pXar: this is the end, my friend