[09:12:37.663] <TB0> INFO: *** Welcome to pxar ***
[09:12:37.663] <TB0> INFO: *** Today: 2015/07/08
[09:12:37.663] <TB0> INFO: readRocDacs: /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C15.dat
[09:12:37.664] <TB0> INFO: readTbmDacs: /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//tbmParameters_C0b.dat
[09:12:37.664] <TB0> INFO: readMaskFile: /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//defaultMaskFile.dat
[09:12:37.664] <TB0> INFO: readTrimFile: /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters_C15.dat
[09:12:37.732] <TB0> INFO: clk: 4
[09:12:37.732] <TB0> INFO: ctr: 4
[09:12:37.732] <TB0> INFO: sda: 19
[09:12:37.732] <TB0> INFO: tin: 9
[09:12:37.732] <TB0> INFO: level: 15
[09:12:37.732] <TB0> INFO: triggerdelay: 0
[09:12:37.732] <TB0> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[09:12:37.732] <TB0> INFO: Log level: INFO
[09:12:37.739] <TB0> INFO: Found DTB DTB_WWVASW
[09:12:37.748] <TB0> QUIET: Connection to board DTB_WWVASW opened.
[09:12:37.751] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[09:12:37.754] <TB0> INFO: RPC call hashes of host and DTB match: 447413373
[09:12:39.295] <TB0> INFO: DUT info:
[09:12:39.295] <TB0> INFO: The DUT currently contains the following objects:
[09:12:39.295] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[09:12:39.295] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:12:39.295] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:12:39.295] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[09:12:39.295] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:39.295] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:39.295] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:39.295] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:39.295] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:39.295] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:39.295] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:39.295] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:39.295] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:39.295] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:39.295] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:39.295] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:39.295] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:39.295] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:39.295] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:39.295] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:12:39.696] <TB0> INFO: enter 'restricted' command line mode
[09:12:39.696] <TB0> INFO: enter test to run
[09:12:39.696] <TB0> INFO: test: pretest no parameter change
[09:12:39.696] <TB0> INFO: running: pretest
[09:12:39.700] <TB0> INFO: ######################################################################
[09:12:39.700] <TB0> INFO: PixTestPretest::doTest()
[09:12:39.700] <TB0> INFO: ######################################################################
[09:12:39.701] <TB0> INFO: ----------------------------------------------------------------------
[09:12:39.701] <TB0> INFO: PixTestPretest::programROC()
[09:12:39.702] <TB0> INFO: ----------------------------------------------------------------------
[09:12:57.719] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:12:57.719] <TB0> INFO: IA differences per ROC: 20.1 17.7 21.7 18.5 20.1 22.6 16.1 19.3 20.1 18.5 19.3 19.3 17.7 18.5 19.3 22.6
[09:12:57.806] <TB0> INFO: ----------------------------------------------------------------------
[09:12:57.806] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:12:57.806] <TB0> INFO: ----------------------------------------------------------------------
[09:13:05.200] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 385.1 mA = 24.0688 mA/ROC
[09:13:05.203] <TB0> INFO: ----------------------------------------------------------------------
[09:13:05.203] <TB0> INFO: PixTestPretest::findWorkingPixel()
[09:13:05.203] <TB0> INFO: ----------------------------------------------------------------------
[09:13:13.428] <TB0> INFO: Test took 8220ms.
[09:13:13.724] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:13:13.762] <TB0> INFO: ----------------------------------------------------------------------
[09:13:13.762] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[09:13:13.762] <TB0> INFO: ----------------------------------------------------------------------
[09:13:21.949] <TB0> INFO: Test took 8180ms.
[09:13:22.257] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[09:13:22.257] <TB0> INFO: CalDel: 126 140 136 128 126 135 126 144 144 130 134 131 127 131 121 129
[09:13:22.257] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[09:13:22.261] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C0.dat
[09:13:22.261] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C1.dat
[09:13:22.261] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C2.dat
[09:13:22.262] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C3.dat
[09:13:22.262] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C4.dat
[09:13:22.262] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C5.dat
[09:13:22.262] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C6.dat
[09:13:22.262] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C7.dat
[09:13:22.262] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C8.dat
[09:13:22.262] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C9.dat
[09:13:22.262] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C10.dat
[09:13:22.262] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C11.dat
[09:13:22.262] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C12.dat
[09:13:22.262] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C13.dat
[09:13:22.263] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C14.dat
[09:13:22.263] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters_C15.dat
[09:13:22.263] <TB0> INFO: PixTestPretest::doTest() done, duration: 42 seconds
[09:13:22.358] <TB0> INFO: enter test to run
[09:13:22.358] <TB0> INFO: test: fulltest no parameter change
[09:13:22.358] <TB0> INFO: running: fulltest
[09:13:22.358] <TB0> INFO: ######################################################################
[09:13:22.358] <TB0> INFO: PixTestFullTest::doTest()
[09:13:22.358] <TB0> INFO: ######################################################################
[09:13:22.360] <TB0> INFO: ######################################################################
[09:13:22.360] <TB0> INFO: PixTestAlive::doTest()
[09:13:22.360] <TB0> INFO: ######################################################################
[09:13:22.361] <TB0> INFO: ----------------------------------------------------------------------
[09:13:22.361] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:13:22.361] <TB0> INFO: ----------------------------------------------------------------------
[09:13:25.824] <TB0> INFO: Test took 3461ms.
[09:13:25.848] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:26.077] <TB0> INFO: PixTestAlive::aliveTest() done
[09:13:26.077] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0
[09:13:26.080] <TB0> INFO: ----------------------------------------------------------------------
[09:13:26.080] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:13:26.080] <TB0> INFO: ----------------------------------------------------------------------
[09:13:28.786] <TB0> INFO: Test took 2705ms.
[09:13:28.788] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:28.788] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:13:29.013] <TB0> INFO: PixTestAlive::maskTest() done
[09:13:29.013] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:13:29.015] <TB0> INFO: ----------------------------------------------------------------------
[09:13:29.015] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:13:29.015] <TB0> INFO: ----------------------------------------------------------------------
[09:13:32.433] <TB0> INFO: Test took 3416ms.
[09:13:32.455] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:32.681] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[09:13:32.681] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:13:32.681] <TB0> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[09:13:32.693] <TB0> INFO: ######################################################################
[09:13:32.693] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:13:32.693] <TB0> INFO: ######################################################################
[09:13:32.696] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[09:13:32.707] <TB0> INFO: dacScan step from 0 .. 29
[09:13:53.981] <TB0> INFO: Test took 21274ms.
[09:13:54.014] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:54.014] <TB0> INFO: dacScan step from 30 .. 59
[09:14:18.159] <TB0> INFO: Test took 24145ms.
[09:14:18.310] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:18.334] <TB0> INFO: dacScan step from 60 .. 89
[09:14:47.248] <TB0> INFO: Test took 28914ms.
[09:14:47.498] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:47.580] <TB0> INFO: dacScan step from 90 .. 119
[09:15:16.327] <TB0> INFO: Test took 28747ms.
[09:15:16.590] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:15:16.664] <TB0> INFO: dacScan step from 120 .. 149
[09:15:41.589] <TB0> INFO: Test took 24925ms.
[09:15:41.788] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:04.866] <TB0> INFO: PixTestBBMap::doTest() done, duration: 152 seconds
[09:16:04.866] <TB0> INFO: number of dead bumps (per ROC): 0 0 1 2 20 0 0 16 1 1 1 0 0 0 1 3
[09:16:04.866] <TB0> INFO: separation cut (per ROC): 77 65 85 85 63 68 73 66 91 68 77 66 81 64 69 81
[09:16:04.943] <TB0> INFO: ######################################################################
[09:16:04.943] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50
[09:16:04.943] <TB0> INFO: ######################################################################
[09:16:04.943] <TB0> INFO: ----------------------------------------------------------------------
[09:16:04.943] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[09:16:04.943] <TB0> INFO: ----------------------------------------------------------------------
[09:16:04.943] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[09:16:04.951] <TB0> INFO: dacScan step from 0 .. 3
[09:16:22.333] <TB0> INFO: Test took 17382ms.
[09:16:22.360] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:22.360] <TB0> INFO: dacScan step from 4 .. 7
[09:16:39.798] <TB0> INFO: Test took 17438ms.
[09:16:39.832] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:39.832] <TB0> INFO: dacScan step from 8 .. 11
[09:16:57.110] <TB0> INFO: Test took 17277ms.
[09:16:57.137] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:57.137] <TB0> INFO: dacScan step from 12 .. 15
[09:17:16.063] <TB0> INFO: Test took 18926ms.
[09:17:16.093] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:16.093] <TB0> INFO: dacScan step from 16 .. 19
[09:17:34.949] <TB0> INFO: Test took 18856ms.
[09:17:34.974] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:34.974] <TB0> INFO: dacScan step from 20 .. 23
[09:17:53.822] <TB0> INFO: Test took 18848ms.
[09:17:53.855] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:53.855] <TB0> INFO: dacScan step from 24 .. 27
[09:18:12.834] <TB0> INFO: Test took 18979ms.
[09:18:12.864] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:12.864] <TB0> INFO: dacScan step from 28 .. 31
[09:18:31.682] <TB0> INFO: Test took 18818ms.
[09:18:31.712] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:31.712] <TB0> INFO: dacScan step from 32 .. 35
[09:18:50.641] <TB0> INFO: Test took 18929ms.
[09:18:50.671] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:50.671] <TB0> INFO: dacScan step from 36 .. 39
[09:19:09.493] <TB0> INFO: Test took 18822ms.
[09:19:09.528] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:09.528] <TB0> INFO: dacScan step from 40 .. 43
[09:19:28.469] <TB0> INFO: Test took 18941ms.
[09:19:28.496] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:28.496] <TB0> INFO: dacScan step from 44 .. 47
[09:19:47.315] <TB0> INFO: Test took 18819ms.
[09:19:47.349] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:47.350] <TB0> INFO: dacScan step from 48 .. 51
[09:20:06.153] <TB0> INFO: Test took 18803ms.
[09:20:06.184] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:06.184] <TB0> INFO: dacScan step from 52 .. 55
[09:20:24.974] <TB0> INFO: Test took 18790ms.
[09:20:25.002] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:25.002] <TB0> INFO: dacScan step from 56 .. 59
[09:20:43.912] <TB0> INFO: Test took 18910ms.
[09:20:43.944] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:43.944] <TB0> INFO: dacScan step from 60 .. 63
[09:21:03.015] <TB0> INFO: Test took 19070ms.
[09:21:03.054] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:03.055] <TB0> INFO: dacScan step from 64 .. 67
[09:21:22.729] <TB0> INFO: Test took 19674ms.
[09:21:22.783] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:22.785] <TB0> INFO: dacScan step from 68 .. 71
[09:21:43.452] <TB0> INFO: Test took 20667ms.
[09:21:43.536] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:43.539] <TB0> INFO: dacScan step from 72 .. 75
[09:22:05.282] <TB0> INFO: Test took 21743ms.
[09:22:05.385] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:05.389] <TB0> INFO: dacScan step from 76 .. 79
[09:22:28.403] <TB0> INFO: Test took 23014ms.
[09:22:28.564] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:28.571] <TB0> INFO: dacScan step from 80 .. 83
[09:22:54.350] <TB0> INFO: Test took 25779ms.
[09:22:54.530] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:54.539] <TB0> INFO: dacScan step from 84 .. 87
[09:23:21.742] <TB0> INFO: Test took 27203ms.
[09:23:21.982] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:23:21.996] <TB0> INFO: dacScan step from 88 .. 91
[09:23:50.181] <TB0> INFO: Test took 28185ms.
[09:23:50.410] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:23:50.421] <TB0> INFO: dacScan step from 92 .. 95






[09:24:19.175] <TB0> INFO: Test took 28754ms.
[09:24:19.405] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:19.417] <TB0> INFO: dacScan step from 96 .. 99


[09:24:48.360] <TB0> INFO: Test took 28943ms.
[09:24:48.611] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:48.622] <TB0> INFO: dacScan step from 100 .. 103



[09:25:17.694] <TB0> INFO: Test took 29072ms.
[09:25:17.930] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:17.943] <TB0> INFO: dacScan step from 104 .. 107



[09:25:47.171] <TB0> INFO: Test took 29228ms.
[09:25:47.400] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:47.411] <TB0> INFO: dacScan step from 108 .. 111




[09:26:16.303] <TB0> INFO: Test took 28891ms.
[09:26:16.562] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:26:16.573] <TB0> INFO: dacScan step from 112 .. 115


[09:26:45.506] <TB0> INFO: Test took 28933ms.
[09:26:45.754] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:26:45.766] <TB0> INFO: dacScan step from 116 .. 119




[09:27:14.660] <TB0> INFO: Test took 28894ms.
[09:27:14.913] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:27:14.924] <TB0> INFO: dacScan step from 120 .. 123
[09:27:43.895] <TB0> INFO: Test took 28971ms.
[09:27:44.162] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:27:44.174] <TB0> INFO: dacScan step from 124 .. 127
[09:28:13.069] <TB0> INFO: Test took 28895ms.
[09:28:13.341] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:13.352] <TB0> INFO: dacScan step from 128 .. 131
[09:28:42.216] <TB0> INFO: Test took 28864ms.
[09:28:42.458] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:42.471] <TB0> INFO: dacScan step from 132 .. 135
[09:29:11.278] <TB0> INFO: Test took 28807ms.
[09:29:11.581] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:11.594] <TB0> INFO: dacScan step from 136 .. 139
[09:29:40.731] <TB0> INFO: Test took 29137ms.
[09:29:40.958] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:40.969] <TB0> INFO: dacScan step from 140 .. 143
[09:30:10.096] <TB0> INFO: Test took 29127ms.
[09:30:10.335] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:10.346] <TB0> INFO: dacScan step from 144 .. 147
[09:30:39.315] <TB0> INFO: Test took 28969ms.
[09:30:39.549] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:39.560] <TB0> INFO: dacScan step from 148 .. 149
[09:30:55.222] <TB0> INFO: Test took 15662ms.
[09:30:55.348] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:55.356] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:30:56.888] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:30:58.433] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:30:59.967] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:31:01.498] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:31:03.140] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:31:04.672] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:31:06.094] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:31:07.502] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:31:08.958] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:31:10.409] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:31:11.838] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:31:13.364] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:31:14.845] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:31:16.379] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:31:17.817] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:31:19.208] <TB0> INFO: PixTestScurves::scurves() done
[09:31:19.208] <TB0> INFO: Vcal mean: 83.93 67.88 86.04 90.00 71.60 76.32 83.80 83.63 94.90 79.88 84.56 72.08 88.09 73.27 74.88 85.29
[09:31:19.208] <TB0> INFO: Vcal RMS: 4.68 4.52 6.53 6.30 4.70 4.32 4.59 4.77 5.47 4.43 5.29 4.71 5.87 4.76 4.27 4.71
[09:31:19.208] <TB0> INFO: PixTestScurves::fullTest() done, duration: 914 seconds
[09:31:19.279] <TB0> INFO: ######################################################################
[09:31:19.279] <TB0> INFO: PixTestTrim::doTest()
[09:31:19.279] <TB0> INFO: ######################################################################
[09:31:19.281] <TB0> INFO: ----------------------------------------------------------------------
[09:31:19.281] <TB0> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[09:31:19.281] <TB0> INFO: ----------------------------------------------------------------------
[09:31:19.365] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:31:19.365] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:31:19.373] <TB0> INFO: dacScan step from 0 .. 19
[09:31:33.844] <TB0> INFO: Test took 14471ms.
[09:31:33.870] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:33.870] <TB0> INFO: dacScan step from 20 .. 39
[09:31:48.231] <TB0> INFO: Test took 14361ms.
[09:31:48.250] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:48.250] <TB0> INFO: dacScan step from 40 .. 59
[09:32:03.329] <TB0> INFO: Test took 15078ms.
[09:32:03.355] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:03.356] <TB0> INFO: dacScan step from 60 .. 79
[09:32:18.509] <TB0> INFO: Test took 15153ms.
[09:32:18.537] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:18.537] <TB0> INFO: dacScan step from 80 .. 99
[09:32:35.113] <TB0> INFO: Test took 16576ms.
[09:32:35.208] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:35.226] <TB0> INFO: dacScan step from 100 .. 119
[09:32:54.610] <TB0> INFO: Test took 19384ms.
[09:32:54.781] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:54.818] <TB0> INFO: dacScan step from 120 .. 139
[09:33:12.939] <TB0> INFO: Test took 18121ms.
[09:33:13.078] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:13.101] <TB0> INFO: dacScan step from 140 .. 159
[09:33:28.766] <TB0> INFO: Test took 15665ms.
[09:33:28.817] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:51.875] <TB0> INFO: ROC 0 VthrComp = 90
[09:33:51.875] <TB0> INFO: ROC 1 VthrComp = 74
[09:33:51.875] <TB0> INFO: ROC 2 VthrComp = 89
[09:33:51.876] <TB0> INFO: ROC 3 VthrComp = 93
[09:33:51.876] <TB0> INFO: ROC 4 VthrComp = 77
[09:33:51.876] <TB0> INFO: ROC 5 VthrComp = 84
[09:33:51.876] <TB0> INFO: ROC 6 VthrComp = 88
[09:33:51.876] <TB0> INFO: ROC 7 VthrComp = 90
[09:33:51.877] <TB0> INFO: ROC 8 VthrComp = 99
[09:33:51.877] <TB0> INFO: ROC 9 VthrComp = 84
[09:33:51.877] <TB0> INFO: ROC 10 VthrComp = 88
[09:33:51.877] <TB0> INFO: ROC 11 VthrComp = 77
[09:33:51.877] <TB0> INFO: ROC 12 VthrComp = 91
[09:33:51.877] <TB0> INFO: ROC 13 VthrComp = 76
[09:33:51.877] <TB0> INFO: ROC 14 VthrComp = 79
[09:33:51.877] <TB0> INFO: ROC 15 VthrComp = 95
[09:33:51.877] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:33:51.877] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:33:51.885] <TB0> INFO: dacScan step from 0 .. 19
[09:34:06.387] <TB0> INFO: Test took 14501ms.
[09:34:06.414] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:06.414] <TB0> INFO: dacScan step from 20 .. 39
[09:34:20.806] <TB0> INFO: Test took 14392ms.
[09:34:20.835] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:20.838] <TB0> INFO: dacScan step from 40 .. 59
[09:34:38.718] <TB0> INFO: Test took 17880ms.
[09:34:38.866] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:38.902] <TB0> INFO: dacScan step from 60 .. 79
[09:34:57.439] <TB0> INFO: Test took 18537ms.
[09:34:57.628] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:57.692] <TB0> INFO: dacScan step from 80 .. 99
[09:35:17.774] <TB0> INFO: Test took 20082ms.
[09:35:17.949] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:17.997] <TB0> INFO: dacScan step from 100 .. 119
[09:35:38.021] <TB0> INFO: Test took 20024ms.
[09:35:38.193] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:38.240] <TB0> INFO: dacScan step from 120 .. 139
[09:35:58.203] <TB0> INFO: Test took 19962ms.
[09:35:58.394] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:58.440] <TB0> INFO: dacScan step from 140 .. 159
[09:36:18.441] <TB0> INFO: Test took 20001ms.
[09:36:18.636] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:43.922] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 57.5652 for pixel 1/79 mean/min/max = 45.3377/32.9774/57.6979
[09:36:43.922] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 56.5647 for pixel 20/1 mean/min/max = 45.9193/35.218/56.6206
[09:36:43.922] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 64.6518 for pixel 14/78 mean/min/max = 47.8365/30.968/64.7051
[09:36:43.923] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 61.6549 for pixel 4/3 mean/min/max = 46.5366/31.3425/61.7306
[09:36:43.923] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 57.953 for pixel 17/19 mean/min/max = 46.6578/35.1832/58.1323
[09:36:43.923] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 56.5833 for pixel 15/70 mean/min/max = 44.4768/32.2223/56.7313
[09:36:43.923] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 57.6315 for pixel 6/1 mean/min/max = 45.414/33.1125/57.7154
[09:36:43.924] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 57.1357 for pixel 6/61 mean/min/max = 44.8457/32.3683/57.3231
[09:36:43.924] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 57.9204 for pixel 51/3 mean/min/max = 44.9212/31.769/58.0735
[09:36:43.924] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 58.3402 for pixel 19/2 mean/min/max = 45.0982/31.8351/58.3613
[09:36:43.924] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 60.1789 for pixel 4/14 mean/min/max = 46.4761/32.7095/60.2427
[09:36:43.925] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 58.2055 for pixel 0/71 mean/min/max = 46.5635/34.8884/58.2385
[09:36:43.925] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 60.6527 for pixel 0/36 mean/min/max = 46.5685/32.3405/60.7966
[09:36:43.925] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 60.0001 for pixel 18/78 mean/min/max = 47.5558/35.1014/60.0103
[09:36:43.925] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 58.4867 for pixel 41/3 mean/min/max = 46.8254/35.1083/58.5424
[09:36:43.926] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 56.2431 for pixel 2/77 mean/min/max = 44.3371/32.1387/56.5356
[09:36:43.926] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:38:14.499] <TB0> INFO: Test took 90573ms.
[09:38:16.098] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:38:16.108] <TB0> INFO: dacScan step from 0 .. 19
[09:38:39.029] <TB0> INFO: Test took 22921ms.
[09:38:39.085] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:39.087] <TB0> INFO: dacScan step from 20 .. 39
[09:39:07.773] <TB0> INFO: Test took 28686ms.
[09:39:08.024] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:08.065] <TB0> INFO: dacScan step from 40 .. 59



[09:39:40.875] <TB0> INFO: Test took 32810ms.
[09:39:41.189] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:41.235] <TB0> INFO: dacScan step from 60 .. 79



[09:40:14.053] <TB0> INFO: Test took 32818ms.
[09:40:14.335] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:14.387] <TB0> INFO: dacScan step from 80 .. 99



[09:40:46.635] <TB0> INFO: Test took 32248ms.
[09:40:46.910] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:46.968] <TB0> INFO: dacScan step from 100 .. 119



[09:41:18.638] <TB0> INFO: Test took 31670ms.
[09:41:18.991] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:19.042] <TB0> INFO: dacScan step from 120 .. 139




[09:41:52.224] <TB0> INFO: Test took 33182ms.
[09:41:52.552] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:52.605] <TB0> INFO: dacScan step from 140 .. 159



[09:42:25.523] <TB0> INFO: Test took 32918ms.
[09:42:25.834] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:25.888] <TB0> INFO: dacScan step from 160 .. 179



[09:42:58.988] <TB0> INFO: Test took 33100ms.
[09:42:59.384] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:59.450] <TB0> INFO: dacScan step from 180 .. 199



[09:43:33.270] <TB0> INFO: Test took 33820ms.
[09:43:33.542] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:43:59.343] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.038297 .. 255.000000
[09:43:59.436] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[09:43:59.446] <TB0> INFO: dacScan step from 0 .. 19
[09:44:12.645] <TB0> INFO: Test took 13199ms.
[09:44:12.669] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:12.669] <TB0> INFO: dacScan step from 20 .. 39
[09:44:27.002] <TB0> INFO: Test took 14333ms.
[09:44:27.114] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:27.137] <TB0> INFO: dacScan step from 40 .. 59
[09:44:44.751] <TB0> INFO: Test took 17614ms.
[09:44:44.898] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:44.946] <TB0> INFO: dacScan step from 60 .. 79
[09:45:02.491] <TB0> INFO: Test took 17545ms.
[09:45:02.629] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:02.676] <TB0> INFO: dacScan step from 80 .. 99
[09:45:19.988] <TB0> INFO: Test took 17312ms.
[09:45:20.134] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:20.180] <TB0> INFO: dacScan step from 100 .. 119
[09:45:37.582] <TB0> INFO: Test took 17402ms.
[09:45:37.725] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:37.777] <TB0> INFO: dacScan step from 120 .. 139
[09:45:55.071] <TB0> INFO: Test took 17294ms.
[09:45:55.231] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:55.286] <TB0> INFO: dacScan step from 140 .. 159
[09:46:12.826] <TB0> INFO: Test took 17540ms.
[09:46:12.968] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:13.019] <TB0> INFO: dacScan step from 160 .. 179
[09:46:30.685] <TB0> INFO: Test took 17666ms.
[09:46:30.846] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:30.894] <TB0> INFO: dacScan step from 180 .. 199
[09:46:49.341] <TB0> INFO: Test took 18447ms.
[09:46:49.480] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:49.530] <TB0> INFO: dacScan step from 200 .. 219
[09:47:07.013] <TB0> INFO: Test took 17483ms.
[09:47:07.174] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:07.222] <TB0> INFO: dacScan step from 220 .. 239
[09:47:24.723] <TB0> INFO: Test took 17501ms.
[09:47:24.866] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:24.915] <TB0> INFO: dacScan step from 240 .. 255
[09:47:39.577] <TB0> INFO: Test took 14662ms.
[09:47:39.704] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:15.195] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 12.427333 .. 51.306427
[09:48:15.274] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 2 .. 61 (20) hits flags = 16 (plus default)
[09:48:15.282] <TB0> INFO: dacScan step from 2 .. 21
[09:48:28.271] <TB0> INFO: Test took 12989ms.
[09:48:28.295] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:28.295] <TB0> INFO: dacScan step from 22 .. 41
[09:48:42.889] <TB0> INFO: Test took 14594ms.
[09:48:43.018] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:43.047] <TB0> INFO: dacScan step from 42 .. 61
[09:49:00.632] <TB0> INFO: Test took 17585ms.
[09:49:00.789] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:19.591] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 19.110492 .. 51.306427
[09:49:19.672] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 9 .. 61 (20) hits flags = 16 (plus default)
[09:49:19.680] <TB0> INFO: dacScan step from 9 .. 28
[09:49:32.826] <TB0> INFO: Test took 13146ms.
[09:49:32.851] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:32.851] <TB0> INFO: dacScan step from 29 .. 48
[09:49:48.765] <TB0> INFO: Test took 15914ms.
[09:49:48.926] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:48.971] <TB0> INFO: dacScan step from 49 .. 61
[09:50:01.358] <TB0> INFO: Test took 12387ms.
[09:50:01.461] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:18.909] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 2.790106 .. 51.306427
[09:50:18.991] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 2 .. 61 (20) hits flags = 16 (plus default)
[09:50:18.999] <TB0> INFO: dacScan step from 2 .. 21
[09:50:32.025] <TB0> INFO: Test took 13026ms.
[09:50:32.043] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:32.043] <TB0> INFO: dacScan step from 22 .. 41
[09:50:47.028] <TB0> INFO: Test took 14984ms.
[09:50:47.146] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:47.167] <TB0> INFO: dacScan step from 42 .. 61
[09:51:04.320] <TB0> INFO: Test took 17153ms.
[09:51:04.461] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:21.960] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[09:51:21.960] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[09:51:21.969] <TB0> INFO: dacScan step from 15 .. 34
[09:51:44.179] <TB0> INFO: Test took 22209ms.
[09:51:44.247] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:44.256] <TB0> INFO: dacScan step from 35 .. 54



[09:52:16.705] <TB0> INFO: Test took 32449ms.
[09:52:17.037] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:52:17.090] <TB0> INFO: dacScan step from 55 .. 55
[09:52:21.275] <TB0> INFO: Test took 4184ms.
[09:52:21.290] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:52:35.278] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:52:35.278] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:52:35.278] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:52:35.279] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:52:35.279] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:52:35.279] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:52:35.279] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:52:35.280] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:52:35.280] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:52:35.280] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:52:35.281] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:52:35.281] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:52:35.281] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:52:35.281] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:52:35.282] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:52:35.282] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:52:35.282] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C0.dat
[09:52:35.292] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C1.dat
[09:52:35.301] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C2.dat
[09:52:35.311] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C3.dat
[09:52:35.321] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C4.dat
[09:52:35.331] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C5.dat
[09:52:35.340] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C6.dat
[09:52:35.346] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C7.dat
[09:52:35.354] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C8.dat
[09:52:35.359] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C9.dat
[09:52:35.365] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C10.dat
[09:52:35.371] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C11.dat
[09:52:35.376] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C12.dat
[09:52:35.382] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C13.dat
[09:52:35.389] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C14.dat
[09:52:35.395] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//trimParameters35_C15.dat
[09:52:35.401] <TB0> INFO: PixTestTrim::trimTest() done
[09:52:35.401] <TB0> INFO: vtrim: 102 100 144 114 101 106 102 111 100 105 113 94 100 112 118 206
[09:52:35.401] <TB0> INFO: vthrcomp: 90 74 89 93 77 84 88 90 99 84 88 77 91 76 79 95
[09:52:35.401] <TB0> INFO: vcal mean: 34.99 35.04 35.02 34.95 35.04 35.03 35.04 35.09 35.03 34.98 35.05 35.03 34.98 35.07 35.06 34.99
[09:52:35.401] <TB0> INFO: vcal RMS: 1.04 0.94 1.19 1.38 0.96 0.97 1.08 1.04 1.01 1.06 1.06 0.93 1.07 1.02 0.97 4.06
[09:52:35.401] <TB0> INFO: bits mean: 9.64 9.34 9.96 10.17 8.74 10.22 10.08 10.22 9.74 10.11 9.45 8.46 9.32 9.31 9.59 12.31
[09:52:35.401] <TB0> INFO: bits RMS: 2.60 2.34 2.49 2.41 2.54 2.43 2.35 2.41 2.70 2.50 2.63 2.70 2.72 2.26 2.23 1.41
[09:52:35.406] <TB0> INFO: ----------------------------------------------------------------------
[09:52:35.406] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 240 150 100
[09:52:35.406] <TB0> INFO: ----------------------------------------------------------------------
[09:52:35.408] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:52:35.417] <TB0> INFO: dacScan step from 0 .. 19
[09:52:57.505] <TB0> INFO: Test took 22088ms.
[09:52:57.542] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:52:57.542] <TB0> INFO: dacScan step from 20 .. 39
[09:53:20.230] <TB0> INFO: Test took 22688ms.
[09:53:20.292] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:53:20.295] <TB0> INFO: dacScan step from 40 .. 59
[09:53:48.505] <TB0> INFO: Test took 28210ms.
[09:53:48.828] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:53:48.876] <TB0> INFO: dacScan step from 60 .. 79



[09:54:19.935] <TB0> INFO: Test took 31059ms.
[09:54:20.224] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:20.275] <TB0> INFO: dacScan step from 80 .. 99
[09:54:52.778] <TB0> INFO: Test took 32503ms.
[09:54:53.091] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:53.146] <TB0> INFO: dacScan step from 100 .. 119
[09:55:24.748] <TB0> INFO: Test took 31602ms.
[09:55:25.066] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:25.125] <TB0> INFO: dacScan step from 120 .. 139
[09:55:57.566] <TB0> INFO: Test took 32441ms.
[09:55:57.859] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:57.914] <TB0> INFO: dacScan step from 140 .. 159
[09:56:29.826] <TB0> INFO: Test took 31912ms.
[09:56:30.135] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:30.182] <TB0> INFO: dacScan step from 160 .. 179
[09:57:01.606] <TB0> INFO: Test took 31424ms.
[09:57:01.895] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:01.947] <TB0> INFO: dacScan step from 180 .. 199
[09:57:35.622] <TB0> INFO: Test took 33675ms.
[09:57:35.963] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:03.712] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 91 (20) hits flags = 16 (plus default)
[09:58:03.719] <TB0> INFO: dacScan step from 0 .. 19
[09:58:24.736] <TB0> INFO: Test took 21017ms.
[09:58:24.779] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:24.779] <TB0> INFO: dacScan step from 20 .. 39
[09:58:48.486] <TB0> INFO: Test took 23707ms.
[09:58:48.590] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:48.602] <TB0> INFO: dacScan step from 40 .. 59
[09:59:20.243] <TB0> INFO: Test took 31641ms.
[09:59:20.533] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:20.592] <TB0> INFO: dacScan step from 60 .. 79



[09:59:53.462] <TB0> INFO: Test took 32870ms.
[09:59:53.777] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:53.829] <TB0> INFO: dacScan step from 80 .. 91
[10:00:13.550] <TB0> INFO: Test took 19721ms.
[10:00:13.754] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:00:32.915] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 86 (20) hits flags = 16 (plus default)
[10:00:32.924] <TB0> INFO: dacScan step from 0 .. 19
[10:00:55.423] <TB0> INFO: Test took 22499ms.
[10:00:55.462] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:00:55.462] <TB0> INFO: dacScan step from 20 .. 39
[10:01:20.364] <TB0> INFO: Test took 24902ms.
[10:01:20.501] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:20.516] <TB0> INFO: dacScan step from 40 .. 59




[10:01:53.234] <TB0> INFO: Test took 32717ms.
[10:01:53.531] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:53.576] <TB0> INFO: dacScan step from 60 .. 79
[10:02:25.844] <TB0> INFO: Test took 32268ms.
[10:02:26.113] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:02:26.166] <TB0> INFO: dacScan step from 80 .. 86
[10:02:38.608] <TB0> INFO: Test took 12442ms.
[10:02:38.733] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:02:56.223] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[10:02:56.231] <TB0> INFO: dacScan step from 0 .. 19
[10:03:18.841] <TB0> INFO: Test took 22610ms.
[10:03:18.878] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:03:18.878] <TB0> INFO: dacScan step from 20 .. 39
[10:03:44.999] <TB0> INFO: Test took 26120ms.
[10:03:45.183] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:03:45.203] <TB0> INFO: dacScan step from 40 .. 59


[10:04:17.733] <TB0> INFO: Test took 32530ms.
[10:04:18.083] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:04:18.140] <TB0> INFO: dacScan step from 60 .. 79
[10:04:48.830] <TB0> INFO: Test took 30690ms.
[10:04:49.131] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:04:49.185] <TB0> INFO: dacScan step from 80 .. 99
[10:05:21.971] <TB0> INFO: Test took 32786ms.
[10:05:22.276] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:05:22.337] <TB0> INFO: dacScan step from 100 .. 119
[10:05:55.168] <TB0> INFO: Test took 32831ms.
[10:05:55.460] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:05:55.514] <TB0> INFO: dacScan step from 120 .. 139
[10:06:28.015] <TB0> INFO: Test took 32501ms.
[10:06:28.279] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:06:28.331] <TB0> INFO: dacScan step from 140 .. 159
[10:07:00.110] <TB0> INFO: Test took 31779ms.
[10:07:00.430] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:07:00.473] <TB0> INFO: dacScan step from 160 .. 179
[10:07:31.578] <TB0> INFO: Test took 31105ms.
[10:07:31.863] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:07:31.922] <TB0> INFO: dacScan step from 180 .. 199
[10:08:05.753] <TB0> INFO: Test took 33830ms.
[10:08:06.052] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:08:06.108] <TB0> INFO: dacScan step from 200 .. 219
[10:08:38.931] <TB0> INFO: Test took 32823ms.
[10:08:39.211] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:08:39.257] <TB0> INFO: dacScan step from 220 .. 239
[10:09:12.034] <TB0> INFO: Test took 32777ms.
[10:09:12.325] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:09:12.380] <TB0> INFO: dacScan step from 240 .. 255
[10:09:38.860] <TB0> INFO: Test took 26480ms.
[10:09:39.089] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:10:06.856] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 79 (20) hits flags = 16 (plus default)
[10:10:06.864] <TB0> INFO: dacScan step from 0 .. 19
[10:10:29.401] <TB0> INFO: Test took 22537ms.
[10:10:29.446] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:10:29.447] <TB0> INFO: dacScan step from 20 .. 39
[10:10:56.749] <TB0> INFO: Test took 27302ms.
[10:10:56.959] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:10:56.997] <TB0> INFO: dacScan step from 40 .. 59
[10:11:29.830] <TB0> INFO: Test took 32833ms.
[10:11:30.151] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:11:30.203] <TB0> INFO: dacScan step from 60 .. 79




[10:12:01.597] <TB0> INFO: Test took 31393ms.
[10:12:01.888] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:12:19.339] <TB0> INFO: PixTestTrim::trimBitTest() done
[10:12:19.341] <TB0> INFO: PixTestTrim::doTest() done, duration: 2460 seconds
[10:12:20.049] <TB0> INFO: ######################################################################
[10:12:20.049] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:12:20.049] <TB0> INFO: ######################################################################
[10:12:23.494] <TB0> INFO: Test took 3444ms.
[10:12:23.515] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:12:27.177] <TB0> INFO: Test took 3465ms.
[10:12:27.250] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:12:30.689] <TB0> INFO: Test took 3429ms.
[10:12:30.760] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:12:30.767] <TB0> INFO: The DUT currently contains the following objects:
[10:12:30.767] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:12:30.767] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:12:30.767] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:12:30.767] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:12:30.767] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:30.767] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:30.767] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:30.767] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:30.767] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:30.767] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:30.767] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:30.767] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:30.767] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:30.767] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:30.767] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:30.767] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:30.767] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:30.767] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:30.767] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:30.767] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:31.877] <TB0> INFO: Test took 1110ms.
[10:12:31.879] <TB0> INFO: The DUT currently contains the following objects:
[10:12:31.879] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:12:31.879] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:12:31.879] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:12:31.879] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:12:31.879] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:31.879] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:31.879] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:31.879] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:31.879] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:31.879] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:31.879] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:31.879] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:31.879] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:31.879] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:31.879] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:31.879] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:31.880] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:31.880] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:31.880] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:31.880] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:32.982] <TB0> INFO: Test took 1102ms.
[10:12:32.982] <TB0> INFO: The DUT currently contains the following objects:
[10:12:32.982] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:12:32.982] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:12:32.982] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:12:32.982] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:12:32.982] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:32.982] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:32.982] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:32.982] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:32.982] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:32.982] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:32.982] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:32.983] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:32.983] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:32.983] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:32.983] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:32.983] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:32.983] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:32.983] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:32.983] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:32.983] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:34.091] <TB0> INFO: Test took 1108ms.
[10:12:34.092] <TB0> INFO: The DUT currently contains the following objects:
[10:12:34.102] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:12:34.102] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:12:34.102] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:12:34.102] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:12:34.102] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:34.102] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:34.102] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:34.102] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:34.102] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:34.102] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:34.102] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:34.103] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:34.103] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:34.103] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:34.103] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:34.103] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:34.103] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:34.103] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:34.103] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:34.103] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:35.202] <TB0> INFO: Test took 1099ms.
[10:12:35.204] <TB0> INFO: The DUT currently contains the following objects:
[10:12:35.204] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:12:35.204] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:12:35.204] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:12:35.204] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:12:35.204] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:35.204] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:35.204] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:35.204] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:35.204] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:35.204] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:35.204] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:35.204] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:35.204] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:35.204] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:35.204] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:35.204] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:35.204] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:35.205] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:35.205] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:35.205] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:36.311] <TB0> INFO: Test took 1106ms.
[10:12:36.312] <TB0> INFO: The DUT currently contains the following objects:
[10:12:36.312] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:12:36.312] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:12:36.312] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:12:36.312] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:12:36.312] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:36.312] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:36.312] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:36.312] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:36.312] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:36.312] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:36.312] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:36.312] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:36.312] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:36.312] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:36.312] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:36.312] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:36.312] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:36.312] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:36.312] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:36.312] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:37.421] <TB0> INFO: Test took 1109ms.
[10:12:37.423] <TB0> INFO: The DUT currently contains the following objects:
[10:12:37.423] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:12:37.423] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:12:37.423] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:12:37.423] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:12:37.423] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:37.423] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:37.423] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:37.423] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:37.423] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:37.423] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:37.423] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:37.423] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:37.423] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:37.423] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:37.423] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:37.423] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:37.423] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:37.423] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:37.423] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:37.423] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:38.530] <TB0> INFO: Test took 1107ms.
[10:12:38.531] <TB0> INFO: The DUT currently contains the following objects:
[10:12:38.531] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:12:38.531] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:12:38.531] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:12:38.531] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:12:38.531] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:38.531] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:38.531] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:38.531] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:38.531] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:38.531] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:38.531] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:38.531] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:38.532] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:38.532] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:38.532] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:38.532] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:38.532] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:38.532] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:38.532] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:38.532] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:39.639] <TB0> INFO: Test took 1107ms.
[10:12:39.641] <TB0> INFO: The DUT currently contains the following objects:
[10:12:39.641] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:12:39.641] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:12:39.641] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:12:39.641] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:12:39.641] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:39.641] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:39.641] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:39.641] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:39.641] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:39.641] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:39.641] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:39.642] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:39.642] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:39.642] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:39.642] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:39.642] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:39.642] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:39.642] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:39.642] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:39.642] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:40.749] <TB0> INFO: Test took 1107ms.
[10:12:40.750] <TB0> INFO: The DUT currently contains the following objects:
[10:12:40.750] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:12:40.750] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:12:40.750] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:12:40.750] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:12:40.750] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:40.750] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:40.750] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:40.750] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:40.750] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:40.750] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:40.750] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:40.750] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:40.751] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:40.751] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:40.751] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:40.751] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:40.751] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:40.751] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:40.751] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:40.751] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:41.860] <TB0> INFO: Test took 1109ms.
[10:12:41.861] <TB0> INFO: The DUT currently contains the following objects:
[10:12:41.861] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:12:41.861] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:12:41.861] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:12:41.861] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:12:41.861] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:41.861] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:41.861] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:41.861] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:41.861] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:41.861] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:41.861] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:41.861] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:41.861] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:41.861] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:41.861] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:41.861] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:41.861] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:41.861] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:41.862] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:41.862] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:42.969] <TB0> INFO: Test took 1107ms.
[10:12:42.971] <TB0> INFO: The DUT currently contains the following objects:
[10:12:42.971] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:12:42.971] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:12:42.971] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:12:42.971] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:12:42.971] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:42.971] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:42.971] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:42.971] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:42.971] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:42.971] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:42.971] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:42.971] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:42.971] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:42.971] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:42.971] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:42.971] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:42.971] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:42.971] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:42.971] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:42.971] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:44.078] <TB0> INFO: Test took 1106ms.
[10:12:44.079] <TB0> INFO: The DUT currently contains the following objects:
[10:12:44.079] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:12:44.079] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:12:44.079] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:12:44.079] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:12:44.079] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:44.079] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:44.079] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:44.079] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:44.079] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:44.080] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:44.080] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:44.080] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:44.080] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:44.080] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:44.080] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:44.080] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:44.080] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:44.080] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:44.080] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:44.080] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:45.187] <TB0> INFO: Test took 1107ms.
[10:12:45.188] <TB0> INFO: The DUT currently contains the following objects:
[10:12:45.188] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:12:45.188] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:12:45.188] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:12:45.188] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:12:45.188] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:45.189] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:45.189] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:45.189] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:45.189] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:45.189] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:45.189] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:45.189] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:45.189] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:45.189] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:45.189] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:45.189] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:45.189] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:45.189] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:45.189] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:45.189] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:46.298] <TB0> INFO: Test took 1109ms.
[10:12:46.300] <TB0> INFO: The DUT currently contains the following objects:
[10:12:46.300] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:12:46.300] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:12:46.300] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:12:46.300] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:12:46.300] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:46.300] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:46.300] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:46.300] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:46.300] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:46.300] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:46.300] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:46.300] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:46.300] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:46.300] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:46.300] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:46.300] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:46.300] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:46.300] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:46.300] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:46.300] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:47.409] <TB0> INFO: Test took 1109ms.
[10:12:47.411] <TB0> INFO: The DUT currently contains the following objects:
[10:12:47.411] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[10:12:47.411] <TB0> INFO: TBM Core alpha (0): 7 registers set
[10:12:47.411] <TB0> INFO: TBM Core beta (1): 7 registers set
[10:12:47.411] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:12:47.411] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:47.411] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:47.411] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:47.411] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:47.412] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:47.412] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:47.412] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:47.412] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:47.412] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:47.412] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:47.412] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:47.412] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:47.412] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:47.412] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:47.412] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:47.412] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:12:48.519] <TB0> INFO: Test took 1107ms.
[10:12:48.523] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:16:33.565] <TB0> INFO: Test took 225042ms.
[10:16:35.555] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:21.580] <TB0> INFO: Test took 226025ms.
[10:20:23.253] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:20:23.264] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:20:23.275] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:20:23.285] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:20:23.296] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:20:23.306] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:20:23.316] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:20:23.323] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:20:23.330] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:20:23.337] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:20:23.344] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:20:23.350] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:20:23.357] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:20:23.364] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:20:23.370] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:20:23.377] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[10:20:23.425] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:20:23.429] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:20:23.430] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:20:23.430] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:20:23.430] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:20:23.431] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:20:23.436] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:20:23.436] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:20:23.436] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:20:23.446] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:20:23.446] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:20:23.449] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:20:23.449] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:20:23.453] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:20:23.453] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:20:23.456] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:20:26.819] <TB0> INFO: Test took 3361ms.
[10:20:30.368] <TB0> INFO: Test took 3247ms.
[10:20:33.893] <TB0> INFO: Test took 3261ms.
[10:20:34.165] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:35.083] <TB0> INFO: Test took 918ms.
[10:20:35.086] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:36.192] <TB0> INFO: Test took 1106ms.
[10:20:36.195] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:37.298] <TB0> INFO: Test took 1103ms.
[10:20:37.301] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:38.407] <TB0> INFO: Test took 1106ms.
[10:20:38.411] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:39.517] <TB0> INFO: Test took 1106ms.
[10:20:39.521] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:40.627] <TB0> INFO: Test took 1106ms.
[10:20:40.630] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:41.734] <TB0> INFO: Test took 1104ms.
[10:20:41.736] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:42.843] <TB0> INFO: Test took 1107ms.
[10:20:42.846] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:43.958] <TB0> INFO: Test took 1112ms.
[10:20:43.962] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:45.070] <TB0> INFO: Test took 1108ms.
[10:20:45.074] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:46.183] <TB0> INFO: Test took 1110ms.
[10:20:46.186] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:47.293] <TB0> INFO: Test took 1107ms.
[10:20:47.296] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:48.402] <TB0> INFO: Test took 1106ms.
[10:20:48.405] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:49.512] <TB0> INFO: Test took 1107ms.
[10:20:49.514] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:50.621] <TB0> INFO: Test took 1107ms.
[10:20:50.624] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:51.731] <TB0> INFO: Test took 1107ms.
[10:20:51.734] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:52.840] <TB0> INFO: Test took 1106ms.
[10:20:52.844] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:53.949] <TB0> INFO: Test took 1106ms.
[10:20:53.953] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:55.063] <TB0> INFO: Test took 1111ms.
[10:20:55.066] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:56.172] <TB0> INFO: Test took 1106ms.
[10:20:56.175] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:57.286] <TB0> INFO: Test took 1111ms.
[10:20:57.291] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:58.400] <TB0> INFO: Test took 1110ms.
[10:20:58.404] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:20:59.510] <TB0> INFO: Test took 1106ms.
[10:20:59.514] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:21:00.621] <TB0> INFO: Test took 1108ms.
[10:21:00.625] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:21:01.736] <TB0> INFO: Test took 1112ms.
[10:21:01.741] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:21:02.852] <TB0> INFO: Test took 1112ms.
[10:21:02.857] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:21:03.964] <TB0> INFO: Test took 1108ms.
[10:21:03.967] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:21:05.078] <TB0> INFO: Test took 1111ms.
[10:21:05.083] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:21:06.193] <TB0> INFO: Test took 1111ms.
[10:21:06.198] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:21:07.309] <TB0> INFO: Test took 1112ms.
[10:21:07.313] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:21:08.425] <TB0> INFO: Test took 1112ms.
[10:21:08.429] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:21:09.540] <TB0> INFO: Test took 1111ms.
[10:21:10.079] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 530 seconds
[10:21:10.079] <TB0> INFO: PH scale (per ROC): 94 92 82 81 89 92 86 81 80 91 86 87 80 86 98 91
[10:21:10.079] <TB0> INFO: PH offset (per ROC): 144 145 167 154 159 140 141 149 151 146 162 127 171 156 146 158
[10:21:10.270] <TB0> INFO: ######################################################################
[10:21:10.270] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:21:10.270] <TB0> INFO: ######################################################################
[10:21:10.280] <TB0> INFO: scanning low vcal = 50
[10:21:14.643] <TB0> INFO: Test took 4363ms.
[10:21:14.701] <TB0> INFO: scanning low vcal = 100
[10:21:19.089] <TB0> INFO: Test took 4388ms.
[10:21:19.186] <TB0> INFO: scanning low vcal = 150
[10:21:23.575] <TB0> INFO: Test took 4389ms.
[10:21:23.668] <TB0> INFO: scanning low vcal = 200
[10:21:28.005] <TB0> INFO: Test took 4337ms.
[10:21:28.068] <TB0> INFO: scanning low vcal = 250
[10:21:32.411] <TB0> INFO: Test took 4343ms.
[10:21:32.472] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[10:21:36.803] <TB0> INFO: Test took 4331ms.
[10:21:36.863] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[10:21:41.156] <TB0> INFO: Test took 4293ms.
[10:21:41.217] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[10:21:45.644] <TB0> INFO: Test took 4427ms.
[10:21:45.737] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[10:21:50.113] <TB0> INFO: Test took 4376ms.
[10:21:50.214] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:21:54.618] <TB0> INFO: Test took 4404ms.
[10:21:55.045] <TB0> INFO: PixTestGainPedestal::measure() done
[10:22:19.900] <TB0> INFO: PixTestGainPedestal::fit() done
[10:22:19.900] <TB0> INFO: non-linearity mean: 0.955 0.947 0.946 0.947 0.946 0.948 0.953 0.953 0.957 0.956 0.948 0.952 0.949 0.948 0.958 0.954
[10:22:19.900] <TB0> INFO: non-linearity RMS: 0.005 0.006 0.006 0.006 0.006 0.005 0.005 0.006 0.005 0.005 0.006 0.005 0.007 0.006 0.005 0.011
[10:22:19.901] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[10:22:19.920] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[10:22:19.939] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[10:22:19.959] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[10:22:19.978] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[10:22:19.998] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[10:22:20.018] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[10:22:20.037] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[10:22:20.056] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[10:22:20.076] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[10:22:20.093] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[10:22:20.113] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[10:22:20.132] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[10:22:20.152] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[10:22:20.170] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[10:22:20.189] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2031_FullQualification_2015-07-08_10h58m_1436345921//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[10:22:20.209] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 69 seconds
[10:22:20.215] <TB0> INFO: enter test to run
[10:22:20.215] <TB0> INFO: test: exit no parameter change
[10:22:20.786] <TB0> QUIET: Connection to board 126 closed.
[10:22:20.865] <TB0> INFO: pXar: this is the end, my friend