[14:02:33.794] <TB3> INFO: *** Welcome to pxar ***
[14:02:33.795] <TB3> INFO: *** Today: 2015/07/07
[14:02:33.795] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C15.dat
[14:02:33.796] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//tbmParameters_C0b.dat
[14:02:33.796] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//defaultMaskFile.dat
[14:02:33.796] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters_C15.dat
[14:02:33.877] <TB3> INFO: clk: 4
[14:02:33.877] <TB3> INFO: ctr: 4
[14:02:33.877] <TB3> INFO: sda: 19
[14:02:33.877] <TB3> INFO: tin: 9
[14:02:33.877] <TB3> INFO: level: 15
[14:02:33.877] <TB3> INFO: triggerdelay: 0
[14:02:33.877] <TB3> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[14:02:33.877] <TB3> INFO: Log level: INFO
[14:02:33.884] <TB3> INFO: Found DTB DTB_WZ4I6J
[14:02:33.892] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[14:02:33.895] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[14:02:33.898] <TB3> INFO: RPC call hashes of host and DTB match: 447413373
[14:02:35.456] <TB3> INFO: DUT info:
[14:02:35.456] <TB3> INFO: The DUT currently contains the following objects:
[14:02:35.456] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:02:35.456] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:02:35.456] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:02:35.456] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[14:02:35.456] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:35.456] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:35.456] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:35.457] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:35.457] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:35.457] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:35.457] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:35.457] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:35.457] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:35.457] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:35.457] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:35.457] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:35.457] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:35.457] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:35.457] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:35.457] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:35.858] <TB3> INFO: enter 'restricted' command line mode
[14:02:35.858] <TB3> INFO: enter test to run
[14:02:35.858] <TB3> INFO: test: pretest no parameter change
[14:02:35.858] <TB3> INFO: running: pretest
[14:02:35.864] <TB3> INFO: ######################################################################
[14:02:35.864] <TB3> INFO: PixTestPretest::doTest()
[14:02:35.864] <TB3> INFO: ######################################################################
[14:02:35.866] <TB3> INFO: ----------------------------------------------------------------------
[14:02:35.866] <TB3> INFO: PixTestPretest::programROC()
[14:02:35.866] <TB3> INFO: ----------------------------------------------------------------------
[14:02:53.884] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[14:02:53.884] <TB3> INFO: IA differences per ROC: 17.7 18.5 18.5 16.9 17.7 20.1 19.3 18.5 18.5 19.3 18.5 19.3 20.1 19.3 17.7 20.1
[14:02:53.952] <TB3> INFO: ----------------------------------------------------------------------
[14:02:53.952] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[14:02:53.952] <TB3> INFO: ----------------------------------------------------------------------
[14:03:00.038] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 393.1 mA = 24.5688 mA/ROC
[14:03:00.041] <TB3> INFO: ----------------------------------------------------------------------
[14:03:00.041] <TB3> INFO: PixTestPretest::findWorkingPixel()
[14:03:00.041] <TB3> INFO: ----------------------------------------------------------------------
[14:03:08.309] <TB3> INFO: Test took 8263ms.
[14:03:08.610] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[14:03:08.649] <TB3> INFO: ----------------------------------------------------------------------
[14:03:08.649] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[14:03:08.650] <TB3> INFO: ----------------------------------------------------------------------
[14:03:16.942] <TB3> INFO: Test took 8285ms.
[14:03:17.271] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[14:03:17.271] <TB3> INFO: CalDel: 125 132 143 127 147 133 125 120 134 142 122 113 124 144 113 141
[14:03:17.271] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[14:03:17.276] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C0.dat
[14:03:17.277] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C1.dat
[14:03:17.277] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C2.dat
[14:03:17.277] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C3.dat
[14:03:17.277] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C4.dat
[14:03:17.277] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C5.dat
[14:03:17.278] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C6.dat
[14:03:17.278] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C7.dat
[14:03:17.278] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C8.dat
[14:03:17.278] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C9.dat
[14:03:17.279] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C10.dat
[14:03:17.279] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C11.dat
[14:03:17.279] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C12.dat
[14:03:17.279] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C13.dat
[14:03:17.279] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C14.dat
[14:03:17.280] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C15.dat
[14:03:17.280] <TB3> INFO: PixTestPretest::doTest() done, duration: 41 seconds
[14:03:17.393] <TB3> INFO: enter test to run
[14:03:17.393] <TB3> INFO: test: fulltest no parameter change
[14:03:17.393] <TB3> INFO: running: fulltest
[14:03:17.393] <TB3> INFO: ######################################################################
[14:03:17.393] <TB3> INFO: PixTestFullTest::doTest()
[14:03:17.393] <TB3> INFO: ######################################################################
[14:03:17.395] <TB3> INFO: ######################################################################
[14:03:17.395] <TB3> INFO: PixTestAlive::doTest()
[14:03:17.395] <TB3> INFO: ######################################################################
[14:03:17.396] <TB3> INFO: ----------------------------------------------------------------------
[14:03:17.396] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:03:17.396] <TB3> INFO: ----------------------------------------------------------------------
[14:03:20.846] <TB3> INFO: Test took 3448ms.
[14:03:20.865] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:21.095] <TB3> INFO: PixTestAlive::aliveTest() done
[14:03:21.095] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:03:21.097] <TB3> INFO: ----------------------------------------------------------------------
[14:03:21.097] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:03:21.097] <TB3> INFO: ----------------------------------------------------------------------
[14:03:23.851] <TB3> INFO: Test took 2752ms.
[14:03:23.855] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:23.855] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:03:24.088] <TB3> INFO: PixTestAlive::maskTest() done
[14:03:24.088] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:03:24.089] <TB3> INFO: ----------------------------------------------------------------------
[14:03:24.089] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:03:24.090] <TB3> INFO: ----------------------------------------------------------------------
[14:03:27.480] <TB3> INFO: Test took 3389ms.
[14:03:27.501] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:27.727] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[14:03:27.727] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:03:27.728] <TB3> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[14:03:27.740] <TB3> INFO: ######################################################################
[14:03:27.740] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[14:03:27.740] <TB3> INFO: ######################################################################
[14:03:27.743] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[14:03:27.754] <TB3> INFO: dacScan step from 0 .. 29
[14:03:49.155] <TB3> INFO: Test took 21401ms.
[14:03:49.188] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:49.188] <TB3> INFO: dacScan step from 30 .. 59
[14:04:11.069] <TB3> INFO: Test took 21881ms.
[14:04:11.125] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:11.131] <TB3> INFO: dacScan step from 60 .. 89
[14:04:39.281] <TB3> INFO: Test took 28150ms.
[14:04:39.518] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:39.589] <TB3> INFO: dacScan step from 90 .. 119
[14:05:08.429] <TB3> INFO: Test took 28840ms.
[14:05:08.684] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:08.770] <TB3> INFO: dacScan step from 120 .. 149
[14:05:35.265] <TB3> INFO: Test took 26495ms.
[14:05:35.532] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:02.694] <TB3> INFO: PixTestBBMap::doTest() done, duration: 154 seconds
[14:06:02.694] <TB3> INFO: number of dead bumps (per ROC): 6 0 4 0 0 0 0 9 0 0 0 2 1 0 1 6
[14:06:02.694] <TB3> INFO: separation cut (per ROC): 89 86 98 96 90 108 105 95 87 99 94 103 93 109 103 90
[14:06:02.770] <TB3> INFO: ######################################################################
[14:06:02.770] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50
[14:06:02.770] <TB3> INFO: ######################################################################
[14:06:02.770] <TB3> INFO: ----------------------------------------------------------------------
[14:06:02.770] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[14:06:02.770] <TB3> INFO: ----------------------------------------------------------------------
[14:06:02.770] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (3) hits flags = 16 (plus default)
[14:06:02.778] <TB3> INFO: dacScan step from 0 .. 2
[14:06:16.546] <TB3> INFO: Test took 13768ms.
[14:06:16.567] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:16.567] <TB3> INFO: dacScan step from 3 .. 5
[14:06:31.528] <TB3> INFO: Test took 14961ms.
[14:06:31.553] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:31.555] <TB3> INFO: dacScan step from 6 .. 8
[14:06:46.428] <TB3> INFO: Test took 14873ms.
[14:06:46.446] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:46.449] <TB3> INFO: dacScan step from 9 .. 11
[14:07:01.331] <TB3> INFO: Test took 14882ms.
[14:07:01.353] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:01.353] <TB3> INFO: dacScan step from 12 .. 14
[14:07:16.183] <TB3> INFO: Test took 14830ms.
[14:07:16.202] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:16.203] <TB3> INFO: dacScan step from 15 .. 17
[14:07:31.077] <TB3> INFO: Test took 14874ms.
[14:07:31.097] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:31.097] <TB3> INFO: dacScan step from 18 .. 20
[14:07:45.878] <TB3> INFO: Test took 14781ms.
[14:07:45.897] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:45.898] <TB3> INFO: dacScan step from 21 .. 23
[14:08:00.775] <TB3> INFO: Test took 14876ms.
[14:08:00.798] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:00.798] <TB3> INFO: dacScan step from 24 .. 26
[14:08:15.690] <TB3> INFO: Test took 14892ms.
[14:08:15.711] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:15.711] <TB3> INFO: dacScan step from 27 .. 29
[14:08:30.651] <TB3> INFO: Test took 14940ms.
[14:08:30.675] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:30.675] <TB3> INFO: dacScan step from 30 .. 32
[14:08:45.569] <TB3> INFO: Test took 14894ms.
[14:08:45.590] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:45.590] <TB3> INFO: dacScan step from 33 .. 35
[14:09:00.436] <TB3> INFO: Test took 14846ms.
[14:09:00.461] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:00.461] <TB3> INFO: dacScan step from 36 .. 38
[14:09:15.283] <TB3> INFO: Test took 14822ms.
[14:09:15.308] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:15.308] <TB3> INFO: dacScan step from 39 .. 41
[14:09:30.198] <TB3> INFO: Test took 14890ms.
[14:09:30.220] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:30.220] <TB3> INFO: dacScan step from 42 .. 44
[14:09:45.003] <TB3> INFO: Test took 14783ms.
[14:09:45.029] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:45.029] <TB3> INFO: dacScan step from 45 .. 47
[14:09:59.919] <TB3> INFO: Test took 14890ms.
[14:09:59.942] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:59.942] <TB3> INFO: dacScan step from 48 .. 50
[14:10:14.836] <TB3> INFO: Test took 14894ms.
[14:10:14.861] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:14.861] <TB3> INFO: dacScan step from 51 .. 53
[14:10:29.650] <TB3> INFO: Test took 14789ms.
[14:10:29.672] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:29.672] <TB3> INFO: dacScan step from 54 .. 56
[14:10:44.533] <TB3> INFO: Test took 14861ms.
[14:10:44.559] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:44.559] <TB3> INFO: dacScan step from 57 .. 59
[14:10:59.499] <TB3> INFO: Test took 14940ms.
[14:10:59.526] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:59.526] <TB3> INFO: dacScan step from 60 .. 62
[14:11:14.421] <TB3> INFO: Test took 14895ms.
[14:11:14.445] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:14.445] <TB3> INFO: dacScan step from 63 .. 65
[14:11:29.303] <TB3> INFO: Test took 14858ms.
[14:11:29.328] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:29.328] <TB3> INFO: dacScan step from 66 .. 68
[14:11:44.140] <TB3> INFO: Test took 14812ms.
[14:11:44.163] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:44.163] <TB3> INFO: dacScan step from 69 .. 71
[14:11:59.107] <TB3> INFO: Test took 14944ms.
[14:11:59.131] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:59.131] <TB3> INFO: dacScan step from 72 .. 74
[14:12:14.107] <TB3> INFO: Test took 14976ms.
[14:12:14.134] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:14.134] <TB3> INFO: dacScan step from 75 .. 77
[14:12:29.012] <TB3> INFO: Test took 14878ms.
[14:12:29.051] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:29.051] <TB3> INFO: dacScan step from 78 .. 80
[14:12:44.156] <TB3> INFO: Test took 15105ms.
[14:12:44.189] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:44.190] <TB3> INFO: dacScan step from 81 .. 83
[14:12:59.790] <TB3> INFO: Test took 15600ms.
[14:12:59.834] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:59.836] <TB3> INFO: dacScan step from 84 .. 86
[14:13:16.071] <TB3> INFO: Test took 16235ms.
[14:13:16.145] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:16.148] <TB3> INFO: dacScan step from 87 .. 89
[14:13:33.076] <TB3> INFO: Test took 16928ms.
[14:13:33.151] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:33.155] <TB3> INFO: dacScan step from 90 .. 92
[14:13:50.840] <TB3> INFO: Test took 17685ms.
[14:13:50.933] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:50.937] <TB3> INFO: dacScan step from 93 .. 95
[14:14:09.870] <TB3> INFO: Test took 18933ms.
[14:14:10.023] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:10.031] <TB3> INFO: dacScan step from 96 .. 98
[14:14:29.888] <TB3> INFO: Test took 19856ms.
[14:14:30.057] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:30.064] <TB3> INFO: dacScan step from 99 .. 101
[14:14:50.956] <TB3> INFO: Test took 20892ms.
[14:14:51.128] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:51.137] <TB3> INFO: dacScan step from 102 .. 104
[14:15:12.697] <TB3> INFO: Test took 21560ms.
[14:15:12.869] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:12.878] <TB3> INFO: dacScan step from 105 .. 107
[14:15:34.894] <TB3> INFO: Test took 22016ms.
[14:15:35.065] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:35.074] <TB3> INFO: dacScan step from 108 .. 110
[14:15:57.380] <TB3> INFO: Test took 22305ms.
[14:15:57.552] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:57.563] <TB3> INFO: dacScan step from 111 .. 113
[14:16:20.090] <TB3> INFO: Test took 22527ms.
[14:16:20.279] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:20.287] <TB3> INFO: dacScan step from 114 .. 116
[14:16:42.639] <TB3> INFO: Test took 22351ms.
[14:16:42.828] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:42.837] <TB3> INFO: dacScan step from 117 .. 119
[14:17:05.345] <TB3> INFO: Test took 22508ms.
[14:17:05.514] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:05.523] <TB3> INFO: dacScan step from 120 .. 122
[14:17:27.907] <TB3> INFO: Test took 22381ms.
[14:17:28.148] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:28.157] <TB3> INFO: dacScan step from 123 .. 125
[14:17:50.560] <TB3> INFO: Test took 22403ms.
[14:17:50.721] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:50.729] <TB3> INFO: dacScan step from 126 .. 128
[14:18:13.055] <TB3> INFO: Test took 22325ms.
[14:18:13.226] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:13.235] <TB3> INFO: dacScan step from 129 .. 131
[14:18:35.698] <TB3> INFO: Test took 22463ms.
[14:18:35.877] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:35.887] <TB3> INFO: dacScan step from 132 .. 134
[14:18:58.028] <TB3> INFO: Test took 22141ms.
[14:18:58.191] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:58.200] <TB3> INFO: dacScan step from 135 .. 137
[14:19:20.446] <TB3> INFO: Test took 22246ms.
[14:19:20.619] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:20.628] <TB3> INFO: dacScan step from 138 .. 140
[14:19:43.116] <TB3> INFO: Test took 22488ms.
[14:19:43.295] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:43.306] <TB3> INFO: dacScan step from 141 .. 143
[14:20:05.665] <TB3> INFO: Test took 22359ms.
[14:20:05.838] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:05.846] <TB3> INFO: dacScan step from 144 .. 146
[14:20:28.096] <TB3> INFO: Test took 22249ms.
[14:20:28.263] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:28.272] <TB3> INFO: dacScan step from 147 .. 149
[14:20:50.217] <TB3> INFO: Test took 21945ms.
[14:20:50.419] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:50.431] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:20:52.018] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:20:53.532] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:20:54.990] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:20:56.421] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:20:57.917] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:20:59.332] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:21:00.795] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:21:02.243] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:21:03.732] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:21:05.187] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:21:06.631] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:21:08.071] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:21:09.535] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:21:10.897] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:21:12.263] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[14:21:13.777] <TB3> INFO: PixTestScurves::scurves() done
[14:21:13.777] <TB3> INFO: Vcal mean: 90.05 84.45 101.53 98.87 93.15 109.26 103.31 93.29 90.57 101.56 89.86 98.56 90.75 98.28 100.71 90.99
[14:21:13.777] <TB3> INFO: Vcal RMS: 4.55 5.65 5.33 5.52 6.56 5.01 5.84 5.23 4.87 5.27 4.53 5.20 5.31 4.98 5.58 5.11
[14:21:13.777] <TB3> INFO: PixTestScurves::fullTest() done, duration: 911 seconds
[14:21:13.851] <TB3> INFO: ######################################################################
[14:21:13.851] <TB3> INFO: PixTestTrim::doTest()
[14:21:13.851] <TB3> INFO: ######################################################################
[14:21:13.853] <TB3> INFO: ----------------------------------------------------------------------
[14:21:13.853] <TB3> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[14:21:13.853] <TB3> INFO: ----------------------------------------------------------------------
[14:21:13.950] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[14:21:13.950] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[14:21:13.958] <TB3> INFO: dacScan step from 0 .. 19
[14:21:28.917] <TB3> INFO: Test took 14959ms.
[14:21:28.946] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:28.946] <TB3> INFO: dacScan step from 20 .. 39
[14:21:43.296] <TB3> INFO: Test took 14350ms.
[14:21:43.316] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:43.316] <TB3> INFO: dacScan step from 40 .. 59
[14:21:58.184] <TB3> INFO: Test took 14868ms.
[14:21:58.207] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:58.207] <TB3> INFO: dacScan step from 60 .. 79
[14:22:13.394] <TB3> INFO: Test took 15186ms.
[14:22:13.417] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:13.417] <TB3> INFO: dacScan step from 80 .. 99
[14:22:28.657] <TB3> INFO: Test took 15240ms.
[14:22:28.701] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:28.704] <TB3> INFO: dacScan step from 100 .. 119
[14:22:46.683] <TB3> INFO: Test took 17979ms.
[14:22:46.858] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:46.890] <TB3> INFO: dacScan step from 120 .. 139
[14:23:06.429] <TB3> INFO: Test took 19539ms.
[14:23:06.645] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:06.684] <TB3> INFO: dacScan step from 140 .. 159
[14:23:22.453] <TB3> INFO: Test took 15769ms.
[14:23:22.542] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:44.552] <TB3> INFO: ROC 0 VthrComp = 96
[14:23:44.552] <TB3> INFO: ROC 1 VthrComp = 88
[14:23:44.552] <TB3> INFO: ROC 2 VthrComp = 102
[14:23:44.552] <TB3> INFO: ROC 3 VthrComp = 99
[14:23:44.552] <TB3> INFO: ROC 4 VthrComp = 92
[14:23:44.553] <TB3> INFO: ROC 5 VthrComp = 110
[14:23:44.553] <TB3> INFO: ROC 6 VthrComp = 104
[14:23:44.553] <TB3> INFO: ROC 7 VthrComp = 98
[14:23:44.553] <TB3> INFO: ROC 8 VthrComp = 93
[14:23:44.553] <TB3> INFO: ROC 9 VthrComp = 103
[14:23:44.553] <TB3> INFO: ROC 10 VthrComp = 96
[14:23:44.553] <TB3> INFO: ROC 11 VthrComp = 104
[14:23:44.553] <TB3> INFO: ROC 12 VthrComp = 94
[14:23:44.553] <TB3> INFO: ROC 13 VthrComp = 104
[14:23:44.554] <TB3> INFO: ROC 14 VthrComp = 103
[14:23:44.554] <TB3> INFO: ROC 15 VthrComp = 95
[14:23:44.554] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[14:23:44.554] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[14:23:44.563] <TB3> INFO: dacScan step from 0 .. 19
[14:23:59.685] <TB3> INFO: Test took 15121ms.
[14:23:59.709] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:59.709] <TB3> INFO: dacScan step from 20 .. 39
[14:24:14.227] <TB3> INFO: Test took 14518ms.
[14:24:14.260] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:14.264] <TB3> INFO: dacScan step from 40 .. 59
[14:24:32.058] <TB3> INFO: Test took 17794ms.
[14:24:32.224] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:32.257] <TB3> INFO: dacScan step from 60 .. 79
[14:24:52.471] <TB3> INFO: Test took 20214ms.
[14:24:52.624] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:52.667] <TB3> INFO: dacScan step from 80 .. 99
[14:25:12.752] <TB3> INFO: Test took 20085ms.
[14:25:12.920] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:12.965] <TB3> INFO: dacScan step from 100 .. 119
[14:25:33.150] <TB3> INFO: Test took 20185ms.
[14:25:33.313] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:33.360] <TB3> INFO: dacScan step from 120 .. 139
[14:25:52.039] <TB3> INFO: Test took 18679ms.
[14:25:52.197] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:52.246] <TB3> INFO: dacScan step from 140 .. 159
[14:26:12.300] <TB3> INFO: Test took 20054ms.
[14:26:12.481] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:36.419] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 56.1467 for pixel 21/2 mean/min/max = 44.4222/32.5878/56.2565
[14:26:36.420] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 60.0432 for pixel 5/0 mean/min/max = 46.6766/33.3088/60.0445
[14:26:36.420] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 57.5832 for pixel 30/0 mean/min/max = 45.4501/33.2369/57.6634
[14:26:36.420] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 59.6022 for pixel 18/70 mean/min/max = 45.4754/31.2252/59.7255
[14:26:36.420] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 60.9519 for pixel 12/70 mean/min/max = 46.8799/32.607/61.1528
[14:26:36.421] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 59.1656 for pixel 24/79 mean/min/max = 46.3391/33.4977/59.1804
[14:26:36.421] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 60.4677 for pixel 12/43 mean/min/max = 47.1563/33.823/60.4897
[14:26:36.421] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 57.5832 for pixel 0/2 mean/min/max = 44.7832/31.8212/57.7452
[14:26:36.421] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 57.0932 for pixel 4/11 mean/min/max = 45.3218/33.5344/57.1092
[14:26:36.422] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 58.1737 for pixel 51/5 mean/min/max = 45.4791/32.7481/58.2101
[14:26:36.422] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 54.9869 for pixel 50/59 mean/min/max = 43.6393/32.153/55.1256
[14:26:36.422] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 57.6125 for pixel 19/3 mean/min/max = 46.0127/34.3783/57.6471
[14:26:36.422] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 57.9972 for pixel 15/66 mean/min/max = 45.1392/32.2633/58.0152
[14:26:36.423] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 56.7572 for pixel 24/64 mean/min/max = 45.8183/34.8051/56.8316
[14:26:36.423] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 57.4357 for pixel 0/44 mean/min/max = 45.2024/32.879/57.5257
[14:26:36.423] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 57.4182 for pixel 18/78 mean/min/max = 44.7053/31.9418/57.4687
[14:26:36.423] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:28:09.384] <TB3> INFO: Test took 92961ms.
[14:28:10.910] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:28:10.918] <TB3> INFO: dacScan step from 0 .. 19
[14:28:33.617] <TB3> INFO: Test took 22698ms.
[14:28:33.664] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:33.665] <TB3> INFO: dacScan step from 20 .. 39
[14:29:01.429] <TB3> INFO: Test took 27764ms.
[14:29:01.663] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:01.692] <TB3> INFO: dacScan step from 40 .. 59



[14:29:34.609] <TB3> INFO: Test took 32917ms.
[14:29:34.906] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:34.957] <TB3> INFO: dacScan step from 60 .. 79




[14:30:07.292] <TB3> INFO: Test took 32335ms.
[14:30:07.566] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:07.616] <TB3> INFO: dacScan step from 80 .. 99



[14:30:38.639] <TB3> INFO: Test took 31023ms.
[14:30:38.940] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:38.990] <TB3> INFO: dacScan step from 100 .. 119


[14:31:11.945] <TB3> INFO: Test took 32955ms.
[14:31:12.229] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:12.282] <TB3> INFO: dacScan step from 120 .. 139
[14:31:45.345] <TB3> INFO: Test took 33063ms.
[14:31:45.639] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:45.692] <TB3> INFO: dacScan step from 140 .. 159
[14:32:16.436] <TB3> INFO: Test took 30744ms.
[14:32:16.721] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:16.776] <TB3> INFO: dacScan step from 160 .. 179



[14:32:49.900] <TB3> INFO: Test took 33124ms.
[14:32:50.174] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:50.233] <TB3> INFO: dacScan step from 180 .. 199




[14:33:23.782] <TB3> INFO: Test took 33549ms.
[14:33:24.068] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:49.180] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.068482 .. 255.000000
[14:33:49.259] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[14:33:49.267] <TB3> INFO: dacScan step from 0 .. 19
[14:34:02.841] <TB3> INFO: Test took 13573ms.
[14:34:02.861] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:02.861] <TB3> INFO: dacScan step from 20 .. 39
[14:34:17.058] <TB3> INFO: Test took 14197ms.
[14:34:17.133] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:17.149] <TB3> INFO: dacScan step from 40 .. 59
[14:34:33.547] <TB3> INFO: Test took 16398ms.
[14:34:33.693] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:33.753] <TB3> INFO: dacScan step from 60 .. 79
[14:34:51.375] <TB3> INFO: Test took 17622ms.
[14:34:51.522] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:51.573] <TB3> INFO: dacScan step from 80 .. 99
[14:35:08.046] <TB3> INFO: Test took 16473ms.
[14:35:08.205] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:35:08.258] <TB3> INFO: dacScan step from 100 .. 119
[14:35:25.287] <TB3> INFO: Test took 17029ms.
[14:35:25.433] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:35:25.483] <TB3> INFO: dacScan step from 120 .. 139
[14:35:43.143] <TB3> INFO: Test took 17660ms.
[14:35:43.336] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:35:43.391] <TB3> INFO: dacScan step from 140 .. 159
[14:36:01.141] <TB3> INFO: Test took 17750ms.
[14:36:01.296] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:01.355] <TB3> INFO: dacScan step from 160 .. 179
[14:36:19.097] <TB3> INFO: Test took 17741ms.
[14:36:19.292] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:19.346] <TB3> INFO: dacScan step from 180 .. 199
[14:36:37.859] <TB3> INFO: Test took 18513ms.
[14:36:38.011] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:38.060] <TB3> INFO: dacScan step from 200 .. 219
[14:36:55.679] <TB3> INFO: Test took 17619ms.
[14:36:55.834] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:55.891] <TB3> INFO: dacScan step from 220 .. 239
[14:37:13.362] <TB3> INFO: Test took 17471ms.
[14:37:13.504] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:37:13.562] <TB3> INFO: dacScan step from 240 .. 255
[14:37:28.332] <TB3> INFO: Test took 14770ms.
[14:37:28.458] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:38:02.022] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 18.535624 .. 44.650312
[14:38:02.106] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 8 .. 54 (20) hits flags = 16 (plus default)
[14:38:02.114] <TB3> INFO: dacScan step from 8 .. 27
[14:38:15.077] <TB3> INFO: Test took 12963ms.
[14:38:15.096] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:38:15.097] <TB3> INFO: dacScan step from 28 .. 47
[14:38:30.373] <TB3> INFO: Test took 15276ms.
[14:38:30.497] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:38:30.532] <TB3> INFO: dacScan step from 48 .. 54
[14:38:38.185] <TB3> INFO: Test took 7653ms.
[14:38:38.234] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:38:54.735] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 5.037355 .. 39.685852
[14:38:54.815] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 5 .. 49 (20) hits flags = 16 (plus default)
[14:38:54.823] <TB3> INFO: dacScan step from 5 .. 24
[14:39:08.333] <TB3> INFO: Test took 13510ms.
[14:39:08.359] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:08.360] <TB3> INFO: dacScan step from 25 .. 44
[14:39:23.824] <TB3> INFO: Test took 15464ms.
[14:39:23.934] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:23.962] <TB3> INFO: dacScan step from 45 .. 49
[14:39:30.554] <TB3> INFO: Test took 6592ms.
[14:39:30.592] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:45.700] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 1.785041 .. 38.700098
[14:39:45.780] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 48 (20) hits flags = 16 (plus default)
[14:39:45.788] <TB3> INFO: dacScan step from 1 .. 20
[14:39:59.364] <TB3> INFO: Test took 13576ms.
[14:39:59.383] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:59.383] <TB3> INFO: dacScan step from 21 .. 40
[14:40:14.223] <TB3> INFO: Test took 14840ms.
[14:40:14.302] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:40:14.318] <TB3> INFO: dacScan step from 41 .. 48
[14:40:22.948] <TB3> INFO: Test took 8630ms.
[14:40:23.015] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:40:37.438] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[14:40:37.438] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[14:40:37.446] <TB3> INFO: dacScan step from 15 .. 34
[14:40:59.348] <TB3> INFO: Test took 21902ms.
[14:40:59.417] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:40:59.428] <TB3> INFO: dacScan step from 35 .. 54


[14:41:30.898] <TB3> INFO: Test took 31470ms.
[14:41:31.219] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:31.275] <TB3> INFO: dacScan step from 55 .. 55
[14:41:35.462] <TB3> INFO: Test took 4187ms.
[14:41:35.480] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:49.923] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C0.dat
[14:41:49.924] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C1.dat
[14:41:49.924] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C2.dat
[14:41:49.925] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C3.dat
[14:41:49.925] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C4.dat
[14:41:49.925] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C5.dat
[14:41:49.925] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C6.dat
[14:41:49.926] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C7.dat
[14:41:49.926] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C8.dat
[14:41:49.926] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C9.dat
[14:41:49.926] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C10.dat
[14:41:49.927] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C11.dat
[14:41:49.927] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C12.dat
[14:41:49.927] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C13.dat
[14:41:49.928] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C14.dat
[14:41:49.928] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C15.dat
[14:41:49.928] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C0.dat
[14:41:49.936] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C1.dat
[14:41:49.942] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C2.dat
[14:41:49.948] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C3.dat
[14:41:49.953] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C4.dat
[14:41:49.959] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C5.dat
[14:41:49.965] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C6.dat
[14:41:49.971] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C7.dat
[14:41:49.977] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C8.dat
[14:41:49.983] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C9.dat
[14:41:49.989] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C10.dat
[14:41:49.994] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C11.dat
[14:41:50.000] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C12.dat
[14:41:50.006] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C13.dat
[14:41:50.011] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C14.dat
[14:41:50.018] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C15.dat
[14:41:50.024] <TB3> INFO: PixTestTrim::trimTest() done
[14:41:50.024] <TB3> INFO: vtrim: 110 109 99 117 107 118 127 107 99 99 102 114 98 103 100 121
[14:41:50.024] <TB3> INFO: vthrcomp: 96 88 102 99 92 110 104 98 93 103 96 104 94 104 103 95
[14:41:50.024] <TB3> INFO: vcal mean: 35.05 35.10 35.09 35.03 35.11 35.10 35.08 35.02 35.08 35.07 35.06 35.12 35.06 35.09 35.14 34.98
[14:41:50.024] <TB3> INFO: vcal RMS: 0.99 1.03 1.25 1.10 1.21 1.03 1.04 1.01 0.97 1.02 0.99 1.06 1.01 0.97 1.08 1.03
[14:41:50.024] <TB3> INFO: bits mean: 10.14 9.30 9.53 10.09 9.32 9.35 9.39 9.84 9.69 9.75 10.30 9.93 9.55 9.27 9.48 9.98
[14:41:50.024] <TB3> INFO: bits RMS: 2.39 2.58 2.51 2.49 2.61 2.49 2.39 2.65 2.47 2.49 2.40 2.24 2.64 2.37 2.63 2.63
[14:41:50.029] <TB3> INFO: ----------------------------------------------------------------------
[14:41:50.029] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 255 240 150 100
[14:41:50.029] <TB3> INFO: ----------------------------------------------------------------------
[14:41:50.032] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:41:50.042] <TB3> INFO: dacScan step from 0 .. 19
[14:42:12.639] <TB3> INFO: Test took 22597ms.
[14:42:12.673] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:42:12.673] <TB3> INFO: dacScan step from 20 .. 39
[14:42:35.366] <TB3> INFO: Test took 22693ms.
[14:42:35.420] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:42:35.423] <TB3> INFO: dacScan step from 40 .. 59
[14:43:03.169] <TB3> INFO: Test took 27745ms.
[14:43:03.419] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:03.458] <TB3> INFO: dacScan step from 60 .. 79


[14:43:33.648] <TB3> INFO: Test took 30190ms.
[14:43:33.945] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:34.000] <TB3> INFO: dacScan step from 80 .. 99
[14:44:06.835] <TB3> INFO: Test took 32835ms.
[14:44:07.109] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:07.161] <TB3> INFO: dacScan step from 100 .. 119
[14:44:38.358] <TB3> INFO: Test took 31197ms.
[14:44:38.619] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:38.671] <TB3> INFO: dacScan step from 120 .. 139
[14:45:10.817] <TB3> INFO: Test took 32146ms.
[14:45:11.114] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:11.171] <TB3> INFO: dacScan step from 140 .. 159
[14:45:43.771] <TB3> INFO: Test took 32599ms.
[14:45:44.068] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:44.120] <TB3> INFO: dacScan step from 160 .. 179
[14:46:15.756] <TB3> INFO: Test took 31636ms.
[14:46:16.100] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:16.155] <TB3> INFO: dacScan step from 180 .. 199
[14:46:49.830] <TB3> INFO: Test took 33675ms.
[14:46:50.177] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:19.743] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 87 (20) hits flags = 16 (plus default)
[14:47:19.753] <TB3> INFO: dacScan step from 0 .. 19
[14:47:40.937] <TB3> INFO: Test took 21184ms.
[14:47:40.982] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:40.982] <TB3> INFO: dacScan step from 20 .. 39
[14:48:04.680] <TB3> INFO: Test took 23698ms.
[14:48:04.768] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:04.778] <TB3> INFO: dacScan step from 40 .. 59



[14:48:36.210] <TB3> INFO: Test took 31432ms.
[14:48:36.485] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:36.531] <TB3> INFO: dacScan step from 60 .. 79
[14:49:07.310] <TB3> INFO: Test took 30779ms.
[14:49:07.584] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:07.634] <TB3> INFO: dacScan step from 80 .. 87
[14:49:22.419] <TB3> INFO: Test took 14785ms.
[14:49:22.542] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:43.110] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 75 (20) hits flags = 16 (plus default)
[14:49:43.118] <TB3> INFO: dacScan step from 0 .. 19
[14:50:05.773] <TB3> INFO: Test took 22655ms.
[14:50:05.818] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:05.818] <TB3> INFO: dacScan step from 20 .. 39
[14:50:30.963] <TB3> INFO: Test took 25145ms.
[14:50:31.132] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:31.148] <TB3> INFO: dacScan step from 40 .. 59




[14:51:01.185] <TB3> INFO: Test took 30037ms.
[14:51:01.469] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:01.520] <TB3> INFO: dacScan step from 60 .. 75
[14:51:26.939] <TB3> INFO: Test took 25419ms.
[14:51:27.146] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:42.474] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 67 (20) hits flags = 16 (plus default)
[14:51:42.484] <TB3> INFO: dacScan step from 0 .. 19
[14:52:05.050] <TB3> INFO: Test took 22566ms.
[14:52:05.090] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:05.090] <TB3> INFO: dacScan step from 20 .. 39
[14:52:31.259] <TB3> INFO: Test took 26169ms.
[14:52:31.431] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:31.452] <TB3> INFO: dacScan step from 40 .. 59



[14:53:04.248] <TB3> INFO: Test took 32796ms.
[14:53:04.526] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:04.575] <TB3> INFO: dacScan step from 60 .. 67
[14:53:19.136] <TB3> INFO: Test took 14561ms.
[14:53:19.249] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:35.575] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 65 (20) hits flags = 16 (plus default)
[14:53:35.584] <TB3> INFO: dacScan step from 0 .. 19
[14:53:56.686] <TB3> INFO: Test took 21102ms.
[14:53:56.726] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:56.726] <TB3> INFO: dacScan step from 20 .. 39
[14:54:24.346] <TB3> INFO: Test took 27619ms.
[14:54:24.547] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:24.571] <TB3> INFO: dacScan step from 40 .. 59



[14:54:57.394] <TB3> INFO: Test took 32823ms.
[14:54:57.712] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:57.750] <TB3> INFO: dacScan step from 60 .. 65
[14:55:09.546] <TB3> INFO: Test took 11796ms.
[14:55:09.631] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:25.788] <TB3> INFO: PixTestTrim::trimBitTest() done
[14:55:25.789] <TB3> INFO: PixTestTrim::doTest() done, duration: 2051 seconds
[14:55:26.595] <TB3> INFO: ######################################################################
[14:55:26.595] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:55:26.595] <TB3> INFO: ######################################################################
[14:55:30.038] <TB3> INFO: Test took 3442ms.
[14:55:30.067] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:33.719] <TB3> INFO: Test took 3453ms.
[14:55:33.783] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:37.263] <TB3> INFO: Test took 3469ms.
[14:55:37.329] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:37.336] <TB3> INFO: The DUT currently contains the following objects:
[14:55:37.336] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:55:37.336] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:55:37.336] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:55:37.336] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:55:37.336] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:37.336] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:37.336] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:37.336] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:37.336] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:37.336] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:37.336] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:37.336] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:37.336] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:37.336] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:37.336] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:37.336] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:37.336] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:37.336] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:37.336] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:37.336] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:38.445] <TB3> INFO: Test took 1109ms.
[14:55:38.447] <TB3> INFO: The DUT currently contains the following objects:
[14:55:38.447] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:55:38.447] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:55:38.447] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:55:38.447] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:55:38.447] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:38.447] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:38.447] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:38.447] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:38.448] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:38.448] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:38.448] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:38.448] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:38.448] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:38.448] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:38.448] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:38.448] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:38.448] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:38.448] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:38.448] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:38.448] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:39.555] <TB3> INFO: Test took 1107ms.
[14:55:39.556] <TB3> INFO: The DUT currently contains the following objects:
[14:55:39.556] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:55:39.556] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:55:39.556] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:55:39.556] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:55:39.556] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:39.556] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:39.556] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:39.556] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:39.556] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:39.556] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:39.556] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:39.556] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:39.556] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:39.556] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:39.556] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:39.556] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:39.557] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:39.557] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:39.557] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:39.557] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:40.665] <TB3> INFO: Test took 1108ms.
[14:55:40.666] <TB3> INFO: The DUT currently contains the following objects:
[14:55:40.666] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:55:40.666] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:55:40.666] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:55:40.666] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:55:40.666] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:40.666] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:40.666] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:40.666] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:40.666] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:40.666] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:40.666] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:40.666] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:40.666] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:40.666] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:40.666] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:40.667] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:40.667] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:40.667] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:40.667] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:40.667] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:41.774] <TB3> INFO: Test took 1107ms.
[14:55:41.776] <TB3> INFO: The DUT currently contains the following objects:
[14:55:41.776] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:55:41.776] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:55:41.776] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:55:41.776] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:55:41.776] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:41.776] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:41.776] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:41.776] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:41.776] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:41.776] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:41.776] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:41.776] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:41.776] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:41.776] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:41.777] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:41.777] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:41.777] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:41.777] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:41.777] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:41.777] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:42.884] <TB3> INFO: Test took 1107ms.
[14:55:42.915] <TB3> INFO: The DUT currently contains the following objects:
[14:55:42.915] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:55:42.915] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:55:42.915] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:55:42.915] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:55:42.915] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:42.915] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:42.915] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:42.915] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:42.915] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:42.915] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:42.915] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:42.915] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:42.915] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:42.916] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:42.916] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:42.916] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:42.916] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:42.916] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:42.916] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:42.916] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:44.025] <TB3> INFO: Test took 1109ms.
[14:55:44.026] <TB3> INFO: The DUT currently contains the following objects:
[14:55:44.026] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:55:44.026] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:55:44.026] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:55:44.026] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:55:44.026] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:44.026] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:44.026] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:44.026] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:44.026] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:44.026] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:44.026] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:44.026] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:44.026] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:44.026] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:44.026] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:44.026] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:44.026] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:44.026] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:44.026] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:44.027] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:45.133] <TB3> INFO: Test took 1106ms.
[14:55:45.135] <TB3> INFO: The DUT currently contains the following objects:
[14:55:45.135] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:55:45.135] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:55:45.135] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:55:45.135] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:55:45.135] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:45.135] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:45.135] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:45.135] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:45.135] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:45.135] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:45.135] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:45.135] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:45.135] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:45.135] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:45.135] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:45.135] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:45.135] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:45.135] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:45.135] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:45.135] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:46.243] <TB3> INFO: Test took 1108ms.
[14:55:46.244] <TB3> INFO: The DUT currently contains the following objects:
[14:55:46.244] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:55:46.245] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:55:46.245] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:55:46.245] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:55:46.245] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:46.245] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:46.245] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:46.245] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:46.245] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:46.245] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:46.245] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:46.245] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:46.245] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:46.245] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:46.245] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:46.245] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:46.245] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:46.245] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:46.245] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:46.245] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:47.352] <TB3> INFO: Test took 1107ms.
[14:55:47.353] <TB3> INFO: The DUT currently contains the following objects:
[14:55:47.353] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:55:47.353] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:55:47.354] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:55:47.354] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:55:47.354] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:47.354] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:47.354] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:47.354] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:47.354] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:47.354] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:47.354] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:47.354] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:47.354] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:47.354] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:47.354] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:47.354] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:47.354] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:47.354] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:47.354] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:47.354] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:48.464] <TB3> INFO: Test took 1110ms.
[14:55:48.465] <TB3> INFO: The DUT currently contains the following objects:
[14:55:48.475] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:55:48.475] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:55:48.476] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:55:48.476] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:55:48.476] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:48.476] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:48.476] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:48.476] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:48.476] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:48.476] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:48.476] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:48.476] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:48.476] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:48.476] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:48.476] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:48.476] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:48.476] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:48.476] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:48.476] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:48.476] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:49.573] <TB3> INFO: Test took 1097ms.
[14:55:49.574] <TB3> INFO: The DUT currently contains the following objects:
[14:55:49.574] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:55:49.574] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:55:49.574] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:55:49.574] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:55:49.574] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:49.574] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:49.574] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:49.574] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:49.574] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:49.574] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:49.574] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:49.574] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:49.574] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:49.574] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:49.574] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:49.574] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:49.574] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:49.575] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:49.575] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:49.575] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:50.681] <TB3> INFO: Test took 1106ms.
[14:55:50.681] <TB3> INFO: The DUT currently contains the following objects:
[14:55:50.681] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:55:50.681] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:55:50.681] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:55:50.681] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:55:50.681] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:50.682] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:50.682] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:50.682] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:50.682] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:50.682] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:50.682] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:50.682] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:50.682] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:50.682] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:50.682] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:50.682] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:50.682] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:50.682] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:50.682] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:50.682] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:51.789] <TB3> INFO: Test took 1107ms.
[14:55:51.790] <TB3> INFO: The DUT currently contains the following objects:
[14:55:51.790] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:55:51.790] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:55:51.791] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:55:51.791] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:55:51.791] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:51.791] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:51.791] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:51.791] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:51.791] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:51.791] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:51.791] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:51.791] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:51.791] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:51.791] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:51.791] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:51.791] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:51.791] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:51.791] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:51.791] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:51.791] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:52.900] <TB3> INFO: Test took 1109ms.
[14:55:52.902] <TB3> INFO: The DUT currently contains the following objects:
[14:55:52.902] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:55:52.902] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:55:52.902] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:55:52.902] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:55:52.902] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:52.902] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:52.902] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:52.902] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:52.902] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:52.902] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:52.902] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:52.902] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:52.902] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:52.902] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:52.902] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:52.902] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:52.902] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:52.902] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:52.903] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:52.903] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:54.010] <TB3> INFO: Test took 1107ms.
[14:55:54.011] <TB3> INFO: The DUT currently contains the following objects:
[14:55:54.011] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[14:55:54.011] <TB3> INFO: TBM Core alpha (0): 7 registers set
[14:55:54.012] <TB3> INFO: TBM Core beta (1): 7 registers set
[14:55:54.012] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:55:54.012] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:54.012] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:54.012] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:54.012] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:54.012] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:54.012] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:54.012] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:54.012] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:54.012] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:54.012] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:54.012] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:54.012] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:54.012] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:54.012] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:54.012] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:54.012] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:55:55.120] <TB3> INFO: Test took 1108ms.
[14:55:55.124] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:59:35.765] <TB3> INFO: Test took 220641ms.
[14:59:37.334] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:16.751] <TB3> INFO: Test took 219417ms.
[15:03:18.417] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:03:18.424] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:03:18.430] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:03:18.437] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:03:18.444] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:03:18.451] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:03:18.457] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:03:18.465] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[15:03:18.472] <TB3> INFO: safety margin for low PH: adding 5, margin is now 25
[15:03:18.479] <TB3> INFO: safety margin for low PH: adding 6, margin is now 26
[15:03:18.486] <TB3> INFO: safety margin for low PH: adding 7, margin is now 27
[15:03:18.493] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:03:18.500] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:03:18.508] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[15:03:18.515] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[15:03:18.522] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[15:03:18.529] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:03:18.536] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:03:18.543] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:03:18.550] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:03:18.558] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:03:18.564] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:03:18.572] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:03:18.579] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:03:18.586] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:03:18.593] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[15:03:18.637] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C0.dat
[15:03:18.637] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C1.dat
[15:03:18.637] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C2.dat
[15:03:18.637] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C3.dat
[15:03:18.637] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C4.dat
[15:03:18.637] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C5.dat
[15:03:18.638] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C6.dat
[15:03:18.638] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C7.dat
[15:03:18.638] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C8.dat
[15:03:18.638] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C9.dat
[15:03:18.638] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C10.dat
[15:03:18.639] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C11.dat
[15:03:18.639] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C12.dat
[15:03:18.639] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C13.dat
[15:03:18.639] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C14.dat
[15:03:18.639] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C15.dat
[15:03:22.090] <TB3> INFO: Test took 3448ms.
[15:03:25.805] <TB3> INFO: Test took 3438ms.
[15:03:29.512] <TB3> INFO: Test took 3427ms.
[15:03:29.792] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:30.712] <TB3> INFO: Test took 920ms.
[15:03:30.716] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:31.824] <TB3> INFO: Test took 1108ms.
[15:03:31.828] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:32.935] <TB3> INFO: Test took 1107ms.
[15:03:32.938] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:34.048] <TB3> INFO: Test took 1110ms.
[15:03:34.051] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:35.161] <TB3> INFO: Test took 1110ms.
[15:03:35.165] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:36.274] <TB3> INFO: Test took 1110ms.
[15:03:36.277] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:37.387] <TB3> INFO: Test took 1110ms.
[15:03:37.389] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:38.499] <TB3> INFO: Test took 1110ms.
[15:03:38.502] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:39.610] <TB3> INFO: Test took 1108ms.
[15:03:39.614] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:40.721] <TB3> INFO: Test took 1108ms.
[15:03:40.723] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:41.827] <TB3> INFO: Test took 1104ms.
[15:03:41.829] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:42.933] <TB3> INFO: Test took 1104ms.
[15:03:42.935] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:44.045] <TB3> INFO: Test took 1110ms.
[15:03:44.046] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:45.150] <TB3> INFO: Test took 1104ms.
[15:03:45.152] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:46.260] <TB3> INFO: Test took 1108ms.
[15:03:46.263] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:47.372] <TB3> INFO: Test took 1109ms.
[15:03:47.376] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:48.484] <TB3> INFO: Test took 1109ms.
[15:03:48.488] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:49.596] <TB3> INFO: Test took 1109ms.
[15:03:49.600] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:50.707] <TB3> INFO: Test took 1107ms.
[15:03:50.711] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:51.818] <TB3> INFO: Test took 1108ms.
[15:03:51.821] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:52.931] <TB3> INFO: Test took 1110ms.
[15:03:52.935] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:54.039] <TB3> INFO: Test took 1104ms.
[15:03:54.042] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:55.149] <TB3> INFO: Test took 1107ms.
[15:03:55.153] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:56.261] <TB3> INFO: Test took 1109ms.
[15:03:56.264] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:57.371] <TB3> INFO: Test took 1107ms.
[15:03:57.373] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:58.482] <TB3> INFO: Test took 1109ms.
[15:03:58.485] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:03:59.596] <TB3> INFO: Test took 1111ms.
[15:03:59.601] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:00.719] <TB3> INFO: Test took 1118ms.
[15:04:00.721] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:01.830] <TB3> INFO: Test took 1109ms.
[15:04:01.833] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:02.940] <TB3> INFO: Test took 1108ms.
[15:04:02.943] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:04.051] <TB3> INFO: Test took 1108ms.
[15:04:04.055] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:04:05.163] <TB3> INFO: Test took 1109ms.
[15:04:05.708] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 519 seconds
[15:04:05.708] <TB3> INFO: PH scale (per ROC): 88 78 70 79 74 80 75 76 80 74 80 79 68 81 80 85
[15:04:05.708] <TB3> INFO: PH offset (per ROC): 182 173 160 176 175 176 173 175 149 179 179 176 170 173 187 170
[15:04:05.922] <TB3> INFO: ######################################################################
[15:04:05.922] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[15:04:05.922] <TB3> INFO: ######################################################################
[15:04:05.931] <TB3> INFO: scanning low vcal = 50
[15:04:10.286] <TB3> INFO: Test took 4355ms.
[15:04:10.364] <TB3> INFO: scanning low vcal = 100
[15:04:14.758] <TB3> INFO: Test took 4394ms.
[15:04:14.820] <TB3> INFO: scanning low vcal = 150
[15:04:19.185] <TB3> INFO: Test took 4365ms.
[15:04:19.250] <TB3> INFO: scanning low vcal = 200
[15:04:23.631] <TB3> INFO: Test took 4381ms.
[15:04:23.689] <TB3> INFO: scanning low vcal = 250
[15:04:28.071] <TB3> INFO: Test took 4382ms.
[15:04:28.139] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[15:04:32.522] <TB3> INFO: Test took 4382ms.
[15:04:32.580] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[15:04:36.887] <TB3> INFO: Test took 4307ms.
[15:04:36.976] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[15:04:41.355] <TB3> INFO: Test took 4379ms.
[15:04:41.418] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[15:04:45.798] <TB3> INFO: Test took 4380ms.
[15:04:45.873] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[15:04:50.240] <TB3> INFO: Test took 4367ms.
[15:04:50.580] <TB3> INFO: PixTestGainPedestal::measure() done
[15:05:18.089] <TB3> INFO: PixTestGainPedestal::fit() done
[15:05:18.089] <TB3> INFO: non-linearity mean: 0.959 0.954 0.960 0.961 0.953 0.962 0.959 0.955 0.960 0.961 0.955 0.957 0.954 0.951 0.957 0.957
[15:05:18.089] <TB3> INFO: non-linearity RMS: 0.006 0.005 0.005 0.004 0.006 0.005 0.006 0.006 0.006 0.006 0.006 0.006 0.006 0.006 0.006 0.006
[15:05:18.089] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[15:05:18.109] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[15:05:18.129] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[15:05:18.150] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[15:05:18.172] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[15:05:18.198] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[15:05:18.221] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[15:05:18.240] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[15:05:18.259] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[15:05:18.281] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[15:05:18.304] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[15:05:18.326] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[15:05:18.348] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[15:05:18.370] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[15:05:18.392] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[15:05:18.413] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[15:05:18.435] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 72 seconds
[15:05:18.442] <TB3> INFO: enter test to run
[15:05:18.443] <TB3> INFO: test: exit no parameter change
[15:05:18.897] <TB3> QUIET: Connection to board 170 closed.
[15:05:18.977] <TB3> INFO: pXar: this is the end, my friend