[12:09:28.047] <TB3> INFO: *** Welcome to pxar ***
[12:09:28.047] <TB3> INFO: *** Today: 2015/07/07
[12:09:28.047] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C15.dat
[12:09:28.049] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:09:28.049] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//defaultMaskFile.dat
[12:09:28.049] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters_C15.dat
[12:09:28.147] <TB3> INFO: clk: 4
[12:09:28.147] <TB3> INFO: ctr: 4
[12:09:28.147] <TB3> INFO: sda: 19
[12:09:28.147] <TB3> INFO: tin: 9
[12:09:28.147] <TB3> INFO: level: 15
[12:09:28.147] <TB3> INFO: triggerdelay: 0
[12:09:28.147] <TB3> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[12:09:28.147] <TB3> INFO: Log level: INFO
[12:09:28.154] <TB3> INFO: Found DTB DTB_WZ4I6J
[12:09:28.163] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[12:09:28.166] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[12:09:28.169] <TB3> INFO: RPC call hashes of host and DTB match: 447413373
[12:09:29.731] <TB3> INFO: DUT info:
[12:09:29.731] <TB3> INFO: The DUT currently contains the following objects:
[12:09:29.731] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:09:29.731] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:09:29.731] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:09:29.731] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:09:29.731] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:29.731] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:29.731] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:29.731] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:29.731] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:29.731] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:29.731] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:29.731] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:29.731] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:29.731] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:29.731] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:29.731] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:29.731] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:29.731] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:29.731] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:29.731] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:30.133] <TB3> INFO: enter 'restricted' command line mode
[12:09:30.133] <TB3> INFO: enter test to run
[12:09:30.133] <TB3> INFO: test: pretest no parameter change
[12:09:30.133] <TB3> INFO: running: pretest
[12:09:30.141] <TB3> INFO: ######################################################################
[12:09:30.141] <TB3> INFO: PixTestPretest::doTest()
[12:09:30.141] <TB3> INFO: ######################################################################
[12:09:30.143] <TB3> INFO: ----------------------------------------------------------------------
[12:09:30.143] <TB3> INFO: PixTestPretest::programROC()
[12:09:30.143] <TB3> INFO: ----------------------------------------------------------------------
[12:09:48.160] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:09:48.160] <TB3> INFO: IA differences per ROC: 16.9 17.7 18.5 16.9 16.9 20.1 19.3 17.7 18.5 19.3 17.7 18.5 19.3 18.5 16.9 19.3
[12:09:48.228] <TB3> INFO: ----------------------------------------------------------------------
[12:09:48.228] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:09:48.228] <TB3> INFO: ----------------------------------------------------------------------
[12:09:52.906] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 387.5 mA = 24.2188 mA/ROC
[12:09:52.909] <TB3> INFO: ----------------------------------------------------------------------
[12:09:52.909] <TB3> INFO: PixTestPretest::findWorkingPixel()
[12:09:52.909] <TB3> INFO: ----------------------------------------------------------------------
[12:10:01.063] <TB3> INFO: Test took 8150ms.
[12:10:01.365] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:10:01.404] <TB3> INFO: ----------------------------------------------------------------------
[12:10:01.405] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[12:10:01.405] <TB3> INFO: ----------------------------------------------------------------------
[12:10:09.644] <TB3> INFO: Test took 8233ms.
[12:10:09.966] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[12:10:09.966] <TB3> INFO: CalDel: 132 140 151 134 156 139 130 128 142 149 129 121 129 154 120 149
[12:10:09.966] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:10:09.970] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C0.dat
[12:10:09.970] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C1.dat
[12:10:09.971] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C2.dat
[12:10:09.971] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C3.dat
[12:10:09.971] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C4.dat
[12:10:09.971] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C5.dat
[12:10:09.972] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C6.dat
[12:10:09.972] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C7.dat
[12:10:09.972] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C8.dat
[12:10:09.972] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C9.dat
[12:10:09.972] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C10.dat
[12:10:09.973] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C11.dat
[12:10:09.973] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C12.dat
[12:10:09.973] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C13.dat
[12:10:09.973] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C14.dat
[12:10:09.973] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C15.dat
[12:10:09.973] <TB3> INFO: PixTestPretest::doTest() done, duration: 39 seconds
[12:10:10.081] <TB3> INFO: enter test to run
[12:10:10.081] <TB3> INFO: test: fulltest no parameter change
[12:10:10.081] <TB3> INFO: running: fulltest
[12:10:10.081] <TB3> INFO: ######################################################################
[12:10:10.081] <TB3> INFO: PixTestFullTest::doTest()
[12:10:10.081] <TB3> INFO: ######################################################################
[12:10:10.082] <TB3> INFO: ######################################################################
[12:10:10.082] <TB3> INFO: PixTestAlive::doTest()
[12:10:10.082] <TB3> INFO: ######################################################################
[12:10:10.084] <TB3> INFO: ----------------------------------------------------------------------
[12:10:10.084] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:10:10.084] <TB3> INFO: ----------------------------------------------------------------------
[12:10:13.539] <TB3> INFO: Test took 3454ms.
[12:10:13.562] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:13.791] <TB3> INFO: PixTestAlive::aliveTest() done
[12:10:13.791] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:10:13.793] <TB3> INFO: ----------------------------------------------------------------------
[12:10:13.793] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:10:13.793] <TB3> INFO: ----------------------------------------------------------------------
[12:10:16.524] <TB3> INFO: Test took 2730ms.
[12:10:16.528] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:16.528] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:10:16.757] <TB3> INFO: PixTestAlive::maskTest() done
[12:10:16.757] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:10:16.759] <TB3> INFO: ----------------------------------------------------------------------
[12:10:16.759] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:10:16.759] <TB3> INFO: ----------------------------------------------------------------------
[12:10:20.211] <TB3> INFO: Test took 3451ms.
[12:10:20.232] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:20.463] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[12:10:20.463] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:10:20.463] <TB3> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[12:10:20.480] <TB3> INFO: ######################################################################
[12:10:20.480] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:10:20.480] <TB3> INFO: ######################################################################
[12:10:20.483] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[12:10:20.504] <TB3> INFO: dacScan step from 0 .. 29
[12:10:41.962] <TB3> INFO: Test took 21458ms.
[12:10:41.999] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:41.999] <TB3> INFO: dacScan step from 30 .. 59
[12:11:04.762] <TB3> INFO: Test took 22763ms.
[12:11:04.863] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:04.877] <TB3> INFO: dacScan step from 60 .. 89
[12:11:33.781] <TB3> INFO: Test took 28904ms.
[12:11:34.051] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:34.131] <TB3> INFO: dacScan step from 90 .. 119
[12:12:03.132] <TB3> INFO: Test took 29001ms.
[12:12:03.479] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:03.582] <TB3> INFO: dacScan step from 120 .. 149
[12:12:28.661] <TB3> INFO: Test took 25079ms.
[12:12:28.909] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:53.102] <TB3> INFO: PixTestBBMap::doTest() done, duration: 152 seconds
[12:12:53.102] <TB3> INFO: number of dead bumps (per ROC): 8 0 5 0 0 0 0 9 0 0 0 2 1 0 1 6
[12:12:53.102] <TB3> INFO: separation cut (per ROC): 83 78 99 94 87 95 99 89 80 95 84 102 87 99 97 76
[12:12:53.174] <TB3> INFO: ######################################################################
[12:12:53.174] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50
[12:12:53.174] <TB3> INFO: ######################################################################
[12:12:53.174] <TB3> INFO: ----------------------------------------------------------------------
[12:12:53.174] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[12:12:53.174] <TB3> INFO: ----------------------------------------------------------------------
[12:12:53.174] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (3) hits flags = 16 (plus default)
[12:12:53.182] <TB3> INFO: dacScan step from 0 .. 2
[12:13:06.805] <TB3> INFO: Test took 13623ms.
[12:13:06.824] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:06.824] <TB3> INFO: dacScan step from 3 .. 5
[12:13:21.112] <TB3> INFO: Test took 14288ms.
[12:13:21.135] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:21.135] <TB3> INFO: dacScan step from 6 .. 8
[12:13:35.934] <TB3> INFO: Test took 14799ms.
[12:13:35.955] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:35.956] <TB3> INFO: dacScan step from 9 .. 11
[12:13:50.729] <TB3> INFO: Test took 14773ms.
[12:13:50.751] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:50.751] <TB3> INFO: dacScan step from 12 .. 14
[12:14:05.561] <TB3> INFO: Test took 14810ms.
[12:14:05.585] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:14:05.585] <TB3> INFO: dacScan step from 15 .. 17
[12:14:20.311] <TB3> INFO: Test took 14725ms.
[12:14:20.338] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:14:20.338] <TB3> INFO: dacScan step from 18 .. 20
[12:14:35.116] <TB3> INFO: Test took 14778ms.
[12:14:35.137] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:14:35.137] <TB3> INFO: dacScan step from 21 .. 23
[12:14:50.012] <TB3> INFO: Test took 14875ms.
[12:14:50.036] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:14:50.036] <TB3> INFO: dacScan step from 24 .. 26
[12:15:04.767] <TB3> INFO: Test took 14731ms.
[12:15:04.789] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:04.789] <TB3> INFO: dacScan step from 27 .. 29
[12:15:19.583] <TB3> INFO: Test took 14793ms.
[12:15:19.605] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:19.605] <TB3> INFO: dacScan step from 30 .. 32
[12:15:34.427] <TB3> INFO: Test took 14821ms.
[12:15:34.448] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:34.448] <TB3> INFO: dacScan step from 33 .. 35
[12:15:49.351] <TB3> INFO: Test took 14903ms.
[12:15:49.375] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:49.375] <TB3> INFO: dacScan step from 36 .. 38
[12:16:04.249] <TB3> INFO: Test took 14873ms.
[12:16:04.275] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:04.276] <TB3> INFO: dacScan step from 39 .. 41
[12:16:19.082] <TB3> INFO: Test took 14806ms.
[12:16:19.105] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:19.105] <TB3> INFO: dacScan step from 42 .. 44
[12:16:33.898] <TB3> INFO: Test took 14793ms.
[12:16:33.917] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:33.918] <TB3> INFO: dacScan step from 45 .. 47
[12:16:48.626] <TB3> INFO: Test took 14708ms.
[12:16:48.648] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:48.648] <TB3> INFO: dacScan step from 48 .. 50
[12:17:03.403] <TB3> INFO: Test took 14755ms.
[12:17:03.424] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:03.424] <TB3> INFO: dacScan step from 51 .. 53
[12:17:18.240] <TB3> INFO: Test took 14816ms.
[12:17:18.260] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:18.261] <TB3> INFO: dacScan step from 54 .. 56
[12:17:33.167] <TB3> INFO: Test took 14906ms.
[12:17:33.195] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:33.195] <TB3> INFO: dacScan step from 57 .. 59
[12:17:48.100] <TB3> INFO: Test took 14904ms.
[12:17:48.124] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:48.124] <TB3> INFO: dacScan step from 60 .. 62
[12:18:03.087] <TB3> INFO: Test took 14963ms.
[12:18:03.108] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:03.109] <TB3> INFO: dacScan step from 63 .. 65
[12:18:18.031] <TB3> INFO: Test took 14922ms.
[12:18:18.056] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:18.056] <TB3> INFO: dacScan step from 66 .. 68
[12:18:32.979] <TB3> INFO: Test took 14923ms.
[12:18:33.009] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:33.009] <TB3> INFO: dacScan step from 69 .. 71
[12:18:47.984] <TB3> INFO: Test took 14975ms.
[12:18:48.011] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:48.012] <TB3> INFO: dacScan step from 72 .. 74
[12:19:03.296] <TB3> INFO: Test took 15284ms.
[12:19:03.339] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:03.340] <TB3> INFO: dacScan step from 75 .. 77
[12:19:19.350] <TB3> INFO: Test took 16010ms.
[12:19:19.413] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:19.417] <TB3> INFO: dacScan step from 78 .. 80
[12:19:36.270] <TB3> INFO: Test took 16853ms.
[12:19:36.349] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:36.353] <TB3> INFO: dacScan step from 81 .. 83
[12:19:54.521] <TB3> INFO: Test took 18168ms.
[12:19:54.646] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:54.652] <TB3> INFO: dacScan step from 84 .. 86
[12:20:13.834] <TB3> INFO: Test took 19182ms.
[12:20:13.981] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:13.988] <TB3> INFO: dacScan step from 87 .. 89
[12:20:34.155] <TB3> INFO: Test took 20167ms.
[12:20:34.300] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:34.308] <TB3> INFO: dacScan step from 90 .. 92
[12:20:55.214] <TB3> INFO: Test took 20906ms.
[12:20:55.396] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:55.403] <TB3> INFO: dacScan step from 93 .. 95
[12:21:17.203] <TB3> INFO: Test took 21799ms.
[12:21:17.371] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:17.379] <TB3> INFO: dacScan step from 96 .. 98
[12:21:39.408] <TB3> INFO: Test took 22029ms.
[12:21:39.630] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:39.641] <TB3> INFO: dacScan step from 99 .. 101
[12:22:01.929] <TB3> INFO: Test took 22288ms.
[12:22:02.129] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:02.140] <TB3> INFO: dacScan step from 102 .. 104
[12:22:24.600] <TB3> INFO: Test took 22460ms.
[12:22:24.830] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:24.839] <TB3> INFO: dacScan step from 105 .. 107
[12:22:47.328] <TB3> INFO: Test took 22489ms.
[12:22:47.526] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:47.537] <TB3> INFO: dacScan step from 108 .. 110
[12:23:10.178] <TB3> INFO: Test took 22641ms.
[12:23:10.360] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:10.369] <TB3> INFO: dacScan step from 111 .. 113
[12:23:32.839] <TB3> INFO: Test took 22469ms.
[12:23:33.018] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:33.027] <TB3> INFO: dacScan step from 114 .. 116
[12:23:55.476] <TB3> INFO: Test took 22449ms.
[12:23:55.638] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:55.647] <TB3> INFO: dacScan step from 117 .. 119
[12:24:18.012] <TB3> INFO: Test took 22365ms.
[12:24:18.201] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:18.211] <TB3> INFO: dacScan step from 120 .. 122
[12:24:40.622] <TB3> INFO: Test took 22411ms.
[12:24:40.802] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:40.813] <TB3> INFO: dacScan step from 123 .. 125
[12:25:03.100] <TB3> INFO: Test took 22287ms.
[12:25:03.277] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:03.289] <TB3> INFO: dacScan step from 126 .. 128
[12:25:25.819] <TB3> INFO: Test took 22530ms.
[12:25:26.106] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:26.121] <TB3> INFO: dacScan step from 129 .. 131
[12:25:48.650] <TB3> INFO: Test took 22529ms.
[12:25:48.885] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:48.894] <TB3> INFO: dacScan step from 132 .. 134
[12:26:11.343] <TB3> INFO: Test took 22449ms.
[12:26:11.573] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:11.583] <TB3> INFO: dacScan step from 135 .. 137
[12:26:33.950] <TB3> INFO: Test took 22367ms.
[12:26:34.132] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:34.141] <TB3> INFO: dacScan step from 138 .. 140
[12:26:56.452] <TB3> INFO: Test took 22311ms.
[12:26:56.656] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:56.666] <TB3> INFO: dacScan step from 141 .. 143
[12:27:18.961] <TB3> INFO: Test took 22294ms.
[12:27:19.127] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:19.136] <TB3> INFO: dacScan step from 144 .. 146
[12:27:41.591] <TB3> INFO: Test took 22455ms.
[12:27:41.779] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:41.788] <TB3> INFO: dacScan step from 147 .. 149
[12:28:02.171] <TB3> INFO: Test took 20383ms.
[12:28:02.333] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:02.342] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:28:03.788] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:28:05.229] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:28:06.645] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:28:08.076] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:28:09.482] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:28:10.837] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:28:12.220] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:28:13.641] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:28:15.099] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:28:16.444] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:28:17.839] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:28:19.200] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:28:20.674] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:28:22.154] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:28:23.622] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:28:25.226] <TB3> INFO: PixTestScurves::scurves() done
[12:28:25.226] <TB3> INFO: Vcal mean: 82.68 77.00 96.45 90.32 86.71 94.77 92.69 83.47 79.12 93.03 79.10 89.87 82.10 82.98 88.94 80.80
[12:28:25.226] <TB3> INFO: Vcal RMS: 4.18 5.11 5.26 5.47 6.25 5.56 5.70 4.80 3.88 5.13 3.86 5.31 4.64 4.39 5.39 4.21
[12:28:25.226] <TB3> INFO: PixTestScurves::fullTest() done, duration: 932 seconds
[12:28:25.300] <TB3> INFO: ######################################################################
[12:28:25.300] <TB3> INFO: PixTestTrim::doTest()
[12:28:25.300] <TB3> INFO: ######################################################################
[12:28:25.302] <TB3> INFO: ----------------------------------------------------------------------
[12:28:25.302] <TB3> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[12:28:25.302] <TB3> INFO: ----------------------------------------------------------------------
[12:28:25.394] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:28:25.394] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:28:25.403] <TB3> INFO: dacScan step from 0 .. 19
[12:28:40.426] <TB3> INFO: Test took 15023ms.
[12:28:40.458] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:40.458] <TB3> INFO: dacScan step from 20 .. 39
[12:28:55.477] <TB3> INFO: Test took 15018ms.
[12:28:55.499] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:55.499] <TB3> INFO: dacScan step from 40 .. 59
[12:29:10.538] <TB3> INFO: Test took 15039ms.
[12:29:10.564] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:10.564] <TB3> INFO: dacScan step from 60 .. 79
[12:29:25.507] <TB3> INFO: Test took 14943ms.
[12:29:25.534] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:25.534] <TB3> INFO: dacScan step from 80 .. 99
[12:29:41.234] <TB3> INFO: Test took 15700ms.
[12:29:41.295] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:41.303] <TB3> INFO: dacScan step from 100 .. 119
[12:30:00.366] <TB3> INFO: Test took 19063ms.
[12:30:00.522] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:00.554] <TB3> INFO: dacScan step from 120 .. 139
[12:30:19.477] <TB3> INFO: Test took 18923ms.
[12:30:19.710] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:19.752] <TB3> INFO: dacScan step from 140 .. 159
[12:30:35.121] <TB3> INFO: Test took 15369ms.
[12:30:35.190] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:58.503] <TB3> INFO: ROC 0 VthrComp = 91
[12:30:58.504] <TB3> INFO: ROC 1 VthrComp = 82
[12:30:58.504] <TB3> INFO: ROC 2 VthrComp = 101
[12:30:58.504] <TB3> INFO: ROC 3 VthrComp = 94
[12:30:58.504] <TB3> INFO: ROC 4 VthrComp = 89
[12:30:58.504] <TB3> INFO: ROC 5 VthrComp = 99
[12:30:58.504] <TB3> INFO: ROC 6 VthrComp = 98
[12:30:58.504] <TB3> INFO: ROC 7 VthrComp = 90
[12:30:58.504] <TB3> INFO: ROC 8 VthrComp = 85
[12:30:58.504] <TB3> INFO: ROC 9 VthrComp = 99
[12:30:58.505] <TB3> INFO: ROC 10 VthrComp = 87
[12:30:58.505] <TB3> INFO: ROC 11 VthrComp = 99
[12:30:58.505] <TB3> INFO: ROC 12 VthrComp = 88
[12:30:58.505] <TB3> INFO: ROC 13 VthrComp = 92
[12:30:58.505] <TB3> INFO: ROC 14 VthrComp = 96
[12:30:58.505] <TB3> INFO: ROC 15 VthrComp = 87
[12:30:58.505] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:30:58.505] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:30:58.514] <TB3> INFO: dacScan step from 0 .. 19
[12:31:13.562] <TB3> INFO: Test took 15048ms.
[12:31:13.586] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:13.586] <TB3> INFO: dacScan step from 20 .. 39
[12:31:28.146] <TB3> INFO: Test took 14560ms.
[12:31:28.178] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:28.181] <TB3> INFO: dacScan step from 40 .. 59
[12:31:45.960] <TB3> INFO: Test took 17779ms.
[12:31:46.115] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:46.154] <TB3> INFO: dacScan step from 60 .. 79
[12:32:06.218] <TB3> INFO: Test took 20064ms.
[12:32:06.424] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:06.470] <TB3> INFO: dacScan step from 80 .. 99
[12:32:26.465] <TB3> INFO: Test took 19995ms.
[12:32:26.641] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:26.691] <TB3> INFO: dacScan step from 100 .. 119
[12:32:46.806] <TB3> INFO: Test took 20115ms.
[12:32:46.969] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:47.022] <TB3> INFO: dacScan step from 120 .. 139
[12:33:07.145] <TB3> INFO: Test took 20123ms.
[12:33:07.319] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:07.368] <TB3> INFO: dacScan step from 140 .. 159
[12:33:26.061] <TB3> INFO: Test took 18693ms.
[12:33:26.221] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:51.242] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 56.4324 for pixel 7/2 mean/min/max = 44.5012/32.5592/56.4433
[12:33:51.243] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 59.1833 for pixel 7/76 mean/min/max = 45.8453/32.4824/59.2082
[12:33:51.243] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 57.5832 for pixel 23/52 mean/min/max = 44.964/32.2363/57.6917
[12:33:51.243] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 59.5898 for pixel 3/0 mean/min/max = 45.4083/31.1388/59.6779
[12:33:51.243] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 60.6866 for pixel 20/79 mean/min/max = 46.1538/31.556/60.7516
[12:33:51.244] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 57.9099 for pixel 0/8 mean/min/max = 44.5396/31.0299/58.0493
[12:33:51.244] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 58.3142 for pixel 12/43 mean/min/max = 44.9351/31.46/58.4101
[12:33:51.244] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 58.1284 for pixel 12/17 mean/min/max = 45.3316/32.527/58.1362
[12:33:51.244] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 56.101 for pixel 20/24 mean/min/max = 44.5372/32.8397/56.2346
[12:33:51.245] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 58.0932 for pixel 14/79 mean/min/max = 44.8978/31.6913/58.1043
[12:33:51.245] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 55.2201 for pixel 20/1 mean/min/max = 43.6711/31.8983/55.4439
[12:33:51.245] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 57.028 for pixel 4/2 mean/min/max = 44.7685/32.3229/57.2141
[12:33:51.245] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 58.1745 for pixel 27/3 mean/min/max = 45.692/33.0346/58.3494
[12:33:51.245] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 55.4414 for pixel 34/79 mean/min/max = 44.2794/32.8093/55.7494
[12:33:51.246] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 57.2658 for pixel 20/79 mean/min/max = 44.5584/31.8085/57.3083
[12:33:51.246] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 56.2941 for pixel 10/66 mean/min/max = 43.8828/31.4563/56.3092
[12:33:51.246] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:35:24.536] <TB3> INFO: Test took 93290ms.
[12:35:26.179] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:35:26.190] <TB3> INFO: dacScan step from 0 .. 19
[12:35:49.076] <TB3> INFO: Test took 22886ms.
[12:35:49.120] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:49.121] <TB3> INFO: dacScan step from 20 .. 39
[12:36:17.274] <TB3> INFO: Test took 28153ms.
[12:36:17.520] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:17.556] <TB3> INFO: dacScan step from 40 .. 59
[12:36:49.156] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (79) != TBM ID (0)
[12:36:49.156] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[12:36:49.156] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (1) != TBM ID (80)
[12:36:49.156] <TB3> WARNING: ROC 3: Readback start marker after 31 readouts!
[12:36:50.405] <TB3> INFO: Test took 32849ms.
[12:36:50.698] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:50.750] <TB3> INFO: dacScan step from 60 .. 79
[12:37:22.160] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[12:37:22.161] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!
[12:37:22.161] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!
[12:37:23.379] <TB3> INFO: Test took 32629ms.
[12:37:23.655] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:23.706] <TB3> INFO: dacScan step from 80 .. 99
[12:37:53.024] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[12:37:53.025] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!
[12:37:53.025] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!
[12:37:54.150] <TB3> INFO: Test took 30444ms.
[12:37:54.440] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:54.504] <TB3> INFO: dacScan step from 100 .. 119
[12:38:26.289] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[12:38:26.290] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!
[12:38:26.290] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!
[12:38:27.528] <TB3> INFO: Test took 33024ms.
[12:38:27.816] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:27.871] <TB3> INFO: dacScan step from 120 .. 139
[12:38:59.507] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[12:38:59.507] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!
[12:38:59.507] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!
[12:39:00.689] <TB3> INFO: Test took 32817ms.
[12:39:00.973] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:01.025] <TB3> INFO: dacScan step from 140 .. 159
[12:39:32.733] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[12:39:32.734] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!
[12:39:32.734] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!
[12:39:34.002] <TB3> INFO: Test took 32977ms.
[12:39:34.274] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:34.327] <TB3> INFO: dacScan step from 160 .. 179
[12:40:06.242] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (196) != TBM ID (0)
[12:40:06.242] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[12:40:06.242] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (1) != TBM ID (197)
[12:40:06.242] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!
[12:40:07.462] <TB3> INFO: Test took 33135ms.
[12:40:07.761] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:07.816] <TB3> INFO: dacScan step from 180 .. 199
[12:40:38.140] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[12:40:38.140] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!
[12:40:38.140] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!
[12:40:39.199] <TB3> INFO: Test took 31383ms.
[12:40:39.473] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:04.487] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.176531 .. 48.454290
[12:41:04.569] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 58 (20) hits flags = 16 (plus default)
[12:41:04.578] <TB3> INFO: dacScan step from 0 .. 19
[12:41:18.098] <TB3> INFO: Test took 13520ms.
[12:41:18.118] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:18.118] <TB3> INFO: dacScan step from 20 .. 39
[12:41:32.805] <TB3> INFO: Test took 14687ms.
[12:41:32.883] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:32.898] <TB3> INFO: dacScan step from 40 .. 58
[12:41:49.882] <TB3> INFO: Test took 16984ms.
[12:41:50.033] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:07.788] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 15.526963 .. 45.117754
[12:42:07.873] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 5 .. 55 (20) hits flags = 16 (plus default)
[12:42:07.881] <TB3> INFO: dacScan step from 5 .. 24
[12:42:21.453] <TB3> INFO: Test took 13572ms.
[12:42:21.477] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:21.477] <TB3> INFO: dacScan step from 25 .. 44
[12:42:37.168] <TB3> INFO: Test took 15691ms.
[12:42:37.286] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:37.312] <TB3> INFO: dacScan step from 45 .. 55
[12:42:48.188] <TB3> INFO: Test took 10876ms.
[12:42:48.271] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:04.594] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 21.536485 .. 40.514925
[12:43:04.678] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 11 .. 50 (20) hits flags = 16 (plus default)
[12:43:04.686] <TB3> INFO: dacScan step from 11 .. 30
[12:43:18.184] <TB3> INFO: Test took 13498ms.
[12:43:18.208] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:18.209] <TB3> INFO: dacScan step from 31 .. 50
[12:43:35.042] <TB3> INFO: Test took 16823ms.
[12:43:35.191] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:51.463] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 22.688404 .. 40.514925
[12:43:51.546] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 12 .. 50 (20) hits flags = 16 (plus default)
[12:43:51.554] <TB3> INFO: dacScan step from 12 .. 31
[12:44:05.123] <TB3> INFO: Test took 13569ms.
[12:44:05.150] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:05.152] <TB3> INFO: dacScan step from 32 .. 50
[12:44:21.548] <TB3> INFO: Test took 16395ms.
[12:44:21.691] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:37.495] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:44:37.495] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[12:44:37.503] <TB3> INFO: dacScan step from 15 .. 34
[12:44:59.569] <TB3> INFO: Test took 22066ms.
[12:44:59.643] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:59.652] <TB3> INFO: dacScan step from 35 .. 54
[12:45:31.520] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[12:45:31.520] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!
[12:45:31.520] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!
[12:45:32.212] <TB3> INFO: Test took 32560ms.
[12:45:32.515] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:32.565] <TB3> INFO: dacScan step from 55 .. 55
[12:45:36.904] <TB3> INFO: Test took 4339ms.
[12:45:36.927] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:52.372] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C0.dat
[12:45:52.372] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C1.dat
[12:45:52.372] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C2.dat
[12:45:52.373] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C3.dat
[12:45:52.373] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C4.dat
[12:45:52.373] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C5.dat
[12:45:52.373] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C6.dat
[12:45:52.373] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C7.dat
[12:45:52.373] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C8.dat
[12:45:52.373] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C9.dat
[12:45:52.373] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C10.dat
[12:45:52.374] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C11.dat
[12:45:52.374] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C12.dat
[12:45:52.374] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C13.dat
[12:45:52.374] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C14.dat
[12:45:52.374] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C15.dat
[12:45:52.374] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C0.dat
[12:45:52.383] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C1.dat
[12:45:52.392] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C2.dat
[12:45:52.402] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C3.dat
[12:45:52.411] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C4.dat
[12:45:52.419] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C5.dat
[12:45:52.428] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C6.dat
[12:45:52.437] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C7.dat
[12:45:52.446] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C8.dat
[12:45:52.455] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C9.dat
[12:45:52.463] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C10.dat
[12:45:52.472] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C11.dat
[12:45:52.481] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C12.dat
[12:45:52.490] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C13.dat
[12:45:52.499] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C14.dat
[12:45:52.507] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C15.dat
[12:45:52.516] <TB3> INFO: PixTestTrim::trimTest() done
[12:45:52.516] <TB3> INFO: vtrim: 102 111 106 118 111 103 116 113 94 99 105 97 109 97 103 130
[12:45:52.516] <TB3> INFO: vthrcomp: 91 82 101 94 89 99 98 90 85 99 87 99 88 92 96 87
[12:45:52.516] <TB3> INFO: vcal mean: 35.03 35.00 35.12 35.03 35.02 35.04 35.00 35.07 35.05 35.03 35.04 35.06 35.03 35.01 35.01 35.09
[12:45:52.516] <TB3> INFO: vcal RMS: 0.93 1.01 1.15 1.07 1.08 1.05 1.05 0.98 0.96 1.02 0.95 1.02 0.96 0.95 1.10 1.06
[12:45:52.516] <TB3> INFO: bits mean: 9.61 9.86 9.89 10.19 9.79 9.79 10.18 9.96 9.65 10.00 10.26 9.75 9.61 9.94 10.07 10.53
[12:45:52.516] <TB3> INFO: bits RMS: 2.62 2.51 2.44 2.47 2.52 2.69 2.47 2.41 2.58 2.50 2.39 2.64 2.44 2.38 2.51 2.41
[12:45:52.521] <TB3> INFO: ----------------------------------------------------------------------
[12:45:52.521] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 255 240 150 100
[12:45:52.521] <TB3> INFO: ----------------------------------------------------------------------
[12:45:52.524] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:45:52.534] <TB3> INFO: dacScan step from 0 .. 19
[12:46:14.482] <TB3> INFO: Test took 21948ms.
[12:46:14.519] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:14.519] <TB3> INFO: dacScan step from 20 .. 39
[12:46:37.339] <TB3> INFO: Test took 22820ms.
[12:46:37.399] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:37.404] <TB3> INFO: dacScan step from 40 .. 59
[12:47:06.071] <TB3> INFO: Test took 28667ms.
[12:47:06.344] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:06.384] <TB3> INFO: dacScan step from 60 .. 79
[12:47:37.956] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[12:47:37.956] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!
[12:47:37.956] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!
[12:47:39.210] <TB3> INFO: Test took 32826ms.
[12:47:39.503] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:39.559] <TB3> INFO: dacScan step from 80 .. 99
[12:48:10.639] <TB3> INFO: Test took 31080ms.
[12:48:10.907] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:10.963] <TB3> INFO: dacScan step from 100 .. 119
[12:48:43.792] <TB3> INFO: Test took 32829ms.
[12:48:44.064] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:44.115] <TB3> INFO: dacScan step from 120 .. 139
[12:49:16.867] <TB3> INFO: Test took 32752ms.
[12:49:17.130] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:17.183] <TB3> INFO: dacScan step from 140 .. 159
[12:49:49.406] <TB3> INFO: Test took 32223ms.
[12:49:49.683] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:49.733] <TB3> INFO: dacScan step from 160 .. 179
[12:50:22.287] <TB3> INFO: Test took 32554ms.
[12:50:22.746] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:22.801] <TB3> INFO: dacScan step from 180 .. 199
[12:50:53.961] <TB3> INFO: Test took 31160ms.
[12:50:54.252] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:22.262] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 86 (20) hits flags = 16 (plus default)
[12:51:22.271] <TB3> INFO: dacScan step from 0 .. 19
[12:51:43.289] <TB3> INFO: Test took 21017ms.
[12:51:43.331] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:43.331] <TB3> INFO: dacScan step from 20 .. 39
[12:52:07.293] <TB3> INFO: Test took 23962ms.
[12:52:07.389] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:07.400] <TB3> INFO: dacScan step from 40 .. 59
[12:52:38.525] <TB3> INFO: Test took 31125ms.
[12:52:38.955] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:39.014] <TB3> INFO: dacScan step from 60 .. 79
[12:53:11.657] <TB3> INFO: Test took 32642ms.
[12:53:11.940] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:11.993] <TB3> INFO: dacScan step from 80 .. 86
[12:53:24.421] <TB3> INFO: Test took 12428ms.
[12:53:24.578] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:42.687] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 76 (20) hits flags = 16 (plus default)
[12:53:42.696] <TB3> INFO: dacScan step from 0 .. 19
[12:54:05.245] <TB3> INFO: Test took 22549ms.
[12:54:05.291] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:05.291] <TB3> INFO: dacScan step from 20 .. 39
[12:54:29.995] <TB3> INFO: Test took 24704ms.
[12:54:30.133] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:30.149] <TB3> INFO: dacScan step from 40 .. 59
[12:54:59.317] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (8) != Token Chain Length (4)
[12:54:59.317] <TB3> ERROR: <datapipe.cc/CheckEventID:L420> Event ID mismatch: local ID (230) != TBM ID (231)
[12:54:59.317] <TB3> WARNING: ROC 0: Readback start marker after 15 readouts!
[12:54:59.317] <TB3> WARNING: ROC 1: Readback start marker after 15 readouts!
[12:54:59.317] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!
[12:54:59.317] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!
[12:55:00.182] <TB3> INFO: Test took 30033ms.
[12:55:00.457] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:00.505] <TB3> INFO: dacScan step from 60 .. 76
[12:55:27.148] <TB3> INFO: Test took 26643ms.
[12:55:27.425] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:43.166] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 68 (20) hits flags = 16 (plus default)
[12:55:43.175] <TB3> INFO: dacScan step from 0 .. 19
[12:56:05.786] <TB3> INFO: Test took 22611ms.
[12:56:05.832] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:05.832] <TB3> INFO: dacScan step from 20 .. 39
[12:56:31.985] <TB3> INFO: Test took 26152ms.
[12:56:32.163] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:32.185] <TB3> INFO: dacScan step from 40 .. 59
[12:57:03.786] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (3) != Token Chain Length (4)
[12:57:03.786] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!
[12:57:04.793] <TB3> INFO: Test took 32608ms.
[12:57:05.087] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:05.143] <TB3> INFO: dacScan step from 60 .. 68
[12:57:20.386] <TB3> INFO: Test took 15243ms.
[12:57:20.587] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:35.296] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 62 (20) hits flags = 16 (plus default)
[12:57:35.304] <TB3> INFO: dacScan step from 0 .. 19
[12:57:58.043] <TB3> INFO: Test took 22739ms.
[12:57:58.088] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:58.089] <TB3> INFO: dacScan step from 20 .. 39
[12:58:25.745] <TB3> INFO: Test took 27656ms.
[12:58:26.002] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:26.038] <TB3> INFO: dacScan step from 40 .. 59
[12:58:57.764] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L437> Number of ROCs (2) != Token Chain Length (4)
[12:58:57.764] <TB3> WARNING: ROC 2: Readback start marker after 15 readouts!
[12:58:57.764] <TB3> WARNING: ROC 3: Readback start marker after 15 readouts!
[12:58:59.008] <TB3> INFO: Test took 32970ms.
[12:58:59.301] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:59.352] <TB3> INFO: dacScan step from 60 .. 62
[12:59:06.711] <TB3> INFO: Test took 7359ms.
[12:59:06.755] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:22.191] <TB3> INFO: PixTestTrim::trimBitTest() done
[12:59:22.192] <TB3> INFO: PixTestTrim::doTest() done, duration: 1856 seconds
[12:59:22.892] <TB3> INFO: ######################################################################
[12:59:22.892] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:59:22.892] <TB3> INFO: ######################################################################
[12:59:26.243] <TB3> INFO: Test took 3349ms.
[12:59:26.266] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:29.877] <TB3> INFO: Test took 3413ms.
[12:59:29.946] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:33.406] <TB3> INFO: Test took 3450ms.
[12:59:33.475] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:33.481] <TB3> INFO: The DUT currently contains the following objects:
[12:59:33.481] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:59:33.481] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:59:33.481] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:59:33.481] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:59:33.481] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:33.481] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:33.481] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:33.481] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:33.481] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:33.481] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:33.481] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:33.481] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:33.482] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:33.482] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:33.482] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:33.482] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:33.482] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:33.482] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:33.482] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:33.482] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:34.589] <TB3> INFO: Test took 1107ms.
[12:59:34.590] <TB3> INFO: The DUT currently contains the following objects:
[12:59:34.590] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:59:34.590] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:59:34.590] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:59:34.590] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:59:34.590] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:34.590] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:34.590] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:34.590] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:34.590] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:34.590] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:34.590] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:34.590] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:34.590] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:34.590] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:34.590] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:34.590] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:34.590] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:34.590] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:34.590] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:34.590] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:35.711] <TB3> INFO: Test took 1121ms.
[12:59:35.712] <TB3> INFO: The DUT currently contains the following objects:
[12:59:35.712] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:59:35.712] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:59:35.712] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:59:35.712] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:59:35.712] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:35.712] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:35.712] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:35.712] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:35.712] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:35.713] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:35.713] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:35.713] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:35.713] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:35.713] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:35.713] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:35.713] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:35.713] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:35.713] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:35.713] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:35.713] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:36.820] <TB3> INFO: Test took 1107ms.
[12:59:36.821] <TB3> INFO: The DUT currently contains the following objects:
[12:59:36.821] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:59:36.821] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:59:36.821] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:59:36.821] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:59:36.821] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:36.821] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:36.821] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:36.821] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:36.821] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:36.821] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:36.821] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:36.821] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:36.821] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:36.821] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:36.821] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:36.821] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:36.821] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:36.821] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:36.821] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:36.821] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:37.930] <TB3> INFO: Test took 1109ms.
[12:59:37.931] <TB3> INFO: The DUT currently contains the following objects:
[12:59:37.931] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:59:37.931] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:59:37.931] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:59:37.931] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:59:37.931] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:37.931] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:37.932] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:37.932] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:37.932] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:37.932] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:37.932] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:37.932] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:37.932] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:37.932] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:37.932] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:37.932] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:37.932] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:37.932] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:37.932] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:37.932] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:39.040] <TB3> INFO: Test took 1108ms.
[12:59:39.041] <TB3> INFO: The DUT currently contains the following objects:
[12:59:39.041] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:59:39.041] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:59:39.042] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:59:39.042] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:59:39.042] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:39.042] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:39.042] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:39.042] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:39.042] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:39.042] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:39.042] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:39.042] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:39.042] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:39.042] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:39.042] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:39.042] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:39.042] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:39.042] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:39.042] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:39.042] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:40.152] <TB3> INFO: Test took 1110ms.
[12:59:40.154] <TB3> INFO: The DUT currently contains the following objects:
[12:59:40.154] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:59:40.154] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:59:40.154] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:59:40.154] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:59:40.154] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:40.154] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:40.154] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:40.154] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:40.154] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:40.154] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:40.154] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:40.154] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:40.154] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:40.154] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:40.154] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:40.154] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:40.155] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:40.155] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:40.155] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:40.155] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:41.264] <TB3> INFO: Test took 1109ms.
[12:59:41.265] <TB3> INFO: The DUT currently contains the following objects:
[12:59:41.265] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:59:41.265] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:59:41.265] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:59:41.265] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:59:41.265] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:41.265] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:41.265] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:41.265] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:41.266] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:41.266] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:41.266] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:41.266] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:41.266] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:41.266] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:41.266] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:41.266] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:41.266] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:41.266] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:41.266] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:41.266] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:42.373] <TB3> INFO: Test took 1107ms.
[12:59:42.375] <TB3> INFO: The DUT currently contains the following objects:
[12:59:42.375] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:59:42.375] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:59:42.375] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:59:42.375] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:59:42.375] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:42.375] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:42.375] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:42.375] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:42.375] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:42.375] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:42.375] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:42.375] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:42.375] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:42.375] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:42.375] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:42.375] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:42.375] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:42.375] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:42.375] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:42.375] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:43.483] <TB3> INFO: Test took 1108ms.
[12:59:43.484] <TB3> INFO: The DUT currently contains the following objects:
[12:59:43.494] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:59:43.495] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:59:43.495] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:59:43.495] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:59:43.495] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:43.495] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:43.495] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:43.495] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:43.495] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:43.495] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:43.495] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:43.495] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:43.495] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:43.495] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:43.495] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:43.495] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:43.495] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:43.495] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:43.495] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:43.495] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:44.592] <TB3> INFO: Test took 1097ms.
[12:59:44.593] <TB3> INFO: The DUT currently contains the following objects:
[12:59:44.593] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:59:44.593] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:59:44.593] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:59:44.593] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:59:44.593] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:44.594] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:44.594] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:44.594] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:44.594] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:44.594] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:44.594] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:44.594] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:44.594] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:44.594] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:44.594] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:44.594] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:44.594] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:44.594] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:44.594] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:44.594] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:45.702] <TB3> INFO: Test took 1108ms.
[12:59:45.703] <TB3> INFO: The DUT currently contains the following objects:
[12:59:45.703] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:59:45.703] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:59:45.703] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:59:45.703] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:59:45.703] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:45.703] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:45.703] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:45.703] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:45.703] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:45.704] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:45.704] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:45.704] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:45.704] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:45.704] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:45.704] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:45.704] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:45.704] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:45.704] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:45.704] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:45.704] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:46.811] <TB3> INFO: Test took 1107ms.
[12:59:46.813] <TB3> INFO: The DUT currently contains the following objects:
[12:59:46.813] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:59:46.813] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:59:46.813] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:59:46.813] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:59:46.813] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:46.813] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:46.813] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:46.813] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:46.813] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:46.813] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:46.813] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:46.813] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:46.813] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:46.813] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:46.813] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:46.813] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:46.813] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:46.813] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:46.813] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:46.813] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:47.922] <TB3> INFO: Test took 1109ms.
[12:59:47.923] <TB3> INFO: The DUT currently contains the following objects:
[12:59:47.923] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:59:47.923] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:59:47.924] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:59:47.924] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:59:47.924] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:47.924] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:47.924] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:47.924] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:47.924] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:47.924] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:47.924] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:47.924] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:47.924] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:47.924] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:47.924] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:47.924] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:47.924] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:47.924] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:47.924] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:47.924] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:49.032] <TB3> INFO: Test took 1108ms.
[12:59:49.033] <TB3> INFO: The DUT currently contains the following objects:
[12:59:49.033] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:59:49.033] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:59:49.033] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:59:49.033] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:59:49.033] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:49.033] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:49.033] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:49.033] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:49.033] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:49.033] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:49.033] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:49.033] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:49.033] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:49.033] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:49.033] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:49.033] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:49.033] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:49.033] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:49.033] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:49.033] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:50.143] <TB3> INFO: Test took 1109ms.
[12:59:50.144] <TB3> INFO: The DUT currently contains the following objects:
[12:59:50.144] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:59:50.144] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:59:50.144] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:59:50.144] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:59:50.144] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:50.144] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:50.144] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:50.144] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:50.145] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:50.145] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:50.145] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:50.145] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:50.145] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:50.145] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:50.145] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:50.145] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:50.145] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:50.145] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:50.145] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:50.145] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:59:51.252] <TB3> INFO: Test took 1107ms.
[12:59:51.256] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:03:32.378] <TB3> INFO: Test took 221122ms.
[13:03:34.034] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:12.218] <TB3> INFO: Test took 218184ms.
[13:07:14.587] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:07:14.594] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:07:14.600] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:07:14.607] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:07:14.614] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:07:14.621] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:07:14.628] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:07:14.634] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:07:14.641] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:07:14.649] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:07:14.656] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:07:14.663] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:07:14.671] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:07:14.678] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:07:14.685] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:07:14.692] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:07:14.699] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:07:14.707] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:07:14.714] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:07:14.750] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:07:14.750] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:07:14.751] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:07:14.751] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:07:14.751] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:07:14.751] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:07:14.751] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:07:14.751] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:07:14.751] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:07:14.752] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:07:14.752] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:07:14.752] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:07:14.752] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:07:14.752] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:07:14.753] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:07:14.753] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:07:18.199] <TB3> INFO: Test took 3443ms.
[13:07:21.900] <TB3> INFO: Test took 3426ms.
[13:07:25.577] <TB3> INFO: Test took 3401ms.
[13:07:25.864] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:26.794] <TB3> INFO: Test took 931ms.
[13:07:26.797] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:27.905] <TB3> INFO: Test took 1109ms.
[13:07:27.909] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:29.019] <TB3> INFO: Test took 1110ms.
[13:07:29.022] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:30.131] <TB3> INFO: Test took 1109ms.
[13:07:30.135] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:31.242] <TB3> INFO: Test took 1107ms.
[13:07:31.245] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:32.352] <TB3> INFO: Test took 1107ms.
[13:07:32.355] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:33.458] <TB3> INFO: Test took 1103ms.
[13:07:33.460] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:34.567] <TB3> INFO: Test took 1107ms.
[13:07:34.571] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:35.677] <TB3> INFO: Test took 1106ms.
[13:07:35.681] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:36.789] <TB3> INFO: Test took 1109ms.
[13:07:36.793] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:37.901] <TB3> INFO: Test took 1108ms.
[13:07:37.904] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:39.011] <TB3> INFO: Test took 1107ms.
[13:07:39.014] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:40.121] <TB3> INFO: Test took 1107ms.
[13:07:40.124] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:41.232] <TB3> INFO: Test took 1109ms.
[13:07:41.236] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:42.344] <TB3> INFO: Test took 1108ms.
[13:07:42.347] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:43.457] <TB3> INFO: Test took 1110ms.
[13:07:43.460] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:44.569] <TB3> INFO: Test took 1109ms.
[13:07:44.572] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:45.679] <TB3> INFO: Test took 1107ms.
[13:07:45.682] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:46.793] <TB3> INFO: Test took 1111ms.
[13:07:46.797] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:47.904] <TB3> INFO: Test took 1107ms.
[13:07:47.908] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:49.015] <TB3> INFO: Test took 1107ms.
[13:07:49.019] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:50.125] <TB3> INFO: Test took 1107ms.
[13:07:50.129] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:51.236] <TB3> INFO: Test took 1107ms.
[13:07:51.240] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:52.348] <TB3> INFO: Test took 1108ms.
[13:07:52.352] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:53.462] <TB3> INFO: Test took 1111ms.
[13:07:53.466] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:54.568] <TB3> INFO: Test took 1102ms.
[13:07:54.570] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:55.671] <TB3> INFO: Test took 1101ms.
[13:07:55.673] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:56.774] <TB3> INFO: Test took 1101ms.
[13:07:56.777] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:57.879] <TB3> INFO: Test took 1103ms.
[13:07:57.881] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:07:58.982] <TB3> INFO: Test took 1101ms.
[13:07:58.984] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:08:00.087] <TB3> INFO: Test took 1103ms.
[13:08:00.090] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:08:01.192] <TB3> INFO: Test took 1102ms.
[13:08:01.707] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 518 seconds
[13:08:01.707] <TB3> INFO: PH scale (per ROC): 98 90 80 89 84 92 83 83 94 82 93 87 80 94 94 98
[13:08:01.707] <TB3> INFO: PH offset (per ROC): 165 148 141 154 153 157 154 155 129 162 161 157 149 151 166 146
[13:08:01.942] <TB3> INFO: ######################################################################
[13:08:01.942] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:08:01.942] <TB3> INFO: ######################################################################
[13:08:01.952] <TB3> INFO: scanning low vcal = 50
[13:08:06.159] <TB3> INFO: Test took 4207ms.
[13:08:06.241] <TB3> INFO: scanning low vcal = 100
[13:08:10.530] <TB3> INFO: Test took 4289ms.
[13:08:10.598] <TB3> INFO: scanning low vcal = 150
[13:08:14.990] <TB3> INFO: Test took 4392ms.
[13:08:15.067] <TB3> INFO: scanning low vcal = 200
[13:08:19.419] <TB3> INFO: Test took 4352ms.
[13:08:19.481] <TB3> INFO: scanning low vcal = 250
[13:08:23.856] <TB3> INFO: Test took 4375ms.
[13:08:23.928] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[13:08:28.304] <TB3> INFO: Test took 4376ms.
[13:08:28.365] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[13:08:32.730] <TB3> INFO: Test took 4365ms.
[13:08:32.796] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[13:08:37.168] <TB3> INFO: Test took 4371ms.
[13:08:37.235] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[13:08:41.601] <TB3> INFO: Test took 4366ms.
[13:08:41.664] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:08:46.036] <TB3> INFO: Test took 4372ms.
[13:08:46.375] <TB3> INFO: PixTestGainPedestal::measure() done
[13:09:14.501] <TB3> INFO: PixTestGainPedestal::fit() done
[13:09:14.501] <TB3> INFO: non-linearity mean: 0.954 0.952 0.956 0.954 0.954 0.955 0.956 0.950 0.960 0.960 0.951 0.951 0.959 0.947 0.955 0.953
[13:09:14.501] <TB3> INFO: non-linearity RMS: 0.006 0.005 0.005 0.005 0.005 0.006 0.005 0.007 0.005 0.005 0.005 0.006 0.004 0.006 0.005 0.006
[13:09:14.501] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[13:09:14.533] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[13:09:14.566] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[13:09:14.598] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[13:09:14.630] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[13:09:14.660] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[13:09:14.692] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[13:09:14.725] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[13:09:14.757] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[13:09:14.789] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[13:09:14.823] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[13:09:14.856] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[13:09:14.889] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[13:09:14.921] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[13:09:14.949] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[13:09:14.978] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2029_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[13:09:15.010] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 73 seconds
[13:09:15.019] <TB3> INFO: enter test to run
[13:09:15.019] <TB3> INFO: test: exit no parameter change
[13:09:15.508] <TB3> QUIET: Connection to board 170 closed.
[13:09:15.588] <TB3> INFO: pXar: this is the end, my friend