[09:28:12.107] <TB1> INFO: *** Welcome to pxar ***
[09:28:12.107] <TB1> INFO: *** Today: 2015/08/18
[09:28:12.108] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C15.dat
[09:28:12.109] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//tbmParameters_C0b.dat
[09:28:12.109] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//defaultMaskFile.dat
[09:28:12.109] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters_C15.dat
[09:28:12.195] <TB1> INFO: clk: 4
[09:28:12.195] <TB1> INFO: ctr: 4
[09:28:12.195] <TB1> INFO: sda: 19
[09:28:12.195] <TB1> INFO: tin: 9
[09:28:12.195] <TB1> INFO: level: 15
[09:28:12.195] <TB1> INFO: triggerdelay: 0
[09:28:12.195] <TB1> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[09:28:12.195] <TB1> INFO: Log level: INFO
[09:28:12.203] <TB1> INFO: Found DTB DTB_WXBYFL
[09:28:12.216] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[09:28:12.220] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[09:28:12.223] <TB1> INFO: RPC call hashes of host and DTB match: 447413373
[09:28:13.752] <TB1> INFO: DUT info:
[09:28:13.752] <TB1> INFO: The DUT currently contains the following objects:
[09:28:13.752] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[09:28:13.752] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:28:13.752] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:28:13.752] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[09:28:13.752] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:13.753] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:13.753] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:13.753] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:13.753] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:13.753] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:13.753] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:13.753] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:13.753] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:13.753] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:13.753] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:13.753] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:13.753] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:13.753] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:13.753] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:13.753] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:28:14.157] <TB1> INFO: enter 'restricted' command line mode
[09:28:14.157] <TB1> INFO: enter test to run
[09:28:14.157] <TB1> INFO: test: pretest no parameter change
[09:28:14.157] <TB1> INFO: running: pretest
[09:28:14.164] <TB1> INFO: ######################################################################
[09:28:14.164] <TB1> INFO: PixTestPretest::doTest()
[09:28:14.164] <TB1> INFO: ######################################################################
[09:28:14.166] <TB1> INFO: ----------------------------------------------------------------------
[09:28:14.166] <TB1> INFO: PixTestPretest::programROC()
[09:28:14.166] <TB1> INFO: ----------------------------------------------------------------------
[09:28:32.188] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:28:32.188] <TB1> INFO: IA differences per ROC: 19.3 16.1 16.9 16.1 15.3 19.3 20.1 18.5 18.5 19.3 18.5 18.5 19.3 20.9 18.5 19.3
[09:28:32.280] <TB1> INFO: ----------------------------------------------------------------------
[09:28:32.280] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:28:32.280] <TB1> INFO: ----------------------------------------------------------------------
[09:28:36.688] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 386.7 mA = 24.1687 mA/ROC
[09:28:36.691] <TB1> INFO: ----------------------------------------------------------------------
[09:28:36.691] <TB1> INFO: PixTestPretest::findWorkingPixel()
[09:28:36.691] <TB1> INFO: ----------------------------------------------------------------------
[09:28:45.019] <TB1> INFO: Test took 8322ms.
[09:28:45.323] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:28:45.375] <TB1> INFO: ----------------------------------------------------------------------
[09:28:45.376] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[09:28:45.376] <TB1> INFO: ----------------------------------------------------------------------
[09:28:53.697] <TB1> INFO: Test took 8316ms.
[09:28:54.025] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[09:28:54.025] <TB1> INFO: CalDel: 163 142 143 149 138 143 133 161 127 143 126 137 152 146 130 122
[09:28:54.025] <TB1> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 55
[09:28:54.029] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C0.dat
[09:28:54.029] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C1.dat
[09:28:54.030] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C2.dat
[09:28:54.030] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C3.dat
[09:28:54.030] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C4.dat
[09:28:54.031] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C5.dat
[09:28:54.031] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C6.dat
[09:28:54.031] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C7.dat
[09:28:54.032] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C8.dat
[09:28:54.032] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C9.dat
[09:28:54.032] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C10.dat
[09:28:54.032] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C11.dat
[09:28:54.033] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C12.dat
[09:28:54.033] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C13.dat
[09:28:54.033] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C14.dat
[09:28:54.034] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters_C15.dat
[09:28:54.034] <TB1> INFO: PixTestPretest::doTest() done, duration: 39 seconds
[09:28:54.127] <TB1> INFO: enter test to run
[09:28:54.127] <TB1> INFO: test: fulltest no parameter change
[09:28:54.127] <TB1> INFO: running: fulltest
[09:28:54.127] <TB1> INFO: ######################################################################
[09:28:54.127] <TB1> INFO: PixTestFullTest::doTest()
[09:28:54.127] <TB1> INFO: ######################################################################
[09:28:54.129] <TB1> INFO: ######################################################################
[09:28:54.129] <TB1> INFO: PixTestAlive::doTest()
[09:28:54.129] <TB1> INFO: ######################################################################
[09:28:54.130] <TB1> INFO: ----------------------------------------------------------------------
[09:28:54.130] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:28:54.130] <TB1> INFO: ----------------------------------------------------------------------
[09:28:57.584] <TB1> INFO: Test took 3451ms.
[09:28:57.608] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:57.848] <TB1> INFO: PixTestAlive::aliveTest() done
[09:28:57.848] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:28:57.850] <TB1> INFO: ----------------------------------------------------------------------
[09:28:57.850] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:28:57.850] <TB1> INFO: ----------------------------------------------------------------------
[09:29:00.595] <TB1> INFO: Test took 2743ms.
[09:29:00.599] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:00.599] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:29:00.841] <TB1> INFO: PixTestAlive::maskTest() done
[09:29:00.841] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:29:00.845] <TB1> INFO: ----------------------------------------------------------------------
[09:29:00.845] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:29:00.845] <TB1> INFO: ----------------------------------------------------------------------
[09:29:04.262] <TB1> INFO: Test took 3413ms.
[09:29:04.290] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:04.541] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[09:29:04.541] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:29:04.541] <TB1> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[09:29:04.557] <TB1> INFO: ######################################################################
[09:29:04.557] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:29:04.557] <TB1> INFO: ######################################################################
[09:29:04.562] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[09:29:04.580] <TB1> INFO: dacScan step from 0 .. 29
[09:29:26.529] <TB1> INFO: Test took 21949ms.
[09:29:26.588] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:26.591] <TB1> INFO: dacScan step from 30 .. 59
[09:29:51.829] <TB1> INFO: Test took 25238ms.
[09:29:52.008] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:52.034] <TB1> INFO: dacScan step from 60 .. 89
[09:30:21.157] <TB1> INFO: Test took 29123ms.
[09:30:21.436] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:21.521] <TB1> INFO: dacScan step from 90 .. 119
[09:30:50.761] <TB1> INFO: Test took 29240ms.
[09:30:51.058] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:51.146] <TB1> INFO: dacScan step from 120 .. 149
[09:31:17.082] <TB1> INFO: Test took 25935ms.
[09:31:17.319] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:31:42.426] <TB1> INFO: PixTestBBMap::doTest() done, duration: 157 seconds
[09:31:42.426] <TB1> INFO: number of dead bumps (per ROC): 1 0 0 0 0 0 0 30 4 4 0 0 1 1 0 2
[09:31:42.426] <TB1> INFO: separation cut (per ROC): 82 83 96 69 114 108 81 77 78 79 76 173 85 115 167 98
[09:31:42.485] <TB1> INFO: ######################################################################
[09:31:42.485] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50
[09:31:42.485] <TB1> INFO: ######################################################################
[09:31:42.485] <TB1> INFO: ----------------------------------------------------------------------
[09:31:42.485] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[09:31:42.485] <TB1> INFO: ----------------------------------------------------------------------
[09:31:42.485] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[09:31:42.494] <TB1> INFO: dacScan step from 0 .. 3
[09:32:00.452] <TB1> INFO: Test took 17957ms.
[09:32:00.483] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:00.483] <TB1> INFO: dacScan step from 4 .. 7
[09:32:19.707] <TB1> INFO: Test took 19224ms.
[09:32:19.743] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:19.743] <TB1> INFO: dacScan step from 8 .. 11
[09:32:39.062] <TB1> INFO: Test took 19319ms.
[09:32:39.090] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:39.090] <TB1> INFO: dacScan step from 12 .. 15
[09:32:58.387] <TB1> INFO: Test took 19297ms.
[09:32:58.418] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:32:58.422] <TB1> INFO: dacScan step from 16 .. 19
[09:33:17.612] <TB1> INFO: Test took 19190ms.
[09:33:17.644] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:17.644] <TB1> INFO: dacScan step from 20 .. 23
[09:33:36.857] <TB1> INFO: Test took 19213ms.
[09:33:36.885] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:36.885] <TB1> INFO: dacScan step from 24 .. 27
[09:33:55.926] <TB1> INFO: Test took 19041ms.
[09:33:55.954] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:33:55.954] <TB1> INFO: dacScan step from 28 .. 31
[09:34:15.074] <TB1> INFO: Test took 19120ms.
[09:34:15.103] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:15.103] <TB1> INFO: dacScan step from 32 .. 35
[09:34:34.115] <TB1> INFO: Test took 19012ms.
[09:34:34.142] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:34.142] <TB1> INFO: dacScan step from 36 .. 39
[09:34:53.277] <TB1> INFO: Test took 19134ms.
[09:34:53.304] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:34:53.304] <TB1> INFO: dacScan step from 40 .. 43
[09:35:12.586] <TB1> INFO: Test took 19282ms.
[09:35:12.624] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:12.624] <TB1> INFO: dacScan step from 44 .. 47
[09:35:31.831] <TB1> INFO: Test took 19207ms.
[09:35:31.865] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:31.865] <TB1> INFO: dacScan step from 48 .. 51
[09:35:51.184] <TB1> INFO: Test took 19319ms.
[09:35:51.222] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:35:51.222] <TB1> INFO: dacScan step from 52 .. 55
[09:36:10.426] <TB1> INFO: Test took 19203ms.
[09:36:10.487] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:10.487] <TB1> INFO: dacScan step from 56 .. 59
[09:36:29.750] <TB1> INFO: Test took 19263ms.
[09:36:29.801] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:29.801] <TB1> INFO: dacScan step from 60 .. 63
[09:36:48.969] <TB1> INFO: Test took 19168ms.
[09:36:49.012] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:36:49.013] <TB1> INFO: dacScan step from 64 .. 67
[09:37:08.136] <TB1> INFO: Test took 19123ms.
[09:37:08.182] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:08.182] <TB1> INFO: dacScan step from 68 .. 71
[09:37:27.878] <TB1> INFO: Test took 19696ms.
[09:37:27.946] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:27.947] <TB1> INFO: dacScan step from 72 .. 75
[09:37:48.393] <TB1> INFO: Test took 20446ms.
[09:37:48.456] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:37:48.457] <TB1> INFO: dacScan step from 76 .. 79
[09:38:09.809] <TB1> INFO: Test took 21352ms.
[09:38:09.918] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:09.924] <TB1> INFO: dacScan step from 80 .. 83
[09:38:33.516] <TB1> INFO: Test took 23592ms.
[09:38:33.654] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:33.659] <TB1> INFO: dacScan step from 84 .. 87
[09:38:58.935] <TB1> INFO: Test took 25276ms.
[09:38:59.113] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:38:59.120] <TB1> INFO: dacScan step from 88 .. 91
[09:39:25.532] <TB1> INFO: Test took 26412ms.
[09:39:25.755] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:25.764] <TB1> INFO: dacScan step from 92 .. 95
[09:39:53.473] <TB1> INFO: Test took 27709ms.
[09:39:53.717] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:39:53.728] <TB1> INFO: dacScan step from 96 .. 99
[09:40:22.416] <TB1> INFO: Test took 28688ms.
[09:40:22.675] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:22.686] <TB1> INFO: dacScan step from 100 .. 103
[09:40:51.390] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[09:40:51.390] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:40:51.838] <TB1> INFO: Test took 29152ms.
[09:40:52.092] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:40:52.103] <TB1> INFO: dacScan step from 104 .. 107
[09:41:20.566] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)
[09:41:20.566] <TB1> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (148) != TBM ID (149)
[09:41:20.566] <TB1> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!
[09:41:20.566] <TB1> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!
[09:41:20.566] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:41:21.466] <TB1> INFO: Test took 29363ms.
[09:41:21.732] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:21.744] <TB1> INFO: dacScan step from 108 .. 111
[09:41:50.133] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)
[09:41:50.133] <TB1> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (74) != TBM ID (75)
[09:41:50.138] <TB1> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!
[09:41:50.138] <TB1> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!
[09:41:50.138] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:41:51.316] <TB1> INFO: Test took 29572ms.
[09:41:51.550] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:51.562] <TB1> INFO: dacScan step from 112 .. 115
[09:42:19.934] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[09:42:21.236] <TB1> INFO: Test took 29674ms.
[09:42:21.485] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:21.498] <TB1> INFO: dacScan step from 116 .. 119
[09:42:49.919] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[09:42:51.215] <TB1> INFO: Test took 29717ms.
[09:42:51.468] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:51.479] <TB1> INFO: dacScan step from 120 .. 123
[09:43:19.954] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[09:43:21.184] <TB1> INFO: Test took 29705ms.
[09:43:21.405] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:43:21.417] <TB1> INFO: dacScan step from 124 .. 127
[09:43:49.939] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[09:43:49.939] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:43:51.263] <TB1> INFO: Test took 29846ms.
[09:43:51.507] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:43:51.521] <TB1> INFO: dacScan step from 128 .. 131
[09:44:19.960] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[09:44:21.305] <TB1> INFO: Test took 29784ms.
[09:44:21.588] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:21.603] <TB1> INFO: dacScan step from 132 .. 135
[09:44:51.295] <TB1> INFO: Test took 29692ms.
[09:44:51.536] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:51.551] <TB1> INFO: dacScan step from 136 .. 139
[09:45:19.957] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)
[09:45:19.957] <TB1> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (195) != TBM ID (196)
[09:45:19.957] <TB1> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!
[09:45:19.957] <TB1> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!
[09:45:19.957] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:45:21.215] <TB1> INFO: Test took 29664ms.
[09:45:21.462] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:21.474] <TB1> INFO: dacScan step from 140 .. 143
[09:45:51.158] <TB1> INFO: Test took 29684ms.
[09:45:51.400] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:45:51.414] <TB1> INFO: dacScan step from 144 .. 147
[09:46:21.038] <TB1> INFO: Test took 29624ms.
[09:46:21.282] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:21.294] <TB1> INFO: dacScan step from 148 .. 149
[09:46:37.453] <TB1> INFO: Test took 16159ms.
[09:46:37.586] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:46:37.593] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:46:39.190] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:46:40.823] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:46:42.425] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:46:44.072] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:46:45.644] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:46:47.304] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:46:48.975] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:46:50.569] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:46:52.052] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:46:53.648] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:46:55.081] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:46:56.594] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:46:58.016] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:46:59.610] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:47:01.041] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:47:02.431] <TB1> INFO: PixTestScurves::scurves() done
[09:47:02.431] <TB1> INFO: Vcal mean: 86.24 92.37 75.23 73.26 98.72 80.52 79.30 85.20 89.09 82.14 89.55 98.81 92.81 80.73 85.04 104.20
[09:47:02.431] <TB1> INFO: Vcal RMS: 5.32 6.19 4.32 4.58 6.53 4.42 4.50 4.98 6.01 4.97 5.53 6.41 6.41 4.48 5.51 6.24
[09:47:02.431] <TB1> INFO: PixTestScurves::fullTest() done, duration: 919 seconds
[09:47:02.506] <TB1> INFO: ######################################################################
[09:47:02.506] <TB1> INFO: PixTestTrim::doTest()
[09:47:02.506] <TB1> INFO: ######################################################################
[09:47:02.508] <TB1> INFO: ----------------------------------------------------------------------
[09:47:02.508] <TB1> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[09:47:02.508] <TB1> INFO: ----------------------------------------------------------------------
[09:47:02.594] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:47:02.594] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:47:02.603] <TB1> INFO: dacScan step from 0 .. 19
[09:47:17.777] <TB1> INFO: Test took 15174ms.
[09:47:17.804] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:17.804] <TB1> INFO: dacScan step from 20 .. 39
[09:47:32.983] <TB1> INFO: Test took 15179ms.
[09:47:33.015] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:33.015] <TB1> INFO: dacScan step from 40 .. 59
[09:47:48.241] <TB1> INFO: Test took 15226ms.
[09:47:48.266] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:47:48.266] <TB1> INFO: dacScan step from 60 .. 79
[09:48:03.386] <TB1> INFO: Test took 15120ms.
[09:48:03.417] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:03.417] <TB1> INFO: dacScan step from 80 .. 99
[09:48:18.634] <TB1> INFO: Test took 15217ms.
[09:48:18.725] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:18.740] <TB1> INFO: dacScan step from 100 .. 119
[09:48:36.982] <TB1> INFO: Test took 18242ms.
[09:48:37.221] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:37.310] <TB1> INFO: dacScan step from 120 .. 139
[09:48:55.308] <TB1> INFO: Test took 17998ms.
[09:48:55.545] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:48:55.610] <TB1> INFO: dacScan step from 140 .. 159
[09:49:11.170] <TB1> INFO: Test took 15560ms.
[09:49:11.236] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:32.631] <TB1> INFO: ROC 0 VthrComp = 93
[09:49:32.632] <TB1> INFO: ROC 1 VthrComp = 95
[09:49:32.632] <TB1> INFO: ROC 2 VthrComp = 80
[09:49:32.632] <TB1> INFO: ROC 3 VthrComp = 78
[09:49:32.632] <TB1> INFO: ROC 4 VthrComp = 95
[09:49:32.632] <TB1> INFO: ROC 5 VthrComp = 85
[09:49:32.632] <TB1> INFO: ROC 6 VthrComp = 86
[09:49:32.632] <TB1> INFO: ROC 7 VthrComp = 89
[09:49:32.633] <TB1> INFO: ROC 8 VthrComp = 92
[09:49:32.633] <TB1> INFO: ROC 9 VthrComp = 89
[09:49:32.633] <TB1> INFO: ROC 10 VthrComp = 89
[09:49:32.633] <TB1> INFO: ROC 11 VthrComp = 98
[09:49:32.633] <TB1> INFO: ROC 12 VthrComp = 97
[09:49:32.633] <TB1> INFO: ROC 13 VthrComp = 86
[09:49:32.633] <TB1> INFO: ROC 14 VthrComp = 87
[09:49:32.634] <TB1> INFO: ROC 15 VthrComp = 105
[09:49:32.634] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:49:32.634] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[09:49:32.642] <TB1> INFO: dacScan step from 0 .. 19
[09:49:47.797] <TB1> INFO: Test took 15155ms.
[09:49:47.824] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:49:47.824] <TB1> INFO: dacScan step from 20 .. 39
[09:50:03.157] <TB1> INFO: Test took 15333ms.
[09:50:03.191] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:03.194] <TB1> INFO: dacScan step from 40 .. 59
[09:50:22.016] <TB1> INFO: Test took 18822ms.
[09:50:22.170] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:22.206] <TB1> INFO: dacScan step from 60 .. 79
[09:50:42.491] <TB1> INFO: Test took 20285ms.
[09:50:42.660] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:50:42.712] <TB1> INFO: dacScan step from 80 .. 99
[09:51:01.489] <TB1> INFO: Test took 18777ms.
[09:51:01.662] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:01.719] <TB1> INFO: dacScan step from 100 .. 119
[09:51:20.527] <TB1> INFO: Test took 18808ms.
[09:51:20.706] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:20.765] <TB1> INFO: dacScan step from 120 .. 139
[09:51:41.044] <TB1> INFO: Test took 20279ms.
[09:51:41.203] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:51:41.257] <TB1> INFO: dacScan step from 140 .. 159
[09:52:01.640] <TB1> INFO: Test took 20383ms.
[09:52:01.818] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:52:27.180] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 58.6558 for pixel 0/2 mean/min/max = 45.2376/31.7971/58.678
[09:52:27.181] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 61.9058 for pixel 0/69 mean/min/max = 46.4562/30.9144/61.998
[09:52:27.181] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 57.5832 for pixel 30/79 mean/min/max = 45.1607/32.6911/57.6304
[09:52:27.181] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 58.1027 for pixel 17/7 mean/min/max = 46.7931/35.4273/58.159
[09:52:27.181] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 64.1074 for pixel 42/18 mean/min/max = 47.5067/30.7753/64.2381
[09:52:27.182] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 58.4564 for pixel 5/9 mean/min/max = 45.5262/32.5728/58.4797
[09:52:27.182] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 57.9099 for pixel 0/57 mean/min/max = 45.2067/32.4823/57.9311
[09:52:27.182] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 58.5832 for pixel 5/79 mean/min/max = 45.8969/33.1916/58.6022
[09:52:27.182] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 61.6324 for pixel 2/5 mean/min/max = 46.3823/31.0611/61.7035
[09:52:27.183] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 59.2886 for pixel 43/79 mean/min/max = 45.8714/32.425/59.3177
[09:52:27.183] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 60.7157 for pixel 51/47 mean/min/max = 46.7409/32.7238/60.758
[09:52:27.183] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 64.9148 for pixel 0/21 mean/min/max = 47.7758/30.6287/64.9228
[09:52:27.184] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 61.3695 for pixel 27/69 mean/min/max = 46.3301/31.0667/61.5934
[09:52:27.184] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 57.7791 for pixel 51/66 mean/min/max = 45.2793/32.6771/57.8815
[09:52:27.184] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 60.6767 for pixel 18/1 mean/min/max = 46.0192/31.3441/60.6943
[09:52:27.184] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 65.4356 for pixel 51/75 mean/min/max = 49.3981/32.9391/65.8571
[09:52:27.184] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:54:02.185] <TB1> INFO: Test took 95001ms.
[09:54:03.822] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:54:03.830] <TB1> INFO: dacScan step from 0 .. 19
[09:54:25.447] <TB1> INFO: Test took 21617ms.
[09:54:25.496] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:25.498] <TB1> INFO: dacScan step from 20 .. 39
[09:54:54.791] <TB1> INFO: Test took 29293ms.
[09:54:55.026] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:54:55.056] <TB1> INFO: dacScan step from 40 .. 59
[09:55:27.457] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[09:55:27.457] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[09:55:28.716] <TB1> INFO: Test took 33660ms.
[09:55:29.007] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:29.064] <TB1> INFO: dacScan step from 60 .. 79
[09:56:02.827] <TB1> INFO: Test took 33763ms.
[09:56:03.152] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:03.213] <TB1> INFO: dacScan step from 80 .. 99
[09:56:35.190] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[09:56:36.505] <TB1> INFO: Test took 33292ms.
[09:56:36.791] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:36.847] <TB1> INFO: dacScan step from 100 .. 119
[09:57:10.217] <TB1> INFO: Test took 33369ms.
[09:57:10.510] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:10.563] <TB1> INFO: dacScan step from 120 .. 139
[09:57:42.883] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[09:57:44.202] <TB1> INFO: Test took 33639ms.
[09:57:44.495] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:44.550] <TB1> INFO: dacScan step from 140 .. 159
[09:58:16.681] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[09:58:17.975] <TB1> INFO: Test took 33425ms.
[09:58:18.329] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:18.381] <TB1> INFO: dacScan step from 160 .. 179
[09:58:50.768] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[09:58:52.015] <TB1> INFO: Test took 33634ms.
[09:58:52.294] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:52.350] <TB1> INFO: dacScan step from 180 .. 199
[09:59:26.860] <TB1> INFO: Test took 34510ms.
[09:59:27.132] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:52.008] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.025507 .. 255.000000
[09:59:52.083] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[09:59:52.091] <TB1> INFO: dacScan step from 0 .. 19
[10:00:05.718] <TB1> INFO: Test took 13627ms.
[10:00:05.743] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:00:05.743] <TB1> INFO: dacScan step from 20 .. 39
[10:00:20.687] <TB1> INFO: Test took 14945ms.
[10:00:20.771] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:00:20.786] <TB1> INFO: dacScan step from 40 .. 59
[10:00:38.632] <TB1> INFO: Test took 17846ms.
[10:00:38.821] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:00:38.870] <TB1> INFO: dacScan step from 60 .. 79
[10:00:56.787] <TB1> INFO: Test took 17917ms.
[10:00:56.962] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:00:57.026] <TB1> INFO: dacScan step from 80 .. 99
[10:01:15.012] <TB1> INFO: Test took 17986ms.
[10:01:15.161] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:15.212] <TB1> INFO: dacScan step from 100 .. 119
[10:01:33.178] <TB1> INFO: Test took 17966ms.
[10:01:33.330] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:33.384] <TB1> INFO: dacScan step from 120 .. 139
[10:01:49.948] <TB1> INFO: Test took 16564ms.
[10:01:50.091] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:50.145] <TB1> INFO: dacScan step from 140 .. 159
[10:02:06.943] <TB1> INFO: Test took 16798ms.
[10:02:07.089] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:02:07.141] <TB1> INFO: dacScan step from 160 .. 179
[10:02:24.674] <TB1> INFO: Test took 17533ms.
[10:02:24.842] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:02:24.902] <TB1> INFO: dacScan step from 180 .. 199
[10:02:43.640] <TB1> INFO: Test took 18738ms.
[10:02:43.787] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:02:43.843] <TB1> INFO: dacScan step from 200 .. 219
[10:03:01.612] <TB1> INFO: Test took 17769ms.
[10:03:01.760] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:03:01.815] <TB1> INFO: dacScan step from 220 .. 239
[10:03:19.672] <TB1> INFO: Test took 17857ms.
[10:03:19.833] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:03:19.888] <TB1> INFO: dacScan step from 240 .. 255
[10:03:34.675] <TB1> INFO: Test took 14787ms.
[10:03:34.798] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:04:08.795] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 10.174833 .. 59.857462
[10:04:08.891] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 0 .. 69 (20) hits flags = 16 (plus default)
[10:04:08.900] <TB1> INFO: dacScan step from 0 .. 19
[10:04:22.518] <TB1> INFO: Test took 13618ms.
[10:04:22.542] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:04:22.542] <TB1> INFO: dacScan step from 20 .. 39
[10:04:37.481] <TB1> INFO: Test took 14939ms.
[10:04:37.562] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:04:37.579] <TB1> INFO: dacScan step from 40 .. 59
[10:04:54.618] <TB1> INFO: Test took 17038ms.
[10:04:54.766] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:04:54.822] <TB1> INFO: dacScan step from 60 .. 69
[10:05:04.625] <TB1> INFO: Test took 9803ms.
[10:05:04.739] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:05:22.336] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 0.607347 .. 59.857462
[10:05:22.411] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 0 .. 69 (20) hits flags = 16 (plus default)
[10:05:22.419] <TB1> INFO: dacScan step from 0 .. 19
[10:05:36.029] <TB1> INFO: Test took 13610ms.
[10:05:36.058] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:05:36.058] <TB1> INFO: dacScan step from 20 .. 39
[10:05:49.976] <TB1> INFO: Test took 13919ms.
[10:05:50.043] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:05:50.059] <TB1> INFO: dacScan step from 40 .. 59
[10:06:06.704] <TB1> INFO: Test took 16645ms.
[10:06:06.937] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:06:07.020] <TB1> INFO: dacScan step from 60 .. 69
[10:06:16.895] <TB1> INFO: Test took 9875ms.
[10:06:16.977] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:06:35.543] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 0.342923 .. 59.857462
[10:06:35.618] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 0 .. 69 (20) hits flags = 16 (plus default)
[10:06:35.626] <TB1> INFO: dacScan step from 0 .. 19
[10:06:48.653] <TB1> INFO: Test took 13027ms.
[10:06:48.673] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:06:48.673] <TB1> INFO: dacScan step from 20 .. 39
[10:07:03.486] <TB1> INFO: Test took 14813ms.
[10:07:03.569] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:07:03.585] <TB1> INFO: dacScan step from 40 .. 59
[10:07:20.199] <TB1> INFO: Test took 16613ms.
[10:07:20.346] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:07:20.400] <TB1> INFO: dacScan step from 60 .. 69
[10:07:30.768] <TB1> INFO: Test took 10367ms.
[10:07:30.847] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:07:49.923] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:07:49.924] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[10:07:49.932] <TB1> INFO: dacScan step from 15 .. 34
[10:08:11.758] <TB1> INFO: Test took 21826ms.
[10:08:11.849] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:08:11.861] <TB1> INFO: dacScan step from 35 .. 54
[10:08:44.193] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[10:08:44.918] <TB1> INFO: Test took 33057ms.
[10:08:45.224] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:08:45.289] <TB1> INFO: dacScan step from 55 .. 55
[10:08:49.516] <TB1> INFO: Test took 4227ms.
[10:08:49.531] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:09:02.978] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:09:02.978] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:09:02.978] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:09:02.978] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:09:02.978] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:09:02.978] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:09:02.979] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:09:02.979] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:09:02.979] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:09:02.979] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:09:02.980] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:09:02.980] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:09:02.980] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:09:02.980] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:09:02.981] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:09:02.981] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:09:02.981] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C0.dat
[10:09:02.987] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C1.dat
[10:09:02.993] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C2.dat
[10:09:03.000] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C3.dat
[10:09:03.006] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C4.dat
[10:09:03.013] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C5.dat
[10:09:03.019] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C6.dat
[10:09:03.026] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C7.dat
[10:09:03.032] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C8.dat
[10:09:03.038] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C9.dat
[10:09:03.045] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C10.dat
[10:09:03.051] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C11.dat
[10:09:03.057] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C12.dat
[10:09:03.063] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C13.dat
[10:09:03.070] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C14.dat
[10:09:03.076] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//trimParameters35_C15.dat
[10:09:03.082] <TB1> INFO: PixTestTrim::trimTest() done
[10:09:03.082] <TB1> INFO: vtrim: 112 123 96 188 113 122 103 97 116 108 114 113 124 98 117 129
[10:09:03.082] <TB1> INFO: vthrcomp: 93 95 80 78 95 85 86 89 92 89 89 98 97 86 87 105
[10:09:03.082] <TB1> INFO: vcal mean: 35.04 35.06 35.04 35.01 35.05 35.04 35.00 35.07 35.01 35.05 35.04 35.03 35.05 35.04 34.89 35.10
[10:09:03.082] <TB1> INFO: vcal RMS: 1.13 1.15 0.94 3.79 1.24 0.98 0.97 0.95 1.07 0.96 1.17 1.16 1.14 0.96 1.11 1.08
[10:09:03.082] <TB1> INFO: bits mean: 10.26 9.80 9.33 11.36 9.66 9.91 9.53 9.05 9.99 9.39 9.30 9.62 9.98 9.36 9.59 8.06
[10:09:03.082] <TB1> INFO: bits RMS: 2.40 2.62 2.74 1.47 2.66 2.45 2.66 2.74 2.52 2.67 2.62 2.64 2.51 2.72 2.70 2.90
[10:09:03.091] <TB1> INFO: ----------------------------------------------------------------------
[10:09:03.091] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[10:09:03.091] <TB1> INFO: ----------------------------------------------------------------------
[10:09:03.096] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[10:09:03.104] <TB1> INFO: dacScan step from 0 .. 19
[10:09:25.907] <TB1> INFO: Test took 22803ms.
[10:09:25.948] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:09:25.948] <TB1> INFO: dacScan step from 20 .. 39
[10:09:48.693] <TB1> INFO: Test took 22745ms.
[10:09:48.730] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:09:48.730] <TB1> INFO: dacScan step from 40 .. 59
[10:10:10.992] <TB1> INFO: Test took 22262ms.
[10:10:11.032] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:10:11.033] <TB1> INFO: dacScan step from 60 .. 79
[10:10:32.774] <TB1> INFO: Test took 21741ms.
[10:10:32.815] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:10:32.815] <TB1> INFO: dacScan step from 80 .. 99
[10:10:56.356] <TB1> INFO: Test took 23541ms.
[10:10:56.426] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:10:56.429] <TB1> INFO: dacScan step from 100 .. 119
[10:11:22.798] <TB1> INFO: Test took 26368ms.
[10:11:23.029] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:11:23.055] <TB1> INFO: dacScan step from 120 .. 139
[10:11:56.173] <TB1> INFO: Test took 33118ms.
[10:11:56.437] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:11:56.483] <TB1> INFO: dacScan step from 140 .. 159
[10:12:28.814] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[10:12:30.009] <TB1> INFO: Test took 33526ms.
[10:12:30.305] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:12:30.358] <TB1> INFO: dacScan step from 160 .. 179
[10:13:00.093] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[10:13:00.093] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[10:13:01.196] <TB1> INFO: Test took 30838ms.
[10:13:01.624] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:13:01.705] <TB1> INFO: dacScan step from 180 .. 199
[10:13:36.000] <TB1> INFO: Test took 34295ms.
[10:13:36.286] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:06.533] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 183 (20) hits flags = 16 (plus default)
[10:14:06.542] <TB1> INFO: dacScan step from 0 .. 19
[10:14:29.409] <TB1> INFO: Test took 22867ms.
[10:14:29.450] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:29.450] <TB1> INFO: dacScan step from 20 .. 39
[10:14:52.354] <TB1> INFO: Test took 22904ms.
[10:14:52.390] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:52.390] <TB1> INFO: dacScan step from 40 .. 59
[10:15:15.455] <TB1> INFO: Test took 23065ms.
[10:15:15.497] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:15:15.497] <TB1> INFO: dacScan step from 60 .. 79
[10:15:36.857] <TB1> INFO: Test took 21360ms.
[10:15:36.895] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:15:36.895] <TB1> INFO: dacScan step from 80 .. 99
[10:16:02.157] <TB1> INFO: Test took 25262ms.
[10:16:02.305] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:16:02.323] <TB1> INFO: dacScan step from 100 .. 119
[10:16:31.003] <TB1> INFO: Test took 28680ms.
[10:16:31.246] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:16:31.282] <TB1> INFO: dacScan step from 120 .. 139
[10:17:02.296] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[10:17:02.296] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[10:17:03.449] <TB1> INFO: Test took 32167ms.
[10:17:03.729] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:17:03.781] <TB1> INFO: dacScan step from 140 .. 159
[10:17:36.140] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)
[10:17:36.140] <TB1> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (96) != TBM ID (97)
[10:17:36.140] <TB1> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!
[10:17:36.140] <TB1> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!
[10:17:36.140] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[10:17:37.478] <TB1> INFO: Test took 33697ms.
[10:17:37.777] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:17:37.837] <TB1> INFO: dacScan step from 160 .. 179
[10:18:10.690] <TB1> INFO: Test took 32854ms.
[10:18:10.971] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:18:11.029] <TB1> INFO: dacScan step from 180 .. 183
[10:18:19.329] <TB1> INFO: Test took 8300ms.
[10:18:19.386] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:18:45.822] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 171 (20) hits flags = 16 (plus default)
[10:18:45.831] <TB1> INFO: dacScan step from 0 .. 19
[10:19:07.515] <TB1> INFO: Test took 21684ms.
[10:19:07.558] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:19:07.558] <TB1> INFO: dacScan step from 20 .. 39
[10:19:29.028] <TB1> INFO: Test took 21470ms.
[10:19:29.065] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:19:29.066] <TB1> INFO: dacScan step from 40 .. 59
[10:19:51.812] <TB1> INFO: Test took 22746ms.
[10:19:51.850] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:19:51.850] <TB1> INFO: dacScan step from 60 .. 79
[10:20:13.404] <TB1> INFO: Test took 21553ms.
[10:20:13.453] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:20:13.453] <TB1> INFO: dacScan step from 80 .. 99
[10:20:36.831] <TB1> INFO: Test took 23378ms.
[10:20:36.956] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:20:36.969] <TB1> INFO: dacScan step from 100 .. 119
[10:21:08.239] <TB1> INFO: Test took 31270ms.
[10:21:08.507] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:21:08.545] <TB1> INFO: dacScan step from 120 .. 139
[10:21:40.916] <TB1> WARNING: Channel 3 ROC 2: Readback start marker after 32 readouts!
[10:21:42.066] <TB1> INFO: Test took 33521ms.
[10:21:42.340] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:21:42.394] <TB1> INFO: dacScan step from 140 .. 159
[10:22:14.543] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[10:22:14.544] <TB1> WARNING: Channel 3 ROC 2: Readback start marker after 31 readouts!
[10:22:14.544] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 31 readouts!
[10:22:15.803] <TB1> INFO: Test took 33409ms.
[10:22:16.110] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:22:16.171] <TB1> INFO: dacScan step from 160 .. 171
[10:22:37.428] <TB1> INFO: Test took 21257ms.
[10:22:37.612] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:04.978] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 172 (20) hits flags = 16 (plus default)
[10:23:04.987] <TB1> INFO: dacScan step from 0 .. 19
[10:23:27.537] <TB1> INFO: Test took 22550ms.
[10:23:27.577] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:27.577] <TB1> INFO: dacScan step from 20 .. 39
[10:23:49.114] <TB1> INFO: Test took 21537ms.
[10:23:49.150] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:49.150] <TB1> INFO: dacScan step from 40 .. 59
[10:24:11.406] <TB1> INFO: Test took 22256ms.
[10:24:11.444] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:24:11.444] <TB1> INFO: dacScan step from 60 .. 79
[10:24:32.714] <TB1> INFO: Test took 21270ms.
[10:24:32.751] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:24:32.752] <TB1> INFO: dacScan step from 80 .. 99
[10:24:56.131] <TB1> INFO: Test took 23379ms.
[10:24:56.263] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:24:56.278] <TB1> INFO: dacScan step from 100 .. 119
[10:25:26.596] <TB1> INFO: Test took 30318ms.
[10:25:26.875] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:25:26.917] <TB1> INFO: dacScan step from 120 .. 139
[10:25:59.188] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[10:25:59.188] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[10:26:00.362] <TB1> INFO: Test took 33445ms.
[10:26:00.646] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:00.708] <TB1> INFO: dacScan step from 140 .. 159
[10:26:33.019] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[10:26:33.019] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[10:26:34.286] <TB1> INFO: Test took 33578ms.
[10:26:34.589] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:34.640] <TB1> INFO: dacScan step from 160 .. 172
[10:26:57.314] <TB1> INFO: Test took 22674ms.
[10:26:57.537] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:22.913] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 171 (20) hits flags = 16 (plus default)
[10:27:22.922] <TB1> INFO: dacScan step from 0 .. 19
[10:27:45.636] <TB1> INFO: Test took 22714ms.
[10:27:45.672] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:45.672] <TB1> INFO: dacScan step from 20 .. 39
[10:28:07.170] <TB1> INFO: Test took 21498ms.
[10:28:07.215] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:07.215] <TB1> INFO: dacScan step from 40 .. 59
[10:28:30.047] <TB1> INFO: Test took 22831ms.
[10:28:30.086] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:30.086] <TB1> INFO: dacScan step from 60 .. 79
[10:28:51.901] <TB1> INFO: Test took 21815ms.
[10:28:51.938] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:51.938] <TB1> INFO: dacScan step from 80 .. 99
[10:29:16.197] <TB1> INFO: Test took 24259ms.
[10:29:16.320] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:16.333] <TB1> INFO: dacScan step from 100 .. 119
[10:29:47.454] <TB1> INFO: Test took 31121ms.
[10:29:47.727] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:47.765] <TB1> INFO: dacScan step from 120 .. 139
[10:30:20.044] <TB1> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (86) != TBM ID (0)
[10:30:20.044] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)
[10:30:20.044] <TB1> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (87)
[10:30:21.158] <TB1> INFO: Test took 33393ms.
[10:30:21.452] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:21.510] <TB1> INFO: dacScan step from 140 .. 159
[10:30:53.892] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)
[10:30:53.893] <TB1> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!
[10:30:55.191] <TB1> INFO: Test took 33680ms.
[10:30:55.463] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:30:55.516] <TB1> INFO: dacScan step from 160 .. 171
[10:31:16.597] <TB1> INFO: Test took 21081ms.
[10:31:16.776] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:41.279] <TB1> INFO: PixTestTrim::trimBitTest() done
[10:31:41.281] <TB1> INFO: PixTestTrim::doTest() done, duration: 2678 seconds
[10:31:41.955] <TB1> INFO: ######################################################################
[10:31:41.955] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:31:41.955] <TB1> INFO: ######################################################################
[10:31:45.258] <TB1> INFO: Test took 3302ms.
[10:31:45.276] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:48.788] <TB1> INFO: Test took 3313ms.
[10:31:48.857] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:52.175] <TB1> INFO: Test took 3304ms.
[10:31:52.242] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:31:52.251] <TB1> INFO: The DUT currently contains the following objects:
[10:31:52.251] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:31:52.251] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:31:52.251] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:31:52.251] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:31:52.251] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:52.251] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:52.251] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:52.251] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:52.251] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:52.251] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:52.251] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:52.251] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:52.251] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:52.251] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:52.251] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:52.251] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:52.251] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:52.251] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:52.251] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:52.251] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:53.355] <TB1> INFO: Test took 1104ms.
[10:31:53.355] <TB1> INFO: The DUT currently contains the following objects:
[10:31:53.355] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:31:53.355] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:31:53.355] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:31:53.355] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:31:53.355] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:53.355] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:53.355] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:53.356] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:53.356] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:53.356] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:53.356] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:53.356] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:53.356] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:53.356] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:53.356] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:53.356] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:53.356] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:53.356] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:53.356] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:53.356] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:54.460] <TB1> INFO: Test took 1104ms.
[10:31:54.461] <TB1> INFO: The DUT currently contains the following objects:
[10:31:54.461] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:31:54.461] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:31:54.461] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:31:54.461] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:31:54.461] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:54.461] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:54.461] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:54.461] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:54.461] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:54.461] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:54.461] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:54.461] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:54.461] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:54.461] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:54.461] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:54.461] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:54.461] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:54.461] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:54.461] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:54.461] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:55.564] <TB1> INFO: Test took 1103ms.
[10:31:55.565] <TB1> INFO: The DUT currently contains the following objects:
[10:31:55.565] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:31:55.565] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:31:55.565] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:31:55.565] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:31:55.565] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:55.565] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:55.565] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:55.565] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:55.565] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:55.565] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:55.565] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:55.565] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:55.565] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:55.565] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:55.565] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:55.565] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:55.565] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:55.565] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:55.565] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:55.565] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:56.669] <TB1> INFO: Test took 1104ms.
[10:31:56.670] <TB1> INFO: The DUT currently contains the following objects:
[10:31:56.670] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:31:56.670] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:31:56.670] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:31:56.670] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:31:56.670] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:56.670] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:56.670] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:56.670] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:56.670] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:56.670] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:56.670] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:56.670] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:56.670] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:56.670] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:56.670] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:56.670] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:56.670] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:56.670] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:56.670] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:56.670] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:57.773] <TB1> INFO: Test took 1103ms.
[10:31:57.774] <TB1> INFO: The DUT currently contains the following objects:
[10:31:57.774] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:31:57.774] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:31:57.774] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:31:57.774] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:31:57.774] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:57.774] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:57.774] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:57.774] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:57.774] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:57.774] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:57.774] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:57.774] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:57.774] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:57.774] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:57.774] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:57.774] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:57.774] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:57.774] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:57.774] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:57.775] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:58.879] <TB1> INFO: Test took 1104ms.
[10:31:58.879] <TB1> INFO: The DUT currently contains the following objects:
[10:31:58.879] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:31:58.879] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:31:58.879] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:31:58.879] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:31:58.879] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:58.879] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:58.879] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:58.879] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:58.879] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:58.879] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:58.879] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:58.879] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:58.880] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:58.880] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:58.880] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:58.880] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:58.880] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:58.880] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:58.880] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:58.880] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:59.984] <TB1> INFO: Test took 1104ms.
[10:31:59.985] <TB1> INFO: The DUT currently contains the following objects:
[10:31:59.985] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:31:59.985] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:31:59.985] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:31:59.985] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:31:59.985] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:59.985] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:59.985] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:59.985] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:59.985] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:59.985] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:59.985] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:59.985] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:59.985] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:59.985] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:59.985] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:59.985] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:59.985] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:59.985] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:59.986] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:31:59.986] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:01.089] <TB1> INFO: Test took 1103ms.
[10:32:01.090] <TB1> INFO: The DUT currently contains the following objects:
[10:32:01.101] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:32:01.101] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:32:01.101] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:32:01.101] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:32:01.101] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:01.101] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:01.101] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:01.101] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:01.101] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:01.101] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:01.101] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:01.101] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:01.101] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:01.101] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:01.101] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:01.101] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:01.101] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:01.101] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:01.101] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:01.101] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:02.196] <TB1> INFO: Test took 1094ms.
[10:32:02.197] <TB1> INFO: The DUT currently contains the following objects:
[10:32:02.197] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:32:02.197] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:32:02.197] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:32:02.197] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:32:02.197] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:02.197] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:02.197] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:02.197] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:02.197] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:02.197] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:02.197] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:02.197] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:02.197] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:02.197] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:02.197] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:02.197] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:02.197] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:02.197] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:02.197] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:02.197] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:03.303] <TB1> INFO: Test took 1106ms.
[10:32:03.304] <TB1> INFO: The DUT currently contains the following objects:
[10:32:03.304] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:32:03.304] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:32:03.304] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:32:03.304] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:32:03.304] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:03.304] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:03.304] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:03.304] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:03.304] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:03.304] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:03.304] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:03.304] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:03.304] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:03.304] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:03.304] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:03.304] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:03.304] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:03.304] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:03.304] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:03.304] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:04.409] <TB1> INFO: Test took 1105ms.
[10:32:04.409] <TB1> INFO: The DUT currently contains the following objects:
[10:32:04.409] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:32:04.409] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:32:04.409] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:32:04.409] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:32:04.409] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:04.409] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:04.409] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:04.409] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:04.409] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:04.409] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:04.409] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:04.409] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:04.409] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:04.409] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:04.409] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:04.409] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:04.409] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:04.409] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:04.410] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:04.410] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:05.520] <TB1> INFO: Test took 1110ms.
[10:32:05.522] <TB1> INFO: The DUT currently contains the following objects:
[10:32:05.522] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:32:05.522] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:32:05.522] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:32:05.522] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:32:05.522] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:05.522] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:05.522] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:05.522] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:05.522] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:05.522] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:05.522] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:05.522] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:05.522] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:05.522] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:05.522] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:05.522] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:05.522] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:05.522] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:05.522] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:05.522] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:06.633] <TB1> INFO: Test took 1111ms.
[10:32:06.634] <TB1> INFO: The DUT currently contains the following objects:
[10:32:06.634] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:32:06.634] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:32:06.634] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:32:06.634] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:32:06.634] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:06.634] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:06.634] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:06.635] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:06.635] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:06.635] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:06.635] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:06.635] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:06.635] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:06.635] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:06.635] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:06.635] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:06.635] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:06.635] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:06.635] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:06.635] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:07.746] <TB1> INFO: Test took 1111ms.
[10:32:07.748] <TB1> INFO: The DUT currently contains the following objects:
[10:32:07.748] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:32:07.748] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:32:07.748] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:32:07.748] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:32:07.748] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:07.748] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:07.748] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:07.748] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:07.748] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:07.748] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:07.748] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:07.748] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:07.748] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:07.748] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:07.748] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:07.748] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:07.748] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:07.748] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:07.748] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:07.748] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:08.860] <TB1> INFO: Test took 1112ms.
[10:32:08.861] <TB1> INFO: The DUT currently contains the following objects:
[10:32:08.861] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[10:32:08.861] <TB1> INFO: TBM Core alpha (0): 7 registers set
[10:32:08.861] <TB1> INFO: TBM Core beta (1): 7 registers set
[10:32:08.861] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[10:32:08.861] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:08.861] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:08.861] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:08.861] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:08.861] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:08.862] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:08.862] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:08.862] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:08.862] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:08.862] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:08.862] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:08.862] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:08.862] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:08.862] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:08.862] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:08.862] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[10:32:09.986] <TB1> INFO: Test took 1124ms.
[10:32:09.992] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:35:56.463] <TB1> INFO: Test took 226471ms.
[10:35:58.148] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:40.729] <TB1> INFO: Test took 222581ms.
[10:39:42.468] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:39:42.477] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:39:42.485] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:39:42.495] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:39:42.504] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:39:42.513] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:39:42.522] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:39:42.531] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:39:42.545] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:39:42.557] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:39:42.564] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:39:42.571] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:39:42.578] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:39:42.585] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:39:42.591] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:39:42.598] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:39:42.664] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C0.dat
[10:39:42.669] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C1.dat
[10:39:42.670] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C2.dat
[10:39:42.670] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C3.dat
[10:39:42.679] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C4.dat
[10:39:42.679] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C5.dat
[10:39:42.689] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C6.dat
[10:39:42.690] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C7.dat
[10:39:42.690] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C8.dat
[10:39:42.690] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C9.dat
[10:39:42.693] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C10.dat
[10:39:42.693] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C11.dat
[10:39:42.700] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C12.dat
[10:39:42.700] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C13.dat
[10:39:42.700] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C14.dat
[10:39:42.701] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//dacParameters35_C15.dat
[10:39:46.153] <TB1> INFO: Test took 3448ms.
[10:39:49.854] <TB1> INFO: Test took 3416ms.
[10:39:53.620] <TB1> INFO: Test took 3482ms.
[10:39:53.906] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:54.828] <TB1> INFO: Test took 922ms.
[10:39:54.832] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:55.942] <TB1> INFO: Test took 1110ms.
[10:39:55.946] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:57.057] <TB1> INFO: Test took 1111ms.
[10:39:57.062] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:58.173] <TB1> INFO: Test took 1112ms.
[10:39:58.178] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:39:59.289] <TB1> INFO: Test took 1111ms.
[10:39:59.294] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:00.404] <TB1> INFO: Test took 1111ms.
[10:40:00.408] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:01.518] <TB1> INFO: Test took 1110ms.
[10:40:01.523] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:02.635] <TB1> INFO: Test took 1112ms.
[10:40:02.639] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:03.750] <TB1> INFO: Test took 1111ms.
[10:40:03.754] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:04.864] <TB1> INFO: Test took 1111ms.
[10:40:04.869] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:05.981] <TB1> INFO: Test took 1112ms.
[10:40:05.985] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:07.097] <TB1> INFO: Test took 1113ms.
[10:40:07.101] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:08.211] <TB1> INFO: Test took 1110ms.
[10:40:08.215] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:09.324] <TB1> INFO: Test took 1110ms.
[10:40:09.328] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:10.438] <TB1> INFO: Test took 1110ms.
[10:40:10.443] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:11.553] <TB1> INFO: Test took 1111ms.
[10:40:11.557] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:12.668] <TB1> INFO: Test took 1111ms.
[10:40:12.672] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:13.781] <TB1> INFO: Test took 1109ms.
[10:40:13.786] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:14.895] <TB1> INFO: Test took 1109ms.
[10:40:14.900] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:16.009] <TB1> INFO: Test took 1109ms.
[10:40:16.013] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:17.123] <TB1> INFO: Test took 1110ms.
[10:40:17.127] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:18.238] <TB1> INFO: Test took 1111ms.
[10:40:18.242] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:19.347] <TB1> INFO: Test took 1105ms.
[10:40:19.351] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:20.462] <TB1> INFO: Test took 1111ms.
[10:40:20.466] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:21.576] <TB1> INFO: Test took 1110ms.
[10:40:21.580] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:22.693] <TB1> INFO: Test took 1113ms.
[10:40:22.697] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:23.809] <TB1> INFO: Test took 1113ms.
[10:40:23.813] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:24.924] <TB1> INFO: Test took 1111ms.
[10:40:24.927] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:26.038] <TB1> INFO: Test took 1111ms.
[10:40:26.041] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:27.151] <TB1> INFO: Test took 1110ms.
[10:40:27.155] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:28.265] <TB1> INFO: Test took 1110ms.
[10:40:28.269] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:40:29.378] <TB1> INFO: Test took 1109ms.
[10:40:29.965] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 528 seconds
[10:40:29.965] <TB1> INFO: PH scale (per ROC): 80 84 82 89 80 82 80 86 87 82 83 76 81 83 70 74
[10:40:29.965] <TB1> INFO: PH offset (per ROC): 154 151 147 139 170 156 146 158 161 175 151 171 163 140 162 170
[10:40:30.157] <TB1> INFO: ######################################################################
[10:40:30.158] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:40:30.158] <TB1> INFO: ######################################################################
[10:40:30.171] <TB1> INFO: scanning low vcal = 10
[10:40:34.057] <TB1> INFO: Test took 3886ms.
[10:40:34.063] <TB1> INFO: scanning low vcal = 20
[10:40:37.936] <TB1> INFO: Test took 3873ms.
[10:40:37.942] <TB1> INFO: scanning low vcal = 30
[10:40:41.863] <TB1> INFO: Test took 3921ms.
[10:40:41.876] <TB1> INFO: scanning low vcal = 40
[10:40:46.222] <TB1> INFO: Test took 4346ms.
[10:40:46.283] <TB1> INFO: scanning low vcal = 50
[10:40:50.646] <TB1> INFO: Test took 4363ms.
[10:40:50.719] <TB1> INFO: scanning low vcal = 60
[10:40:55.089] <TB1> INFO: Test took 4370ms.
[10:40:55.155] <TB1> INFO: scanning low vcal = 70
[10:40:59.561] <TB1> INFO: Test took 4406ms.
[10:40:59.648] <TB1> INFO: scanning low vcal = 80
[10:41:04.039] <TB1> INFO: Test took 4391ms.
[10:41:04.099] <TB1> INFO: scanning low vcal = 90
[10:41:08.490] <TB1> INFO: Test took 4391ms.
[10:41:08.549] <TB1> INFO: scanning low vcal = 100
[10:41:12.932] <TB1> INFO: Test took 4383ms.
[10:41:13.019] <TB1> INFO: scanning low vcal = 110
[10:41:17.430] <TB1> INFO: Test took 4411ms.
[10:41:17.495] <TB1> INFO: scanning low vcal = 120
[10:41:21.894] <TB1> INFO: Test took 4399ms.
[10:41:21.956] <TB1> INFO: scanning low vcal = 130
[10:41:26.381] <TB1> INFO: Test took 4425ms.
[10:41:26.439] <TB1> INFO: scanning low vcal = 140
[10:41:30.804] <TB1> INFO: Test took 4365ms.
[10:41:30.865] <TB1> INFO: scanning low vcal = 150
[10:41:35.240] <TB1> INFO: Test took 4375ms.
[10:41:35.301] <TB1> INFO: scanning low vcal = 160
[10:41:39.522] <TB1> INFO: Test took 4221ms.
[10:41:39.600] <TB1> INFO: scanning low vcal = 170
[10:41:43.940] <TB1> INFO: Test took 4340ms.
[10:41:43.999] <TB1> INFO: scanning low vcal = 180
[10:41:48.380] <TB1> INFO: Test took 4381ms.
[10:41:48.438] <TB1> INFO: scanning low vcal = 190
[10:41:52.899] <TB1> INFO: Test took 4461ms.
[10:41:52.961] <TB1> INFO: scanning low vcal = 200
[10:41:57.311] <TB1> INFO: Test took 4350ms.
[10:41:57.378] <TB1> INFO: scanning low vcal = 210
[10:42:01.788] <TB1> INFO: Test took 4410ms.
[10:42:01.855] <TB1> INFO: scanning low vcal = 220
[10:42:06.228] <TB1> INFO: Test took 4373ms.
[10:42:06.301] <TB1> INFO: scanning low vcal = 230
[10:42:10.677] <TB1> INFO: Test took 4376ms.
[10:42:10.737] <TB1> INFO: scanning low vcal = 240
[10:42:15.142] <TB1> INFO: Test took 4405ms.
[10:42:15.207] <TB1> INFO: scanning low vcal = 250
[10:42:19.590] <TB1> INFO: Test took 4383ms.
[10:42:19.658] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[10:42:24.021] <TB1> INFO: Test took 4363ms.
[10:42:24.090] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[10:42:28.452] <TB1> INFO: Test took 4362ms.
[10:42:28.519] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[10:42:32.868] <TB1> INFO: Test took 4349ms.
[10:42:32.928] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[10:42:37.287] <TB1> INFO: Test took 4359ms.
[10:42:37.348] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:42:41.711] <TB1> INFO: Test took 4363ms.
[10:42:42.247] <TB1> INFO: PixTestGainPedestal::measure() done
[10:43:17.936] <TB1> INFO: PixTestGainPedestal::fit() done
[10:43:17.936] <TB1> INFO: non-linearity mean: 0.958 0.959 0.956 0.958 0.962 0.957 0.955 0.959 0.960 0.949 0.955 0.953 0.958 0.954 0.948 0.956
[10:43:17.936] <TB1> INFO: non-linearity RMS: 0.006 0.006 0.006 0.006 0.005 0.006 0.004 0.006 0.006 0.006 0.006 0.007 0.006 0.006 0.008 0.006
[10:43:17.936] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[10:43:17.954] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[10:43:17.972] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[10:43:17.990] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[10:43:18.008] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[10:43:18.026] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[10:43:18.044] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[10:43:18.062] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[10:43:18.080] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[10:43:18.098] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[10:43:18.115] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[10:43:18.133] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[10:43:18.151] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[10:43:18.169] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[10:43:18.186] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[10:43:18.204] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[10:43:18.222] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 168 seconds
[10:43:18.228] <TB1> INFO: enter test to run
[10:43:18.228] <TB1> INFO: test: exit no parameter change
[10:43:18.745] <TB1> QUIET: Connection to board 153 closed.
[10:43:18.825] <TB1> INFO: pXar: this is the end, my friend