[14:02:23.804] <TB2> INFO: *** Welcome to pxar ***
[14:02:23.804] <TB2> INFO: *** Today: 2015/07/07
[14:02:23.804] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C15.dat
[14:02:23.805] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//tbmParameters_C0b.dat
[14:02:23.805] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//defaultMaskFile.dat
[14:02:23.805] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters_C15.dat
[14:02:23.884] <TB2> INFO: clk: 4
[14:02:23.884] <TB2> INFO: ctr: 4
[14:02:23.884] <TB2> INFO: sda: 19
[14:02:23.884] <TB2> INFO: tin: 9
[14:02:23.884] <TB2> INFO: level: 15
[14:02:23.884] <TB2> INFO: triggerdelay: 0
[14:02:23.885] <TB2> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[14:02:23.885] <TB2> INFO: Log level: INFO
[14:02:23.892] <TB2> INFO: Found DTB DTB_WXC55Z
[14:02:23.904] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[14:02:23.907] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 0
HW version:
FW version: 4.0
SW version: 4.0
USB id:
MAC address: 000000000000
Hostname:
Comment:
------------------------------------------------------
[14:02:23.910] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[14:02:25.506] <TB2> INFO: DUT info:
[14:02:25.506] <TB2> INFO: The DUT currently contains the following objects:
[14:02:25.506] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[14:02:25.506] <TB2> INFO: TBM Core alpha (0): 7 registers set
[14:02:25.506] <TB2> INFO: TBM Core beta (1): 7 registers set
[14:02:25.506] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[14:02:25.506] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:25.507] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:25.507] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:25.507] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:25.507] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:25.507] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:25.507] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:25.507] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:25.507] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:25.507] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:25.507] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:25.507] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:25.507] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:25.507] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:25.507] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:25.507] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[14:02:25.908] <TB2> INFO: enter 'restricted' command line mode
[14:02:25.908] <TB2> INFO: enter test to run
[14:02:25.909] <TB2> INFO: test: pretest no parameter change
[14:02:25.909] <TB2> INFO: running: pretest
[14:02:25.914] <TB2> INFO: ######################################################################
[14:02:25.914] <TB2> INFO: PixTestPretest::doTest()
[14:02:25.914] <TB2> INFO: ######################################################################
[14:02:25.916] <TB2> INFO: ----------------------------------------------------------------------
[14:02:25.916] <TB2> INFO: PixTestPretest::programROC()
[14:02:25.916] <TB2> INFO: ----------------------------------------------------------------------
[14:02:43.932] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[14:02:43.932] <TB2> INFO: IA differences per ROC: 17.7 17.7 18.5 19.3 19.3 18.5 18.5 19.3 20.9 18.5 17.7 18.5 19.3 20.9 16.9 18.5
[14:02:44.003] <TB2> INFO: ----------------------------------------------------------------------
[14:02:44.003] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[14:02:44.003] <TB2> INFO: ----------------------------------------------------------------------
[14:03:03.552] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 363.4 mA = 22.7125 mA/ROC
[14:03:03.555] <TB2> INFO: ----------------------------------------------------------------------
[14:03:03.555] <TB2> INFO: PixTestPretest::findWorkingPixel()
[14:03:03.555] <TB2> INFO: ----------------------------------------------------------------------
[14:03:12.896] <TB2> INFO: Test took 9338ms.
[14:03:13.197] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[14:03:13.233] <TB2> INFO: ----------------------------------------------------------------------
[14:03:13.233] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[14:03:13.233] <TB2> INFO: ----------------------------------------------------------------------
[14:03:22.561] <TB2> INFO: Test took 9320ms.
[14:03:22.850] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[14:03:22.850] <TB2> INFO: CalDel: 128 136 144 143 133 151 149 131 163 135 134 151 161 149 144 148
[14:03:22.850] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[14:03:22.853] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C0.dat
[14:03:22.854] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C1.dat
[14:03:22.854] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C2.dat
[14:03:22.854] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C3.dat
[14:03:22.855] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C4.dat
[14:03:22.855] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C5.dat
[14:03:22.855] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C6.dat
[14:03:22.855] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C7.dat
[14:03:22.856] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C8.dat
[14:03:22.856] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C9.dat
[14:03:22.856] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C10.dat
[14:03:22.856] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C11.dat
[14:03:22.857] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C12.dat
[14:03:22.857] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C13.dat
[14:03:22.857] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C14.dat
[14:03:22.857] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters_C15.dat
[14:03:22.857] <TB2> INFO: PixTestPretest::doTest() done, duration: 56 seconds
[14:03:22.946] <TB2> INFO: enter test to run
[14:03:22.946] <TB2> INFO: test: fulltest no parameter change
[14:03:22.946] <TB2> INFO: running: fulltest
[14:03:22.946] <TB2> INFO: ######################################################################
[14:03:22.946] <TB2> INFO: PixTestFullTest::doTest()
[14:03:22.946] <TB2> INFO: ######################################################################
[14:03:22.948] <TB2> INFO: ######################################################################
[14:03:22.948] <TB2> INFO: PixTestAlive::doTest()
[14:03:22.948] <TB2> INFO: ######################################################################
[14:03:22.949] <TB2> INFO: ----------------------------------------------------------------------
[14:03:22.949] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:03:22.949] <TB2> INFO: ----------------------------------------------------------------------
[14:03:26.747] <TB2> INFO: Test took 3796ms.
[14:03:26.766] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:26.992] <TB2> INFO: PixTestAlive::aliveTest() done
[14:03:26.992] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:03:26.994] <TB2> INFO: ----------------------------------------------------------------------
[14:03:26.994] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:03:26.994] <TB2> INFO: ----------------------------------------------------------------------
[14:03:29.822] <TB2> INFO: Test took 2826ms.
[14:03:29.826] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:29.826] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:03:30.046] <TB2> INFO: PixTestAlive::maskTest() done
[14:03:30.046] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:03:30.048] <TB2> INFO: ----------------------------------------------------------------------
[14:03:30.048] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:03:30.048] <TB2> INFO: ----------------------------------------------------------------------
[14:03:33.776] <TB2> INFO: Test took 3727ms.
[14:03:33.802] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:34.021] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[14:03:34.021] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:03:34.021] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[14:03:34.033] <TB2> INFO: ######################################################################
[14:03:34.033] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[14:03:34.033] <TB2> INFO: ######################################################################
[14:03:34.036] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[14:03:34.048] <TB2> INFO: dacScan step from 0 .. 29
[14:03:57.612] <TB2> INFO: Test took 23564ms.
[14:03:57.650] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:57.650] <TB2> INFO: dacScan step from 30 .. 59
[14:04:23.132] <TB2> INFO: Test took 25482ms.
[14:04:23.228] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:23.240] <TB2> INFO: dacScan step from 60 .. 89
[14:04:56.691] <TB2> INFO: Test took 33451ms.
[14:04:56.940] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:57.015] <TB2> INFO: dacScan step from 90 .. 119
[14:05:28.693] <TB2> INFO: Test took 31678ms.
[14:05:29.003] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:29.082] <TB2> INFO: dacScan step from 120 .. 149
[14:05:54.814] <TB2> INFO: Test took 25732ms.
[14:05:55.005] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:16.599] <TB2> INFO: PixTestBBMap::doTest() done, duration: 162 seconds
[14:06:16.599] <TB2> INFO: number of dead bumps (per ROC): 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 66
[14:06:16.599] <TB2> INFO: separation cut (per ROC): 98 90 93 87 93 89 84 91 81 84 69 81 84 80 69 76
[14:06:16.668] <TB2> INFO: ######################################################################
[14:06:16.668] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[14:06:16.668] <TB2> INFO: ######################################################################
[14:06:16.669] <TB2> INFO: ----------------------------------------------------------------------
[14:06:16.669] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[14:06:16.669] <TB2> INFO: ----------------------------------------------------------------------
[14:06:16.669] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (3) hits flags = 16 (plus default)
[14:06:16.676] <TB2> INFO: dacScan step from 0 .. 2
[14:06:34.079] <TB2> INFO: Test took 17403ms.
[14:06:34.098] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:34.098] <TB2> INFO: dacScan step from 3 .. 5
[14:06:51.242] <TB2> INFO: Test took 17144ms.
[14:06:51.266] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:51.266] <TB2> INFO: dacScan step from 6 .. 8
[14:07:08.508] <TB2> INFO: Test took 17242ms.
[14:07:08.533] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:08.533] <TB2> INFO: dacScan step from 9 .. 11
[14:07:26.031] <TB2> INFO: Test took 17497ms.
[14:07:26.058] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:26.058] <TB2> INFO: dacScan step from 12 .. 14
[14:07:42.966] <TB2> INFO: Test took 16907ms.
[14:07:42.987] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:42.987] <TB2> INFO: dacScan step from 15 .. 17
[14:08:00.093] <TB2> INFO: Test took 17107ms.
[14:08:00.114] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:00.114] <TB2> INFO: dacScan step from 18 .. 20
[14:08:17.631] <TB2> INFO: Test took 17517ms.
[14:08:17.654] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:17.654] <TB2> INFO: dacScan step from 21 .. 23
[14:08:34.999] <TB2> INFO: Test took 17345ms.
[14:08:35.019] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:35.019] <TB2> INFO: dacScan step from 24 .. 26
[14:08:51.625] <TB2> INFO: Test took 16606ms.
[14:08:51.646] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:51.646] <TB2> INFO: dacScan step from 27 .. 29
[14:09:08.910] <TB2> INFO: Test took 17264ms.
[14:09:08.936] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:08.936] <TB2> INFO: dacScan step from 30 .. 32
[14:09:26.270] <TB2> INFO: Test took 17334ms.
[14:09:26.294] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:26.294] <TB2> INFO: dacScan step from 33 .. 35
[14:09:43.435] <TB2> INFO: Test took 17141ms.
[14:09:43.455] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:43.455] <TB2> INFO: dacScan step from 36 .. 38
[14:10:00.773] <TB2> INFO: Test took 17318ms.
[14:10:00.793] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:00.793] <TB2> INFO: dacScan step from 39 .. 41
[14:10:18.337] <TB2> INFO: Test took 17544ms.
[14:10:18.358] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:18.358] <TB2> INFO: dacScan step from 42 .. 44
[14:10:35.496] <TB2> INFO: Test took 17139ms.
[14:10:35.521] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:35.521] <TB2> INFO: dacScan step from 45 .. 47
[14:10:52.706] <TB2> INFO: Test took 17185ms.
[14:10:52.727] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:52.727] <TB2> INFO: dacScan step from 48 .. 50
[14:11:09.752] <TB2> INFO: Test took 17025ms.
[14:11:09.772] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:09.772] <TB2> INFO: dacScan step from 51 .. 53
[14:11:26.914] <TB2> INFO: Test took 17142ms.
[14:11:26.933] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:26.933] <TB2> INFO: dacScan step from 54 .. 56
[14:11:44.558] <TB2> INFO: Test took 17624ms.
[14:11:44.577] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:44.577] <TB2> INFO: dacScan step from 57 .. 59
[14:12:01.905] <TB2> INFO: Test took 17328ms.
[14:12:01.925] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:01.925] <TB2> INFO: dacScan step from 60 .. 62
[14:12:19.301] <TB2> INFO: Test took 17375ms.
[14:12:19.328] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:19.328] <TB2> INFO: dacScan step from 63 .. 65
[14:12:36.603] <TB2> INFO: Test took 17275ms.
[14:12:36.626] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:36.626] <TB2> INFO: dacScan step from 66 .. 68
[14:12:54.294] <TB2> INFO: Test took 17668ms.
[14:12:54.319] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:54.319] <TB2> INFO: dacScan step from 69 .. 71
[14:13:11.936] <TB2> INFO: Test took 17617ms.
[14:13:11.964] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:11.964] <TB2> INFO: dacScan step from 72 .. 74
[14:13:29.565] <TB2> INFO: Test took 17600ms.
[14:13:29.599] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:29.600] <TB2> INFO: dacScan step from 75 .. 77
[14:13:47.535] <TB2> INFO: Test took 17935ms.
[14:13:47.583] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:47.584] <TB2> INFO: dacScan step from 78 .. 80
[14:14:06.830] <TB2> INFO: Test took 19246ms.
[14:14:06.886] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:06.888] <TB2> INFO: dacScan step from 81 .. 83
[14:14:27.564] <TB2> INFO: Test took 20676ms.
[14:14:27.661] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:27.665] <TB2> INFO: dacScan step from 84 .. 86
[14:14:49.788] <TB2> INFO: Test took 22123ms.
[14:14:49.930] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:49.937] <TB2> INFO: dacScan step from 87 .. 89
[14:15:12.831] <TB2> INFO: Test took 22887ms.
[14:15:12.966] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:12.976] <TB2> INFO: dacScan step from 90 .. 92
[14:15:37.587] <TB2> INFO: Test took 24611ms.
[14:15:37.740] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:37.747] <TB2> INFO: dacScan step from 93 .. 95
[14:16:03.150] <TB2> INFO: Test took 25403ms.
[14:16:03.337] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:03.345] <TB2> INFO: dacScan step from 96 .. 98
[14:16:29.433] <TB2> INFO: Test took 26088ms.
[14:16:29.615] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:29.627] <TB2> INFO: dacScan step from 99 .. 101
[14:16:56.625] <TB2> INFO: Test took 26998ms.
[14:16:56.809] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:56.820] <TB2> INFO: dacScan step from 102 .. 104
[14:17:24.012] <TB2> INFO: Test took 27192ms.
[14:17:24.185] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:24.194] <TB2> INFO: dacScan step from 105 .. 107
[14:17:51.084] <TB2> INFO: Test took 26890ms.
[14:17:51.245] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:51.253] <TB2> INFO: dacScan step from 108 .. 110
[14:18:18.599] <TB2> INFO: Test took 27346ms.
[14:18:18.790] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:18.799] <TB2> INFO: dacScan step from 111 .. 113
[14:18:46.039] <TB2> INFO: Test took 27240ms.
[14:18:46.224] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:46.233] <TB2> INFO: dacScan step from 114 .. 116
[14:19:13.355] <TB2> INFO: Test took 27122ms.
[14:19:13.530] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:13.539] <TB2> INFO: dacScan step from 117 .. 119
[14:19:40.698] <TB2> INFO: Test took 27159ms.
[14:19:40.877] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:40.888] <TB2> INFO: dacScan step from 120 .. 122
[14:20:07.684] <TB2> INFO: Test took 26796ms.
[14:20:07.852] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:07.861] <TB2> INFO: dacScan step from 123 .. 125
[14:20:35.049] <TB2> INFO: Test took 27188ms.
[14:20:35.220] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:35.230] <TB2> INFO: dacScan step from 126 .. 128
[14:21:01.160] <TB2> INFO: Test took 25930ms.
[14:21:01.343] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:01.352] <TB2> INFO: dacScan step from 129 .. 131
[14:21:27.828] <TB2> INFO: Test took 26475ms.
[14:21:27.998] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:28.007] <TB2> INFO: dacScan step from 132 .. 134
[14:21:52.577] <TB2> INFO: Test took 24570ms.
[14:21:52.747] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:52.758] <TB2> INFO: dacScan step from 135 .. 137
[14:22:19.799] <TB2> INFO: Test took 27041ms.
[14:22:19.974] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:19.982] <TB2> INFO: dacScan step from 138 .. 140
[14:22:47.311] <TB2> INFO: Test took 27328ms.
[14:22:47.474] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:47.483] <TB2> INFO: dacScan step from 141 .. 143
[14:23:14.347] <TB2> INFO: Test took 26864ms.
[14:23:14.513] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:14.522] <TB2> INFO: dacScan step from 144 .. 146
[14:23:39.100] <TB2> INFO: Test took 24578ms.
[14:23:39.269] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:39.278] <TB2> INFO: dacScan step from 147 .. 149
[14:24:05.979] <TB2> INFO: Test took 26701ms.
[14:24:06.198] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:06.208] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:24:07.897] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:24:09.325] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:24:10.931] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:24:12.506] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:24:13.996] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:24:15.395] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:24:16.776] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:24:18.194] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:24:19.688] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:24:21.096] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:24:22.575] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:24:23.955] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:24:25.373] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:24:26.971] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:24:28.522] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[14:24:30.033] <TB2> INFO: PixTestScurves::scurves() done
[14:24:30.033] <TB2> INFO: Vcal mean: 93.82 89.87 89.40 91.70 93.72 93.06 88.35 86.56 87.29 89.36 81.74 87.19 86.72 83.73 75.40 87.62
[14:24:30.033] <TB2> INFO: Vcal RMS: 6.04 5.57 5.95 5.12 6.16 6.43 5.42 5.80 5.18 4.86 4.61 5.32 5.10 4.67 4.67 5.51
[14:24:30.033] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1093 seconds
[14:24:30.111] <TB2> INFO: ######################################################################
[14:24:30.111] <TB2> INFO: PixTestTrim::doTest()
[14:24:30.111] <TB2> INFO: ######################################################################
[14:24:30.113] <TB2> INFO: ----------------------------------------------------------------------
[14:24:30.113] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[14:24:30.113] <TB2> INFO: ----------------------------------------------------------------------
[14:24:30.205] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[14:24:30.205] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[14:24:30.213] <TB2> INFO: dacScan step from 0 .. 19
[14:24:46.759] <TB2> INFO: Test took 16545ms.
[14:24:46.786] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:46.786] <TB2> INFO: dacScan step from 20 .. 39
[14:25:03.239] <TB2> INFO: Test took 16453ms.
[14:25:03.265] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:03.265] <TB2> INFO: dacScan step from 40 .. 59
[14:25:19.965] <TB2> INFO: Test took 16700ms.
[14:25:19.993] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:19.993] <TB2> INFO: dacScan step from 60 .. 79
[14:25:36.719] <TB2> INFO: Test took 16726ms.
[14:25:36.746] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:36.746] <TB2> INFO: dacScan step from 80 .. 99
[14:25:54.042] <TB2> INFO: Test took 17296ms.
[14:25:54.116] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:54.126] <TB2> INFO: dacScan step from 100 .. 119
[14:26:15.824] <TB2> INFO: Test took 21698ms.
[14:26:16.010] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:16.047] <TB2> INFO: dacScan step from 120 .. 139
[14:26:34.640] <TB2> INFO: Test took 18593ms.
[14:26:34.749] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:34.766] <TB2> INFO: dacScan step from 140 .. 159
[14:26:52.018] <TB2> INFO: Test took 17252ms.
[14:26:52.054] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:13.046] <TB2> INFO: ROC 0 VthrComp = 94
[14:27:13.046] <TB2> INFO: ROC 1 VthrComp = 89
[14:27:13.046] <TB2> INFO: ROC 2 VthrComp = 89
[14:27:13.046] <TB2> INFO: ROC 3 VthrComp = 91
[14:27:13.046] <TB2> INFO: ROC 4 VthrComp = 95
[14:27:13.046] <TB2> INFO: ROC 5 VthrComp = 90
[14:27:13.047] <TB2> INFO: ROC 6 VthrComp = 87
[14:27:13.047] <TB2> INFO: ROC 7 VthrComp = 85
[14:27:13.047] <TB2> INFO: ROC 8 VthrComp = 86
[14:27:13.047] <TB2> INFO: ROC 9 VthrComp = 89
[14:27:13.047] <TB2> INFO: ROC 10 VthrComp = 80
[14:27:13.047] <TB2> INFO: ROC 11 VthrComp = 88
[14:27:13.047] <TB2> INFO: ROC 12 VthrComp = 88
[14:27:13.047] <TB2> INFO: ROC 13 VthrComp = 86
[14:27:13.047] <TB2> INFO: ROC 14 VthrComp = 77
[14:27:13.047] <TB2> INFO: ROC 15 VthrComp = 88
[14:27:13.047] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[14:27:13.047] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[14:27:13.056] <TB2> INFO: dacScan step from 0 .. 19
[14:27:29.811] <TB2> INFO: Test took 16755ms.
[14:27:29.836] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:29.836] <TB2> INFO: dacScan step from 20 .. 39
[14:27:46.712] <TB2> INFO: Test took 16876ms.
[14:27:46.743] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:46.746] <TB2> INFO: dacScan step from 40 .. 59
[14:28:08.196] <TB2> INFO: Test took 21450ms.
[14:28:08.339] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:08.375] <TB2> INFO: dacScan step from 60 .. 79
[14:28:31.736] <TB2> INFO: Test took 23361ms.
[14:28:31.890] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:31.944] <TB2> INFO: dacScan step from 80 .. 99
[14:28:55.370] <TB2> INFO: Test took 23426ms.
[14:28:55.532] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:55.585] <TB2> INFO: dacScan step from 100 .. 119
[14:29:18.561] <TB2> INFO: Test took 22976ms.
[14:29:18.721] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:18.773] <TB2> INFO: dacScan step from 120 .. 139
[14:29:41.894] <TB2> INFO: Test took 23120ms.
[14:29:42.065] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:42.124] <TB2> INFO: dacScan step from 140 .. 159
[14:30:05.330] <TB2> INFO: Test took 23206ms.
[14:30:05.483] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:30.508] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 60.435 for pixel 0/39 mean/min/max = 46.34/32.2426/60.4374
[14:30:30.508] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 60.5832 for pixel 18/75 mean/min/max = 47.3519/33.9432/60.7606
[14:30:30.508] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 63.5832 for pixel 5/1 mean/min/max = 48.3201/32.9346/63.7056
[14:30:30.509] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.361 for pixel 10/2 mean/min/max = 46.1617/32.8926/59.4307
[14:30:30.509] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 60.3535 for pixel 17/69 mean/min/max = 46.008/31.491/60.525
[14:30:30.509] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 63.2006 for pixel 0/72 mean/min/max = 47.7432/32.0983/63.3881
[14:30:30.509] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 59.7369 for pixel 5/9 mean/min/max = 46.3707/32.7844/59.9571
[14:30:30.510] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 59.4557 for pixel 9/12 mean/min/max = 45.7502/32.0119/59.4885
[14:30:30.510] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 57.5832 for pixel 7/64 mean/min/max = 44.7442/31.8542/57.6343
[14:30:30.510] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 58.8922 for pixel 27/74 mean/min/max = 46.4761/33.9842/58.9679
[14:30:30.511] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 57.947 for pixel 18/68 mean/min/max = 45.357/32.7398/57.9742
[14:30:30.511] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 58.4364 for pixel 17/79 mean/min/max = 46.2245/33.8588/58.5901
[14:30:30.511] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 58.047 for pixel 0/18 mean/min/max = 45.8585/33.4416/58.2754
[14:30:30.512] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 56.6859 for pixel 23/5 mean/min/max = 44.7813/32.7516/56.8109
[14:30:30.512] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 58.9254 for pixel 5/76 mean/min/max = 46.8975/34.8152/58.9799
[14:30:30.513] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 60.3633 for pixel 22/78 mean/min/max = 47.2714/34.0468/60.496
[14:30:30.513] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:32:20.392] <TB2> INFO: Test took 109879ms.
[14:32:21.744] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:32:21.753] <TB2> INFO: dacScan step from 0 .. 19
[14:32:47.456] <TB2> INFO: Test took 25703ms.
[14:32:47.501] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:47.502] <TB2> INFO: dacScan step from 20 .. 39
[14:33:20.430] <TB2> INFO: Test took 32928ms.
[14:33:20.651] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:20.682] <TB2> INFO: dacScan step from 40 .. 59






[14:33:56.222] <TB2> INFO: Test took 35539ms.
[14:33:56.519] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:56.574] <TB2> INFO: dacScan step from 60 .. 79




[14:34:32.882] <TB2> INFO: Test took 36308ms.
[14:34:33.162] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:33.217] <TB2> INFO: dacScan step from 80 .. 99






[14:35:10.380] <TB2> INFO: Test took 37162ms.
[14:35:10.844] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:35:10.904] <TB2> INFO: dacScan step from 100 .. 119






[14:35:49.829] <TB2> INFO: Test took 38924ms.
[14:35:50.163] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:35:50.217] <TB2> INFO: dacScan step from 120 .. 139





[14:36:28.801] <TB2> INFO: Test took 38584ms.
[14:36:29.177] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:29.240] <TB2> INFO: dacScan step from 140 .. 159




[14:37:07.893] <TB2> INFO: Test took 38653ms.
[14:37:08.168] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:37:08.222] <TB2> INFO: dacScan step from 160 .. 179






[14:37:44.832] <TB2> INFO: Test took 36610ms.
[14:37:45.109] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:37:45.166] <TB2> INFO: dacScan step from 180 .. 199





[14:38:21.459] <TB2> INFO: Test took 36293ms.
[14:38:21.786] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:38:48.403] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.027026 .. 255.000000
[14:38:48.527] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[14:38:48.539] <TB2> INFO: dacScan step from 0 .. 19
[14:39:03.446] <TB2> INFO: Test took 14907ms.
[14:39:03.472] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:03.473] <TB2> INFO: dacScan step from 20 .. 39
[14:39:19.802] <TB2> INFO: Test took 16329ms.
[14:39:19.882] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:19.898] <TB2> INFO: dacScan step from 40 .. 59
[14:39:39.000] <TB2> INFO: Test took 19102ms.
[14:39:39.228] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:39.294] <TB2> INFO: dacScan step from 60 .. 79
[14:39:59.295] <TB2> INFO: Test took 20001ms.
[14:39:59.431] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:59.482] <TB2> INFO: dacScan step from 80 .. 99
[14:40:19.674] <TB2> INFO: Test took 20192ms.
[14:40:19.847] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:40:19.954] <TB2> INFO: dacScan step from 100 .. 119
[14:40:38.749] <TB2> INFO: Test took 18794ms.
[14:40:38.914] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:40:38.971] <TB2> INFO: dacScan step from 120 .. 139
[14:40:58.001] <TB2> INFO: Test took 19030ms.
[14:40:58.150] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:40:58.209] <TB2> INFO: dacScan step from 140 .. 159
[14:41:18.137] <TB2> INFO: Test took 19928ms.
[14:41:18.277] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:18.331] <TB2> INFO: dacScan step from 160 .. 179
[14:41:37.491] <TB2> INFO: Test took 19160ms.
[14:41:37.636] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:37.693] <TB2> INFO: dacScan step from 180 .. 199
[14:41:58.156] <TB2> INFO: Test took 20463ms.
[14:41:58.308] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:58.365] <TB2> INFO: dacScan step from 200 .. 219
[14:42:18.676] <TB2> INFO: Test took 20311ms.
[14:42:18.816] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:42:18.871] <TB2> INFO: dacScan step from 220 .. 239
[14:42:38.669] <TB2> INFO: Test took 19798ms.
[14:42:38.810] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:42:38.861] <TB2> INFO: dacScan step from 240 .. 255
[14:42:54.605] <TB2> INFO: Test took 15744ms.
[14:42:54.725] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:28.767] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 16.587728 .. 44.326024
[14:43:28.849] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 6 .. 54 (20) hits flags = 16 (plus default)
[14:43:28.859] <TB2> INFO: dacScan step from 6 .. 25
[14:43:43.111] <TB2> INFO: Test took 14252ms.
[14:43:43.130] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:43.131] <TB2> INFO: dacScan step from 26 .. 45
[14:44:01.106] <TB2> INFO: Test took 17975ms.
[14:44:01.229] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:01.260] <TB2> INFO: dacScan step from 46 .. 54
[14:44:12.115] <TB2> INFO: Test took 10855ms.
[14:44:12.179] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:28.500] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 21.519847 .. 41.612825
[14:44:28.586] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 11 .. 51 (20) hits flags = 16 (plus default)
[14:44:28.595] <TB2> INFO: dacScan step from 11 .. 30
[14:44:43.331] <TB2> INFO: Test took 14736ms.
[14:44:43.356] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:43.357] <TB2> INFO: dacScan step from 31 .. 50
[14:45:02.512] <TB2> INFO: Test took 19155ms.
[14:45:02.702] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:02.752] <TB2> INFO: dacScan step from 51 .. 51
[14:45:06.335] <TB2> INFO: Test took 3583ms.
[14:45:06.342] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:21.638] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 3.700669 .. 41.612825
[14:45:21.720] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 3 .. 51 (20) hits flags = 16 (plus default)
[14:45:21.728] <TB2> INFO: dacScan step from 3 .. 22
[14:45:36.807] <TB2> INFO: Test took 15079ms.
[14:45:36.833] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:36.833] <TB2> INFO: dacScan step from 23 .. 42
[14:45:53.690] <TB2> INFO: Test took 16857ms.
[14:45:53.780] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:53.801] <TB2> INFO: dacScan step from 43 .. 51
[14:46:04.648] <TB2> INFO: Test took 10846ms.
[14:46:04.719] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:21.479] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[14:46:21.479] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[14:46:21.488] <TB2> INFO: dacScan step from 15 .. 34
[14:46:47.919] <TB2> INFO: Test took 26431ms.
[14:46:47.987] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:47.996] <TB2> INFO: dacScan step from 35 .. 54





[14:47:23.976] <TB2> INFO: Test took 35980ms.
[14:47:24.268] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:24.323] <TB2> INFO: dacScan step from 55 .. 55
[14:47:29.143] <TB2> INFO: Test took 4820ms.
[14:47:29.161] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:42.418] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C0.dat
[14:47:42.418] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C1.dat
[14:47:42.418] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C2.dat
[14:47:42.419] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C3.dat
[14:47:42.419] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C4.dat
[14:47:42.419] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C5.dat
[14:47:42.420] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C6.dat
[14:47:42.420] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C7.dat
[14:47:42.420] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C8.dat
[14:47:42.420] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C9.dat
[14:47:42.421] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C10.dat
[14:47:42.421] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C11.dat
[14:47:42.421] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C12.dat
[14:47:42.421] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C13.dat
[14:47:42.422] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C14.dat
[14:47:42.422] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C15.dat
[14:47:42.422] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C0.dat
[14:47:42.436] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C1.dat
[14:47:42.446] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C2.dat
[14:47:42.456] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C3.dat
[14:47:42.466] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C4.dat
[14:47:42.475] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C5.dat
[14:47:42.486] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C6.dat
[14:47:42.496] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C7.dat
[14:47:42.503] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C8.dat
[14:47:42.508] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C9.dat
[14:47:42.514] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C10.dat
[14:47:42.520] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C11.dat
[14:47:42.526] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C12.dat
[14:47:42.532] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C13.dat
[14:47:42.542] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C14.dat
[14:47:42.552] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//trimParameters35_C15.dat
[14:47:42.562] <TB2> INFO: PixTestTrim::trimTest() done
[14:47:42.562] <TB2> INFO: vtrim: 110 112 140 117 119 112 111 100 106 107 96 102 89 107 104 106
[14:47:42.562] <TB2> INFO: vthrcomp: 94 89 89 91 95 90 87 85 86 89 80 88 88 86 77 88
[14:47:42.562] <TB2> INFO: vcal mean: 35.01 35.13 35.08 35.08 35.13 35.12 35.06 35.04 35.08 35.08 35.08 35.08 35.04 35.08 35.11 35.12
[14:47:42.563] <TB2> INFO: vcal RMS: 1.06 1.05 1.26 1.02 1.10 1.08 1.04 1.03 1.01 1.02 1.11 1.00 0.97 1.05 1.01 1.08
[14:47:42.563] <TB2> INFO: bits mean: 9.37 9.42 9.77 9.97 10.13 9.46 9.64 9.76 10.20 9.49 10.05 9.37 8.96 10.16 9.33 9.29
[14:47:42.563] <TB2> INFO: bits RMS: 2.71 2.43 2.30 2.34 2.45 2.58 2.49 2.57 2.44 2.38 2.34 2.49 2.72 2.34 2.31 2.45
[14:47:42.568] <TB2> INFO: ----------------------------------------------------------------------
[14:47:42.568] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 255 240 150 100
[14:47:42.568] <TB2> INFO: ----------------------------------------------------------------------
[14:47:42.571] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:47:42.584] <TB2> INFO: dacScan step from 0 .. 19
[14:48:08.589] <TB2> INFO: Test took 26005ms.
[14:48:08.625] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:08.625] <TB2> INFO: dacScan step from 20 .. 39
[14:48:34.151] <TB2> INFO: Test took 25526ms.
[14:48:34.203] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:34.205] <TB2> INFO: dacScan step from 40 .. 59
[14:49:07.673] <TB2> INFO: Test took 33468ms.
[14:49:07.928] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:07.962] <TB2> INFO: dacScan step from 60 .. 79




[14:49:44.234] <TB2> INFO: Test took 36271ms.
[14:49:44.507] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:44.556] <TB2> INFO: dacScan step from 80 .. 99



[14:50:23.588] <TB2> INFO: Test took 39032ms.
[14:50:23.917] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:23.967] <TB2> INFO: dacScan step from 100 .. 119



[14:51:00.314] <TB2> INFO: Test took 36347ms.
[14:51:00.572] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:00.625] <TB2> INFO: dacScan step from 120 .. 139



[14:51:37.144] <TB2> INFO: Test took 36519ms.
[14:51:37.403] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:37.456] <TB2> INFO: dacScan step from 140 .. 159



[14:52:16.300] <TB2> INFO: Test took 38844ms.
[14:52:16.588] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:16.639] <TB2> INFO: dacScan step from 160 .. 179



[14:52:55.915] <TB2> INFO: Test took 39276ms.
[14:52:56.179] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:56.230] <TB2> INFO: dacScan step from 180 .. 199



[14:53:33.994] <TB2> INFO: Test took 37764ms.
[14:53:34.429] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:01.895] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 79 (20) hits flags = 16 (plus default)
[14:54:01.904] <TB2> INFO: dacScan step from 0 .. 19
[14:54:27.629] <TB2> INFO: Test took 25725ms.
[14:54:27.667] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:27.667] <TB2> INFO: dacScan step from 20 .. 39
[14:54:54.521] <TB2> INFO: Test took 26853ms.
[14:54:54.610] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:54.618] <TB2> INFO: dacScan step from 40 .. 59





[14:55:30.486] <TB2> INFO: Test took 35868ms.
[14:55:30.780] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:30.821] <TB2> INFO: dacScan step from 60 .. 79






[14:56:08.757] <TB2> INFO: Test took 37936ms.
[14:56:09.039] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:25.788] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 73 (20) hits flags = 16 (plus default)
[14:56:25.796] <TB2> INFO: dacScan step from 0 .. 19
[14:56:51.283] <TB2> INFO: Test took 25482ms.
[14:56:51.328] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:51.329] <TB2> INFO: dacScan step from 20 .. 39
[14:57:19.000] <TB2> INFO: Test took 27671ms.
[14:57:19.144] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:19.162] <TB2> INFO: dacScan step from 40 .. 59





[14:57:56.942] <TB2> INFO: Test took 37780ms.
[14:57:57.243] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:57.285] <TB2> INFO: dacScan step from 60 .. 73
[14:58:25.477] <TB2> INFO: Test took 28192ms.
[14:58:25.676] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:42.109] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 68 (20) hits flags = 16 (plus default)
[14:58:42.118] <TB2> INFO: dacScan step from 0 .. 19
[14:59:07.927] <TB2> INFO: Test took 25809ms.
[14:59:07.964] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:07.964] <TB2> INFO: dacScan step from 20 .. 39
[14:59:37.746] <TB2> INFO: Test took 29782ms.
[14:59:37.909] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:37.933] <TB2> INFO: dacScan step from 40 .. 59





[15:00:16.346] <TB2> INFO: Test took 38413ms.
[15:00:16.615] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:16.657] <TB2> INFO: dacScan step from 60 .. 68
[15:00:35.625] <TB2> INFO: Test took 18968ms.
[15:00:35.748] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:51.477] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 65 (20) hits flags = 16 (plus default)
[15:00:51.484] <TB2> INFO: dacScan step from 0 .. 19
[15:01:16.109] <TB2> INFO: Test took 24624ms.
[15:01:16.154] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:16.156] <TB2> INFO: dacScan step from 20 .. 39
[15:01:48.568] <TB2> INFO: Test took 32412ms.
[15:01:48.802] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:48.834] <TB2> INFO: dacScan step from 40 .. 59






[15:02:28.295] <TB2> INFO: Test took 39461ms.
[15:02:28.576] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:28.621] <TB2> INFO: dacScan step from 60 .. 65
[15:02:42.325] <TB2> INFO: Test took 13703ms.
[15:02:42.411] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:58.525] <TB2> INFO: PixTestTrim::trimBitTest() done
[15:02:58.527] <TB2> INFO: PixTestTrim::doTest() done, duration: 2308 seconds
[15:02:59.247] <TB2> INFO: ######################################################################
[15:02:59.248] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[15:02:59.248] <TB2> INFO: ######################################################################
[15:03:02.987] <TB2> INFO: Test took 3738ms.
[15:03:03.012] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:07.162] <TB2> INFO: Test took 3953ms.
[15:03:07.229] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:11.008] <TB2> INFO: Test took 3769ms.
[15:03:11.075] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:11.082] <TB2> INFO: The DUT currently contains the following objects:
[15:03:11.082] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:11.082] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:11.082] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:11.082] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:11.082] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:11.082] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:11.082] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:11.082] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:11.082] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:11.082] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:11.082] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:11.082] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:11.082] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:11.082] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:11.083] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:11.083] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:11.083] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:11.083] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:11.083] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:11.083] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:12.206] <TB2> INFO: Test took 1124ms.
[15:03:12.208] <TB2> INFO: The DUT currently contains the following objects:
[15:03:12.208] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:12.208] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:12.208] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:12.208] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:12.208] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:12.208] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:12.208] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:12.208] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:12.208] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:12.208] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:12.208] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:12.208] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:12.208] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:12.208] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:12.209] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:12.209] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:12.209] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:12.209] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:12.209] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:12.209] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:13.316] <TB2> INFO: Test took 1107ms.
[15:03:13.317] <TB2> INFO: The DUT currently contains the following objects:
[15:03:13.317] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:13.317] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:13.317] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:13.317] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:13.317] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:13.317] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:13.317] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:13.317] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:13.317] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:13.317] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:13.317] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:13.317] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:13.317] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:13.318] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:13.318] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:13.318] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:13.318] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:13.318] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:13.318] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:13.318] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:14.455] <TB2> INFO: Test took 1137ms.
[15:03:14.456] <TB2> INFO: The DUT currently contains the following objects:
[15:03:14.456] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:14.456] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:14.456] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:14.456] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:14.456] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:14.456] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:14.457] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:14.457] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:14.457] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:14.457] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:14.457] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:14.457] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:14.457] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:14.457] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:14.457] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:14.457] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:14.457] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:14.457] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:14.457] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:14.457] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:15.566] <TB2> INFO: Test took 1109ms.
[15:03:15.568] <TB2> INFO: The DUT currently contains the following objects:
[15:03:15.568] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:15.568] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:15.568] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:15.568] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:15.568] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:15.568] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:15.568] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:15.568] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:15.568] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:15.568] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:15.568] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:15.568] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:15.568] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:15.568] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:15.568] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:15.568] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:15.568] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:15.568] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:15.568] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:15.568] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:16.691] <TB2> INFO: Test took 1122ms.
[15:03:16.692] <TB2> INFO: The DUT currently contains the following objects:
[15:03:16.692] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:16.692] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:16.692] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:16.692] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:16.692] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:16.692] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:16.693] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:16.693] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:16.693] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:16.693] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:16.693] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:16.693] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:16.693] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:16.693] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:16.693] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:16.693] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:16.693] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:16.693] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:16.693] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:16.693] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:17.810] <TB2> INFO: Test took 1117ms.
[15:03:17.810] <TB2> INFO: The DUT currently contains the following objects:
[15:03:17.811] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:17.811] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:17.811] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:17.811] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:17.811] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:17.811] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:17.811] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:17.811] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:17.811] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:17.811] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:17.811] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:17.811] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:17.811] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:17.811] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:17.811] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:17.811] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:17.811] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:17.811] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:17.811] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:17.811] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:18.916] <TB2> INFO: Test took 1105ms.
[15:03:18.918] <TB2> INFO: The DUT currently contains the following objects:
[15:03:18.918] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:18.918] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:18.918] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:18.918] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:18.918] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:18.918] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:18.918] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:18.918] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:18.918] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:18.918] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:18.918] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:18.918] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:18.918] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:18.918] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:18.918] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:18.918] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:18.918] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:18.918] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:18.918] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:18.918] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:20.039] <TB2> INFO: Test took 1121ms.
[15:03:20.040] <TB2> INFO: The DUT currently contains the following objects:
[15:03:20.040] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:20.040] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:20.040] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:20.040] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:20.040] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:20.040] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:20.040] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:20.040] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:20.040] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:20.040] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:20.040] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:20.040] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:20.040] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:20.040] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:20.040] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:20.040] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:20.040] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:20.040] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:20.040] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:20.040] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:21.162] <TB2> INFO: Test took 1122ms.
[15:03:21.163] <TB2> INFO: The DUT currently contains the following objects:
[15:03:21.163] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:21.163] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:21.163] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:21.163] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:21.163] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:21.163] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:21.163] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:21.163] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:21.163] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:21.163] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:21.163] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:21.163] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:21.163] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:21.163] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:21.164] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:21.164] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:21.164] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:21.164] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:21.164] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:21.164] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:22.323] <TB2> INFO: Test took 1159ms.
[15:03:22.325] <TB2> INFO: The DUT currently contains the following objects:
[15:03:22.325] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:22.325] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:22.325] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:22.325] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:22.325] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:22.325] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:22.325] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:22.325] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:22.325] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:22.325] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:22.325] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:22.325] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:22.325] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:22.325] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:22.325] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:22.325] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:22.325] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:22.325] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:22.325] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:22.325] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:23.445] <TB2> INFO: Test took 1120ms.
[15:03:23.446] <TB2> INFO: The DUT currently contains the following objects:
[15:03:23.446] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:23.446] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:23.446] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:23.447] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:23.447] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:23.447] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:23.447] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:23.447] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:23.447] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:23.447] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:23.447] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:23.447] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:23.447] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:23.447] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:23.447] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:23.447] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:23.447] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:23.447] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:23.447] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:23.447] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:24.553] <TB2> INFO: Test took 1106ms.
[15:03:24.554] <TB2> INFO: The DUT currently contains the following objects:
[15:03:24.554] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:24.554] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:24.554] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:24.554] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:24.554] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:24.554] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:24.554] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:24.554] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:24.554] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:24.554] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:24.554] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:24.554] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:24.554] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:24.554] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:24.554] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:24.554] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:24.554] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:24.554] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:24.554] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:24.554] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:25.675] <TB2> INFO: Test took 1121ms.
[15:03:25.677] <TB2> INFO: The DUT currently contains the following objects:
[15:03:25.677] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:25.677] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:25.677] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:25.678] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:25.678] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:25.678] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:25.678] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:25.678] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:25.678] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:25.678] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:25.678] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:25.678] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:25.678] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:25.678] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:25.678] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:25.678] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:25.678] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:25.678] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:25.678] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:25.678] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:26.799] <TB2> INFO: Test took 1121ms.
[15:03:26.800] <TB2> INFO: The DUT currently contains the following objects:
[15:03:26.801] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:26.801] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:26.801] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:26.801] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:26.801] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:26.801] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:26.801] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:26.801] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:26.801] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:26.801] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:26.801] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:26.801] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:26.801] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:26.801] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:26.801] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:26.801] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:26.801] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:26.801] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:26.801] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:26.801] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:27.920] <TB2> INFO: Test took 1119ms.
[15:03:27.921] <TB2> INFO: The DUT currently contains the following objects:
[15:03:27.921] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[15:03:27.921] <TB2> INFO: TBM Core alpha (0): 7 registers set
[15:03:27.921] <TB2> INFO: TBM Core beta (1): 7 registers set
[15:03:27.921] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:03:27.921] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:27.921] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:27.921] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:27.921] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:27.921] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:27.921] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:27.921] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:27.921] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:27.921] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:27.921] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:27.921] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:27.921] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:27.921] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:27.921] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:27.921] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:27.921] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:03:29.043] <TB2> INFO: Test took 1122ms.
[15:03:29.047] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:07:58.310] <TB2> INFO: Test took 269263ms.
[15:07:59.887] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:33.106] <TB2> INFO: Test took 273219ms.
[15:12:34.736] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:34.742] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:34.749] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:34.755] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:34.762] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:34.768] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:34.774] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:34.781] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:34.787] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:34.794] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:34.800] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:34.807] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[15:12:34.813] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:34.820] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:34.826] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:34.833] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:34.839] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[15:12:34.878] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C0.dat
[15:12:34.878] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C1.dat
[15:12:34.878] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C2.dat
[15:12:34.878] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C3.dat
[15:12:34.878] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C4.dat
[15:12:34.879] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C5.dat
[15:12:34.879] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C6.dat
[15:12:34.879] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C7.dat
[15:12:34.879] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C8.dat
[15:12:34.879] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C9.dat
[15:12:34.879] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C10.dat
[15:12:34.880] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C11.dat
[15:12:34.880] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C12.dat
[15:12:34.880] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C13.dat
[15:12:34.880] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C14.dat
[15:12:34.880] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//dacParameters35_C15.dat
[15:12:38.694] <TB2> INFO: Test took 3811ms.
[15:12:42.701] <TB2> INFO: Test took 3738ms.
[15:12:46.821] <TB2> INFO: Test took 3851ms.
[15:12:47.095] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:48.010] <TB2> INFO: Test took 915ms.
[15:12:48.012] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:49.149] <TB2> INFO: Test took 1137ms.
[15:12:49.154] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:50.279] <TB2> INFO: Test took 1126ms.
[15:12:50.282] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:51.403] <TB2> INFO: Test took 1121ms.
[15:12:51.406] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:52.530] <TB2> INFO: Test took 1124ms.
[15:12:52.534] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:53.654] <TB2> INFO: Test took 1120ms.
[15:12:53.658] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:54.778] <TB2> INFO: Test took 1121ms.
[15:12:54.781] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:55.893] <TB2> INFO: Test took 1112ms.
[15:12:55.896] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:57.007] <TB2> INFO: Test took 1111ms.
[15:12:57.011] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:58.137] <TB2> INFO: Test took 1127ms.
[15:12:58.141] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:12:59.272] <TB2> INFO: Test took 1131ms.
[15:12:59.274] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:00.376] <TB2> INFO: Test took 1102ms.
[15:13:00.378] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:01.480] <TB2> INFO: Test took 1102ms.
[15:13:01.482] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:02.599] <TB2> INFO: Test took 1117ms.
[15:13:02.601] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:03.702] <TB2> INFO: Test took 1101ms.
[15:13:03.704] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:04.818] <TB2> INFO: Test took 1114ms.
[15:13:04.820] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:05.935] <TB2> INFO: Test took 1115ms.
[15:13:05.937] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:07.055] <TB2> INFO: Test took 1118ms.
[15:13:07.057] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:08.160] <TB2> INFO: Test took 1103ms.
[15:13:08.162] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:09.264] <TB2> INFO: Test took 1102ms.
[15:13:09.267] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:10.367] <TB2> INFO: Test took 1101ms.
[15:13:10.369] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:11.486] <TB2> INFO: Test took 1117ms.
[15:13:11.488] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:12.605] <TB2> INFO: Test took 1117ms.
[15:13:12.608] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:13.724] <TB2> INFO: Test took 1116ms.
[15:13:13.726] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:14.842] <TB2> INFO: Test took 1116ms.
[15:13:14.844] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:15.962] <TB2> INFO: Test took 1118ms.
[15:13:15.964] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:17.080] <TB2> INFO: Test took 1116ms.
[15:13:17.082] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:18.184] <TB2> INFO: Test took 1102ms.
[15:13:18.186] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:19.302] <TB2> INFO: Test took 1116ms.
[15:13:19.304] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:20.420] <TB2> INFO: Test took 1116ms.
[15:13:20.422] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:21.552] <TB2> INFO: Test took 1130ms.
[15:13:21.554] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:13:22.669] <TB2> INFO: Test took 1115ms.
[15:13:23.174] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 623 seconds
[15:13:23.174] <TB2> INFO: PH scale (per ROC): 66 76 69 76 71 68 65 76 68 62 80 67 68 78 72 74
[15:13:23.174] <TB2> INFO: PH offset (per ROC): 186 188 189 176 175 190 177 185 187 190 170 171 177 157 181 167
[15:13:23.348] <TB2> INFO: ######################################################################
[15:13:23.349] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[15:13:23.349] <TB2> INFO: ######################################################################
[15:13:23.358] <TB2> INFO: scanning low vcal = 50
[15:13:28.040] <TB2> INFO: Test took 4682ms.
[15:13:28.101] <TB2> INFO: scanning low vcal = 100
[15:13:32.730] <TB2> INFO: Test took 4629ms.
[15:13:32.831] <TB2> INFO: scanning low vcal = 150
[15:13:37.356] <TB2> INFO: Test took 4525ms.
[15:13:37.417] <TB2> INFO: scanning low vcal = 200
[15:13:42.058] <TB2> INFO: Test took 4641ms.
[15:13:42.120] <TB2> INFO: scanning low vcal = 250
[15:13:46.795] <TB2> INFO: Test took 4675ms.
[15:13:46.855] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[15:13:51.577] <TB2> INFO: Test took 4722ms.
[15:13:51.636] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[15:13:56.405] <TB2> INFO: Test took 4769ms.
[15:13:56.460] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[15:14:01.227] <TB2> INFO: Test took 4767ms.
[15:14:01.282] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[15:14:06.018] <TB2> INFO: Test took 4736ms.
[15:14:06.096] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[15:14:10.736] <TB2> INFO: Test took 4640ms.
[15:14:11.072] <TB2> INFO: PixTestGainPedestal::measure() done
[15:14:34.616] <TB2> INFO: PixTestGainPedestal::fit() done
[15:14:34.616] <TB2> INFO: non-linearity mean: 0.954 0.957 0.951 0.961 0.960 0.958 0.955 0.954 0.955 0.953 0.973 0.957 0.960 0.958 0.955 0.956
[15:14:34.616] <TB2> INFO: non-linearity RMS: 0.007 0.007 0.007 0.006 0.005 0.006 0.007 0.007 0.007 0.007 0.004 0.007 0.006 0.006 0.006 0.006
[15:14:34.616] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[15:14:34.634] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[15:14:34.651] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[15:14:34.669] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[15:14:34.686] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[15:14:34.704] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[15:14:34.721] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[15:14:34.738] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[15:14:34.756] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[15:14:34.774] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[15:14:34.792] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[15:14:34.809] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[15:14:34.827] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[15:14:34.845] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[15:14:34.862] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[15:14:34.880] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[15:14:34.898] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 71 seconds
[15:14:34.904] <TB2> INFO: enter test to run
[15:14:34.904] <TB2> INFO: test: exit no parameter change
[15:14:35.340] <TB2> QUIET: Connection to board 0 closed.
[15:14:35.419] <TB2> INFO: pXar: this is the end, my friend