[12:09:18.091] <TB2> INFO: *** Welcome to pxar ***
[12:09:18.091] <TB2> INFO: *** Today: 2015/07/07
[12:09:18.091] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C15.dat
[12:09:18.092] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:09:18.092] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//defaultMaskFile.dat
[12:09:18.092] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters_C15.dat
[12:09:18.163] <TB2> INFO: clk: 4
[12:09:18.163] <TB2> INFO: ctr: 4
[12:09:18.163] <TB2> INFO: sda: 19
[12:09:18.163] <TB2> INFO: tin: 9
[12:09:18.163] <TB2> INFO: level: 15
[12:09:18.163] <TB2> INFO: triggerdelay: 0
[12:09:18.163] <TB2> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[12:09:18.163] <TB2> INFO: Log level: INFO
[12:09:18.170] <TB2> INFO: Found DTB DTB_WXC55Z
[12:09:18.182] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[12:09:18.185] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 0
HW version:
FW version: 4.0
SW version: 4.0
USB id:
MAC address: 000000000000
Hostname:
Comment:
------------------------------------------------------
[12:09:18.187] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[12:09:19.742] <TB2> INFO: DUT info:
[12:09:19.742] <TB2> INFO: The DUT currently contains the following objects:
[12:09:19.742] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:09:19.742] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:09:19.742] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:09:19.742] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:09:19.742] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:19.743] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:19.743] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:19.743] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:19.743] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:19.743] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:19.743] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:19.743] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:19.743] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:19.743] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:19.743] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:19.743] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:19.743] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:19.743] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:19.743] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:19.743] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:09:20.144] <TB2> INFO: enter 'restricted' command line mode
[12:09:20.144] <TB2> INFO: enter test to run
[12:09:20.144] <TB2> INFO: test: pretest no parameter change
[12:09:20.144] <TB2> INFO: running: pretest
[12:09:20.154] <TB2> INFO: ######################################################################
[12:09:20.154] <TB2> INFO: PixTestPretest::doTest()
[12:09:20.154] <TB2> INFO: ######################################################################
[12:09:20.156] <TB2> INFO: ----------------------------------------------------------------------
[12:09:20.156] <TB2> INFO: PixTestPretest::programROC()
[12:09:20.156] <TB2> INFO: ----------------------------------------------------------------------
[12:09:38.173] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:09:38.173] <TB2> INFO: IA differences per ROC: 17.7 17.7 18.5 19.3 18.5 18.5 17.7 18.5 20.9 17.7 16.9 18.5 19.3 21.7 16.9 19.3
[12:09:38.256] <TB2> INFO: ----------------------------------------------------------------------
[12:09:38.256] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:09:38.256] <TB2> INFO: ----------------------------------------------------------------------
[12:09:57.802] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 382.7 mA = 23.9187 mA/ROC
[12:09:57.805] <TB2> INFO: ----------------------------------------------------------------------
[12:09:57.805] <TB2> INFO: PixTestPretest::findWorkingPixel()
[12:09:57.805] <TB2> INFO: ----------------------------------------------------------------------
[12:10:07.204] <TB2> INFO: Test took 9394ms.
[12:10:07.486] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:10:07.519] <TB2> INFO: ----------------------------------------------------------------------
[12:10:07.519] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[12:10:07.519] <TB2> INFO: ----------------------------------------------------------------------
[12:10:16.834] <TB2> INFO: Test took 9308ms.
[12:10:17.157] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[12:10:17.157] <TB2> INFO: CalDel: 135 143 153 150 139 159 158 137 170 140 142 162 170 159 152 157
[12:10:17.157] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:10:17.160] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C0.dat
[12:10:17.160] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C1.dat
[12:10:17.161] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C2.dat
[12:10:17.161] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C3.dat
[12:10:17.161] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C4.dat
[12:10:17.161] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C5.dat
[12:10:17.162] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C6.dat
[12:10:17.162] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C7.dat
[12:10:17.162] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C8.dat
[12:10:17.162] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C9.dat
[12:10:17.163] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C10.dat
[12:10:17.163] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C11.dat
[12:10:17.163] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C12.dat
[12:10:17.163] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C13.dat
[12:10:17.164] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C14.dat
[12:10:17.164] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters_C15.dat
[12:10:17.164] <TB2> INFO: PixTestPretest::doTest() done, duration: 57 seconds
[12:10:17.262] <TB2> INFO: enter test to run
[12:10:17.262] <TB2> INFO: test: fulltest no parameter change
[12:10:17.262] <TB2> INFO: running: fulltest
[12:10:17.262] <TB2> INFO: ######################################################################
[12:10:17.262] <TB2> INFO: PixTestFullTest::doTest()
[12:10:17.262] <TB2> INFO: ######################################################################
[12:10:17.264] <TB2> INFO: ######################################################################
[12:10:17.264] <TB2> INFO: PixTestAlive::doTest()
[12:10:17.264] <TB2> INFO: ######################################################################
[12:10:17.265] <TB2> INFO: ----------------------------------------------------------------------
[12:10:17.265] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:10:17.265] <TB2> INFO: ----------------------------------------------------------------------
[12:10:20.961] <TB2> INFO: Test took 3696ms.
[12:10:20.983] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:21.209] <TB2> INFO: PixTestAlive::aliveTest() done
[12:10:21.210] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:10:21.211] <TB2> INFO: ----------------------------------------------------------------------
[12:10:21.211] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:10:21.211] <TB2> INFO: ----------------------------------------------------------------------
[12:10:24.054] <TB2> INFO: Test took 2841ms.
[12:10:24.058] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:24.059] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:10:24.285] <TB2> INFO: PixTestAlive::maskTest() done
[12:10:24.285] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:10:24.287] <TB2> INFO: ----------------------------------------------------------------------
[12:10:24.287] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:10:24.287] <TB2> INFO: ----------------------------------------------------------------------
[12:10:28.025] <TB2> INFO: Test took 3737ms.
[12:10:28.045] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:28.272] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[12:10:28.272] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:10:28.272] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[12:10:28.288] <TB2> INFO: ######################################################################
[12:10:28.288] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:10:28.288] <TB2> INFO: ######################################################################
[12:10:28.291] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[12:10:28.306] <TB2> INFO: dacScan step from 0 .. 29
[12:10:52.197] <TB2> INFO: Test took 23891ms.
[12:10:52.228] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:52.229] <TB2> INFO: dacScan step from 30 .. 59
[12:11:18.600] <TB2> INFO: Test took 26371ms.
[12:11:18.715] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:18.731] <TB2> INFO: dacScan step from 60 .. 89
[12:11:52.365] <TB2> INFO: Test took 33635ms.
[12:11:52.695] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:52.772] <TB2> INFO: dacScan step from 90 .. 119
[12:12:24.994] <TB2> INFO: Test took 32222ms.
[12:12:25.263] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:25.339] <TB2> INFO: dacScan step from 120 .. 149
[12:12:52.689] <TB2> INFO: Test took 27350ms.
[12:12:52.862] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:16.173] <TB2> INFO: PixTestBBMap::doTest() done, duration: 167 seconds
[12:13:16.173] <TB2> INFO: number of dead bumps (per ROC): 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 71
[12:13:16.173] <TB2> INFO: separation cut (per ROC): 96 94 87 93 102 90 76 101 78 83 71 77 83 73 68 71
[12:13:16.247] <TB2> INFO: ######################################################################
[12:13:16.247] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[12:13:16.247] <TB2> INFO: ######################################################################
[12:13:16.247] <TB2> INFO: ----------------------------------------------------------------------
[12:13:16.247] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[12:13:16.247] <TB2> INFO: ----------------------------------------------------------------------
[12:13:16.248] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (3) hits flags = 16 (plus default)
[12:13:16.255] <TB2> INFO: dacScan step from 0 .. 2
[12:13:33.587] <TB2> INFO: Test took 17331ms.
[12:13:33.608] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:33.608] <TB2> INFO: dacScan step from 3 .. 5
[12:13:50.933] <TB2> INFO: Test took 17325ms.
[12:13:50.956] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:50.956] <TB2> INFO: dacScan step from 6 .. 8
[12:14:08.140] <TB2> INFO: Test took 17183ms.
[12:14:08.159] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:14:08.159] <TB2> INFO: dacScan step from 9 .. 11
[12:14:25.277] <TB2> INFO: Test took 17118ms.
[12:14:25.298] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:14:25.298] <TB2> INFO: dacScan step from 12 .. 14
[12:14:42.348] <TB2> INFO: Test took 17050ms.
[12:14:42.371] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:14:42.371] <TB2> INFO: dacScan step from 15 .. 17
[12:14:59.677] <TB2> INFO: Test took 17306ms.
[12:14:59.697] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:14:59.697] <TB2> INFO: dacScan step from 18 .. 20
[12:15:16.672] <TB2> INFO: Test took 16974ms.
[12:15:16.695] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:16.695] <TB2> INFO: dacScan step from 21 .. 23
[12:15:33.924] <TB2> INFO: Test took 17228ms.
[12:15:33.947] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:33.947] <TB2> INFO: dacScan step from 24 .. 26
[12:15:51.090] <TB2> INFO: Test took 17142ms.
[12:15:51.119] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:51.119] <TB2> INFO: dacScan step from 27 .. 29
[12:16:08.212] <TB2> INFO: Test took 17093ms.
[12:16:08.238] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:08.238] <TB2> INFO: dacScan step from 30 .. 32
[12:16:25.317] <TB2> INFO: Test took 17079ms.
[12:16:25.341] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:25.341] <TB2> INFO: dacScan step from 33 .. 35
[12:16:42.550] <TB2> INFO: Test took 17209ms.
[12:16:42.571] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:42.571] <TB2> INFO: dacScan step from 36 .. 38
[12:16:59.820] <TB2> INFO: Test took 17248ms.
[12:16:59.841] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:59.841] <TB2> INFO: dacScan step from 39 .. 41
[12:17:17.031] <TB2> INFO: Test took 17190ms.
[12:17:17.056] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:17.056] <TB2> INFO: dacScan step from 42 .. 44
[12:17:34.316] <TB2> INFO: Test took 17260ms.
[12:17:34.339] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:34.339] <TB2> INFO: dacScan step from 45 .. 47
[12:17:51.278] <TB2> INFO: Test took 16939ms.
[12:17:51.299] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:51.300] <TB2> INFO: dacScan step from 48 .. 50
[12:18:08.331] <TB2> INFO: Test took 17031ms.
[12:18:08.353] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:08.353] <TB2> INFO: dacScan step from 51 .. 53
[12:18:25.880] <TB2> INFO: Test took 17527ms.
[12:18:25.901] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:25.901] <TB2> INFO: dacScan step from 54 .. 56
[12:18:43.425] <TB2> INFO: Test took 17524ms.
[12:18:43.448] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:43.448] <TB2> INFO: dacScan step from 57 .. 59
[12:19:00.757] <TB2> INFO: Test took 17309ms.
[12:19:00.782] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:00.782] <TB2> INFO: dacScan step from 60 .. 62
[12:19:18.280] <TB2> INFO: Test took 17498ms.
[12:19:18.305] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:18.306] <TB2> INFO: dacScan step from 63 .. 65
[12:19:35.811] <TB2> INFO: Test took 17505ms.
[12:19:35.839] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:35.839] <TB2> INFO: dacScan step from 66 .. 68
[12:19:53.415] <TB2> INFO: Test took 17576ms.
[12:19:53.452] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:53.452] <TB2> INFO: dacScan step from 69 .. 71
[12:20:11.288] <TB2> INFO: Test took 17836ms.
[12:20:11.331] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:11.332] <TB2> INFO: dacScan step from 72 .. 74
[12:20:29.845] <TB2> INFO: Test took 18513ms.
[12:20:29.899] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:29.901] <TB2> INFO: dacScan step from 75 .. 77
[12:20:49.264] <TB2> INFO: Test took 19363ms.
[12:20:49.346] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:49.351] <TB2> INFO: dacScan step from 78 .. 80
[12:21:10.005] <TB2> INFO: Test took 20654ms.
[12:21:10.101] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:10.106] <TB2> INFO: dacScan step from 81 .. 83
[12:21:33.021] <TB2> INFO: Test took 22915ms.
[12:21:33.145] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:33.151] <TB2> INFO: dacScan step from 84 .. 86
[12:21:57.193] <TB2> INFO: Test took 24042ms.
[12:21:57.336] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:57.342] <TB2> INFO: dacScan step from 87 .. 89
[12:22:22.182] <TB2> INFO: Test took 24840ms.
[12:22:22.340] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:22.347] <TB2> INFO: dacScan step from 90 .. 92
[12:22:48.399] <TB2> INFO: Test took 26052ms.
[12:22:48.560] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:48.568] <TB2> INFO: dacScan step from 93 .. 95
[12:23:15.304] <TB2> INFO: Test took 26736ms.
[12:23:15.468] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:15.475] <TB2> INFO: dacScan step from 96 .. 98
[12:23:42.148] <TB2> INFO: Test took 26673ms.
[12:23:42.325] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:42.335] <TB2> INFO: dacScan step from 99 .. 101
[12:24:09.481] <TB2> INFO: Test took 27146ms.
[12:24:09.709] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:09.720] <TB2> INFO: dacScan step from 102 .. 104
[12:24:36.837] <TB2> INFO: Test took 27117ms.
[12:24:37.017] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:37.027] <TB2> INFO: dacScan step from 105 .. 107
[12:25:04.232] <TB2> INFO: Test took 27205ms.
[12:25:04.428] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:04.437] <TB2> INFO: dacScan step from 108 .. 110
[12:25:31.394] <TB2> INFO: Test took 26957ms.
[12:25:31.565] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:31.574] <TB2> INFO: dacScan step from 111 .. 113
[12:25:58.470] <TB2> INFO: Test took 26896ms.
[12:25:58.650] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:58.659] <TB2> INFO: dacScan step from 114 .. 116
[12:26:25.931] <TB2> INFO: Test took 27272ms.
[12:26:26.105] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:26.117] <TB2> INFO: dacScan step from 117 .. 119
[12:26:53.108] <TB2> INFO: Test took 26991ms.
[12:26:53.290] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:53.299] <TB2> INFO: dacScan step from 120 .. 122
[12:27:20.525] <TB2> INFO: Test took 27226ms.
[12:27:20.694] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:20.703] <TB2> INFO: dacScan step from 123 .. 125
[12:27:47.382] <TB2> INFO: Test took 26679ms.
[12:27:47.548] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:47.557] <TB2> INFO: dacScan step from 126 .. 128
[12:28:12.754] <TB2> INFO: Test took 25197ms.
[12:28:12.928] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:12.937] <TB2> INFO: dacScan step from 129 .. 131
[12:28:39.381] <TB2> INFO: Test took 26444ms.
[12:28:39.548] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:39.556] <TB2> INFO: dacScan step from 132 .. 134
[12:29:06.603] <TB2> INFO: Test took 27047ms.
[12:29:06.775] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:06.784] <TB2> INFO: dacScan step from 135 .. 137
[12:29:34.057] <TB2> INFO: Test took 27273ms.
[12:29:34.268] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:34.278] <TB2> INFO: dacScan step from 138 .. 140
[12:30:01.602] <TB2> INFO: Test took 27324ms.
[12:30:01.764] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:01.773] <TB2> INFO: dacScan step from 141 .. 143
[12:30:27.784] <TB2> INFO: Test took 26011ms.
[12:30:27.987] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:27.996] <TB2> INFO: dacScan step from 144 .. 146
[12:30:53.431] <TB2> INFO: Test took 25435ms.
[12:30:53.597] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:53.606] <TB2> INFO: dacScan step from 147 .. 149
[12:31:20.530] <TB2> INFO: Test took 26924ms.
[12:31:20.744] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:20.752] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:31:22.524] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:31:24.252] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:31:25.805] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:31:27.346] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:31:28.812] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:31:30.530] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:31:32.425] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:31:34.266] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:31:36.098] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:31:37.919] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:31:39.520] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:31:41.034] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:31:42.534] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:31:44.109] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:31:45.674] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[12:31:47.324] <TB2> INFO: PixTestScurves::scurves() done
[12:31:47.324] <TB2> INFO: Vcal mean: 88.25 88.81 81.12 91.08 95.47 88.62 80.55 90.69 82.47 85.49 79.43 82.58 82.34 77.73 70.01 82.22
[12:31:47.324] <TB2> INFO: Vcal RMS: 6.01 5.60 5.23 5.30 6.25 6.16 4.57 5.72 4.52 4.92 4.35 4.76 4.53 4.20 4.71 4.73
[12:31:47.324] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1111 seconds
[12:31:47.412] <TB2> INFO: ######################################################################
[12:31:47.412] <TB2> INFO: PixTestTrim::doTest()
[12:31:47.412] <TB2> INFO: ######################################################################
[12:31:47.414] <TB2> INFO: ----------------------------------------------------------------------
[12:31:47.414] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[12:31:47.414] <TB2> INFO: ----------------------------------------------------------------------
[12:31:47.520] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:31:47.520] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:31:47.530] <TB2> INFO: dacScan step from 0 .. 19
[12:32:04.216] <TB2> INFO: Test took 16686ms.
[12:32:04.238] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:04.238] <TB2> INFO: dacScan step from 20 .. 39
[12:32:20.925] <TB2> INFO: Test took 16687ms.
[12:32:20.947] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:20.947] <TB2> INFO: dacScan step from 40 .. 59
[12:32:37.730] <TB2> INFO: Test took 16783ms.
[12:32:37.755] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:37.755] <TB2> INFO: dacScan step from 60 .. 79
[12:32:54.201] <TB2> INFO: Test took 16446ms.
[12:32:54.226] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:54.226] <TB2> INFO: dacScan step from 80 .. 99
[12:33:11.703] <TB2> INFO: Test took 17477ms.
[12:33:11.773] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:11.785] <TB2> INFO: dacScan step from 100 .. 119
[12:33:32.620] <TB2> INFO: Test took 20834ms.
[12:33:32.863] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:32.910] <TB2> INFO: dacScan step from 120 .. 139
[12:33:53.268] <TB2> INFO: Test took 20358ms.
[12:33:53.433] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:53.459] <TB2> INFO: dacScan step from 140 .. 159
[12:34:11.472] <TB2> INFO: Test took 18013ms.
[12:34:11.541] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:31.791] <TB2> INFO: ROC 0 VthrComp = 92
[12:34:31.791] <TB2> INFO: ROC 1 VthrComp = 94
[12:34:31.791] <TB2> INFO: ROC 2 VthrComp = 85
[12:34:31.791] <TB2> INFO: ROC 3 VthrComp = 95
[12:34:31.791] <TB2> INFO: ROC 4 VthrComp = 100
[12:34:31.791] <TB2> INFO: ROC 5 VthrComp = 92
[12:34:31.791] <TB2> INFO: ROC 6 VthrComp = 84
[12:34:31.792] <TB2> INFO: ROC 7 VthrComp = 96
[12:34:31.792] <TB2> INFO: ROC 8 VthrComp = 86
[12:34:31.792] <TB2> INFO: ROC 9 VthrComp = 88
[12:34:31.792] <TB2> INFO: ROC 10 VthrComp = 82
[12:34:31.792] <TB2> INFO: ROC 11 VthrComp = 88
[12:34:31.792] <TB2> INFO: ROC 12 VthrComp = 89
[12:34:31.792] <TB2> INFO: ROC 13 VthrComp = 83
[12:34:31.792] <TB2> INFO: ROC 14 VthrComp = 76
[12:34:31.792] <TB2> INFO: ROC 15 VthrComp = 88
[12:34:31.792] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:34:31.792] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[12:34:31.800] <TB2> INFO: dacScan step from 0 .. 19
[12:34:48.359] <TB2> INFO: Test took 16559ms.
[12:34:48.386] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:48.386] <TB2> INFO: dacScan step from 20 .. 39
[12:35:05.071] <TB2> INFO: Test took 16685ms.
[12:35:05.104] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:05.107] <TB2> INFO: dacScan step from 40 .. 59
[12:35:26.603] <TB2> INFO: Test took 21496ms.
[12:35:26.784] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:26.821] <TB2> INFO: dacScan step from 60 .. 79
[12:35:50.285] <TB2> INFO: Test took 23464ms.
[12:35:50.467] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:50.517] <TB2> INFO: dacScan step from 80 .. 99
[12:36:14.266] <TB2> INFO: Test took 23749ms.
[12:36:14.431] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:14.487] <TB2> INFO: dacScan step from 100 .. 119
[12:36:37.701] <TB2> INFO: Test took 23213ms.
[12:36:37.865] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:37.918] <TB2> INFO: dacScan step from 120 .. 139
[12:37:01.155] <TB2> INFO: Test took 23236ms.
[12:37:01.313] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:01.366] <TB2> INFO: dacScan step from 140 .. 159
[12:37:24.293] <TB2> INFO: Test took 22927ms.
[12:37:24.483] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:49.939] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 60.3067 for pixel 12/50 mean/min/max = 45.8621/31.2665/60.4577
[12:37:49.939] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 59.4127 for pixel 13/54 mean/min/max = 45.5102/31.5473/59.4731
[12:37:49.940] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 61.391 for pixel 0/0 mean/min/max = 46.4551/31.4057/61.5045
[12:37:49.940] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.1017 for pixel 14/79 mean/min/max = 45.2705/31.4129/59.1281
[12:37:49.940] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 60.8688 for pixel 21/2 mean/min/max = 46.3357/31.6373/61.0341
[12:37:49.941] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 61.428 for pixel 10/79 mean/min/max = 46.2328/31.0348/61.4308
[12:37:49.941] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 58.7532 for pixel 34/79 mean/min/max = 45.4837/32.1829/58.7845
[12:37:49.941] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.4076 for pixel 0/68 mean/min/max = 45.3972/31.8175/58.9769
[12:37:49.942] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 57.562 for pixel 22/70 mean/min/max = 44.7938/32.0044/57.5832
[12:37:49.942] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 59.5489 for pixel 1/2 mean/min/max = 46.3257/33.065/59.5864
[12:37:49.942] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 57.7414 for pixel 18/4 mean/min/max = 45.4158/33.0073/57.8244
[12:37:49.943] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 57.7034 for pixel 24/29 mean/min/max = 45.2894/32.6567/57.9221
[12:37:49.943] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 57.5013 for pixel 15/63 mean/min/max = 45.1899/32.8574/57.5223
[12:37:49.943] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 56.5253 for pixel 11/2 mean/min/max = 44.6954/32.7622/56.6286
[12:37:49.944] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 57.3488 for pixel 9/37 mean/min/max = 46.0844/34.8113/57.3576
[12:37:49.944] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 58.7793 for pixel 12/79 mean/min/max = 45.7322/32.6127/58.8517
[12:37:49.944] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:39:42.139] <TB2> INFO: Test took 112195ms.
[12:39:43.739] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:39:43.749] <TB2> INFO: dacScan step from 0 .. 19
[12:40:09.763] <TB2> INFO: Test took 26013ms.
[12:40:09.808] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:09.809] <TB2> INFO: dacScan step from 20 .. 39
[12:40:41.067] <TB2> INFO: Test took 31257ms.
[12:40:41.390] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:41.428] <TB2> INFO: dacScan step from 40 .. 59



[12:41:18.247] <TB2> INFO: Test took 36819ms.
[12:41:18.545] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:18.596] <TB2> INFO: dacScan step from 60 .. 79





[12:41:56.652] <TB2> INFO: Test took 38056ms.
[12:41:56.926] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:41:56.985] <TB2> INFO: dacScan step from 80 .. 99



[12:42:34.628] <TB2> INFO: Test took 37643ms.
[12:42:34.923] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:34.975] <TB2> INFO: dacScan step from 100 .. 119



[12:43:11.184] <TB2> INFO: Test took 36209ms.
[12:43:11.460] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:11.512] <TB2> INFO: dacScan step from 120 .. 139






[12:43:48.417] <TB2> INFO: Test took 36905ms.
[12:43:48.702] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:43:48.758] <TB2> INFO: dacScan step from 140 .. 159



[12:44:26.981] <TB2> INFO: Test took 38222ms.
[12:44:27.250] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:44:27.301] <TB2> INFO: dacScan step from 160 .. 179



[12:45:03.157] <TB2> INFO: Test took 35856ms.
[12:45:03.422] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:03.473] <TB2> INFO: dacScan step from 180 .. 199



[12:45:42.287] <TB2> INFO: Test took 38814ms.
[12:45:42.588] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:09.384] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.061529 .. 255.000000
[12:46:09.473] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[12:46:09.481] <TB2> INFO: dacScan step from 0 .. 19
[12:46:24.358] <TB2> INFO: Test took 14877ms.
[12:46:24.383] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:24.383] <TB2> INFO: dacScan step from 20 .. 39
[12:46:40.499] <TB2> INFO: Test took 16116ms.
[12:46:40.593] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:40.609] <TB2> INFO: dacScan step from 40 .. 59
[12:46:59.773] <TB2> INFO: Test took 19164ms.
[12:46:59.928] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:46:59.983] <TB2> INFO: dacScan step from 60 .. 79
[12:47:19.844] <TB2> INFO: Test took 19860ms.
[12:47:20.011] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:20.072] <TB2> INFO: dacScan step from 80 .. 99
[12:47:40.051] <TB2> INFO: Test took 19979ms.
[12:47:40.197] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:40.251] <TB2> INFO: dacScan step from 100 .. 119
[12:48:00.087] <TB2> INFO: Test took 19836ms.
[12:48:00.225] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:00.277] <TB2> INFO: dacScan step from 120 .. 139
[12:48:19.355] <TB2> INFO: Test took 19078ms.
[12:48:19.490] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:19.541] <TB2> INFO: dacScan step from 140 .. 159
[12:48:39.590] <TB2> INFO: Test took 20050ms.
[12:48:39.734] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:48:39.787] <TB2> INFO: dacScan step from 160 .. 179
[12:49:00.209] <TB2> INFO: Test took 20422ms.
[12:49:00.355] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:00.410] <TB2> INFO: dacScan step from 180 .. 199
[12:49:20.872] <TB2> INFO: Test took 20462ms.
[12:49:21.081] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:21.133] <TB2> INFO: dacScan step from 200 .. 219
[12:49:41.258] <TB2> INFO: Test took 20125ms.
[12:49:41.407] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:49:41.468] <TB2> INFO: dacScan step from 220 .. 239
[12:50:01.777] <TB2> INFO: Test took 20309ms.
[12:50:01.915] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:01.967] <TB2> INFO: dacScan step from 240 .. 255
[12:50:18.741] <TB2> INFO: Test took 16774ms.
[12:50:18.860] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:51.143] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 14.195871 .. 43.867679
[12:50:51.229] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 4 .. 53 (20) hits flags = 16 (plus default)
[12:50:51.238] <TB2> INFO: dacScan step from 4 .. 23
[12:51:05.636] <TB2> INFO: Test took 14398ms.
[12:51:05.660] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:05.660] <TB2> INFO: dacScan step from 24 .. 43
[12:51:22.058] <TB2> INFO: Test took 16398ms.
[12:51:22.202] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:22.229] <TB2> INFO: dacScan step from 44 .. 53
[12:51:33.571] <TB2> INFO: Test took 11342ms.
[12:51:33.645] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:51:49.296] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 20.541572 .. 42.142378
[12:51:49.376] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 10 .. 52 (20) hits flags = 16 (plus default)
[12:51:49.384] <TB2> INFO: dacScan step from 10 .. 29
[12:52:04.223] <TB2> INFO: Test took 14838ms.
[12:52:04.245] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:04.246] <TB2> INFO: dacScan step from 30 .. 49
[12:52:23.279] <TB2> INFO: Test took 19033ms.
[12:52:23.417] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:23.457] <TB2> INFO: dacScan step from 50 .. 52
[12:52:28.823] <TB2> INFO: Test took 5366ms.
[12:52:28.848] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:52:45.763] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 3.802355 .. 40.112820
[12:52:45.847] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 3 .. 50 (20) hits flags = 16 (plus default)
[12:52:45.856] <TB2> INFO: dacScan step from 3 .. 22
[12:53:00.625] <TB2> INFO: Test took 14769ms.
[12:53:00.646] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:00.646] <TB2> INFO: dacScan step from 23 .. 42
[12:53:17.262] <TB2> INFO: Test took 16616ms.
[12:53:17.362] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:17.389] <TB2> INFO: dacScan step from 43 .. 50
[12:53:26.608] <TB2> INFO: Test took 9219ms.
[12:53:26.665] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:41.393] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:53:41.393] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[12:53:41.401] <TB2> INFO: dacScan step from 15 .. 34
[12:54:08.226] <TB2> INFO: Test took 26825ms.
[12:54:08.292] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:08.301] <TB2> INFO: dacScan step from 35 .. 54




[12:54:44.211] <TB2> INFO: Test took 35910ms.
[12:54:44.514] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:54:44.569] <TB2> INFO: dacScan step from 55 .. 55
[12:54:49.084] <TB2> INFO: Test took 4514ms.
[12:54:49.098] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:02.324] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C0.dat
[12:55:02.325] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C1.dat
[12:55:02.325] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C2.dat
[12:55:02.325] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C3.dat
[12:55:02.325] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C4.dat
[12:55:02.325] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C5.dat
[12:55:02.325] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C6.dat
[12:55:02.325] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C7.dat
[12:55:02.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C8.dat
[12:55:02.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C9.dat
[12:55:02.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C10.dat
[12:55:02.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C11.dat
[12:55:02.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C12.dat
[12:55:02.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C13.dat
[12:55:02.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C14.dat
[12:55:02.326] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C15.dat
[12:55:02.327] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C0.dat
[12:55:02.334] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C1.dat
[12:55:02.340] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C2.dat
[12:55:02.347] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C3.dat
[12:55:02.353] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C4.dat
[12:55:02.359] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C5.dat
[12:55:02.366] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C6.dat
[12:55:02.372] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C7.dat
[12:55:02.378] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C8.dat
[12:55:02.384] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C9.dat
[12:55:02.391] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C10.dat
[12:55:02.397] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C11.dat
[12:55:02.403] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C12.dat
[12:55:02.409] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C13.dat
[12:55:02.417] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C14.dat
[12:55:02.423] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//trimParameters35_C15.dat
[12:55:02.429] <TB2> INFO: PixTestTrim::trimTest() done
[12:55:02.429] <TB2> INFO: vtrim: 119 110 114 109 129 110 111 112 107 111 106 116 111 109 105 111
[12:55:02.429] <TB2> INFO: vthrcomp: 92 94 85 95 100 92 84 96 86 88 82 88 89 83 76 88
[12:55:02.429] <TB2> INFO: vcal mean: 34.98 35.10 34.97 35.02 35.03 35.01 35.03 35.02 35.02 35.08 35.02 35.04 35.01 35.04 35.06 35.03
[12:55:02.429] <TB2> INFO: vcal RMS: 1.10 1.03 1.01 0.98 1.05 1.05 0.99 0.96 0.97 0.98 1.06 0.98 0.93 0.94 0.92 1.04
[12:55:02.429] <TB2> INFO: bits mean: 9.99 9.66 9.40 9.47 9.92 9.62 9.79 9.59 9.66 9.52 9.80 10.18 9.98 10.04 9.31 9.97
[12:55:02.429] <TB2> INFO: bits RMS: 2.56 2.74 2.76 2.78 2.46 2.74 2.55 2.71 2.66 2.46 2.39 2.32 2.33 2.37 2.33 2.40
[12:55:02.434] <TB2> INFO: ----------------------------------------------------------------------
[12:55:02.434] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 255 240 150 100
[12:55:02.434] <TB2> INFO: ----------------------------------------------------------------------
[12:55:02.436] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:55:02.446] <TB2> INFO: dacScan step from 0 .. 19
[12:55:26.499] <TB2> INFO: Test took 24053ms.
[12:55:26.543] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:26.543] <TB2> INFO: dacScan step from 20 .. 39
[12:55:52.464] <TB2> INFO: Test took 25920ms.
[12:55:52.517] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:52.521] <TB2> INFO: dacScan step from 40 .. 59
[12:56:27.684] <TB2> INFO: Test took 35163ms.
[12:56:27.943] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:56:27.979] <TB2> INFO: dacScan step from 60 .. 79






[12:57:06.636] <TB2> INFO: Test took 38656ms.
[12:57:06.909] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:06.963] <TB2> INFO: dacScan step from 80 .. 99



[12:57:43.653] <TB2> INFO: Test took 36690ms.
[12:57:44.025] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:44.083] <TB2> INFO: dacScan step from 100 .. 119



[12:58:23.105] <TB2> INFO: Test took 39022ms.
[12:58:23.377] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:23.431] <TB2> INFO: dacScan step from 120 .. 139



[12:59:01.883] <TB2> INFO: Test took 38452ms.
[12:59:02.148] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:02.201] <TB2> INFO: dacScan step from 140 .. 159



[12:59:40.160] <TB2> INFO: Test took 37959ms.
[12:59:40.452] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:40.507] <TB2> INFO: dacScan step from 160 .. 179



[13:00:20.302] <TB2> INFO: Test took 39795ms.
[13:00:20.630] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:20.688] <TB2> INFO: dacScan step from 180 .. 199



[13:01:01.051] <TB2> INFO: Test took 40363ms.
[13:01:01.322] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:26.947] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 77 (20) hits flags = 16 (plus default)
[13:01:26.956] <TB2> INFO: dacScan step from 0 .. 19
[13:01:53.289] <TB2> INFO: Test took 26333ms.
[13:01:53.327] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:53.327] <TB2> INFO: dacScan step from 20 .. 39
[13:02:20.638] <TB2> INFO: Test took 27311ms.
[13:02:20.721] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:20.732] <TB2> INFO: dacScan step from 40 .. 59




[13:02:58.007] <TB2> INFO: Test took 37275ms.
[13:02:58.280] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:58.327] <TB2> INFO: dacScan step from 60 .. 77
[13:03:31.621] <TB2> INFO: Test took 33294ms.
[13:03:31.865] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:49.444] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 72 (20) hits flags = 16 (plus default)
[13:03:49.454] <TB2> INFO: dacScan step from 0 .. 19
[13:04:13.889] <TB2> INFO: Test took 24435ms.
[13:04:13.926] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:13.926] <TB2> INFO: dacScan step from 20 .. 39
[13:04:41.141] <TB2> INFO: Test took 27215ms.
[13:04:41.270] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:41.284] <TB2> INFO: dacScan step from 40 .. 59




[13:05:19.570] <TB2> INFO: Test took 38285ms.
[13:05:19.856] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:19.910] <TB2> INFO: dacScan step from 60 .. 72
[13:05:46.410] <TB2> INFO: Test took 26500ms.
[13:05:46.590] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:02.690] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 67 (20) hits flags = 16 (plus default)
[13:06:02.698] <TB2> INFO: dacScan step from 0 .. 19
[13:06:28.763] <TB2> INFO: Test took 26065ms.
[13:06:28.803] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:28.803] <TB2> INFO: dacScan step from 20 .. 39
[13:06:59.223] <TB2> INFO: Test took 30420ms.
[13:06:59.395] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:59.417] <TB2> INFO: dacScan step from 40 .. 59






[13:07:36.871] <TB2> INFO: Test took 37454ms.
[13:07:37.154] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:37.202] <TB2> INFO: dacScan step from 60 .. 67
[13:07:54.500] <TB2> INFO: Test took 17298ms.
[13:07:54.623] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:09.731] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 66 (20) hits flags = 16 (plus default)
[13:08:09.740] <TB2> INFO: dacScan step from 0 .. 19
[13:08:35.666] <TB2> INFO: Test took 25926ms.
[13:08:35.705] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:35.705] <TB2> INFO: dacScan step from 20 .. 39
[13:09:05.320] <TB2> INFO: Test took 29614ms.
[13:09:05.534] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:05.564] <TB2> INFO: dacScan step from 40 .. 59



[13:09:43.916] <TB2> INFO: Test took 38352ms.
[13:09:44.344] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:44.398] <TB2> INFO: dacScan step from 60 .. 66
[13:10:00.249] <TB2> INFO: Test took 15851ms.
[13:10:00.390] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:17.897] <TB2> INFO: PixTestTrim::trimBitTest() done
[13:10:17.898] <TB2> INFO: PixTestTrim::doTest() done, duration: 2310 seconds
[13:10:18.671] <TB2> INFO: ######################################################################
[13:10:18.671] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:10:18.671] <TB2> INFO: ######################################################################
[13:10:22.503] <TB2> INFO: Test took 3830ms.
[13:10:22.525] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:26.505] <TB2> INFO: Test took 3784ms.
[13:10:26.604] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:30.346] <TB2> INFO: Test took 3730ms.
[13:10:30.409] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:30.416] <TB2> INFO: The DUT currently contains the following objects:
[13:10:30.416] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:10:30.416] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:10:30.416] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:10:30.416] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:10:30.416] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:30.416] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:30.416] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:30.416] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:30.416] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:30.416] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:30.416] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:30.416] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:30.416] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:30.416] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:30.416] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:30.416] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:30.416] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:30.416] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:30.416] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:30.416] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:31.523] <TB2> INFO: Test took 1107ms.
[13:10:31.524] <TB2> INFO: The DUT currently contains the following objects:
[13:10:31.524] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:10:31.524] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:10:31.525] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:10:31.525] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:10:31.525] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:31.525] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:31.525] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:31.525] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:31.525] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:31.525] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:31.525] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:31.525] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:31.525] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:31.525] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:31.525] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:31.525] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:31.525] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:31.525] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:31.525] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:31.525] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:32.633] <TB2> INFO: Test took 1108ms.
[13:10:32.635] <TB2> INFO: The DUT currently contains the following objects:
[13:10:32.635] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:10:32.635] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:10:32.635] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:10:32.635] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:10:32.635] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:32.635] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:32.635] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:32.635] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:32.635] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:32.635] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:32.635] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:32.635] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:32.635] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:32.635] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:32.635] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:32.635] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:32.635] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:32.635] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:32.635] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:32.635] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:33.770] <TB2> INFO: Test took 1135ms.
[13:10:33.771] <TB2> INFO: The DUT currently contains the following objects:
[13:10:33.771] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:10:33.771] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:10:33.771] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:10:33.771] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:10:33.772] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:33.772] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:33.772] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:33.772] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:33.772] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:33.772] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:33.772] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:33.772] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:33.772] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:33.772] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:33.772] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:33.772] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:33.772] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:33.772] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:33.772] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:33.772] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:34.893] <TB2> INFO: Test took 1121ms.
[13:10:34.894] <TB2> INFO: The DUT currently contains the following objects:
[13:10:34.894] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:10:34.894] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:10:34.894] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:10:34.894] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:10:34.894] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:34.894] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:34.894] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:34.894] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:34.894] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:34.894] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:34.894] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:34.894] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:34.894] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:34.895] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:34.895] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:34.895] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:34.895] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:34.895] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:34.895] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:34.895] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:36.016] <TB2> INFO: Test took 1121ms.
[13:10:36.017] <TB2> INFO: The DUT currently contains the following objects:
[13:10:36.017] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:10:36.017] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:10:36.017] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:10:36.017] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:10:36.017] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:36.017] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:36.017] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:36.017] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:36.017] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:36.017] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:36.017] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:36.017] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:36.018] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:36.018] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:36.018] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:36.018] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:36.018] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:36.018] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:36.018] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:36.018] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:37.211] <TB2> INFO: Test took 1193ms.
[13:10:37.212] <TB2> INFO: The DUT currently contains the following objects:
[13:10:37.212] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:10:37.212] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:10:37.212] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:10:37.212] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:10:37.212] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:37.212] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:37.212] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:37.212] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:37.212] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:37.212] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:37.212] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:37.212] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:37.212] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:37.212] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:37.212] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:37.212] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:37.212] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:37.212] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:37.212] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:37.212] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:38.334] <TB2> INFO: Test took 1122ms.
[13:10:38.335] <TB2> INFO: The DUT currently contains the following objects:
[13:10:38.335] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:10:38.335] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:10:38.336] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:10:38.336] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:10:38.336] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:38.336] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:38.336] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:38.336] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:38.336] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:38.336] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:38.336] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:38.336] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:38.336] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:38.336] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:38.336] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:38.336] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:38.336] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:38.336] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:38.336] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:38.336] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:39.474] <TB2> INFO: Test took 1138ms.
[13:10:39.475] <TB2> INFO: The DUT currently contains the following objects:
[13:10:39.475] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:10:39.475] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:10:39.475] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:10:39.475] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:10:39.475] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:39.476] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:39.476] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:39.476] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:39.476] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:39.476] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:39.476] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:39.476] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:39.476] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:39.476] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:39.476] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:39.476] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:39.476] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:39.476] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:39.476] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:39.476] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:40.596] <TB2> INFO: Test took 1120ms.
[13:10:40.598] <TB2> INFO: The DUT currently contains the following objects:
[13:10:40.598] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:10:40.598] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:10:40.598] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:10:40.598] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:10:40.598] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:40.598] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:40.598] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:40.598] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:40.598] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:40.598] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:40.598] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:40.598] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:40.598] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:40.598] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:40.598] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:40.598] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:40.598] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:40.598] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:40.598] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:40.598] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:41.722] <TB2> INFO: Test took 1124ms.
[13:10:41.723] <TB2> INFO: The DUT currently contains the following objects:
[13:10:41.723] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:10:41.723] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:10:41.723] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:10:41.723] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:10:41.723] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:41.724] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:41.724] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:41.724] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:41.724] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:41.724] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:41.724] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:41.724] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:41.724] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:41.724] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:41.724] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:41.724] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:41.724] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:41.724] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:41.724] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:41.724] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:42.846] <TB2> INFO: Test took 1122ms.
[13:10:42.848] <TB2> INFO: The DUT currently contains the following objects:
[13:10:42.848] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:10:42.848] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:10:42.848] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:10:42.848] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:10:42.848] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:42.848] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:42.848] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:42.848] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:42.848] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:42.848] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:42.848] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:42.848] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:42.848] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:42.848] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:42.848] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:42.848] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:42.849] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:42.849] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:42.849] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:42.849] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:43.958] <TB2> INFO: Test took 1109ms.
[13:10:43.959] <TB2> INFO: The DUT currently contains the following objects:
[13:10:43.960] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:10:43.960] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:10:43.960] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:10:43.960] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:10:43.960] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:43.960] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:43.960] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:43.960] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:43.960] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:43.960] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:43.960] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:43.960] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:43.960] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:43.960] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:43.960] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:43.960] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:43.960] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:43.960] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:43.960] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:43.960] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:45.095] <TB2> INFO: Test took 1135ms.
[13:10:45.096] <TB2> INFO: The DUT currently contains the following objects:
[13:10:45.096] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:10:45.096] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:10:45.096] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:10:45.096] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:10:45.096] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:45.096] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:45.096] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:45.096] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:45.096] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:45.096] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:45.096] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:45.096] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:45.096] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:45.096] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:45.096] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:45.096] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:45.097] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:45.097] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:45.097] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:45.097] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:46.231] <TB2> INFO: Test took 1134ms.
[13:10:46.232] <TB2> INFO: The DUT currently contains the following objects:
[13:10:46.232] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:10:46.232] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:10:46.232] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:10:46.232] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:10:46.232] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:46.232] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:46.232] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:46.232] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:46.232] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:46.232] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:46.232] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:46.232] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:46.232] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:46.232] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:46.232] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:46.232] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:46.232] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:46.232] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:46.233] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:46.233] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:47.357] <TB2> INFO: Test took 1124ms.
[13:10:47.358] <TB2> INFO: The DUT currently contains the following objects:
[13:10:47.358] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[13:10:47.358] <TB2> INFO: TBM Core alpha (0): 7 registers set
[13:10:47.358] <TB2> INFO: TBM Core beta (1): 7 registers set
[13:10:47.358] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:10:47.359] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:47.359] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:47.359] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:47.359] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:47.359] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:47.359] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:47.359] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:47.359] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:47.359] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:47.359] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:47.359] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:47.359] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:47.359] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:47.359] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:47.359] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:47.359] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:10:48.483] <TB2> INFO: Test took 1124ms.
[13:10:48.488] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:15:15.131] <TB2> INFO: Test took 266643ms.
[13:15:16.506] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:25.319] <TB2> INFO: Test took 248814ms.
[13:19:26.845] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:26.852] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:26.858] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:26.864] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:26.871] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:26.877] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[13:19:26.883] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[13:19:26.890] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:26.896] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:26.903] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:26.909] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:26.915] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:26.922] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:26.928] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:26.935] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:26.941] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:26.948] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:26.954] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[13:19:26.988] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:19:26.988] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:19:26.988] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:19:26.988] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:19:26.988] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:19:26.989] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:19:26.989] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:19:26.989] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:19:26.989] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:19:26.989] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:19:26.989] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:19:26.989] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:19:26.989] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:19:26.989] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:19:26.989] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:19:26.989] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:19:30.682] <TB2> INFO: Test took 3690ms.
[13:19:34.512] <TB2> INFO: Test took 3567ms.
[13:19:38.378] <TB2> INFO: Test took 3603ms.
[13:19:38.647] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:39.574] <TB2> INFO: Test took 927ms.
[13:19:39.576] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:40.678] <TB2> INFO: Test took 1102ms.
[13:19:40.680] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:41.826] <TB2> INFO: Test took 1146ms.
[13:19:41.828] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:42.946] <TB2> INFO: Test took 1118ms.
[13:19:42.949] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:44.053] <TB2> INFO: Test took 1104ms.
[13:19:44.055] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:45.228] <TB2> INFO: Test took 1173ms.
[13:19:45.230] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:46.331] <TB2> INFO: Test took 1101ms.
[13:19:46.333] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:47.449] <TB2> INFO: Test took 1116ms.
[13:19:47.451] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:48.580] <TB2> INFO: Test took 1129ms.
[13:19:48.582] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:49.682] <TB2> INFO: Test took 1101ms.
[13:19:49.684] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:50.785] <TB2> INFO: Test took 1101ms.
[13:19:50.787] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:51.888] <TB2> INFO: Test took 1101ms.
[13:19:51.890] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:53.020] <TB2> INFO: Test took 1130ms.
[13:19:53.021] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:54.166] <TB2> INFO: Test took 1145ms.
[13:19:54.168] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:55.269] <TB2> INFO: Test took 1101ms.
[13:19:55.271] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:56.372] <TB2> INFO: Test took 1101ms.
[13:19:56.374] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:57.476] <TB2> INFO: Test took 1102ms.
[13:19:57.478] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:58.580] <TB2> INFO: Test took 1102ms.
[13:19:58.582] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:19:59.713] <TB2> INFO: Test took 1131ms.
[13:19:59.715] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:00.862] <TB2> INFO: Test took 1147ms.
[13:20:00.864] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:01.965] <TB2> INFO: Test took 1101ms.
[13:20:01.967] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:03.086] <TB2> INFO: Test took 1119ms.
[13:20:03.088] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:04.192] <TB2> INFO: Test took 1104ms.
[13:20:04.195] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:05.343] <TB2> INFO: Test took 1149ms.
[13:20:05.345] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:06.463] <TB2> INFO: Test took 1118ms.
[13:20:06.466] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:07.597] <TB2> INFO: Test took 1131ms.
[13:20:07.600] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:08.719] <TB2> INFO: Test took 1119ms.
[13:20:08.721] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:09.839] <TB2> INFO: Test took 1118ms.
[13:20:09.842] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:10.945] <TB2> INFO: Test took 1104ms.
[13:20:10.948] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:12.080] <TB2> INFO: Test took 1132ms.
[13:20:12.083] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:13.202] <TB2> INFO: Test took 1120ms.
[13:20:13.205] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:20:14.309] <TB2> INFO: Test took 1105ms.
[13:20:14.812] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 596 seconds
[13:20:14.812] <TB2> INFO: PH scale (per ROC): 77 86 80 86 80 78 76 84 78 74 91 76 77 89 83 85
[13:20:14.812] <TB2> INFO: PH offset (per ROC): 167 167 170 157 156 173 160 165 166 175 145 151 156 135 160 145
[13:20:14.977] <TB2> INFO: ######################################################################
[13:20:14.977] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:20:14.977] <TB2> INFO: ######################################################################
[13:20:14.986] <TB2> INFO: scanning low vcal = 50
[13:20:19.392] <TB2> INFO: Test took 4406ms.
[13:20:19.443] <TB2> INFO: scanning low vcal = 100
[13:20:23.941] <TB2> INFO: Test took 4498ms.
[13:20:23.994] <TB2> INFO: scanning low vcal = 150
[13:20:28.527] <TB2> INFO: Test took 4533ms.
[13:20:28.580] <TB2> INFO: scanning low vcal = 200
[13:20:32.999] <TB2> INFO: Test took 4419ms.
[13:20:33.052] <TB2> INFO: scanning low vcal = 250
[13:20:37.659] <TB2> INFO: Test took 4607ms.
[13:20:37.713] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[13:20:42.230] <TB2> INFO: Test took 4517ms.
[13:20:42.283] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[13:20:46.756] <TB2> INFO: Test took 4473ms.
[13:20:46.809] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[13:20:51.257] <TB2> INFO: Test took 4448ms.
[13:20:51.309] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[13:20:55.814] <TB2> INFO: Test took 4505ms.
[13:20:55.867] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:21:00.313] <TB2> INFO: Test took 4446ms.
[13:21:00.601] <TB2> INFO: PixTestGainPedestal::measure() done
[13:21:23.113] <TB2> INFO: PixTestGainPedestal::fit() done
[13:21:23.113] <TB2> INFO: non-linearity mean: 0.953 0.955 0.953 0.959 0.958 0.956 0.956 0.949 0.950 0.958 0.969 0.954 0.954 0.955 0.956 0.956
[13:21:23.113] <TB2> INFO: non-linearity RMS: 0.006 0.006 0.005 0.005 0.004 0.006 0.006 0.007 0.007 0.005 0.004 0.005 0.007 0.005 0.005 0.006
[13:21:23.113] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[13:21:23.131] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[13:21:23.148] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[13:21:23.166] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[13:21:23.183] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[13:21:23.200] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[13:21:23.218] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[13:21:23.235] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[13:21:23.253] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[13:21:23.270] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[13:21:23.288] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[13:21:23.305] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[13:21:23.322] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[13:21:23.340] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[13:21:23.357] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[13:21:23.374] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[13:21:23.392] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 68 seconds
[13:21:23.397] <TB2> INFO: enter test to run
[13:21:23.399] <TB2> INFO: test: exit no parameter change
[13:21:23.898] <TB2> QUIET: Connection to board 0 closed.
[13:21:23.977] <TB2> INFO: pXar: this is the end, my friend