[08:29:01.233] <TB2> INFO: *** Welcome to pxar ***
[08:29:01.233] <TB2> INFO: *** Today: 2015/07/07
[08:29:01.233] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C15.dat
[08:29:01.234] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//tbmParameters_C0b.dat
[08:29:01.234] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//defaultMaskFile.dat
[08:29:01.234] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters_C15.dat
[08:29:01.324] <TB2> INFO: clk: 4
[08:29:01.324] <TB2> INFO: ctr: 4
[08:29:01.324] <TB2> INFO: sda: 19
[08:29:01.324] <TB2> INFO: tin: 9
[08:29:01.324] <TB2> INFO: level: 15
[08:29:01.324] <TB2> INFO: triggerdelay: 0
[08:29:01.324] <TB2> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[08:29:01.324] <TB2> INFO: Log level: INFO
[08:29:01.331] <TB2> INFO: Found DTB DTB_WXC55Z
[08:29:01.344] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[08:29:01.347] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 0
HW version:
FW version: 4.0
SW version: 4.0
USB id:
MAC address: 000000000000
Hostname:
Comment:
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[08:29:01.350] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[08:29:02.938] <TB2> INFO: DUT info:
[08:29:02.938] <TB2> INFO: The DUT currently contains the following objects:
[08:29:02.938] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[08:29:02.938] <TB2> INFO: TBM Core alpha (0): 7 registers set
[08:29:02.938] <TB2> INFO: TBM Core beta (1): 7 registers set
[08:29:02.938] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[08:29:02.938] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[08:29:02.938] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[08:29:02.938] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[08:29:02.938] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[08:29:02.939] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[08:29:02.939] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[08:29:02.939] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[08:29:02.939] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[08:29:02.939] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[08:29:02.939] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[08:29:02.939] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[08:29:02.939] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[08:29:02.939] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[08:29:02.939] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[08:29:02.939] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[08:29:02.939] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[08:29:03.340] <TB2> INFO: enter 'restricted' command line mode
[08:29:03.340] <TB2> INFO: enter test to run
[08:29:03.340] <TB2> INFO: test: pretest no parameter change
[08:29:03.340] <TB2> INFO: running: pretest
[08:29:03.346] <TB2> INFO: ######################################################################
[08:29:03.346] <TB2> INFO: PixTestPretest::doTest()
[08:29:03.346] <TB2> INFO: ######################################################################
[08:29:03.348] <TB2> INFO: ----------------------------------------------------------------------
[08:29:03.348] <TB2> INFO: PixTestPretest::programROC()
[08:29:03.348] <TB2> INFO: ----------------------------------------------------------------------
[08:29:21.364] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[08:29:21.364] <TB2> INFO: IA differences per ROC: 17.7 17.7 18.5 19.3 18.5 17.7 18.5 18.5 20.1 17.7 16.9 18.5 18.5 20.9 16.9 18.5
[08:29:21.436] <TB2> INFO: ----------------------------------------------------------------------
[08:29:21.436] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[08:29:21.436] <TB2> INFO: ----------------------------------------------------------------------
[08:29:40.974] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 385.9 mA = 24.1188 mA/ROC
[08:29:40.977] <TB2> INFO: ----------------------------------------------------------------------
[08:29:40.977] <TB2> INFO: PixTestPretest::findWorkingPixel()
[08:29:40.977] <TB2> INFO: ----------------------------------------------------------------------
[08:29:50.410] <TB2> INFO: Test took 9428ms.
[08:29:50.715] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[08:29:50.752] <TB2> INFO: ----------------------------------------------------------------------
[08:29:50.752] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[08:29:50.752] <TB2> INFO: ----------------------------------------------------------------------
[08:30:00.060] <TB2> INFO: Test took 9301ms.
[08:30:00.356] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[08:30:00.356] <TB2> INFO: CalDel: 135 143 153 150 139 159 158 138 171 140 142 161 171 158 153 157
[08:30:00.356] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[08:30:00.359] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C0.dat
[08:30:00.359] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C1.dat
[08:30:00.359] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C2.dat
[08:30:00.359] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C3.dat
[08:30:00.360] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C4.dat
[08:30:00.360] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C5.dat
[08:30:00.360] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C6.dat
[08:30:00.360] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C7.dat
[08:30:00.360] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C8.dat
[08:30:00.360] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C9.dat
[08:30:00.360] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C10.dat
[08:30:00.360] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C11.dat
[08:30:00.360] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C12.dat
[08:30:00.360] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C13.dat
[08:30:00.361] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C14.dat
[08:30:00.361] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters_C15.dat
[08:30:00.361] <TB2> INFO: PixTestPretest::doTest() done, duration: 57 seconds
[08:30:00.453] <TB2> INFO: enter test to run
[08:30:00.453] <TB2> INFO: test: fulltest no parameter change
[08:30:00.453] <TB2> INFO: running: fulltest
[08:30:00.454] <TB2> INFO: ######################################################################
[08:30:00.454] <TB2> INFO: PixTestFullTest::doTest()
[08:30:00.454] <TB2> INFO: ######################################################################
[08:30:00.455] <TB2> INFO: ######################################################################
[08:30:00.455] <TB2> INFO: PixTestAlive::doTest()
[08:30:00.455] <TB2> INFO: ######################################################################
[08:30:00.457] <TB2> INFO: ----------------------------------------------------------------------
[08:30:00.457] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:30:00.457] <TB2> INFO: ----------------------------------------------------------------------
[08:30:04.160] <TB2> INFO: Test took 3702ms.
[08:30:04.179] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:30:04.403] <TB2> INFO: PixTestAlive::aliveTest() done
[08:30:04.403] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:30:04.405] <TB2> INFO: ----------------------------------------------------------------------
[08:30:04.405] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:30:04.405] <TB2> INFO: ----------------------------------------------------------------------
[08:30:07.385] <TB2> INFO: Test took 2979ms.
[08:30:07.388] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:30:07.389] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[08:30:07.615] <TB2> INFO: PixTestAlive::maskTest() done
[08:30:07.615] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:30:07.616] <TB2> INFO: ----------------------------------------------------------------------
[08:30:07.616] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[08:30:07.616] <TB2> INFO: ----------------------------------------------------------------------
[08:30:11.407] <TB2> INFO: Test took 3789ms.
[08:30:11.438] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:30:11.669] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[08:30:11.669] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[08:30:11.669] <TB2> INFO: PixTestAlive::doTest() done, duration: 11 seconds
[08:30:11.682] <TB2> INFO: ######################################################################
[08:30:11.682] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[08:30:11.682] <TB2> INFO: ######################################################################
[08:30:11.684] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[08:30:11.699] <TB2> INFO: dacScan step from 0 .. 29
[08:30:35.097] <TB2> INFO: Test took 23397ms.
[08:30:35.137] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:30:35.137] <TB2> INFO: dacScan step from 30 .. 59
[08:31:00.750] <TB2> INFO: Test took 25613ms.
[08:31:00.861] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:31:00.874] <TB2> INFO: dacScan step from 60 .. 89
[08:31:34.338] <TB2> INFO: Test took 33464ms.
[08:31:34.595] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:31:34.670] <TB2> INFO: dacScan step from 90 .. 119
[08:32:07.430] <TB2> INFO: Test took 32760ms.
[08:32:07.829] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:32:07.944] <TB2> INFO: dacScan step from 120 .. 149
[08:32:35.393] <TB2> INFO: Test took 27449ms.
[08:32:35.581] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:32:59.497] <TB2> INFO: PixTestBBMap::doTest() done, duration: 167 seconds
[08:32:59.497] <TB2> INFO: number of dead bumps (per ROC): 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 69
[08:32:59.497] <TB2> INFO: separation cut (per ROC): 98 90 88 92 102 92 73 100 80 84 74 77 86 79 69 75
[08:32:59.571] <TB2> INFO: ######################################################################
[08:32:59.571] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[08:32:59.571] <TB2> INFO: ######################################################################
[08:32:59.571] <TB2> INFO: ----------------------------------------------------------------------
[08:32:59.571] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[08:32:59.571] <TB2> INFO: ----------------------------------------------------------------------
[08:32:59.571] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (3) hits flags = 16 (plus default)
[08:32:59.579] <TB2> INFO: dacScan step from 0 .. 2
[08:33:17.236] <TB2> INFO: Test took 17656ms.
[08:33:17.263] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:33:17.263] <TB2> INFO: dacScan step from 3 .. 5
[08:33:34.926] <TB2> INFO: Test took 17663ms.
[08:33:34.946] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:33:34.946] <TB2> INFO: dacScan step from 6 .. 8
[08:33:51.964] <TB2> INFO: Test took 17018ms.
[08:33:51.985] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:33:51.985] <TB2> INFO: dacScan step from 9 .. 11
[08:34:09.089] <TB2> INFO: Test took 17104ms.
[08:34:09.113] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:34:09.113] <TB2> INFO: dacScan step from 12 .. 14
[08:34:26.501] <TB2> INFO: Test took 17387ms.
[08:34:26.526] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:34:26.526] <TB2> INFO: dacScan step from 15 .. 17
[08:34:43.633] <TB2> INFO: Test took 17107ms.
[08:34:43.653] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:34:43.653] <TB2> INFO: dacScan step from 18 .. 20
[08:35:00.699] <TB2> INFO: Test took 17045ms.
[08:35:00.724] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:35:00.724] <TB2> INFO: dacScan step from 21 .. 23
[08:35:18.274] <TB2> INFO: Test took 17550ms.
[08:35:18.296] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:35:18.296] <TB2> INFO: dacScan step from 24 .. 26
[08:35:35.433] <TB2> INFO: Test took 17137ms.
[08:35:35.459] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:35:35.459] <TB2> INFO: dacScan step from 27 .. 29
[08:35:52.806] <TB2> INFO: Test took 17347ms.
[08:35:52.830] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:35:52.830] <TB2> INFO: dacScan step from 30 .. 32
[08:36:10.411] <TB2> INFO: Test took 17581ms.
[08:36:10.431] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:36:10.431] <TB2> INFO: dacScan step from 33 .. 35
[08:36:28.009] <TB2> INFO: Test took 17578ms.
[08:36:28.029] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:36:28.029] <TB2> INFO: dacScan step from 36 .. 38
[08:36:45.340] <TB2> INFO: Test took 17311ms.
[08:36:45.364] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:36:45.364] <TB2> INFO: dacScan step from 39 .. 41
[08:37:02.950] <TB2> INFO: Test took 17586ms.
[08:37:02.975] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:37:02.975] <TB2> INFO: dacScan step from 42 .. 44
[08:37:20.238] <TB2> INFO: Test took 17263ms.
[08:37:20.264] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:37:20.264] <TB2> INFO: dacScan step from 45 .. 47
[08:37:37.117] <TB2> INFO: Test took 16853ms.
[08:37:37.145] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:37:37.145] <TB2> INFO: dacScan step from 48 .. 50
[08:37:54.310] <TB2> INFO: Test took 17165ms.
[08:37:54.331] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:37:54.331] <TB2> INFO: dacScan step from 51 .. 53
[08:38:11.984] <TB2> INFO: Test took 17653ms.
[08:38:12.007] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:12.007] <TB2> INFO: dacScan step from 54 .. 56
[08:38:29.368] <TB2> INFO: Test took 17361ms.
[08:38:29.389] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:29.389] <TB2> INFO: dacScan step from 57 .. 59
[08:38:46.523] <TB2> INFO: Test took 17134ms.
[08:38:46.546] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:38:46.546] <TB2> INFO: dacScan step from 60 .. 62
[08:39:03.830] <TB2> INFO: Test took 17284ms.
[08:39:03.854] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:39:03.854] <TB2> INFO: dacScan step from 63 .. 65
[08:39:21.235] <TB2> INFO: Test took 17381ms.
[08:39:21.271] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:39:21.272] <TB2> INFO: dacScan step from 66 .. 68
[08:39:38.990] <TB2> INFO: Test took 17718ms.
[08:39:39.027] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:39:39.028] <TB2> INFO: dacScan step from 69 .. 71
[08:39:56.917] <TB2> INFO: Test took 17889ms.
[08:39:56.963] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:39:56.964] <TB2> INFO: dacScan step from 72 .. 74
[08:40:15.387] <TB2> INFO: Test took 18423ms.
[08:40:15.434] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:15.435] <TB2> INFO: dacScan step from 75 .. 77
[08:40:34.680] <TB2> INFO: Test took 19245ms.
[08:40:34.756] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:34.759] <TB2> INFO: dacScan step from 78 .. 80
[08:40:54.809] <TB2> INFO: Test took 20050ms.
[08:40:54.892] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:40:54.897] <TB2> INFO: dacScan step from 81 .. 83
[08:41:17.309] <TB2> INFO: Test took 22412ms.
[08:41:17.424] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:17.429] <TB2> INFO: dacScan step from 84 .. 86
[08:41:41.340] <TB2> INFO: Test took 23911ms.
[08:41:41.499] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:41:41.508] <TB2> INFO: dacScan step from 87 .. 89
[08:42:06.121] <TB2> INFO: Test took 24613ms.
[08:42:06.293] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:06.301] <TB2> INFO: dacScan step from 90 .. 92
[08:42:32.166] <TB2> INFO: Test took 25865ms.
[08:42:32.342] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:32.350] <TB2> INFO: dacScan step from 93 .. 95
[08:42:59.212] <TB2> INFO: Test took 26862ms.
[08:42:59.376] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:42:59.384] <TB2> INFO: dacScan step from 96 .. 98
[08:43:26.212] <TB2> INFO: Test took 26827ms.
[08:43:26.385] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:26.393] <TB2> INFO: dacScan step from 99 .. 101
[08:43:53.130] <TB2> INFO: Test took 26737ms.
[08:43:53.307] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:43:53.320] <TB2> INFO: dacScan step from 102 .. 104
[08:44:20.372] <TB2> INFO: Test took 27052ms.
[08:44:20.555] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:20.564] <TB2> INFO: dacScan step from 105 .. 107
[08:44:48.146] <TB2> INFO: Test took 27582ms.
[08:44:48.311] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:44:48.319] <TB2> INFO: dacScan step from 108 .. 110
[08:45:15.671] <TB2> INFO: Test took 27352ms.
[08:45:15.883] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:15.900] <TB2> INFO: dacScan step from 111 .. 113
[08:45:43.353] <TB2> INFO: Test took 27453ms.
[08:45:43.529] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:45:43.538] <TB2> INFO: dacScan step from 114 .. 116
[08:46:11.047] <TB2> INFO: Test took 27509ms.
[08:46:11.228] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:46:11.243] <TB2> INFO: dacScan step from 117 .. 119
[08:46:38.456] <TB2> INFO: Test took 27213ms.
[08:46:38.638] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:46:38.647] <TB2> INFO: dacScan step from 120 .. 122
[08:47:06.056] <TB2> INFO: Test took 27409ms.
[08:47:06.222] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:47:06.230] <TB2> INFO: dacScan step from 123 .. 125
[08:47:32.798] <TB2> INFO: Test took 26568ms.
[08:47:32.980] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:47:32.990] <TB2> INFO: dacScan step from 126 .. 128
[08:47:58.350] <TB2> INFO: Test took 25360ms.
[08:47:58.515] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:47:58.524] <TB2> INFO: dacScan step from 129 .. 131
[08:48:25.918] <TB2> INFO: Test took 27394ms.
[08:48:26.116] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:48:26.125] <TB2> INFO: dacScan step from 132 .. 134
[08:48:52.896] <TB2> INFO: Test took 26770ms.
[08:48:53.063] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:48:53.074] <TB2> INFO: dacScan step from 135 .. 137
[08:49:20.245] <TB2> INFO: Test took 27171ms.
[08:49:20.413] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:49:20.422] <TB2> INFO: dacScan step from 138 .. 140
[08:49:47.680] <TB2> INFO: Test took 27258ms.
[08:49:47.840] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:49:47.848] <TB2> INFO: dacScan step from 141 .. 143
[08:50:13.915] <TB2> INFO: Test took 26066ms.
[08:50:14.082] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:50:14.091] <TB2> INFO: dacScan step from 144 .. 146
[08:50:39.222] <TB2> INFO: Test took 25131ms.
[08:50:39.422] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:50:39.431] <TB2> INFO: dacScan step from 147 .. 149
[08:51:06.665] <TB2> INFO: Test took 27234ms.
[08:51:06.837] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:51:06.846] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:51:08.355] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:51:09.751] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:51:11.214] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:51:12.651] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:51:14.201] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:51:15.711] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:51:17.257] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:51:18.685] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:51:20.152] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:51:21.635] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:51:23.048] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:51:24.482] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:51:25.901] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:51:27.338] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:51:28.954] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[08:51:30.521] <TB2> INFO: PixTestScurves::scurves() done
[08:51:30.521] <TB2> INFO: Vcal mean: 89.35 86.01 81.86 90.09 94.44 91.50 78.14 90.00 83.78 86.53 81.53 82.14 85.05 81.36 69.86 83.93
[08:51:30.521] <TB2> INFO: Vcal RMS: 6.11 5.40 5.30 5.30 6.20 6.33 4.49 5.73 4.64 5.00 4.43 4.68 4.82 4.30 4.78 4.94
[08:51:30.521] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1110 seconds
[08:51:30.593] <TB2> INFO: ######################################################################
[08:51:30.593] <TB2> INFO: PixTestTrim::doTest()
[08:51:30.593] <TB2> INFO: ######################################################################
[08:51:30.595] <TB2> INFO: ----------------------------------------------------------------------
[08:51:30.595] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[08:51:30.595] <TB2> INFO: ----------------------------------------------------------------------
[08:51:30.679] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[08:51:30.679] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[08:51:30.687] <TB2> INFO: dacScan step from 0 .. 19
[08:51:47.341] <TB2> INFO: Test took 16654ms.
[08:51:47.367] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:51:47.367] <TB2> INFO: dacScan step from 20 .. 39
[08:52:04.309] <TB2> INFO: Test took 16942ms.
[08:52:04.336] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:52:04.336] <TB2> INFO: dacScan step from 40 .. 59
[08:52:20.943] <TB2> INFO: Test took 16607ms.
[08:52:20.968] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:52:20.968] <TB2> INFO: dacScan step from 60 .. 79
[08:52:37.482] <TB2> INFO: Test took 16514ms.
[08:52:37.509] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:52:37.510] <TB2> INFO: dacScan step from 80 .. 99
[08:52:55.332] <TB2> INFO: Test took 17822ms.
[08:52:55.400] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:52:55.408] <TB2> INFO: dacScan step from 100 .. 119
[08:53:16.547] <TB2> INFO: Test took 21139ms.
[08:53:16.788] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:53:16.834] <TB2> INFO: dacScan step from 120 .. 139
[08:53:36.805] <TB2> INFO: Test took 19971ms.
[08:53:36.945] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:53:36.970] <TB2> INFO: dacScan step from 140 .. 159
[08:53:54.933] <TB2> INFO: Test took 17963ms.
[08:53:54.993] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:54:17.641] <TB2> INFO: ROC 0 VthrComp = 93
[08:54:17.641] <TB2> INFO: ROC 1 VthrComp = 90
[08:54:17.641] <TB2> INFO: ROC 2 VthrComp = 86
[08:54:17.641] <TB2> INFO: ROC 3 VthrComp = 94
[08:54:17.642] <TB2> INFO: ROC 4 VthrComp = 99
[08:54:17.642] <TB2> INFO: ROC 5 VthrComp = 95
[08:54:17.642] <TB2> INFO: ROC 6 VthrComp = 81
[08:54:17.642] <TB2> INFO: ROC 7 VthrComp = 95
[08:54:17.642] <TB2> INFO: ROC 8 VthrComp = 87
[08:54:17.642] <TB2> INFO: ROC 9 VthrComp = 90
[08:54:17.642] <TB2> INFO: ROC 10 VthrComp = 85
[08:54:17.642] <TB2> INFO: ROC 11 VthrComp = 88
[08:54:17.642] <TB2> INFO: ROC 12 VthrComp = 93
[08:54:17.642] <TB2> INFO: ROC 13 VthrComp = 89
[08:54:17.643] <TB2> INFO: ROC 14 VthrComp = 76
[08:54:17.643] <TB2> INFO: ROC 15 VthrComp = 90
[08:54:17.643] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[08:54:17.643] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[08:54:17.652] <TB2> INFO: dacScan step from 0 .. 19
[08:54:34.341] <TB2> INFO: Test took 16689ms.
[08:54:34.367] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:54:34.367] <TB2> INFO: dacScan step from 20 .. 39
[08:54:51.394] <TB2> INFO: Test took 17027ms.
[08:54:51.428] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:54:51.431] <TB2> INFO: dacScan step from 40 .. 59
[08:55:13.128] <TB2> INFO: Test took 21697ms.
[08:55:13.278] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:55:13.312] <TB2> INFO: dacScan step from 60 .. 79
[08:55:36.814] <TB2> INFO: Test took 23501ms.
[08:55:37.027] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:55:37.081] <TB2> INFO: dacScan step from 80 .. 99
[08:56:00.473] <TB2> INFO: Test took 23392ms.
[08:56:00.636] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:00.687] <TB2> INFO: dacScan step from 100 .. 119
[08:56:24.244] <TB2> INFO: Test took 23557ms.
[08:56:24.408] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:24.458] <TB2> INFO: dacScan step from 120 .. 139
[08:56:47.839] <TB2> INFO: Test took 23381ms.
[08:56:48.007] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:56:48.060] <TB2> INFO: dacScan step from 140 .. 159
[08:57:11.552] <TB2> INFO: Test took 23492ms.
[08:57:11.729] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:57:35.647] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 60.3119 for pixel 16/3 mean/min/max = 45.9243/31.3159/60.5326
[08:57:35.647] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 59.9282 for pixel 0/44 mean/min/max = 46.2671/32.5853/59.9489
[08:57:35.648] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 61.4668 for pixel 1/8 mean/min/max = 46.4349/31.3104/61.5594
[08:57:35.648] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 58.951 for pixel 0/22 mean/min/max = 45.2505/31.4772/59.0237
[08:57:35.648] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 60.7781 for pixel 27/68 mean/min/max = 46.1491/31.4159/60.8823
[08:57:35.649] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 61.5395 for pixel 0/54 mean/min/max = 46.2663/30.9536/61.5791
[08:57:35.649] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 58.6212 for pixel 5/9 mean/min/max = 45.4607/32.1196/58.8018
[08:57:35.650] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 58.9877 for pixel 22/71 mean/min/max = 45.7469/32.23/59.2639
[08:57:35.650] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 57.5582 for pixel 20/70 mean/min/max = 45.1061/32.4192/57.793
[08:57:35.650] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 58.9004 for pixel 49/1 mean/min/max = 45.6814/32.3963/58.9664
[08:57:35.651] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 57.5617 for pixel 2/78 mean/min/max = 45.1098/32.6419/57.5776
[08:57:35.651] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 57.5832 for pixel 11/48 mean/min/max = 45.1059/32.4296/57.7823
[08:57:35.651] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 56.5587 for pixel 14/79 mean/min/max = 44.6653/32.1817/57.1488
[08:57:35.652] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 56.6699 for pixel 13/65 mean/min/max = 44.7423/32.7888/56.6958
[08:57:35.652] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 57.1004 for pixel 15/79 mean/min/max = 45.731/34.3044/57.1577
[08:57:35.652] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 58.778 for pixel 0/11 mean/min/max = 45.7768/32.6238/58.9298
[08:57:35.652] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[08:59:29.303] <TB2> INFO: Test took 113651ms.
[08:59:30.725] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[08:59:30.733] <TB2> INFO: dacScan step from 0 .. 19
[08:59:57.153] <TB2> INFO: Test took 26420ms.
[08:59:57.208] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[08:59:57.209] <TB2> INFO: dacScan step from 20 .. 39
[09:00:28.366] <TB2> INFO: Test took 31157ms.
[09:00:28.684] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:00:28.723] <TB2> INFO: dacScan step from 40 .. 59





[09:01:05.493] <TB2> INFO: Test took 36769ms.
[09:01:05.757] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:05.809] <TB2> INFO: dacScan step from 60 .. 79






[09:01:42.952] <TB2> INFO: Test took 37143ms.
[09:01:43.400] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:01:43.452] <TB2> INFO: dacScan step from 80 .. 99






[09:02:21.946] <TB2> INFO: Test took 38494ms.
[09:02:22.213] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:22.261] <TB2> INFO: dacScan step from 100 .. 119





[09:02:58.802] <TB2> INFO: Test took 36541ms.
[09:02:59.080] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:02:59.134] <TB2> INFO: dacScan step from 120 .. 139





[09:03:36.398] <TB2> INFO: Test took 37264ms.
[09:03:36.680] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:03:36.732] <TB2> INFO: dacScan step from 140 .. 159



[09:04:12.861] <TB2> INFO: Test took 36128ms.
[09:04:13.159] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:13.219] <TB2> INFO: dacScan step from 160 .. 179



[09:04:49.332] <TB2> INFO: Test took 36113ms.
[09:04:49.604] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:04:49.660] <TB2> INFO: dacScan step from 180 .. 199






[09:05:26.663] <TB2> INFO: Test took 37003ms.
[09:05:27.007] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:05:54.428] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.079150 .. 255.000000
[09:05:54.520] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[09:05:54.530] <TB2> INFO: dacScan step from 0 .. 19
[09:06:09.234] <TB2> INFO: Test took 14704ms.
[09:06:09.257] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:09.257] <TB2> INFO: dacScan step from 20 .. 39
[09:06:25.528] <TB2> INFO: Test took 16271ms.
[09:06:25.611] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:25.626] <TB2> INFO: dacScan step from 40 .. 59
[09:06:44.722] <TB2> INFO: Test took 19096ms.
[09:06:44.864] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:06:44.916] <TB2> INFO: dacScan step from 60 .. 79
[09:07:04.745] <TB2> INFO: Test took 19829ms.
[09:07:04.899] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:04.952] <TB2> INFO: dacScan step from 80 .. 99
[09:07:25.124] <TB2> INFO: Test took 20172ms.
[09:07:25.268] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:25.320] <TB2> INFO: dacScan step from 100 .. 119
[09:07:44.344] <TB2> INFO: Test took 19024ms.
[09:07:44.520] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:07:44.579] <TB2> INFO: dacScan step from 120 .. 139
[09:08:04.438] <TB2> INFO: Test took 19859ms.
[09:08:04.582] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:04.634] <TB2> INFO: dacScan step from 140 .. 159
[09:08:24.745] <TB2> INFO: Test took 20111ms.
[09:08:24.909] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:24.967] <TB2> INFO: dacScan step from 160 .. 179
[09:08:45.082] <TB2> INFO: Test took 20115ms.
[09:08:45.259] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:08:45.318] <TB2> INFO: dacScan step from 180 .. 199
[09:09:04.753] <TB2> INFO: Test took 19435ms.
[09:09:04.889] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:09:04.942] <TB2> INFO: dacScan step from 200 .. 219
[09:09:25.148] <TB2> INFO: Test took 20206ms.
[09:09:25.308] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:09:25.363] <TB2> INFO: dacScan step from 220 .. 239
[09:09:45.687] <TB2> INFO: Test took 20324ms.
[09:09:45.824] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:09:45.879] <TB2> INFO: dacScan step from 240 .. 255
[09:10:02.916] <TB2> INFO: Test took 17037ms.
[09:10:03.034] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:10:37.040] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 14.943547 .. 45.541240
[09:10:37.127] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 4 .. 55 (20) hits flags = 16 (plus default)
[09:10:37.136] <TB2> INFO: dacScan step from 4 .. 23
[09:10:51.423] <TB2> INFO: Test took 14287ms.
[09:10:51.443] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:10:51.443] <TB2> INFO: dacScan step from 24 .. 43
[09:11:08.715] <TB2> INFO: Test took 17272ms.
[09:11:08.821] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:08.848] <TB2> INFO: dacScan step from 44 .. 55
[09:11:22.189] <TB2> INFO: Test took 13341ms.
[09:11:22.277] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:39.047] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 20.871796 .. 41.325664
[09:11:39.148] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 10 .. 51 (20) hits flags = 16 (plus default)
[09:11:39.157] <TB2> INFO: dacScan step from 10 .. 29
[09:11:54.139] <TB2> INFO: Test took 14982ms.
[09:11:54.166] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:11:54.166] <TB2> INFO: dacScan step from 30 .. 49
[09:12:13.148] <TB2> INFO: Test took 18982ms.
[09:12:13.290] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:13.330] <TB2> INFO: dacScan step from 50 .. 51
[09:12:17.871] <TB2> INFO: Test took 4540ms.
[09:12:17.895] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:35.251] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 2.799433 .. 40.653237
[09:12:35.333] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 2 .. 50 (20) hits flags = 16 (plus default)
[09:12:35.342] <TB2> INFO: dacScan step from 2 .. 21
[09:12:50.212] <TB2> INFO: Test took 14870ms.
[09:12:50.235] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:12:50.235] <TB2> INFO: dacScan step from 22 .. 41
[09:13:06.099] <TB2> INFO: Test took 15864ms.
[09:13:06.188] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:06.208] <TB2> INFO: dacScan step from 42 .. 50
[09:13:16.841] <TB2> INFO: Test took 10633ms.
[09:13:16.909] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:31.659] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[09:13:31.659] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[09:13:31.667] <TB2> INFO: dacScan step from 15 .. 34
[09:13:58.232] <TB2> INFO: Test took 26565ms.
[09:13:58.306] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:13:58.314] <TB2> INFO: dacScan step from 35 .. 54






[09:14:34.745] <TB2> INFO: Test took 36431ms.
[09:14:35.069] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:35.115] <TB2> INFO: dacScan step from 55 .. 55
[09:14:39.833] <TB2> INFO: Test took 4718ms.
[09:14:39.852] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:14:53.811] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:14:53.811] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:14:53.811] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:14:53.811] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:14:53.811] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:14:53.811] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:14:53.811] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:14:53.811] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:14:53.811] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:14:53.812] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:14:53.812] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:14:53.812] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:14:53.812] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:14:53.812] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:14:53.812] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:14:53.812] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:14:53.812] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters35_C0.dat
[09:14:53.818] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters35_C1.dat
[09:14:53.824] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters35_C2.dat
[09:14:53.830] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters35_C3.dat
[09:14:53.835] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters35_C4.dat
[09:14:53.841] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters35_C5.dat
[09:14:53.847] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters35_C6.dat
[09:14:53.853] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters35_C7.dat
[09:14:53.859] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters35_C8.dat
[09:14:53.865] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters35_C9.dat
[09:14:53.870] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters35_C10.dat
[09:14:53.876] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters35_C11.dat
[09:14:53.882] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters35_C12.dat
[09:14:53.888] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters35_C13.dat
[09:14:53.894] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters35_C14.dat
[09:14:53.900] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//trimParameters35_C15.dat
[09:14:53.905] <TB2> INFO: PixTestTrim::trimTest() done
[09:14:53.905] <TB2> INFO: vtrim: 117 106 124 110 131 111 105 118 115 112 105 109 102 106 98 101
[09:14:53.905] <TB2> INFO: vthrcomp: 93 90 86 94 99 95 81 95 87 90 85 88 93 89 76 90
[09:14:53.905] <TB2> INFO: vcal mean: 35.00 35.02 35.00 35.04 34.97 35.04 35.00 35.02 35.01 35.04 34.95 35.05 35.05 34.95 35.03 35.01
[09:14:53.905] <TB2> INFO: vcal RMS: 1.08 1.00 1.16 0.98 1.06 1.10 1.18 0.95 0.97 1.00 0.94 0.99 0.92 0.93 0.89 0.99
[09:14:53.905] <TB2> INFO: bits mean: 9.82 9.15 9.76 9.60 10.13 9.51 9.64 9.70 9.85 9.93 9.78 9.91 9.81 9.56 9.26 9.40
[09:14:53.905] <TB2> INFO: bits RMS: 2.63 2.77 2.59 2.74 2.40 2.80 2.61 2.55 2.45 2.43 2.47 2.49 2.56 2.57 2.45 2.67
[09:14:53.910] <TB2> INFO: ----------------------------------------------------------------------
[09:14:53.910] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 255 240 150 100
[09:14:53.910] <TB2> INFO: ----------------------------------------------------------------------
[09:14:53.912] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[09:14:53.920] <TB2> INFO: dacScan step from 0 .. 19
[09:15:19.671] <TB2> INFO: Test took 25751ms.
[09:15:19.710] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:15:19.710] <TB2> INFO: dacScan step from 20 .. 39
[09:15:45.864] <TB2> INFO: Test took 26154ms.
[09:15:45.920] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:15:45.923] <TB2> INFO: dacScan step from 40 .. 59
[09:16:21.508] <TB2> INFO: Test took 35585ms.
[09:16:21.805] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:21.848] <TB2> INFO: dacScan step from 60 .. 79



[09:16:58.359] <TB2> INFO: Test took 36511ms.
[09:16:58.629] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:16:58.674] <TB2> INFO: dacScan step from 80 .. 99



[09:17:37.695] <TB2> INFO: Test took 39021ms.
[09:17:37.986] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:17:38.041] <TB2> INFO: dacScan step from 100 .. 119



[09:18:17.035] <TB2> INFO: Test took 38994ms.
[09:18:17.311] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:17.365] <TB2> INFO: dacScan step from 120 .. 139



[09:18:54.686] <TB2> INFO: Test took 37321ms.
[09:18:54.961] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:18:55.022] <TB2> INFO: dacScan step from 140 .. 159



[09:19:33.868] <TB2> INFO: Test took 38846ms.
[09:19:34.152] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:19:34.205] <TB2> INFO: dacScan step from 160 .. 179



[09:20:10.693] <TB2> INFO: Test took 36488ms.
[09:20:10.975] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:20:11.028] <TB2> INFO: dacScan step from 180 .. 199



[09:20:51.482] <TB2> INFO: Test took 40454ms.
[09:20:51.768] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:16.660] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 78 (20) hits flags = 16 (plus default)
[09:21:16.668] <TB2> INFO: dacScan step from 0 .. 19
[09:21:42.808] <TB2> INFO: Test took 26140ms.
[09:21:42.843] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:21:42.843] <TB2> INFO: dacScan step from 20 .. 39
[09:22:08.712] <TB2> INFO: Test took 25868ms.
[09:22:08.804] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:08.813] <TB2> INFO: dacScan step from 40 .. 59



[09:22:46.589] <TB2> INFO: Test took 37776ms.
[09:22:46.898] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:22:46.975] <TB2> INFO: dacScan step from 60 .. 78



[09:23:24.627] <TB2> INFO: Test took 37652ms.
[09:23:24.904] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:23:42.627] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 72 (20) hits flags = 16 (plus default)
[09:23:42.637] <TB2> INFO: dacScan step from 0 .. 19
[09:24:08.270] <TB2> INFO: Test took 25633ms.
[09:24:08.308] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:08.308] <TB2> INFO: dacScan step from 20 .. 39
[09:24:37.137] <TB2> INFO: Test took 28829ms.
[09:24:37.275] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:24:37.290] <TB2> INFO: dacScan step from 40 .. 59






[09:25:13.862] <TB2> INFO: Test took 36571ms.
[09:25:14.139] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:14.192] <TB2> INFO: dacScan step from 60 .. 72
[09:25:41.079] <TB2> INFO: Test took 26886ms.
[09:25:41.280] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:25:58.926] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 68 (20) hits flags = 16 (plus default)
[09:25:58.934] <TB2> INFO: dacScan step from 0 .. 19
[09:26:24.252] <TB2> INFO: Test took 25317ms.
[09:26:24.294] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:26:24.295] <TB2> INFO: dacScan step from 20 .. 39
[09:26:54.391] <TB2> INFO: Test took 30096ms.
[09:26:54.553] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:26:54.572] <TB2> INFO: dacScan step from 40 .. 59






[09:27:32.560] <TB2> INFO: Test took 37988ms.
[09:27:32.845] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:27:32.895] <TB2> INFO: dacScan step from 60 .. 68
[09:27:51.881] <TB2> INFO: Test took 18986ms.
[09:27:52.027] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:07.885] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 65 (20) hits flags = 16 (plus default)
[09:28:07.893] <TB2> INFO: dacScan step from 0 .. 19
[09:28:32.936] <TB2> INFO: Test took 25043ms.
[09:28:32.975] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:28:32.976] <TB2> INFO: dacScan step from 20 .. 39
[09:29:05.142] <TB2> INFO: Test took 32166ms.
[09:29:05.421] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:05.445] <TB2> INFO: dacScan step from 40 .. 59




[09:29:42.028] <TB2> INFO: Test took 36583ms.
[09:29:42.304] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:29:42.354] <TB2> INFO: dacScan step from 60 .. 65
[09:29:55.905] <TB2> INFO: Test took 13551ms.
[09:29:56.013] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:12.500] <TB2> INFO: PixTestTrim::trimBitTest() done
[09:30:12.501] <TB2> INFO: PixTestTrim::doTest() done, duration: 2321 seconds
[09:30:13.195] <TB2> INFO: ######################################################################
[09:30:13.195] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[09:30:13.195] <TB2> INFO: ######################################################################
[09:30:16.934] <TB2> INFO: Test took 3737ms.
[09:30:16.955] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:20.937] <TB2> INFO: Test took 3785ms.
[09:30:21.038] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:24.904] <TB2> INFO: Test took 3853ms.
[09:30:24.979] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:30:24.985] <TB2> INFO: The DUT currently contains the following objects:
[09:30:24.985] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:30:24.985] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:30:24.985] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:30:24.985] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:30:24.985] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:24.985] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:24.985] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:24.985] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:24.985] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:24.985] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:24.985] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:24.985] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:24.986] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:24.986] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:24.986] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:24.986] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:24.986] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:24.986] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:24.986] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:24.986] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:26.110] <TB2> INFO: Test took 1124ms.
[09:30:26.111] <TB2> INFO: The DUT currently contains the following objects:
[09:30:26.111] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:30:26.111] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:30:26.111] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:30:26.112] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:30:26.112] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:26.112] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:26.112] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:26.112] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:26.112] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:26.112] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:26.112] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:26.112] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:26.112] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:26.112] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:26.112] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:26.112] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:26.112] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:26.112] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:26.112] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:26.112] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:27.234] <TB2> INFO: Test took 1122ms.
[09:30:27.236] <TB2> INFO: The DUT currently contains the following objects:
[09:30:27.236] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:30:27.236] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:30:27.236] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:30:27.236] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:30:27.236] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:27.236] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:27.236] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:27.236] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:27.236] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:27.236] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:27.236] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:27.236] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:27.236] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:27.236] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:27.236] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:27.237] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:27.237] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:27.237] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:27.237] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:27.237] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:28.384] <TB2> INFO: Test took 1147ms.
[09:30:28.386] <TB2> INFO: The DUT currently contains the following objects:
[09:30:28.386] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:30:28.386] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:30:28.386] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:30:28.386] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:30:28.386] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:28.386] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:28.386] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:28.386] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:28.386] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:28.386] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:28.386] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:28.386] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:28.386] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:28.386] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:28.386] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:28.386] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:28.386] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:28.386] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:28.386] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:28.386] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:29.492] <TB2> INFO: Test took 1106ms.
[09:30:29.493] <TB2> INFO: The DUT currently contains the following objects:
[09:30:29.493] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:30:29.493] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:30:29.493] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:30:29.493] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:30:29.493] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:29.494] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:29.494] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:29.494] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:29.494] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:29.494] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:29.494] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:29.494] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:29.494] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:29.494] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:29.494] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:29.494] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:29.494] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:29.494] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:29.494] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:29.494] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:30.601] <TB2> INFO: Test took 1107ms.
[09:30:30.602] <TB2> INFO: The DUT currently contains the following objects:
[09:30:30.602] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:30:30.602] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:30:30.602] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:30:30.602] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:30:30.602] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:30.602] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:30.602] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:30.602] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:30.602] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:30.602] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:30.602] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:30.602] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:30.602] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:30.603] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:30.603] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:30.603] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:30.603] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:30.603] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:30.603] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:30.603] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:31.724] <TB2> INFO: Test took 1121ms.
[09:30:31.725] <TB2> INFO: The DUT currently contains the following objects:
[09:30:31.725] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:30:31.725] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:30:31.725] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:30:31.725] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:30:31.726] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:31.726] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:31.726] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:31.726] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:31.726] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:31.726] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:31.726] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:31.726] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:31.726] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:31.726] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:31.726] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:31.726] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:31.726] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:31.726] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:31.726] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:31.726] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:32.836] <TB2> INFO: Test took 1110ms.
[09:30:32.837] <TB2> INFO: The DUT currently contains the following objects:
[09:30:32.837] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:30:32.837] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:30:32.837] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:30:32.837] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:30:32.837] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:32.837] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:32.837] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:32.837] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:32.837] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:32.838] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:32.838] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:32.838] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:32.838] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:32.838] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:32.838] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:32.838] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:32.838] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:32.838] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:32.838] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:32.838] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:33.976] <TB2> INFO: Test took 1138ms.
[09:30:33.977] <TB2> INFO: The DUT currently contains the following objects:
[09:30:33.977] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:30:33.977] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:30:33.977] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:30:33.977] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:30:33.977] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:33.977] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:33.977] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:33.977] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:33.977] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:33.978] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:33.978] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:33.978] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:33.978] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:33.978] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:33.978] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:33.978] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:33.978] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:33.978] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:33.978] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:33.978] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:35.099] <TB2> INFO: Test took 1121ms.
[09:30:35.101] <TB2> INFO: The DUT currently contains the following objects:
[09:30:35.101] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:30:35.101] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:30:35.101] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:30:35.101] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:30:35.101] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:35.101] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:35.101] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:35.101] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:35.101] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:35.101] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:35.101] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:35.101] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:35.101] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:35.101] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:35.101] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:35.101] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:35.101] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:35.101] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:35.101] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:35.101] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:36.221] <TB2> INFO: Test took 1120ms.
[09:30:36.222] <TB2> INFO: The DUT currently contains the following objects:
[09:30:36.222] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:30:36.222] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:30:36.222] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:30:36.222] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:30:36.222] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:36.222] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:36.222] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:36.222] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:36.222] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:36.222] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:36.222] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:36.222] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:36.222] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:36.223] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:36.223] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:36.223] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:36.223] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:36.223] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:36.223] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:36.223] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:37.357] <TB2> INFO: Test took 1134ms.
[09:30:37.358] <TB2> INFO: The DUT currently contains the following objects:
[09:30:37.358] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:30:37.358] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:30:37.358] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:30:37.358] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:30:37.358] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:37.358] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:37.358] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:37.358] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:37.358] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:37.359] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:37.359] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:37.359] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:37.359] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:37.359] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:37.359] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:37.359] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:37.359] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:37.359] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:37.359] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:37.359] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:38.494] <TB2> INFO: Test took 1135ms.
[09:30:38.496] <TB2> INFO: The DUT currently contains the following objects:
[09:30:38.496] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:30:38.496] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:30:38.496] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:30:38.496] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:30:38.496] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:38.496] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:38.496] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:38.496] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:38.496] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:38.496] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:38.496] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:38.496] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:38.496] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:38.496] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:38.496] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:38.496] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:38.496] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:38.496] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:38.496] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:38.496] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:39.619] <TB2> INFO: Test took 1123ms.
[09:30:39.621] <TB2> INFO: The DUT currently contains the following objects:
[09:30:39.621] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:30:39.621] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:30:39.621] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:30:39.621] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:30:39.621] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:39.621] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:39.621] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:39.621] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:39.621] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:39.621] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:39.621] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:39.621] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:39.621] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:39.621] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:39.621] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:39.622] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:39.622] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:39.622] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:39.622] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:39.622] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:40.739] <TB2> INFO: Test took 1117ms.
[09:30:40.739] <TB2> INFO: The DUT currently contains the following objects:
[09:30:40.739] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:30:40.739] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:30:40.740] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:30:40.740] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:30:40.740] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:40.740] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:40.740] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:40.740] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:40.740] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:40.740] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:40.740] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:40.740] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:40.740] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:40.740] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:40.740] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:40.740] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:40.740] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:40.740] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:40.740] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:40.740] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:41.863] <TB2> INFO: Test took 1123ms.
[09:30:41.864] <TB2> INFO: The DUT currently contains the following objects:
[09:30:41.864] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[09:30:41.864] <TB2> INFO: TBM Core alpha (0): 7 registers set
[09:30:41.864] <TB2> INFO: TBM Core beta (1): 7 registers set
[09:30:41.864] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[09:30:41.865] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:41.865] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:41.865] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:41.865] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:41.865] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:41.865] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:41.865] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:41.865] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:41.865] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:41.865] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:41.865] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:41.865] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:41.865] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:41.865] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:41.865] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:41.865] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[09:30:42.973] <TB2> INFO: Test took 1108ms.
[09:30:42.977] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:35:14.625] <TB2> INFO: Test took 271648ms.
[09:35:16.012] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:39:53.431] <TB2> INFO: Test took 277419ms.
[09:39:55.158] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:39:55.169] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:39:55.180] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:39:55.190] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[09:39:55.201] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:39:55.211] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:39:55.222] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:39:55.233] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:39:55.243] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:39:55.254] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:39:55.265] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:39:55.275] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:39:55.286] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:39:55.296] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:39:55.307] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:39:55.318] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:39:55.328] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[09:39:55.371] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C0.dat
[09:39:55.371] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C1.dat
[09:39:55.372] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C2.dat
[09:39:55.372] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C3.dat
[09:39:55.372] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C4.dat
[09:39:55.372] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C5.dat
[09:39:55.372] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C6.dat
[09:39:55.373] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C7.dat
[09:39:55.373] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C8.dat
[09:39:55.373] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C9.dat
[09:39:55.374] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C10.dat
[09:39:55.374] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C11.dat
[09:39:55.374] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C12.dat
[09:39:55.374] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C13.dat
[09:39:55.375] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C14.dat
[09:39:55.375] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//dacParameters35_C15.dat
[09:39:59.060] <TB2> INFO: Test took 3682ms.
[09:40:03.155] <TB2> INFO: Test took 3827ms.
[09:40:07.225] <TB2> INFO: Test took 3798ms.
[09:40:07.497] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:08.462] <TB2> INFO: Test took 965ms.
[09:40:08.466] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:09.588] <TB2> INFO: Test took 1122ms.
[09:40:09.591] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:10.704] <TB2> INFO: Test took 1113ms.
[09:40:10.708] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:11.829] <TB2> INFO: Test took 1121ms.
[09:40:11.833] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:12.953] <TB2> INFO: Test took 1120ms.
[09:40:12.956] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:14.078] <TB2> INFO: Test took 1122ms.
[09:40:14.081] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:15.203] <TB2> INFO: Test took 1122ms.
[09:40:15.206] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:16.316] <TB2> INFO: Test took 1110ms.
[09:40:16.319] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:17.459] <TB2> INFO: Test took 1140ms.
[09:40:17.464] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:18.613] <TB2> INFO: Test took 1150ms.
[09:40:18.616] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:19.728] <TB2> INFO: Test took 1112ms.
[09:40:19.732] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:20.855] <TB2> INFO: Test took 1123ms.
[09:40:20.860] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:21.981] <TB2> INFO: Test took 1122ms.
[09:40:21.984] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:23.105] <TB2> INFO: Test took 1121ms.
[09:40:23.108] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:24.215] <TB2> INFO: Test took 1107ms.
[09:40:24.218] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:25.327] <TB2> INFO: Test took 1109ms.
[09:40:25.331] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:26.443] <TB2> INFO: Test took 1112ms.
[09:40:26.447] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:27.575] <TB2> INFO: Test took 1128ms.
[09:40:27.579] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:28.717] <TB2> INFO: Test took 1138ms.
[09:40:28.720] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:29.827] <TB2> INFO: Test took 1107ms.
[09:40:29.831] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:30.980] <TB2> INFO: Test took 1150ms.
[09:40:30.983] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:32.105] <TB2> INFO: Test took 1122ms.
[09:40:32.108] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:33.215] <TB2> INFO: Test took 1107ms.
[09:40:33.219] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:34.345] <TB2> INFO: Test took 1127ms.
[09:40:34.349] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:35.472] <TB2> INFO: Test took 1123ms.
[09:40:35.476] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:36.596] <TB2> INFO: Test took 1121ms.
[09:40:36.600] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:37.751] <TB2> INFO: Test took 1151ms.
[09:40:37.754] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:38.889] <TB2> INFO: Test took 1135ms.
[09:40:38.892] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:40.011] <TB2> INFO: Test took 1120ms.
[09:40:40.015] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:41.140] <TB2> INFO: Test took 1126ms.
[09:40:41.144] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:42.264] <TB2> INFO: Test took 1121ms.
[09:40:42.267] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[09:40:43.389] <TB2> INFO: Test took 1122ms.
[09:40:43.919] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 630 seconds
[09:40:43.919] <TB2> INFO: PH scale (per ROC): 77 86 80 85 80 79 75 84 80 74 90 75 78 89 82 84
[09:40:43.919] <TB2> INFO: PH offset (per ROC): 166 167 169 157 155 173 160 166 164 174 146 150 157 135 160 145
[09:40:44.096] <TB2> INFO: ######################################################################
[09:40:44.096] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[09:40:44.096] <TB2> INFO: ######################################################################
[09:40:44.106] <TB2> INFO: scanning low vcal = 50
[09:40:48.827] <TB2> INFO: Test took 4721ms.
[09:40:48.924] <TB2> INFO: scanning low vcal = 100
[09:40:53.677] <TB2> INFO: Test took 4753ms.
[09:40:53.738] <TB2> INFO: scanning low vcal = 150
[09:40:58.445] <TB2> INFO: Test took 4707ms.
[09:40:58.542] <TB2> INFO: scanning low vcal = 200
[09:41:03.270] <TB2> INFO: Test took 4728ms.
[09:41:03.353] <TB2> INFO: scanning low vcal = 250
[09:41:08.045] <TB2> INFO: Test took 4692ms.
[09:41:08.142] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[09:41:12.958] <TB2> INFO: Test took 4816ms.
[09:41:13.019] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[09:41:17.814] <TB2> INFO: Test took 4795ms.
[09:41:17.906] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[09:41:22.611] <TB2> INFO: Test took 4704ms.
[09:41:22.675] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[09:41:27.364] <TB2> INFO: Test took 4689ms.
[09:41:27.419] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[09:41:31.986] <TB2> INFO: Test took 4566ms.
[09:41:32.291] <TB2> INFO: PixTestGainPedestal::measure() done
[09:41:55.747] <TB2> INFO: PixTestGainPedestal::fit() done
[09:41:55.747] <TB2> INFO: non-linearity mean: 0.951 0.955 0.951 0.957 0.957 0.958 0.954 0.951 0.954 0.956 0.968 0.951 0.957 0.955 0.955 0.954
[09:41:55.747] <TB2> INFO: non-linearity RMS: 0.006 0.006 0.006 0.005 0.005 0.005 0.006 0.006 0.007 0.006 0.004 0.007 0.005 0.005 0.006 0.006
[09:41:55.748] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[09:41:55.779] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[09:41:55.801] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[09:41:55.820] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[09:41:55.839] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[09:41:55.857] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[09:41:55.876] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[09:41:55.895] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[09:41:55.914] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[09:41:55.933] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[09:41:55.952] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[09:41:55.971] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[09:41:55.989] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[09:41:56.009] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[09:41:56.028] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[09:41:56.048] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2027_FullQualification_2015-07-07_10h14m_1436256858//000_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[09:41:56.067] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 71 seconds
[09:41:56.073] <TB2> INFO: enter test to run
[09:41:56.073] <TB2> INFO: test: exit no parameter change
[09:41:56.522] <TB2> QUIET: Connection to board 0 closed.
[09:41:56.602] <TB2> INFO: pXar: this is the end, my friend