[13:28:18.792] <TB0> INFO: *** Welcome to pxar ***
[13:28:18.793] <TB0> INFO: *** Today: 2015/07/13
[13:28:18.793] <TB0> INFO: readRocDacs: /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C15.dat
[13:28:18.793] <TB0> INFO: readTbmDacs: /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//tbmParameters_C0b.dat
[13:28:18.793] <TB0> INFO: readMaskFile: /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//defaultMaskFile.dat
[13:28:18.793] <TB0> INFO: readTrimFile: /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters_C15.dat
[13:28:18.859] <TB0> INFO: clk: 4
[13:28:18.859] <TB0> INFO: ctr: 4
[13:28:18.859] <TB0> INFO: sda: 19
[13:28:18.859] <TB0> INFO: tin: 9
[13:28:18.859] <TB0> INFO: level: 15
[13:28:18.859] <TB0> INFO: triggerdelay: 0
[13:28:18.859] <TB0> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[13:28:18.859] <TB0> INFO: Log level: INFO
[13:28:18.866] <TB0> INFO: Found DTB DTB_WWVASW
[13:28:18.877] <TB0> QUIET: Connection to board DTB_WWVASW opened.
[13:28:18.880] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[13:28:18.882] <TB0> INFO: RPC call hashes of host and DTB match: 447413373
[13:28:20.423] <TB0> INFO: DUT info:
[13:28:20.423] <TB0> INFO: The DUT currently contains the following objects:
[13:28:20.423] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[13:28:20.423] <TB0> INFO: TBM Core alpha (0): 7 registers set
[13:28:20.423] <TB0> INFO: TBM Core beta (1): 7 registers set
[13:28:20.423] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[13:28:20.423] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[13:28:20.423] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[13:28:20.423] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[13:28:20.423] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[13:28:20.423] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[13:28:20.423] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[13:28:20.423] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[13:28:20.423] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[13:28:20.423] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[13:28:20.423] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[13:28:20.423] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[13:28:20.423] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[13:28:20.423] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[13:28:20.423] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[13:28:20.423] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[13:28:20.423] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[13:28:20.824] <TB0> INFO: enter 'restricted' command line mode
[13:28:20.824] <TB0> INFO: enter test to run
[13:28:20.824] <TB0> INFO: test: pretest no parameter change
[13:28:20.824] <TB0> INFO: running: pretest
[13:28:20.828] <TB0> INFO: ######################################################################
[13:28:20.828] <TB0> INFO: PixTestPretest::doTest()
[13:28:20.828] <TB0> INFO: ######################################################################
[13:28:20.829] <TB0> INFO: ----------------------------------------------------------------------
[13:28:20.829] <TB0> INFO: PixTestPretest::programROC()
[13:28:20.829] <TB0> INFO: ----------------------------------------------------------------------
[13:28:38.847] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[13:28:38.847] <TB0> INFO: IA differences per ROC: 16.9 19.3 17.7 19.3 21.7 19.3 17.7 20.1 20.1 20.9 19.3 18.5 20.1 17.7 20.9 20.1
[13:28:38.906] <TB0> INFO: ----------------------------------------------------------------------
[13:28:38.906] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[13:28:38.906] <TB0> INFO: ----------------------------------------------------------------------
[13:28:43.069] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 389.1 mA = 24.3188 mA/ROC
[13:28:43.071] <TB0> INFO: ----------------------------------------------------------------------
[13:28:43.071] <TB0> INFO: PixTestPretest::findWorkingPixel()
[13:28:43.071] <TB0> INFO: ----------------------------------------------------------------------









[13:28:50.761] <TB0> INFO: Test took 7687ms.
[13:28:51.035] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[13:28:51.065] <TB0> INFO: ----------------------------------------------------------------------
[13:28:51.065] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[13:28:51.065] <TB0> INFO: ----------------------------------------------------------------------










[13:28:58.796] <TB0> INFO: Test took 7727ms.
[13:28:59.077] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[13:28:59.077] <TB0> INFO: CalDel: 138 142 129 112 146 136 125 109 163 129 138 131 140 130 143 145
[13:28:59.077] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[13:28:59.080] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C0.dat
[13:28:59.080] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C1.dat
[13:28:59.081] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C2.dat
[13:28:59.081] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C3.dat
[13:28:59.081] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C4.dat
[13:28:59.081] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C5.dat
[13:28:59.081] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C6.dat
[13:28:59.081] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C7.dat
[13:28:59.081] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C8.dat
[13:28:59.081] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C9.dat
[13:28:59.081] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C10.dat
[13:28:59.081] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C11.dat
[13:28:59.082] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C12.dat
[13:28:59.082] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C13.dat
[13:28:59.082] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C14.dat
[13:28:59.082] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters_C15.dat
[13:28:59.082] <TB0> INFO: PixTestPretest::doTest() done, duration: 38 seconds
[13:28:59.164] <TB0> INFO: enter test to run
[13:28:59.164] <TB0> INFO: test: fulltest no parameter change
[13:28:59.164] <TB0> INFO: running: fulltest
[13:28:59.164] <TB0> INFO: ######################################################################
[13:28:59.164] <TB0> INFO: PixTestFullTest::doTest()
[13:28:59.164] <TB0> INFO: ######################################################################
[13:28:59.166] <TB0> INFO: ######################################################################
[13:28:59.166] <TB0> INFO: PixTestAlive::doTest()
[13:28:59.166] <TB0> INFO: ######################################################################
[13:28:59.167] <TB0> INFO: ----------------------------------------------------------------------
[13:28:59.167] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:28:59.167] <TB0> INFO: ----------------------------------------------------------------------
[13:29:02.411] <TB0> INFO: Test took 3242ms.
[13:29:02.428] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:02.649] <TB0> INFO: PixTestAlive::aliveTest() done
[13:29:02.649] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:29:02.650] <TB0> INFO: ----------------------------------------------------------------------
[13:29:02.650] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:29:02.650] <TB0> INFO: ----------------------------------------------------------------------
[13:29:05.269] <TB0> INFO: Test took 2617ms.
[13:29:05.270] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:05.271] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[13:29:05.491] <TB0> INFO: PixTestAlive::maskTest() done
[13:29:05.491] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:29:05.492] <TB0> INFO: ----------------------------------------------------------------------
[13:29:05.492] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[13:29:05.492] <TB0> INFO: ----------------------------------------------------------------------
[13:29:08.734] <TB0> INFO: Test took 3241ms.
[13:29:08.751] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:08.974] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[13:29:08.974] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[13:29:08.974] <TB0> INFO: PixTestAlive::doTest() done, duration: 9 seconds
[13:29:08.981] <TB0> INFO: ######################################################################
[13:29:08.981] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[13:29:08.981] <TB0> INFO: ######################################################################
[13:29:08.983] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[13:29:08.994] <TB0> INFO: dacScan step from 0 .. 29







[13:29:29.048] <TB0> INFO: Test took 20054ms.
[13:29:29.078] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:29.079] <TB0> INFO: dacScan step from 30 .. 59
[13:29:50.018] <TB0> INFO: Test took 20939ms.
[13:29:50.094] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:50.107] <TB0> INFO: dacScan step from 60 .. 89
[13:30:16.421] <TB0> INFO: Test took 26314ms.
[13:30:16.658] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:16.728] <TB0> INFO: dacScan step from 90 .. 119
[13:30:43.278] <TB0> INFO: Test took 26550ms.
[13:30:43.510] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:43.582] <TB0> INFO: dacScan step from 120 .. 149
[13:31:07.139] <TB0> INFO: Test took 23557ms.
[13:31:07.308] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:28.452] <TB0> INFO: PixTestBBMap::doTest() done, duration: 139 seconds
[13:31:28.452] <TB0> INFO: number of dead bumps (per ROC): 0 0 0 0 0 5 10 9 1 0 0 0 0 0 0 0
[13:31:28.452] <TB0> INFO: separation cut (per ROC): 87 76 88 92 88 89 88 88 84 97 95 84 76 89 89 86
[13:31:28.519] <TB0> INFO: ######################################################################
[13:31:28.519] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50
[13:31:28.519] <TB0> INFO: ######################################################################
[13:31:28.519] <TB0> INFO: ----------------------------------------------------------------------
[13:31:28.519] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[13:31:28.519] <TB0> INFO: ----------------------------------------------------------------------
[13:31:28.519] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[13:31:28.527] <TB0> INFO: dacScan step from 0 .. 3
[13:31:45.794] <TB0> INFO: Test took 17267ms.
[13:31:45.819] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:45.819] <TB0> INFO: dacScan step from 4 .. 7
[13:32:03.097] <TB0> INFO: Test took 17278ms.
[13:32:03.122] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:03.122] <TB0> INFO: dacScan step from 8 .. 11
[13:32:20.415] <TB0> INFO: Test took 17293ms.
[13:32:20.440] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:20.440] <TB0> INFO: dacScan step from 12 .. 15


[13:32:37.761] <TB0> INFO: Test took 17321ms.
[13:32:37.786] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:37.786] <TB0> INFO: dacScan step from 16 .. 19
[13:32:55.093] <TB0> INFO: Test took 17307ms.
[13:32:55.117] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:55.118] <TB0> INFO: dacScan step from 20 .. 23
[13:33:12.384] <TB0> INFO: Test took 17266ms.
[13:33:12.409] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:12.409] <TB0> INFO: dacScan step from 24 .. 27
[13:33:29.637] <TB0> INFO: Test took 17228ms.
[13:33:29.662] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:29.662] <TB0> INFO: dacScan step from 28 .. 31
[13:33:46.828] <TB0> INFO: Test took 17166ms.
[13:33:46.853] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:46.853] <TB0> INFO: dacScan step from 32 .. 35
[13:34:04.036] <TB0> INFO: Test took 17183ms.
[13:34:04.061] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:04.061] <TB0> INFO: dacScan step from 36 .. 39
[13:34:21.266] <TB0> INFO: Test took 17205ms.
[13:34:21.290] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:21.290] <TB0> INFO: dacScan step from 40 .. 43
[13:34:38.545] <TB0> INFO: Test took 17254ms.
[13:34:38.570] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:38.570] <TB0> INFO: dacScan step from 44 .. 47
[13:34:55.807] <TB0> INFO: Test took 17237ms.
[13:34:55.832] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:55.832] <TB0> INFO: dacScan step from 48 .. 51
[13:35:13.073] <TB0> INFO: Test took 17241ms.
[13:35:13.098] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:13.098] <TB0> INFO: dacScan step from 52 .. 55
[13:35:30.320] <TB0> INFO: Test took 17222ms.
[13:35:30.345] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:30.345] <TB0> INFO: dacScan step from 56 .. 59
[13:35:47.646] <TB0> INFO: Test took 17301ms.
[13:35:47.671] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:47.671] <TB0> INFO: dacScan step from 60 .. 63
[13:36:04.922] <TB0> INFO: Test took 17251ms.
[13:36:04.947] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:04.947] <TB0> INFO: dacScan step from 64 .. 67
[13:36:22.225] <TB0> INFO: Test took 17278ms.
[13:36:22.250] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:22.250] <TB0> INFO: dacScan step from 68 .. 71
[13:36:39.481] <TB0> INFO: Test took 17231ms.
[13:36:39.508] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:39.508] <TB0> INFO: dacScan step from 72 .. 75
[13:36:56.854] <TB0> INFO: Test took 17346ms.
[13:36:56.885] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:56.886] <TB0> INFO: dacScan step from 76 .. 79
[13:37:14.572] <TB0> INFO: Test took 17686ms.
[13:37:14.619] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:14.621] <TB0> INFO: dacScan step from 80 .. 83
[13:37:33.959] <TB0> INFO: Test took 19338ms.
[13:37:34.059] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:34.065] <TB0> INFO: dacScan step from 84 .. 87
[13:37:55.243] <TB0> INFO: Test took 21178ms.
[13:37:55.386] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:55.394] <TB0> INFO: dacScan step from 88 .. 91



[13:38:18.121] <TB0> INFO: Test took 22727ms.
[13:38:18.299] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:18.307] <TB0> INFO: dacScan step from 92 .. 95
[13:38:42.787] <TB0> INFO: Test took 24480ms.
[13:38:42.995] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:43.005] <TB0> INFO: dacScan step from 96 .. 99


[13:39:08.506] <TB0> INFO: Test took 25501ms.
[13:39:08.717] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:08.727] <TB0> INFO: dacScan step from 100 .. 103








[13:39:34.467] <TB0> INFO: Test took 25740ms.
[13:39:34.675] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:34.686] <TB0> INFO: dacScan step from 104 .. 107



[13:40:00.754] <TB0> INFO: Test took 26068ms.
[13:40:00.961] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:00.972] <TB0> INFO: dacScan step from 108 .. 111



[13:40:27.037] <TB0> INFO: Test took 26065ms.
[13:40:27.242] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:27.253] <TB0> INFO: dacScan step from 112 .. 115








[13:40:52.990] <TB0> INFO: Test took 25737ms.
[13:40:53.197] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:53.207] <TB0> INFO: dacScan step from 116 .. 119









[13:41:19.084] <TB0> INFO: Test took 25877ms.
[13:41:19.287] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:19.296] <TB0> INFO: dacScan step from 120 .. 123
[13:41:45.271] <TB0> INFO: Test took 25975ms.
[13:41:45.478] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:45.487] <TB0> INFO: dacScan step from 124 .. 127
[13:42:11.468] <TB0> INFO: Test took 25981ms.
[13:42:11.676] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:11.685] <TB0> INFO: dacScan step from 128 .. 131






[13:42:37.648] <TB0> INFO: Test took 25963ms.
[13:42:37.851] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:37.861] <TB0> INFO: dacScan step from 132 .. 135
[13:43:03.797] <TB0> INFO: Test took 25936ms.
[13:43:04.004] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:04.014] <TB0> INFO: dacScan step from 136 .. 139
[13:43:29.972] <TB0> INFO: Test took 25957ms.
[13:43:30.183] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:30.192] <TB0> INFO: dacScan step from 140 .. 143
[13:43:55.939] <TB0> INFO: Test took 25747ms.
[13:43:56.145] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:56.154] <TB0> INFO: dacScan step from 144 .. 147









[13:44:22.119] <TB0> INFO: Test took 25965ms.
[13:44:22.329] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:22.338] <TB0> INFO: dacScan step from 148 .. 149






[13:44:36.648] <TB0> INFO: Test took 14310ms.
[13:44:36.752] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:36.758] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:44:38.076] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:44:39.407] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:44:40.738] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:44:42.060] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:44:43.387] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:44:44.707] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:44:46.035] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:44:47.356] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:44:48.692] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:44:49.990] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:44:51.312] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:44:52.653] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:44:53.976] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:44:55.294] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:44:56.623] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[13:44:57.992] <TB0> INFO: PixTestScurves::scurves() done
[13:44:57.992] <TB0> INFO: Vcal mean: 93.82 84.90 89.66 87.75 90.27 95.52 90.94 87.25 82.43 99.49 89.79 82.99 85.48 93.65 87.68 82.31
[13:44:57.992] <TB0> INFO: Vcal RMS: 4.99 4.79 5.89 4.98 4.74 5.66 4.78 5.11 4.76 5.01 5.90 4.83 5.06 5.59 4.85 4.74
[13:44:57.992] <TB0> INFO: PixTestScurves::fullTest() done, duration: 809 seconds
[13:44:58.060] <TB0> INFO: ######################################################################
[13:44:58.060] <TB0> INFO: PixTestTrim::doTest()
[13:44:58.060] <TB0> INFO: ######################################################################
[13:44:58.061] <TB0> INFO: ----------------------------------------------------------------------
[13:44:58.061] <TB0> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:44:58.061] <TB0> INFO: ----------------------------------------------------------------------
[13:44:58.141] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:44:58.141] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:44:58.149] <TB0> INFO: dacScan step from 0 .. 19
[13:45:12.477] <TB0> INFO: Test took 14328ms.
[13:45:12.496] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:12.496] <TB0> INFO: dacScan step from 20 .. 39
[13:45:26.724] <TB0> INFO: Test took 14228ms.
[13:45:26.743] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:26.743] <TB0> INFO: dacScan step from 40 .. 59
[13:45:40.956] <TB0> INFO: Test took 14213ms.
[13:45:40.975] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:40.975] <TB0> INFO: dacScan step from 60 .. 79
[13:45:55.138] <TB0> INFO: Test took 14163ms.
[13:45:55.156] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:55.156] <TB0> INFO: dacScan step from 80 .. 99
[13:46:09.915] <TB0> INFO: Test took 14758ms.
[13:46:09.965] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:09.974] <TB0> INFO: dacScan step from 100 .. 119
[13:46:27.728] <TB0> INFO: Test took 17754ms.
[13:46:27.879] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:27.909] <TB0> INFO: dacScan step from 120 .. 139
[13:46:45.155] <TB0> INFO: Test took 17246ms.
[13:46:45.288] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:45.313] <TB0> INFO: dacScan step from 140 .. 159
[13:47:00.135] <TB0> INFO: Test took 14822ms.
[13:47:00.182] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:19.543] <TB0> INFO: ROC 0 VthrComp = 94
[13:47:19.543] <TB0> INFO: ROC 1 VthrComp = 89
[13:47:19.543] <TB0> INFO: ROC 2 VthrComp = 91
[13:47:19.543] <TB0> INFO: ROC 3 VthrComp = 95
[13:47:19.543] <TB0> INFO: ROC 4 VthrComp = 98
[13:47:19.543] <TB0> INFO: ROC 5 VthrComp = 96
[13:47:19.543] <TB0> INFO: ROC 6 VthrComp = 91
[13:47:19.543] <TB0> INFO: ROC 7 VthrComp = 91
[13:47:19.543] <TB0> INFO: ROC 8 VthrComp = 85
[13:47:19.543] <TB0> INFO: ROC 9 VthrComp = 102
[13:47:19.544] <TB0> INFO: ROC 10 VthrComp = 91
[13:47:19.544] <TB0> INFO: ROC 11 VthrComp = 83
[13:47:19.544] <TB0> INFO: ROC 12 VthrComp = 88
[13:47:19.544] <TB0> INFO: ROC 13 VthrComp = 94
[13:47:19.544] <TB0> INFO: ROC 14 VthrComp = 92
[13:47:19.544] <TB0> INFO: ROC 15 VthrComp = 84
[13:47:19.544] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:47:19.544] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:47:19.552] <TB0> INFO: dacScan step from 0 .. 19
[13:47:33.819] <TB0> INFO: Test took 14267ms.
[13:47:33.839] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:33.839] <TB0> INFO: dacScan step from 20 .. 39
[13:47:48.263] <TB0> INFO: Test took 14424ms.
[13:47:48.291] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:48.294] <TB0> INFO: dacScan step from 40 .. 59
[13:48:05.829] <TB0> INFO: Test took 17534ms.
[13:48:05.968] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:05.999] <TB0> INFO: dacScan step from 60 .. 79
[13:48:24.578] <TB0> INFO: Test took 18579ms.
[13:48:24.728] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:24.766] <TB0> INFO: dacScan step from 80 .. 99
[13:48:43.305] <TB0> INFO: Test took 18539ms.
[13:48:43.455] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:43.496] <TB0> INFO: dacScan step from 100 .. 119
[13:49:01.995] <TB0> INFO: Test took 18499ms.
[13:49:02.146] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:02.185] <TB0> INFO: dacScan step from 120 .. 139
[13:49:20.680] <TB0> INFO: Test took 18495ms.
[13:49:20.829] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:20.866] <TB0> INFO: dacScan step from 140 .. 159
[13:49:39.402] <TB0> INFO: Test took 18536ms.
[13:49:39.553] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:50:02.247] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 58.0269 for pixel 23/26 mean/min/max = 45.5667/33.082/58.0513
[13:50:02.248] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 58.2161 for pixel 16/76 mean/min/max = 46.2119/34.1842/58.2396
[13:50:02.248] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 58.6742 for pixel 0/70 mean/min/max = 45.8413/32.9983/58.6843
[13:50:02.248] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 55.5662 for pixel 24/71 mean/min/max = 44.0328/32.4943/55.5713
[13:50:02.248] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 55.3061 for pixel 0/1 mean/min/max = 43.94/32.1023/55.7777
[13:50:02.249] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 57.8541 for pixel 18/11 mean/min/max = 44.946/32.0227/57.8693
[13:50:02.249] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 55.9707 for pixel 29/73 mean/min/max = 45.3574/34.5803/56.1344
[13:50:02.249] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 57.5467 for pixel 0/23 mean/min/max = 45.4426/33.0527/57.8324
[13:50:02.250] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 56.6801 for pixel 9/6 mean/min/max = 44.2367/31.6267/56.8467
[13:50:02.250] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 57.3168 for pixel 29/13 mean/min/max = 44.9837/32.4814/57.486
[13:50:02.250] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 60.6192 for pixel 7/6 mean/min/max = 46.8109/32.9894/60.6324
[13:50:02.250] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 58.0091 for pixel 23/71 mean/min/max = 45.3593/32.6326/58.086
[13:50:02.251] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 59.2632 for pixel 8/66 mean/min/max = 46.5321/33.7926/59.2717
[13:50:02.251] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 58.9744 for pixel 0/24 mean/min/max = 45.9114/32.8303/58.9926
[13:50:02.251] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 55.8785 for pixel 17/59 mean/min/max = 45.1527/34.3785/55.9269
[13:50:02.251] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 56.5831 for pixel 9/6 mean/min/max = 44.8647/32.6122/57.1172
[13:50:02.252] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:51:28.717] <TB0> INFO: Test took 86465ms.
[13:51:30.027] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:51:30.035] <TB0> INFO: dacScan step from 0 .. 19
[13:51:51.110] <TB0> INFO: Test took 21075ms.
[13:51:51.150] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:51.151] <TB0> INFO: dacScan step from 20 .. 39
[13:52:16.867] <TB0> INFO: Test took 25716ms.
[13:52:17.077] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:17.105] <TB0> INFO: dacScan step from 40 .. 59



[13:52:46.991] <TB0> INFO: Test took 29885ms.
[13:52:47.250] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:52:47.293] <TB0> INFO: dacScan step from 60 .. 79


[13:53:16.920] <TB0> INFO: Test took 29627ms.
[13:53:17.174] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:53:17.217] <TB0> INFO: dacScan step from 80 .. 99


[13:53:46.987] <TB0> INFO: Test took 29770ms.
[13:53:47.240] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:53:47.284] <TB0> INFO: dacScan step from 100 .. 119


[13:54:17.065] <TB0> INFO: Test took 29781ms.
[13:54:17.322] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:17.366] <TB0> INFO: dacScan step from 120 .. 139






[13:54:47.252] <TB0> INFO: Test took 29886ms.
[13:54:47.511] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:54:47.557] <TB0> INFO: dacScan step from 140 .. 159



[13:55:17.274] <TB0> INFO: Test took 29717ms.
[13:55:17.533] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:17.576] <TB0> INFO: dacScan step from 160 .. 179
[13:55:47.570] <TB0> INFO: Test took 29994ms.
[13:55:47.827] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:47.869] <TB0> INFO: dacScan step from 180 .. 199


[13:56:18.753] <TB0> INFO: Test took 30884ms.
[13:56:19.008] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:41.990] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.189984 .. 48.818226
[13:56:42.067] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 58 (20) hits flags = 16 (plus default)
[13:56:42.075] <TB0> INFO: dacScan step from 0 .. 19
[13:56:54.958] <TB0> INFO: Test took 12883ms.
[13:56:54.977] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:56:54.977] <TB0> INFO: dacScan step from 20 .. 39
[13:57:08.896] <TB0> INFO: Test took 13919ms.
[13:57:08.969] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:08.986] <TB0> INFO: dacScan step from 40 .. 58
[13:57:24.695] <TB0> INFO: Test took 15709ms.
[13:57:24.826] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:39.624] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 15.500000 .. 43.920103
[13:57:39.702] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 5 .. 53 (20) hits flags = 16 (plus default)
[13:57:39.709] <TB0> INFO: dacScan step from 5 .. 24
[13:57:52.530] <TB0> INFO: Test took 12821ms.
[13:57:52.548] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:57:52.548] <TB0> INFO: dacScan step from 25 .. 44
[13:58:07.234] <TB0> INFO: Test took 14685ms.
[13:58:07.337] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:07.361] <TB0> INFO: dacScan step from 45 .. 53
[13:58:16.234] <TB0> INFO: Test took 8873ms.
[13:58:16.293] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:30.375] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 20.485712 .. 40.920969
[13:58:30.452] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 10 .. 50 (20) hits flags = 16 (plus default)
[13:58:30.461] <TB0> INFO: dacScan step from 10 .. 29
[13:58:43.318] <TB0> INFO: Test took 12857ms.
[13:58:43.337] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:43.337] <TB0> INFO: dacScan step from 30 .. 49
[13:58:58.840] <TB0> INFO: Test took 15503ms.
[13:58:58.967] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:58:59.001] <TB0> INFO: dacScan step from 50 .. 50
[13:59:02.515] <TB0> INFO: Test took 3514ms.
[13:59:02.523] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:16.018] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 22.129269 .. 38.982838
[13:59:16.095] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 12 .. 48 (20) hits flags = 16 (plus default)
[13:59:16.103] <TB0> INFO: dacScan step from 12 .. 31
[13:59:29.031] <TB0> INFO: Test took 12928ms.
[13:59:29.054] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:29.055] <TB0> INFO: dacScan step from 32 .. 48
[13:59:42.828] <TB0> INFO: Test took 13772ms.
[13:59:42.943] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:56.107] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:59:56.107] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[13:59:56.114] <TB0> INFO: dacScan step from 15 .. 34
[14:00:17.546] <TB0> INFO: Test took 21432ms.
[14:00:17.606] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:17.617] <TB0> INFO: dacScan step from 35 .. 54




[14:00:47.182] <TB0> INFO: Test took 29565ms.
[14:00:47.459] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:47.502] <TB0> INFO: dacScan step from 55 .. 55
[14:00:51.667] <TB0> INFO: Test took 4165ms.
[14:00:51.681] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:04.135] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C0.dat
[14:01:04.135] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C1.dat
[14:01:04.135] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C2.dat
[14:01:04.135] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C3.dat
[14:01:04.135] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C4.dat
[14:01:04.135] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C5.dat
[14:01:04.135] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C6.dat
[14:01:04.135] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C7.dat
[14:01:04.135] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C8.dat
[14:01:04.135] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C9.dat
[14:01:04.136] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C10.dat
[14:01:04.136] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C11.dat
[14:01:04.136] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C12.dat
[14:01:04.136] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C13.dat
[14:01:04.136] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C14.dat
[14:01:04.136] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C15.dat
[14:01:04.136] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters35_C0.dat
[14:01:04.143] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters35_C1.dat
[14:01:04.149] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters35_C2.dat
[14:01:04.155] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters35_C3.dat
[14:01:04.161] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters35_C4.dat
[14:01:04.167] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters35_C5.dat
[14:01:04.173] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters35_C6.dat
[14:01:04.179] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters35_C7.dat
[14:01:04.185] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters35_C8.dat
[14:01:04.191] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters35_C9.dat
[14:01:04.197] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters35_C10.dat
[14:01:04.203] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters35_C11.dat
[14:01:04.209] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters35_C12.dat
[14:01:04.215] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters35_C13.dat
[14:01:04.221] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters35_C14.dat
[14:01:04.227] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//trimParameters35_C15.dat
[14:01:04.233] <TB0> INFO: PixTestTrim::trimTest() done
[14:01:04.233] <TB0> INFO: vtrim: 105 113 99 107 107 116 98 102 96 116 128 105 101 103 93 95
[14:01:04.233] <TB0> INFO: vthrcomp: 94 89 91 95 98 96 91 91 85 102 91 83 88 94 92 84
[14:01:04.233] <TB0> INFO: vcal mean: 35.05 35.11 35.11 35.05 35.06 35.07 35.09 35.04 35.03 34.98 35.02 35.07 35.04 35.03 35.09 35.05
[14:01:04.233] <TB0> INFO: vcal RMS: 1.03 1.06 1.03 1.00 0.99 1.11 0.99 1.03 1.03 1.07 1.03 0.99 1.00 1.04 0.97 0.99
[14:01:04.233] <TB0> INFO: bits mean: 9.66 9.79 9.21 10.43 9.72 10.55 9.91 9.52 10.14 10.09 9.92 10.15 9.58 9.49 9.56 9.95
[14:01:04.233] <TB0> INFO: bits RMS: 2.55 2.31 2.71 2.27 2.71 2.23 2.21 2.55 2.52 2.42 2.30 2.39 2.41 2.60 2.45 2.47
[14:01:04.238] <TB0> INFO: ----------------------------------------------------------------------
[14:01:04.238] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 240 150 100
[14:01:04.238] <TB0> INFO: ----------------------------------------------------------------------
[14:01:04.240] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:01:04.248] <TB0> INFO: dacScan step from 0 .. 19
[14:01:25.199] <TB0> INFO: Test took 20951ms.
[14:01:25.232] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:25.232] <TB0> INFO: dacScan step from 20 .. 39
[14:01:46.463] <TB0> INFO: Test took 21231ms.
[14:01:46.513] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:01:46.517] <TB0> INFO: dacScan step from 40 .. 59
[14:02:14.143] <TB0> INFO: Test took 27626ms.
[14:02:14.376] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:14.409] <TB0> INFO: dacScan step from 60 .. 79


[14:02:44.146] <TB0> INFO: Test took 29737ms.
[14:02:44.394] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:02:44.431] <TB0> INFO: dacScan step from 80 .. 99
[14:03:14.197] <TB0> INFO: Test took 29766ms.
[14:03:14.445] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:14.486] <TB0> INFO: dacScan step from 100 .. 119
[14:03:44.175] <TB0> INFO: Test took 29689ms.
[14:03:44.422] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:03:44.462] <TB0> INFO: dacScan step from 120 .. 139
[14:04:14.123] <TB0> INFO: Test took 29660ms.
[14:04:14.373] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:14.410] <TB0> INFO: dacScan step from 140 .. 159
[14:04:44.053] <TB0> INFO: Test took 29643ms.
[14:04:44.301] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:04:44.342] <TB0> INFO: dacScan step from 160 .. 179
[14:05:13.972] <TB0> INFO: Test took 29630ms.
[14:05:14.220] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:05:14.260] <TB0> INFO: dacScan step from 180 .. 199
[14:05:44.696] <TB0> INFO: Test took 30436ms.
[14:05:44.945] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:08.577] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 76 (20) hits flags = 16 (plus default)
[14:06:08.584] <TB0> INFO: dacScan step from 0 .. 19
[14:06:29.572] <TB0> INFO: Test took 20984ms.
[14:06:29.605] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:29.605] <TB0> INFO: dacScan step from 20 .. 39
[14:06:51.647] <TB0> INFO: Test took 22042ms.
[14:06:51.731] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:06:51.744] <TB0> INFO: dacScan step from 40 .. 59




[14:07:20.449] <TB0> INFO: Test took 28705ms.
[14:07:20.704] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:07:20.740] <TB0> INFO: dacScan step from 60 .. 76
[14:07:46.384] <TB0> INFO: Test took 25644ms.
[14:07:46.596] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:01.672] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 71 (20) hits flags = 16 (plus default)
[14:08:01.680] <TB0> INFO: dacScan step from 0 .. 19
[14:08:22.661] <TB0> INFO: Test took 20981ms.
[14:08:22.695] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:22.695] <TB0> INFO: dacScan step from 20 .. 39
[14:08:45.898] <TB0> INFO: Test took 23203ms.
[14:08:46.031] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:46.047] <TB0> INFO: dacScan step from 40 .. 59




[14:09:15.452] <TB0> INFO: Test took 29405ms.
[14:09:15.715] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:15.756] <TB0> INFO: dacScan step from 60 .. 71
[14:09:34.435] <TB0> INFO: Test took 18679ms.
[14:09:34.584] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:09:49.180] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 65 (20) hits flags = 16 (plus default)
[14:09:49.188] <TB0> INFO: dacScan step from 0 .. 19
[14:10:10.065] <TB0> INFO: Test took 20877ms.
[14:10:10.099] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:10.099] <TB0> INFO: dacScan step from 20 .. 39
[14:10:34.084] <TB0> INFO: Test took 23985ms.
[14:10:34.246] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:10:34.265] <TB0> INFO: dacScan step from 40 .. 59






[14:11:04.071] <TB0> INFO: Test took 29805ms.
[14:11:04.332] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:04.368] <TB0> INFO: dacScan step from 60 .. 65
[14:11:15.185] <TB0> INFO: Test took 10816ms.
[14:11:15.260] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:29.198] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 63 (20) hits flags = 16 (plus default)
[14:11:29.205] <TB0> INFO: dacScan step from 0 .. 19
[14:11:50.181] <TB0> INFO: Test took 20976ms.
[14:11:50.218] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:50.219] <TB0> INFO: dacScan step from 20 .. 39
[14:12:15.560] <TB0> INFO: Test took 25341ms.
[14:12:15.760] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:15.787] <TB0> INFO: dacScan step from 40 .. 59


[14:12:45.798] <TB0> INFO: Test took 30010ms.
[14:12:46.055] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:46.093] <TB0> INFO: dacScan step from 60 .. 63
[14:12:54.316] <TB0> INFO: Test took 8222ms.
[14:12:54.366] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:08.260] <TB0> INFO: PixTestTrim::trimBitTest() done
[14:13:08.261] <TB0> INFO: PixTestTrim::doTest() done, duration: 1690 seconds
[14:13:08.904] <TB0> INFO: ######################################################################
[14:13:08.904] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[14:13:08.904] <TB0> INFO: ######################################################################
[14:13:12.167] <TB0> INFO: Test took 3262ms.
[14:13:12.185] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:15.644] <TB0> INFO: Test took 3262ms.
[14:13:15.701] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:18.991] <TB0> INFO: Test took 3280ms.
[14:13:19.049] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:19.056] <TB0> INFO: The DUT currently contains the following objects:
[14:13:19.056] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:19.056] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:13:19.056] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:13:19.056] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:19.056] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:19.056] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:19.056] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:19.056] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:19.056] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:19.056] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:19.056] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:19.056] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:19.056] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:19.056] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:19.056] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:19.056] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:19.056] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:19.056] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:19.056] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:19.056] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:20.158] <TB0> INFO: Test took 1102ms.
[14:13:20.158] <TB0> INFO: The DUT currently contains the following objects:
[14:13:20.158] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:20.158] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:13:20.158] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:13:20.158] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:20.158] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:20.158] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:20.159] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:20.159] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:20.159] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:20.159] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:20.159] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:20.159] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:20.159] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:20.159] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:20.159] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:20.159] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:20.159] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:20.159] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:20.159] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:20.159] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.






[14:13:21.260] <TB0> INFO: Test took 1101ms.
[14:13:21.260] <TB0> INFO: The DUT currently contains the following objects:
[14:13:21.260] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:21.261] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:13:21.261] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:13:21.261] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:21.261] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:21.261] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:21.261] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:21.261] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:21.261] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:21.261] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:21.261] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:21.261] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:21.261] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:21.261] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:21.261] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:21.261] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:21.261] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:21.261] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:21.261] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:21.261] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:22.362] <TB0> INFO: Test took 1101ms.
[14:13:22.362] <TB0> INFO: The DUT currently contains the following objects:
[14:13:22.363] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:22.363] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:13:22.363] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:13:22.363] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:22.363] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:22.363] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:22.363] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:22.363] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:22.363] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:22.363] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:22.363] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:22.363] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:22.363] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:22.363] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:22.363] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:22.363] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:22.363] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:22.363] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:22.363] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:22.363] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:23.464] <TB0> INFO: Test took 1101ms.
[14:13:23.465] <TB0> INFO: The DUT currently contains the following objects:
[14:13:23.465] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:23.465] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:13:23.465] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:13:23.465] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:23.465] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:23.465] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:23.465] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:23.465] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:23.465] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:23.465] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:23.465] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:23.465] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:23.465] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:23.465] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:23.465] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:23.465] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:23.465] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:23.465] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:23.465] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:23.465] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:24.566] <TB0> INFO: Test took 1101ms.
[14:13:24.566] <TB0> INFO: The DUT currently contains the following objects:
[14:13:24.566] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:24.566] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:13:24.566] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:13:24.566] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:24.566] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:24.566] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:24.566] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:24.566] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:24.566] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:24.566] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:24.566] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:24.566] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:24.566] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:24.567] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:24.567] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:24.567] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:24.567] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:24.567] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:24.567] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:24.567] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:25.668] <TB0> INFO: Test took 1101ms.
[14:13:25.669] <TB0> INFO: The DUT currently contains the following objects:
[14:13:25.669] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:25.669] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:13:25.669] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:13:25.669] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:25.669] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:25.669] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:25.669] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:25.669] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:25.669] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:25.669] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:25.669] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:25.669] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:25.669] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:25.669] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:25.669] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:25.669] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:25.669] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:25.669] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:25.669] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:25.669] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:26.770] <TB0> INFO: Test took 1101ms.
[14:13:26.770] <TB0> INFO: The DUT currently contains the following objects:
[14:13:26.770] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:26.770] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:13:26.770] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:13:26.770] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:26.770] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:26.770] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:26.770] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:26.770] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:26.770] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:26.770] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:26.770] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:26.770] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:26.770] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:26.770] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:26.770] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:26.771] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:26.771] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:26.771] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:26.771] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:26.771] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:27.872] <TB0> INFO: Test took 1101ms.
[14:13:27.872] <TB0> INFO: The DUT currently contains the following objects:
[14:13:27.872] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:27.872] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:13:27.872] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:13:27.872] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:27.872] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:27.872] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:27.872] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:27.872] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:27.872] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:27.872] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:27.872] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:27.872] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:27.872] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:27.872] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:27.872] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:27.872] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:27.872] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:27.872] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:27.872] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:27.872] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:28.974] <TB0> INFO: Test took 1102ms.
[14:13:28.974] <TB0> INFO: The DUT currently contains the following objects:
[14:13:28.974] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:28.974] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:13:28.974] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:13:28.974] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:28.974] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:28.974] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:28.974] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:28.974] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:28.974] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:28.974] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:28.974] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:28.974] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:28.974] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:28.974] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:28.974] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:28.974] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:28.974] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:28.974] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:28.974] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:28.974] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:30.076] <TB0> INFO: Test took 1102ms.
[14:13:30.076] <TB0> INFO: The DUT currently contains the following objects:
[14:13:30.076] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:30.076] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:13:30.076] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:13:30.076] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:30.076] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:30.077] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:30.077] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:30.077] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:30.077] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:30.077] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:30.077] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:30.077] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:30.077] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:30.077] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:30.077] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:30.077] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:30.077] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:30.077] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:30.077] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:30.077] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:31.178] <TB0> INFO: Test took 1101ms.
[14:13:31.178] <TB0> INFO: The DUT currently contains the following objects:
[14:13:31.178] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:31.178] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:13:31.178] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:13:31.178] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:31.178] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:31.178] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:31.179] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:31.179] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:31.179] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:31.179] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:31.179] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:31.179] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:31.179] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:31.179] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:31.179] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:31.179] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:31.179] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:31.179] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:31.179] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:31.179] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:32.280] <TB0> INFO: Test took 1101ms.
[14:13:32.281] <TB0> INFO: The DUT currently contains the following objects:
[14:13:32.281] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:32.281] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:13:32.281] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:13:32.281] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:32.281] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:32.281] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:32.281] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:32.281] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:32.281] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:32.281] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:32.281] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:32.281] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:32.281] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:32.281] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:32.281] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:32.281] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:32.281] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:32.281] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:32.281] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:32.281] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:33.383] <TB0> INFO: Test took 1102ms.
[14:13:33.383] <TB0> INFO: The DUT currently contains the following objects:
[14:13:33.383] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:33.383] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:13:33.383] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:13:33.383] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:33.383] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:33.383] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:33.383] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:33.383] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:33.383] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:33.383] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:33.383] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:33.383] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:33.383] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:33.383] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:33.383] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:33.383] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:33.383] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:33.383] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:33.383] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:33.383] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:34.485] <TB0> INFO: Test took 1102ms.
[14:13:34.485] <TB0> INFO: The DUT currently contains the following objects:
[14:13:34.485] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:34.485] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:13:34.485] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:13:34.485] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:34.485] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:34.485] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:34.485] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:34.485] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:34.485] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:34.485] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:34.485] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:34.485] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:34.485] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:34.485] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:34.485] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:34.485] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:34.485] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:34.485] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:34.485] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:34.485] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:35.587] <TB0> INFO: Test took 1102ms.
[14:13:35.587] <TB0> INFO: The DUT currently contains the following objects:
[14:13:35.588] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[14:13:35.588] <TB0> INFO: TBM Core alpha (0): 7 registers set
[14:13:35.588] <TB0> INFO: TBM Core beta (1): 7 registers set
[14:13:35.588] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[14:13:35.588] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:35.588] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:35.588] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:35.589] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:35.589] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:35.589] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:35.589] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:35.589] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:35.589] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:35.589] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:35.589] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:35.589] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:35.589] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:35.589] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:35.589] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:35.589] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[14:13:36.689] <TB0> INFO: Test took 1100ms.
[14:13:36.692] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.




















[14:16:58.899] <TB0> INFO: Test took 202208ms.
[14:17:00.479] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.










[14:20:21.664] <TB0> INFO: Test took 201185ms.
[14:20:23.245] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:23.251] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:23.257] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:23.264] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:23.270] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:23.277] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:23.283] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:23.290] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:23.296] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:23.302] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:23.309] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:23.315] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:23.322] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:23.328] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:23.335] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:23.341] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[14:20:23.376] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C0.dat
[14:20:23.376] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C1.dat
[14:20:23.376] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C2.dat
[14:20:23.376] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C3.dat
[14:20:23.376] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C4.dat
[14:20:23.376] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C5.dat
[14:20:23.376] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C6.dat
[14:20:23.377] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C7.dat
[14:20:23.377] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C8.dat
[14:20:23.377] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C9.dat
[14:20:23.377] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C10.dat
[14:20:23.377] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C11.dat
[14:20:23.377] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C12.dat
[14:20:23.377] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C13.dat
[14:20:23.377] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C14.dat
[14:20:23.377] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//dacParameters35_C15.dat
[14:20:26.642] <TB0> INFO: Test took 3262ms.
[14:20:30.164] <TB0> INFO: Test took 3259ms.
[14:20:33.684] <TB0> INFO: Test took 3257ms.
[14:20:33.953] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:34.866] <TB0> INFO: Test took 913ms.
[14:20:34.868] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:35.970] <TB0> INFO: Test took 1102ms.
[14:20:35.972] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:37.073] <TB0> INFO: Test took 1101ms.
[14:20:37.075] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:38.177] <TB0> INFO: Test took 1102ms.
[14:20:38.179] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:39.280] <TB0> INFO: Test took 1101ms.
[14:20:39.282] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:40.384] <TB0> INFO: Test took 1102ms.
[14:20:40.386] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:41.488] <TB0> INFO: Test took 1102ms.
[14:20:41.490] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:42.592] <TB0> INFO: Test took 1102ms.
[14:20:42.594] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:43.696] <TB0> INFO: Test took 1102ms.
[14:20:43.698] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:44.799] <TB0> INFO: Test took 1101ms.
[14:20:44.801] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:45.903] <TB0> INFO: Test took 1102ms.
[14:20:45.909] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:47.010] <TB0> INFO: Test took 1102ms.
[14:20:47.012] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:48.114] <TB0> INFO: Test took 1102ms.
[14:20:48.116] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:49.217] <TB0> INFO: Test took 1101ms.
[14:20:49.219] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:50.321] <TB0> INFO: Test took 1102ms.
[14:20:50.323] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:51.425] <TB0> INFO: Test took 1102ms.
[14:20:51.426] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:52.528] <TB0> INFO: Test took 1102ms.
[14:20:52.530] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:53.632] <TB0> INFO: Test took 1102ms.
[14:20:53.634] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:54.736] <TB0> INFO: Test took 1102ms.
[14:20:54.738] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:55.839] <TB0> INFO: Test took 1101ms.
[14:20:55.841] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:56.943] <TB0> INFO: Test took 1102ms.
[14:20:56.946] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:58.047] <TB0> INFO: Test took 1101ms.
[14:20:58.049] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:20:59.151] <TB0> INFO: Test took 1102ms.
[14:20:59.153] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:21:00.254] <TB0> INFO: Test took 1101ms.
[14:21:00.256] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:21:01.358] <TB0> INFO: Test took 1102ms.
[14:21:01.360] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:21:02.462] <TB0> INFO: Test took 1102ms.
[14:21:02.464] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:21:03.565] <TB0> INFO: Test took 1101ms.
[14:21:03.567] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:21:04.669] <TB0> INFO: Test took 1102ms.
[14:21:04.671] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:21:05.772] <TB0> INFO: Test took 1101ms.
[14:21:05.774] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:21:06.876] <TB0> INFO: Test took 1102ms.
[14:21:06.878] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:21:07.979] <TB0> INFO: Test took 1101ms.
[14:21:07.981] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:21:09.083] <TB0> INFO: Test took 1102ms.
[14:21:09.594] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 480 seconds
[14:21:09.594] <TB0> INFO: PH scale (per ROC): 68 72 73 86 75 75 80 79 71 79 74 74 78 72 75 76
[14:21:09.594] <TB0> INFO: PH offset (per ROC): 175 176 174 148 171 176 170 183 171 166 186 182 171 179 166 165
[14:21:09.760] <TB0> INFO: ######################################################################
[14:21:09.760] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:21:09.760] <TB0> INFO: ######################################################################
[14:21:09.770] <TB0> INFO: scanning low vcal = 50
[14:21:13.938] <TB0> INFO: Test took 4168ms.
[14:21:13.993] <TB0> INFO: scanning low vcal = 100
[14:21:28.092] <TB0> INFO: Test took 14099ms.
[14:21:28.131] <TB0> INFO: scanning low vcal = 150
[14:21:32.330] <TB0> INFO: Test took 4199ms.
[14:21:32.385] <TB0> INFO: scanning low vcal = 200
[14:21:36.580] <TB0> INFO: Test took 4195ms.
[14:21:36.635] <TB0> INFO: scanning low vcal = 250
[14:21:40.832] <TB0> INFO: Test took 4197ms.
[14:21:40.888] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[14:21:45.084] <TB0> INFO: Test took 4196ms.
[14:21:45.140] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[14:21:49.335] <TB0> INFO: Test took 4195ms.
[14:21:49.388] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[14:21:53.581] <TB0> INFO: Test took 4192ms.
[14:21:53.635] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[14:21:57.827] <TB0> INFO: Test took 4192ms.
[14:21:57.880] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:22:02.072] <TB0> INFO: Test took 4192ms.
[14:22:02.360] <TB0> INFO: PixTestGainPedestal::measure() done
[14:22:24.936] <TB0> INFO: PixTestGainPedestal::fit() done
[14:22:24.936] <TB0> INFO: non-linearity mean: 0.952 0.951 0.954 0.953 0.957 0.954 0.958 0.954 0.960 0.961 0.957 0.960 0.955 0.956 0.960 0.956
[14:22:24.936] <TB0> INFO: non-linearity RMS: 0.008 0.007 0.006 0.006 0.007 0.006 0.006 0.006 0.005 0.005 0.006 0.006 0.006 0.006 0.005 0.004
[14:22:24.936] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[14:22:24.954] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[14:22:24.971] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[14:22:24.989] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[14:22:25.007] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[14:22:25.025] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[14:22:25.043] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[14:22:25.061] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[14:22:25.079] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[14:22:25.096] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[14:22:25.114] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[14:22:25.132] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[14:22:25.150] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[14:22:25.168] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[14:22:25.185] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[14:22:25.203] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2025_FullQualification_2015-07-13_11h11m_1436778691//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[14:22:25.221] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 75 seconds
[14:22:25.227] <TB0> INFO: enter test to run
[14:22:25.228] <TB0> INFO: test: exit no parameter change
[14:22:25.680] <TB0> QUIET: Connection to board 126 closed.
[14:22:25.760] <TB0> INFO: pXar: this is the end, my friend