[09:39:05.772] <TB0> INFO: *** Welcome to pxar ***
[09:39:05.772] <TB0> INFO: *** Today: 2015/11/03
[09:39:06.246] <TB0> INFO: *** Version: 9da6
[09:39:06.246] <TB0> INFO: readRocDacs: /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C15.dat
[09:39:06.247] <TB0> INFO: readTbmDacs: /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//tbmParameters_C0b.dat
[09:39:06.247] <TB0> INFO: readMaskFile: /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//defaultMaskFile.dat
[09:39:06.247] <TB0> INFO: readTrimFile: /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters_C15.dat
[09:39:06.319] <TB0> INFO: clk: 4
[09:39:06.319] <TB0> INFO: ctr: 4
[09:39:06.319] <TB0> INFO: sda: 19
[09:39:06.319] <TB0> INFO: tin: 9
[09:39:06.319] <TB0> INFO: level: 15
[09:39:06.319] <TB0> INFO: triggerdelay: 0
[09:39:06.319] <TB0> QUIET: Instanciating API for pxar v2.6.0+26~g89693ff
[09:39:06.319] <TB0> INFO: Log level: INFO
[09:39:06.326] <TB0> INFO: Found DTB DTB_WS6AYH
[09:39:06.338] <TB0> QUIET: Connection to board DTB_WS6AYH opened.
[09:39:06.341] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 73
HW version: DTB1.2
FW version: 4.2
SW version: 4.5
USB id: DTB_WS6AYH
MAC address: 40D855118049
Hostname: pixelDTB073
Comment:
------------------------------------------------------
[09:39:06.343] <TB0> INFO: RPC call hashes of host and DTB match: 398089610
[09:39:07.881] <TB0> INFO: DUT info:
[09:39:07.881] <TB0> INFO: The DUT currently contains the following objects:
[09:39:07.881] <TB0> INFO: 2 TBM Cores tbm08c (2 ON)
[09:39:07.881] <TB0> INFO: TBM Core alpha (0): 7 registers set
[09:39:07.881] <TB0> INFO: TBM Core beta (1): 7 registers set
[09:39:07.881] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[09:39:07.882] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:07.882] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:07.882] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:07.882] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:07.882] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:07.882] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:07.882] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:07.882] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:07.882] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:07.882] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:07.882] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:07.882] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:07.882] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:07.882] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:07.882] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:07.882] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:08.282] <TB0> INFO: enter 'restricted' command line mode
[09:39:08.282] <TB0> INFO: enter test to run
[09:39:08.283] <TB0> INFO: test: pretest no parameter change
[09:39:08.283] <TB0> INFO: running: pretest
[09:39:08.287] <TB0> INFO: ######################################################################
[09:39:08.287] <TB0> INFO: PixTestPretest::doTest()
[09:39:08.287] <TB0> INFO: ######################################################################
[09:39:08.288] <TB0> INFO: ----------------------------------------------------------------------
[09:39:08.288] <TB0> INFO: PixTestPretest::programROC()
[09:39:08.288] <TB0> INFO: ----------------------------------------------------------------------
[09:39:26.306] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:39:26.306] <TB0> INFO: IA differences per ROC: 17.7 18.5 16.9 18.5 16.9 16.9 16.1 19.3 18.5 16.9 17.7 19.3 16.9 20.1 19.3 19.3
[09:39:26.517] <TB0> INFO: ----------------------------------------------------------------------
[09:39:26.517] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:39:26.517] <TB0> INFO: ----------------------------------------------------------------------
[09:39:47.811] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 389.9 mA = 24.3688 mA/ROC
[09:39:47.811] <TB0> INFO: i(loss) [mA/ROC]: 20.1 20.1 19.3 19.3 19.3 18.5 19.3 19.3 20.1 18.5 18.5 20.1 18.5 19.3 20.1 19.3
[09:39:47.848] <TB0> INFO: ----------------------------------------------------------------------
[09:39:47.848] <TB0> INFO: PixTestPretest::findTiming()
[09:39:47.848] <TB0> INFO: ----------------------------------------------------------------------
[09:39:47.848] <TB0> INFO: PixTestCmd::init()

[09:41:30.476] <TB0> INFO: TBM phases: 160MHz: 4, 400MHz: 2, TBM delays: ROC(0/1):2, header/trailer: 1, token: 0
[09:41:30.484] <TB0> INFO: (success/tries = 100/100), width = 3
[09:41:30.486] <TB0> INFO: ----------------------------------------------------------------------
[09:41:30.486] <TB0> INFO: PixTestPretest::findWorkingPixel()
[09:41:30.486] <TB0> INFO: ----------------------------------------------------------------------
[09:41:30.623] <TB0> INFO: Expecting 231680 events.


[09:41:38.482] <TB0> INFO: 231680 events read in total (7144ms).
[09:41:38.486] <TB0> INFO: Test took 7997ms.
[09:41:38.887] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:41:38.926] <TB0> INFO: ----------------------------------------------------------------------
[09:41:38.926] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[09:41:38.926] <TB0> INFO: ----------------------------------------------------------------------
[09:41:39.063] <TB0> INFO: Expecting 231680 events.
[09:41:47.561] <TB0> INFO: 231680 events read in total (7783ms).
[09:41:47.566] <TB0> INFO: Test took 8635ms.
[09:41:47.991] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[09:41:47.991] <TB0> INFO: CalDel: 141 143 123 137 123 129 152 145 140 149 127 144 136 141 132 156
[09:41:47.991] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[09:41:47.994] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C0.dat
[09:41:47.995] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C1.dat
[09:41:47.996] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C2.dat
[09:41:47.996] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C3.dat
[09:41:47.996] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C4.dat
[09:41:47.996] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C5.dat
[09:41:47.996] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C6.dat
[09:41:47.997] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C7.dat
[09:41:47.997] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C8.dat
[09:41:47.997] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C9.dat
[09:41:47.997] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C10.dat
[09:41:47.997] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C11.dat
[09:41:47.998] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C12.dat
[09:41:47.998] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C13.dat
[09:41:47.998] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C14.dat
[09:41:47.998] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C15.dat
[09:41:47.998] <TB0> INFO: write tbm parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//tbmParameters_C0a.dat
[09:41:47.999] <TB0> INFO: write tbm parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//tbmParameters_C0b.dat
[09:41:47.999] <TB0> INFO: PixTestPretest::doTest() done, duration: 159 seconds
[09:41:48.067] <TB0> INFO: enter test to run
[09:41:48.067] <TB0> INFO: test: fulltest no parameter change
[09:41:48.067] <TB0> INFO: running: fulltest
[09:41:48.067] <TB0> INFO: ######################################################################
[09:41:48.067] <TB0> INFO: PixTestFullTest::doTest()
[09:41:48.067] <TB0> INFO: ######################################################################
[09:41:48.069] <TB0> INFO: ######################################################################
[09:41:48.069] <TB0> INFO: PixTestAlive::doTest()
[09:41:48.069] <TB0> INFO: ######################################################################
[09:41:48.070] <TB0> INFO: ----------------------------------------------------------------------
[09:41:48.070] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:41:48.070] <TB0> INFO: ----------------------------------------------------------------------
[09:41:48.383] <TB0> INFO: Expecting 41600 events.
[09:41:52.818] <TB0> INFO: 41600 events read in total (3720ms).
[09:41:52.819] <TB0> INFO: Test took 4747ms.
[09:41:52.825] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:53.208] <TB0> INFO: PixTestAlive::aliveTest() done
[09:41:53.208] <TB0> INFO: number of dead pixels (per ROC): 2 14 52 1 0 20 30 1 0 1 1 0 0 12 14 14
[09:41:53.210] <TB0> INFO: ----------------------------------------------------------------------
[09:41:53.210] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:41:53.210] <TB0> INFO: ----------------------------------------------------------------------
[09:41:53.526] <TB0> INFO: Expecting 41600 events.
[09:41:56.529] <TB0> INFO: 41600 events read in total (2289ms).
[09:41:56.530] <TB0> INFO: Test took 3319ms.
[09:41:56.530] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:56.530] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:41:56.941] <TB0> INFO: PixTestAlive::maskTest() done
[09:41:56.941] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:41:56.944] <TB0> INFO: ----------------------------------------------------------------------
[09:41:56.944] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:41:56.944] <TB0> INFO: ----------------------------------------------------------------------
[09:41:57.254] <TB0> INFO: Expecting 41600 events.
[09:42:01.789] <TB0> INFO: 41600 events read in total (3820ms).
[09:42:01.790] <TB0> INFO: Test took 4845ms.
[09:42:01.796] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:02.178] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[09:42:02.178] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:42:02.178] <TB0> INFO: PixTestAlive::doTest() done, duration: 14 seconds
[09:42:02.178] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:02.178] <TB0> INFO: Decoding statistics:
[09:42:02.178] <TB0> INFO: General information:
[09:42:02.178] <TB0> INFO: 16bit words read: 0
[09:42:02.178] <TB0> INFO: valid events total: 0
[09:42:02.179] <TB0> INFO: empty events: 0
[09:42:02.179] <TB0> INFO: valid events with pixels: 0
[09:42:02.179] <TB0> INFO: valid pixel hits: 0
[09:42:02.179] <TB0> INFO: Event errors: 0
[09:42:02.179] <TB0> INFO: start marker: 0
[09:42:02.179] <TB0> INFO: stop marker: 0
[09:42:02.179] <TB0> INFO: overflow: 0
[09:42:02.179] <TB0> INFO: invalid 5bit words: 0
[09:42:02.179] <TB0> INFO: invalid XOR eye diagram: 0
[09:42:02.179] <TB0> INFO: TBM errors: 0
[09:42:02.179] <TB0> INFO: flawed TBM headers: 0
[09:42:02.179] <TB0> INFO: flawed TBM trailers: 0
[09:42:02.179] <TB0> INFO: event ID mismatches: 0
[09:42:02.179] <TB0> INFO: ROC errors: 0
[09:42:02.179] <TB0> INFO: missing ROC header(s): 0
[09:42:02.179] <TB0> INFO: misplaced readback start: 0
[09:42:02.179] <TB0> INFO: Pixel decoding errors: 0
[09:42:02.179] <TB0> INFO: pixel data incomplete: 0
[09:42:02.179] <TB0> INFO: pixel address: 0
[09:42:02.179] <TB0> INFO: pulse height fill bit: 0
[09:42:02.179] <TB0> INFO: buffer corruption: 0
[09:42:02.194] <TB0> INFO: ######################################################################
[09:42:02.194] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:42:02.194] <TB0> INFO: ######################################################################
[09:42:02.196] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[09:42:02.207] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[09:42:02.207] <TB0> INFO: run 1 of 1
[09:42:02.515] <TB0> INFO: Expecting 3120000 events.
[09:42:55.681] <TB0> INFO: 1238950 events read in total (52451ms).
[09:43:48.218] <TB0> INFO: 2464380 events read in total (104988ms).
[09:44:14.723] <TB0> INFO: 3120000 events read in total (131494ms).
[09:44:14.773] <TB0> INFO: Test took 132567ms.
[09:44:14.847] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:39.679] <TB0> INFO: PixTestBBMap::doTest() done, duration: 157 seconds
[09:44:39.679] <TB0> INFO: number of dead bumps (per ROC): 0 2 2 0 0 2 1 0 0 0 0 0 0 0 0 0
[09:44:39.679] <TB0> INFO: separation cut (per ROC): 127 128 144 113 137 128 132 135 132 124 112 138 137 135 142 137
[09:44:39.679] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:39.679] <TB0> INFO: Decoding statistics:
[09:44:39.679] <TB0> INFO: General information:
[09:44:39.679] <TB0> INFO: 16bit words read: 0
[09:44:39.679] <TB0> INFO: valid events total: 0
[09:44:39.679] <TB0> INFO: empty events: 0
[09:44:39.679] <TB0> INFO: valid events with pixels: 0
[09:44:39.679] <TB0> INFO: valid pixel hits: 0
[09:44:39.680] <TB0> INFO: Event errors: 0
[09:44:39.680] <TB0> INFO: start marker: 0
[09:44:39.680] <TB0> INFO: stop marker: 0
[09:44:39.680] <TB0> INFO: overflow: 0
[09:44:39.680] <TB0> INFO: invalid 5bit words: 0
[09:44:39.680] <TB0> INFO: invalid XOR eye diagram: 0
[09:44:39.680] <TB0> INFO: TBM errors: 0
[09:44:39.680] <TB0> INFO: flawed TBM headers: 0
[09:44:39.680] <TB0> INFO: flawed TBM trailers: 0
[09:44:39.680] <TB0> INFO: event ID mismatches: 0
[09:44:39.680] <TB0> INFO: ROC errors: 0
[09:44:39.680] <TB0> INFO: missing ROC header(s): 0
[09:44:39.680] <TB0> INFO: misplaced readback start: 0
[09:44:39.680] <TB0> INFO: Pixel decoding errors: 0
[09:44:39.680] <TB0> INFO: pixel data incomplete: 0
[09:44:39.680] <TB0> INFO: pixel address: 0
[09:44:39.680] <TB0> INFO: pulse height fill bit: 0
[09:44:39.680] <TB0> INFO: buffer corruption: 0
[09:44:39.718] <TB0> INFO: ######################################################################
[09:44:39.719] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:44:39.719] <TB0> INFO: ######################################################################
[09:44:39.719] <TB0> INFO: ----------------------------------------------------------------------
[09:44:39.719] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:44:39.719] <TB0> INFO: ----------------------------------------------------------------------
[09:44:39.719] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[09:44:39.727] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[09:44:39.727] <TB0> INFO: run 1 of 1
[09:44:40.032] <TB0> INFO: Expecting 26208000 events.
[09:45:12.538] <TB0> INFO: 1230850 events read in total (31791ms).
[09:45:47.520] <TB0> INFO: 2438850 events read in total (66773ms).
[09:46:22.003] <TB0> INFO: 3647400 events read in total (101256ms).
[09:46:55.918] <TB0> INFO: 4848050 events read in total (135171ms).
[09:47:31.092] <TB0> INFO: 6048900 events read in total (170345ms).
[09:48:07.033] <TB0> INFO: 7245250 events read in total (206287ms).
[09:48:42.188] <TB0> INFO: 8437150 events read in total (241441ms).
[09:49:16.913] <TB0> INFO: 9632150 events read in total (276166ms).
[09:49:51.920] <TB0> INFO: 10822050 events read in total (311173ms).
[09:50:27.954] <TB0> INFO: 12007200 events read in total (347207ms).
[09:51:03.592] <TB0> INFO: 13192700 events read in total (382845ms).
[09:51:39.104] <TB0> INFO: 14356450 events read in total (418357ms).
[09:52:14.669] <TB0> INFO: 15518750 events read in total (453922ms).
[09:52:50.098] <TB0> INFO: 16677900 events read in total (489351ms).
[09:53:26.239] <TB0> INFO: 17835250 events read in total (525492ms).
[09:54:01.684] <TB0> INFO: 18993550 events read in total (560937ms).
[09:54:37.980] <TB0> INFO: 20151200 events read in total (597233ms).
[09:55:13.920] <TB0> INFO: 21304850 events read in total (633173ms).
[09:55:50.004] <TB0> INFO: 22456300 events read in total (669257ms).
[09:56:25.244] <TB0> INFO: 23614100 events read in total (704497ms).
[09:57:01.979] <TB0> INFO: 24777200 events read in total (741232ms).
[09:57:31.375] <TB0> INFO: 25948850 events read in total (770628ms).
[09:57:38.574] <TB0> INFO: 26208000 events read in total (777827ms).
[09:57:38.614] <TB0> INFO: Test took 778887ms.
[09:57:38.684] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:57:38.816] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:40.480] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:42.183] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:43.707] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:45.347] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:47.009] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:48.714] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:50.438] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:52.192] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:53.975] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:55.752] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:57.597] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:57:59.383] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:58:01.083] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:58:02.773] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:58:04.539] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[09:58:06.308] <TB0> INFO: PixTestScurves::scurves() done
[09:58:06.309] <TB0> INFO: Vcal mean: 102.56 99.15 106.30 94.12 108.86 100.79 101.57 103.56 108.32 109.03 91.35 105.90 112.63 100.85 99.42 107.13
[09:58:06.309] <TB0> INFO: Vcal RMS: 5.61 7.80 13.11 5.10 5.62 9.31 10.56 5.95 4.89 6.20 5.93 5.25 5.68 8.12 8.19 8.30
[09:58:06.309] <TB0> INFO: PixTestScurves::fullTest() done, duration: 806 seconds
[09:58:06.309] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:58:06.309] <TB0> INFO: Decoding statistics:
[09:58:06.309] <TB0> INFO: General information:
[09:58:06.309] <TB0> INFO: 16bit words read: 0
[09:58:06.309] <TB0> INFO: valid events total: 0
[09:58:06.309] <TB0> INFO: empty events: 0
[09:58:06.309] <TB0> INFO: valid events with pixels: 0
[09:58:06.309] <TB0> INFO: valid pixel hits: 0
[09:58:06.309] <TB0> INFO: Event errors: 0
[09:58:06.309] <TB0> INFO: start marker: 0
[09:58:06.309] <TB0> INFO: stop marker: 0
[09:58:06.309] <TB0> INFO: overflow: 0
[09:58:06.309] <TB0> INFO: invalid 5bit words: 0
[09:58:06.309] <TB0> INFO: invalid XOR eye diagram: 0
[09:58:06.309] <TB0> INFO: TBM errors: 0
[09:58:06.309] <TB0> INFO: flawed TBM headers: 0
[09:58:06.309] <TB0> INFO: flawed TBM trailers: 0
[09:58:06.309] <TB0> INFO: event ID mismatches: 0
[09:58:06.309] <TB0> INFO: ROC errors: 0
[09:58:06.309] <TB0> INFO: missing ROC header(s): 0
[09:58:06.309] <TB0> INFO: misplaced readback start: 0
[09:58:06.309] <TB0> INFO: Pixel decoding errors: 0
[09:58:06.309] <TB0> INFO: pixel data incomplete: 0
[09:58:06.309] <TB0> INFO: pixel address: 0
[09:58:06.309] <TB0> INFO: pulse height fill bit: 0
[09:58:06.309] <TB0> INFO: buffer corruption: 0
[09:58:06.391] <TB0> INFO: ######################################################################
[09:58:06.391] <TB0> INFO: PixTestTrim::doTest()
[09:58:06.391] <TB0> INFO: ######################################################################
[09:58:06.392] <TB0> INFO: ----------------------------------------------------------------------
[09:58:06.392] <TB0> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[09:58:06.392] <TB0> INFO: ----------------------------------------------------------------------
[09:58:06.477] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:58:06.477] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[09:58:06.486] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[09:58:06.486] <TB0> INFO: run 1 of 1
[09:58:06.800] <TB0> INFO: Expecting 6281600 events.
[09:58:55.583] <TB0> INFO: 1429860 events read in total (48068ms).
[09:59:42.007] <TB0> INFO: 2844930 events read in total (94492ms).
[10:00:29.447] <TB0> INFO: 4257540 events read in total (141932ms).
[10:01:11.870] <TB0> INFO: 5677720 events read in total (184355ms).
[10:01:32.722] <TB0> INFO: 6281600 events read in total (205207ms).
[10:01:32.755] <TB0> INFO: Test took 206270ms.
[10:01:32.810] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:01:53.216] <TB0> INFO: ROC 0 VthrComp = 102
[10:01:53.217] <TB0> INFO: ROC 1 VthrComp = 100
[10:01:53.217] <TB0> INFO: ROC 2 VthrComp = 100
[10:01:53.217] <TB0> INFO: ROC 3 VthrComp = 95
[10:01:53.217] <TB0> INFO: ROC 4 VthrComp = 104
[10:01:53.217] <TB0> INFO: ROC 5 VthrComp = 97
[10:01:53.217] <TB0> INFO: ROC 6 VthrComp = 99
[10:01:53.217] <TB0> INFO: ROC 7 VthrComp = 104
[10:01:53.217] <TB0> INFO: ROC 8 VthrComp = 107
[10:01:53.217] <TB0> INFO: ROC 9 VthrComp = 101
[10:01:53.217] <TB0> INFO: ROC 10 VthrComp = 90
[10:01:53.218] <TB0> INFO: ROC 11 VthrComp = 107
[10:01:53.218] <TB0> INFO: ROC 12 VthrComp = 106
[10:01:53.218] <TB0> INFO: ROC 13 VthrComp = 100
[10:01:53.218] <TB0> INFO: ROC 14 VthrComp = 104
[10:01:53.218] <TB0> INFO: ROC 15 VthrComp = 105
[10:01:53.218] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[10:01:53.218] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[10:01:53.227] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[10:01:53.227] <TB0> INFO: run 1 of 1
[10:01:53.536] <TB0> INFO: Expecting 6281600 events.
[10:02:34.464] <TB0> INFO: 902300 events read in total (40213ms).
[10:03:13.756] <TB0> INFO: 1799240 events read in total (79505ms).
[10:03:53.863] <TB0> INFO: 2695890 events read in total (119612ms).
[10:04:30.754] <TB0> INFO: 3586170 events read in total (156503ms).
[10:05:11.051] <TB0> INFO: 4467970 events read in total (196800ms).
[10:05:49.322] <TB0> INFO: 5346240 events read in total (235071ms).
[10:06:25.956] <TB0> INFO: 6224820 events read in total (271705ms).
[10:06:29.261] <TB0> INFO: 6281600 events read in total (275010ms).
[10:06:29.392] <TB0> INFO: Test took 276165ms.
[10:06:29.541] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:06:56.396] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 58.3895 for pixel 15/75 mean/min/max = 45.5667/32.6395/58.4939
[10:06:56.396] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 59.836 for pixel 4/1 mean/min/max = 46.5827/33.2373/59.9281
[10:06:56.397] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 63.6838 for pixel 35/67 mean/min/max = 48.3688/31.7419/64.9958
[10:06:56.397] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 57.7624 for pixel 11/7 mean/min/max = 45.2735/32.7741/57.7729
[10:06:56.397] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 65.367 for pixel 0/6 mean/min/max = 49.799/33.9273/65.6708
[10:06:56.398] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 63.1944 for pixel 0/66 mean/min/max = 47.8776/32.4596/63.2956
[10:06:56.398] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 62.5674 for pixel 15/1 mean/min/max = 48.1012/33.4867/62.7157
[10:06:56.398] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 60.7173 for pixel 19/73 mean/min/max = 47.3389/33.8928/60.7849
[10:06:56.399] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 60.3608 for pixel 26/79 mean/min/max = 47.5307/34.6955/60.3658
[10:06:56.399] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 63.0744 for pixel 2/78 mean/min/max = 47.2009/31.316/63.0857
[10:06:56.399] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 61.1628 for pixel 9/68 mean/min/max = 46.9204/32.4093/61.4316
[10:06:56.400] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 58.7984 for pixel 51/79 mean/min/max = 46.5485/34.2838/58.8132
[10:06:56.400] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 66.6792 for pixel 0/9 mean/min/max = 50.2974/33.9022/66.6925
[10:06:56.400] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 61.5211 for pixel 1/66 mean/min/max = 47.1415/32.7479/61.5352
[10:06:56.401] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 60.3825 for pixel 0/51 mean/min/max = 47.6051/34.566/60.6443
[10:06:56.401] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 62.111 for pixel 5/1 mean/min/max = 48.2709/34.4199/62.1219
[10:06:56.401] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:06:56.534] <TB0> INFO: Expecting 514560 events.
[10:07:06.811] <TB0> INFO: 514560 events read in total (9563ms).
[10:07:06.816] <TB0> INFO: Expecting 514560 events.
[10:07:16.859] <TB0> INFO: 514560 events read in total (9382ms).
[10:07:16.867] <TB0> INFO: Expecting 514560 events.
[10:07:27.116] <TB0> INFO: 514560 events read in total (9584ms).
[10:07:27.126] <TB0> INFO: Expecting 514560 events.
[10:07:37.531] <TB0> INFO: 514560 events read in total (9752ms).
[10:07:37.545] <TB0> INFO: Expecting 514560 events.
[10:07:48.003] <TB0> INFO: 514560 events read in total (9802ms).
[10:07:48.018] <TB0> INFO: Expecting 514560 events.
[10:07:58.099] <TB0> INFO: 514560 events read in total (9425ms).
[10:07:58.115] <TB0> INFO: Expecting 514560 events.
[10:08:08.625] <TB0> INFO: 514560 events read in total (9849ms).
[10:08:08.646] <TB0> INFO: Expecting 514560 events.
[10:08:19.020] <TB0> INFO: 514560 events read in total (9727ms).
[10:08:19.042] <TB0> INFO: Expecting 514560 events.
[10:08:29.456] <TB0> INFO: 514560 events read in total (9773ms).
[10:08:29.477] <TB0> INFO: Expecting 514560 events.
[10:08:39.551] <TB0> INFO: 514560 events read in total (9418ms).
[10:08:39.576] <TB0> INFO: Expecting 514560 events.
[10:08:50.177] <TB0> INFO: 514560 events read in total (9949ms).
[10:08:50.208] <TB0> INFO: Expecting 514560 events.
[10:08:59.868] <TB0> INFO: 514560 events read in total (9027ms).
[10:08:59.897] <TB0> INFO: Expecting 514560 events.
[10:09:09.765] <TB0> INFO: 514560 events read in total (9228ms).
[10:09:09.800] <TB0> INFO: Expecting 514560 events.
[10:09:20.542] <TB0> INFO: 514560 events read in total (10110ms).
[10:09:20.574] <TB0> INFO: Expecting 514560 events.
[10:09:31.052] <TB0> INFO: 514560 events read in total (9845ms).
[10:09:31.092] <TB0> INFO: Expecting 514560 events.
[10:09:40.741] <TB0> INFO: 514560 events read in total (9014ms).
[10:09:40.784] <TB0> INFO: Test took 164383ms.
[10:09:41.889] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[10:09:41.898] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[10:09:41.898] <TB0> INFO: run 1 of 1
[10:09:42.209] <TB0> INFO: Expecting 6281600 events.
[10:10:20.810] <TB0> INFO: 879460 events read in total (37886ms).
[10:10:58.910] <TB0> INFO: 1754170 events read in total (75986ms).
[10:11:35.545] <TB0> INFO: 2628040 events read in total (112621ms).
[10:12:14.072] <TB0> INFO: 3496650 events read in total (151148ms).
[10:12:52.671] <TB0> INFO: 4355350 events read in total (189748ms).
[10:13:29.236] <TB0> INFO: 5210770 events read in total (226312ms).
[10:14:04.301] <TB0> INFO: 6066100 events read in total (261377ms).
[10:14:14.194] <TB0> INFO: 6281600 events read in total (271270ms).
[10:14:14.270] <TB0> INFO: Test took 272372ms.
[10:14:14.442] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:14:39.960] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.023946 .. 255.000000
[10:14:40.060] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 10 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[10:14:40.070] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[10:14:40.070] <TB0> INFO: run 1 of 1
[10:14:40.403] <TB0> INFO: Expecting 10649600 events.
[10:15:14.972] <TB0> INFO: 828090 events read in total (33854ms).
[10:15:51.908] <TB0> INFO: 1655520 events read in total (70790ms).
[10:16:26.190] <TB0> INFO: 2482580 events read in total (105072ms).
[10:17:03.356] <TB0> INFO: 3309590 events read in total (142238ms).
[10:17:37.618] <TB0> INFO: 4136910 events read in total (176500ms).
[10:18:14.659] <TB0> INFO: 4964140 events read in total (213541ms).
[10:18:51.078] <TB0> INFO: 5792210 events read in total (249960ms).
[10:19:26.178] <TB0> INFO: 6619950 events read in total (285060ms).
[10:20:02.383] <TB0> INFO: 7446510 events read in total (321265ms).
[10:20:41.111] <TB0> INFO: 8272910 events read in total (359993ms).
[10:21:19.506] <TB0> INFO: 9098670 events read in total (398388ms).
[10:21:51.635] <TB0> INFO: 9925740 events read in total (430517ms).
[10:22:21.686] <TB0> INFO: 10649600 events read in total (460568ms).
[10:22:21.823] <TB0> INFO: Test took 461753ms.
[10:22:22.112] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:22:51.428] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 2.986264 .. 179.884534
[10:22:51.507] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 10 dacrange: 2 .. 189 (-1/-1) hits flags = 528 (plus default)
[10:22:51.516] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[10:22:51.516] <TB0> INFO: run 1 of 1
[10:22:51.838] <TB0> INFO: Expecting 7820800 events.
[10:23:28.936] <TB0> INFO: 848800 events read in total (36383ms).
[10:24:01.417] <TB0> INFO: 1696640 events read in total (68864ms).
[10:24:38.820] <TB0> INFO: 2543600 events read in total (106267ms).
[10:25:14.121] <TB0> INFO: 3390870 events read in total (141568ms).
[10:25:51.853] <TB0> INFO: 4238160 events read in total (179300ms).
[10:26:28.570] <TB0> INFO: 5085180 events read in total (216017ms).
[10:27:01.889] <TB0> INFO: 5932080 events read in total (249336ms).
[10:27:38.227] <TB0> INFO: 6779190 events read in total (285674ms).
[10:28:11.218] <TB0> INFO: 7627880 events read in total (318665ms).
[10:28:20.329] <TB0> INFO: 7820800 events read in total (327776ms).
[10:28:20.398] <TB0> INFO: Test took 328883ms.
[10:28:20.606] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:28:47.594] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 1.500000 .. 116.797838
[10:28:47.692] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 10 dacrange: 1 .. 126 (-1/-1) hits flags = 528 (plus default)
[10:28:47.702] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[10:28:47.702] <TB0> INFO: run 1 of 1
[10:28:48.039] <TB0> INFO: Expecting 5241600 events.
[10:29:27.579] <TB0> INFO: 904420 events read in total (38826ms).
[10:30:06.117] <TB0> INFO: 1807760 events read in total (77364ms).
[10:30:44.913] <TB0> INFO: 2710910 events read in total (116160ms).
[10:31:24.520] <TB0> INFO: 3613960 events read in total (155767ms).
[10:31:59.210] <TB0> INFO: 4516980 events read in total (190457ms).
[10:32:31.193] <TB0> INFO: 5241600 events read in total (222440ms).
[10:32:31.247] <TB0> INFO: Test took 223545ms.
[10:32:31.383] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:32:53.833] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 1.500000 .. 61.575142
[10:32:53.930] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 10 dacrange: 1 .. 71 (-1/-1) hits flags = 528 (plus default)
[10:32:53.939] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[10:32:53.939] <TB0> INFO: run 1 of 1
[10:32:54.277] <TB0> INFO: Expecting 2953600 events.
[10:33:34.683] <TB0> INFO: 1060730 events read in total (39691ms).
[10:34:12.895] <TB0> INFO: 2120950 events read in total (77904ms).
[10:34:43.851] <TB0> INFO: 2953600 events read in total (108860ms).
[10:34:43.885] <TB0> INFO: Test took 109947ms.
[10:34:43.948] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:34:59.447] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:34:59.447] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[10:34:59.455] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[10:34:59.455] <TB0> INFO: run 1 of 1
[10:34:59.760] <TB0> INFO: Expecting 1705600 events.
[10:35:42.804] <TB0> INFO: 1077140 events read in total (42329ms).
[10:36:05.273] <TB0> INFO: 1705600 events read in total (64798ms).
[10:36:05.293] <TB0> INFO: Test took 65837ms.
[10:36:05.333] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:36:20.190] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C0.dat
[10:36:20.190] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C1.dat
[10:36:20.190] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C2.dat
[10:36:20.191] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C3.dat
[10:36:20.191] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C4.dat
[10:36:20.191] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C5.dat
[10:36:20.191] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C6.dat
[10:36:20.192] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C7.dat
[10:36:20.192] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C8.dat
[10:36:20.192] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C9.dat
[10:36:20.193] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C10.dat
[10:36:20.193] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C11.dat
[10:36:20.193] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C12.dat
[10:36:20.194] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C13.dat
[10:36:20.194] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C14.dat
[10:36:20.194] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C15.dat
[10:36:20.194] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C0.dat
[10:36:20.203] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C1.dat
[10:36:20.211] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C2.dat
[10:36:20.219] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C3.dat
[10:36:20.227] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C4.dat
[10:36:20.235] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C5.dat
[10:36:20.244] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C6.dat
[10:36:20.252] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C7.dat
[10:36:20.261] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C8.dat
[10:36:20.269] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C9.dat
[10:36:20.278] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C10.dat
[10:36:20.285] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C11.dat
[10:36:20.293] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C12.dat
[10:36:20.302] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C13.dat
[10:36:20.310] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C14.dat
[10:36:20.317] <TB0> INFO: write trim parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C15.dat
[10:36:20.326] <TB0> INFO: PixTestTrim::trimTest() done
[10:36:20.326] <TB0> INFO: vtrim: 96 115 111 101 121 110 119 110 85 118 110 112 123 121 109 130
[10:36:20.326] <TB0> INFO: vthrcomp: 102 100 100 95 104 97 99 104 107 101 90 107 106 100 104 105
[10:36:20.326] <TB0> INFO: vcal mean: 34.98 34.84 34.57 34.96 35.00 34.79 34.73 35.00 35.01 35.01 34.97 34.98 34.97 34.84 34.90 34.90
[10:36:20.326] <TB0> INFO: vcal RMS: 1.14 2.25 3.88 1.02 0.95 2.57 3.11 0.85 0.85 1.18 1.03 0.82 0.94 2.01 2.19 2.21
[10:36:20.326] <TB0> INFO: bits mean: 9.40 9.38 8.79 9.66 8.48 8.69 9.31 8.68 7.93 9.40 9.24 8.81 8.40 8.95 8.39 8.77
[10:36:20.326] <TB0> INFO: bits RMS: 2.72 2.57 2.49 2.59 2.63 2.93 2.49 2.66 2.86 2.67 2.74 2.66 2.60 2.75 2.74 2.54
[10:36:20.333] <TB0> INFO: ----------------------------------------------------------------------
[10:36:20.333] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[10:36:20.333] <TB0> INFO: ----------------------------------------------------------------------
[10:36:20.335] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[10:36:20.345] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[10:36:20.345] <TB0> INFO: run 1 of 1
[10:36:20.665] <TB0> INFO: Expecting 8320000 events.
[10:37:02.614] <TB0> INFO: 1246320 events read in total (41234ms).
[10:37:47.337] <TB0> INFO: 2478210 events read in total (85957ms).
[10:38:26.106] <TB0> INFO: 3701860 events read in total (124726ms).
[10:39:06.920] <TB0> INFO: 4910120 events read in total (165540ms).
[10:39:49.929] <TB0> INFO: 6111190 events read in total (208549ms).
[10:40:33.319] <TB0> INFO: 7309990 events read in total (251939ms).
[10:41:09.722] <TB0> INFO: 8320000 events read in total (288342ms).
[10:41:09.777] <TB0> INFO: Test took 289431ms.
[10:41:09.875] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:41:36.725] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[10:41:36.733] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[10:41:36.733] <TB0> INFO: run 1 of 1
[10:41:37.037] <TB0> INFO: Expecting 7696000 events.
[10:42:20.198] <TB0> INFO: 1239070 events read in total (42446ms).
[10:43:05.048] <TB0> INFO: 2461790 events read in total (87296ms).
[10:43:42.024] <TB0> INFO: 3676380 events read in total (124272ms).
[10:44:26.795] <TB0> INFO: 4873130 events read in total (169043ms).
[10:45:10.943] <TB0> INFO: 6065920 events read in total (213191ms).
[10:45:55.533] <TB0> INFO: 7260560 events read in total (257781ms).
[10:46:10.938] <TB0> INFO: 7696000 events read in total (273186ms).
[10:46:10.987] <TB0> INFO: Test took 274254ms.
[10:46:11.074] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:36.785] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[10:46:36.795] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[10:46:36.795] <TB0> INFO: run 1 of 1
[10:46:37.115] <TB0> INFO: Expecting 7696000 events.
[10:47:22.582] <TB0> INFO: 1238700 events read in total (44752ms).
[10:48:07.719] <TB0> INFO: 2461450 events read in total (89889ms).
[10:48:51.143] <TB0> INFO: 3676180 events read in total (133313ms).
[10:49:33.736] <TB0> INFO: 4872850 events read in total (175906ms).
[10:50:17.521] <TB0> INFO: 6065580 events read in total (219691ms).
[10:51:01.001] <TB0> INFO: 7259410 events read in total (263171ms).
[10:51:17.652] <TB0> INFO: 7696000 events read in total (279822ms).
[10:51:17.699] <TB0> INFO: Test took 280904ms.
[10:51:17.789] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:44.109] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[10:51:44.118] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[10:51:44.118] <TB0> INFO: run 1 of 1
[10:51:44.422] <TB0> INFO: Expecting 7696000 events.
[10:52:30.801] <TB0> INFO: 1238160 events read in total (45664ms).
[10:53:15.474] <TB0> INFO: 2460430 events read in total (90337ms).
[10:54:00.871] <TB0> INFO: 3674380 events read in total (135735ms).
[10:54:37.091] <TB0> INFO: 4870470 events read in total (171954ms).
[10:55:20.543] <TB0> INFO: 6062110 events read in total (215406ms).
[10:56:08.450] <TB0> INFO: 7255460 events read in total (263313ms).
[10:56:25.862] <TB0> INFO: 7696000 events read in total (280725ms).
[10:56:25.909] <TB0> INFO: Test took 281791ms.
[10:56:25.999] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:56:51.139] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[10:56:51.148] <TB0> INFO: dacScan split into 1 runs with ntrig = 10
[10:56:51.148] <TB0> INFO: run 1 of 1
[10:56:51.464] <TB0> INFO: Expecting 7696000 events.
[10:57:40.763] <TB0> INFO: 1237770 events read in total (48584ms).
[10:58:27.849] <TB0> INFO: 2460070 events read in total (95670ms).
[10:59:16.213] <TB0> INFO: 3673540 events read in total (144034ms).
[11:00:04.198] <TB0> INFO: 4868750 events read in total (192019ms).
[11:00:50.389] <TB0> INFO: 6060010 events read in total (238210ms).
[11:01:36.671] <TB0> INFO: 7252530 events read in total (284492ms).
[11:01:54.196] <TB0> INFO: 7696000 events read in total (302017ms).
[11:01:54.233] <TB0> INFO: Test took 303085ms.
[11:01:54.318] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:17.955] <TB0> INFO: PixTestTrim::trimBitTest() done
[11:02:17.956] <TB0> INFO: PixTestTrim::doTest() done, duration: 3851 seconds
[11:02:17.956] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:17.956] <TB0> INFO: Decoding statistics:
[11:02:17.956] <TB0> INFO: General information:
[11:02:17.956] <TB0> INFO: 16bit words read: 0
[11:02:17.956] <TB0> INFO: valid events total: 0
[11:02:17.956] <TB0> INFO: empty events: 0
[11:02:17.956] <TB0> INFO: valid events with pixels: 0
[11:02:17.956] <TB0> INFO: valid pixel hits: 0
[11:02:17.956] <TB0> INFO: Event errors: 0
[11:02:17.956] <TB0> INFO: start marker: 0
[11:02:17.956] <TB0> INFO: stop marker: 0
[11:02:17.956] <TB0> INFO: overflow: 0
[11:02:17.956] <TB0> INFO: invalid 5bit words: 0
[11:02:17.956] <TB0> INFO: invalid XOR eye diagram: 0
[11:02:17.956] <TB0> INFO: TBM errors: 0
[11:02:17.956] <TB0> INFO: flawed TBM headers: 0
[11:02:17.956] <TB0> INFO: flawed TBM trailers: 0
[11:02:17.956] <TB0> INFO: event ID mismatches: 0
[11:02:17.956] <TB0> INFO: ROC errors: 0
[11:02:17.956] <TB0> INFO: missing ROC header(s): 0
[11:02:17.956] <TB0> INFO: misplaced readback start: 0
[11:02:17.956] <TB0> INFO: Pixel decoding errors: 0
[11:02:17.956] <TB0> INFO: pixel data incomplete: 0
[11:02:17.956] <TB0> INFO: pixel address: 0
[11:02:17.956] <TB0> INFO: pulse height fill bit: 0
[11:02:17.956] <TB0> INFO: buffer corruption: 0
[11:02:18.623] <TB0> INFO: ######################################################################
[11:02:18.623] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[11:02:18.623] <TB0> INFO: ######################################################################
[11:02:18.926] <TB0> INFO: Expecting 41600 events.
[11:02:22.884] <TB0> INFO: 41600 events read in total (3243ms).
[11:02:22.884] <TB0> INFO: Test took 4260ms.
[11:02:22.892] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:23.583] <TB0> INFO: Expecting 41600 events.
[11:02:27.649] <TB0> INFO: 41600 events read in total (3351ms).
[11:02:27.650] <TB0> INFO: Test took 4401ms.
[11:02:27.657] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:28.105] <TB0> INFO: Expecting 41600 events.
[11:02:32.196] <TB0> INFO: 41600 events read in total (3376ms).
[11:02:32.197] <TB0> INFO: Test took 4415ms.
[11:02:32.204] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:32.631] <TB0> INFO: Expecting 2560 events.
[11:02:33.587] <TB0> INFO: 2560 events read in total (241ms).
[11:02:33.588] <TB0> INFO: Test took 1376ms.
[11:02:34.095] <TB0> INFO: Expecting 2560 events.
[11:02:35.052] <TB0> INFO: 2560 events read in total (242ms).
[11:02:35.052] <TB0> INFO: Test took 1464ms.
[11:02:35.560] <TB0> INFO: Expecting 2560 events.
[11:02:36.516] <TB0> INFO: 2560 events read in total (243ms).
[11:02:36.517] <TB0> INFO: Test took 1465ms.
[11:02:37.024] <TB0> INFO: Expecting 2560 events.
[11:02:37.980] <TB0> INFO: 2560 events read in total (241ms).
[11:02:37.981] <TB0> INFO: Test took 1464ms.
[11:02:38.488] <TB0> INFO: Expecting 2560 events.
[11:02:39.444] <TB0> INFO: 2560 events read in total (241ms).
[11:02:39.444] <TB0> INFO: Test took 1463ms.
[11:02:39.951] <TB0> INFO: Expecting 2560 events.
[11:02:40.907] <TB0> INFO: 2560 events read in total (241ms).
[11:02:40.907] <TB0> INFO: Test took 1463ms.
[11:02:41.414] <TB0> INFO: Expecting 2560 events.
[11:02:42.370] <TB0> INFO: 2560 events read in total (241ms).
[11:02:42.370] <TB0> INFO: Test took 1463ms.
[11:02:42.877] <TB0> INFO: Expecting 2560 events.
[11:02:43.833] <TB0> INFO: 2560 events read in total (241ms).
[11:02:43.833] <TB0> INFO: Test took 1463ms.
[11:02:44.341] <TB0> INFO: Expecting 2560 events.
[11:02:45.297] <TB0> INFO: 2560 events read in total (242ms).
[11:02:45.297] <TB0> INFO: Test took 1464ms.
[11:02:45.804] <TB0> INFO: Expecting 2560 events.
[11:02:46.761] <TB0> INFO: 2560 events read in total (242ms).
[11:02:46.761] <TB0> INFO: Test took 1464ms.
[11:02:47.268] <TB0> INFO: Expecting 2560 events.
[11:02:48.239] <TB0> INFO: 2560 events read in total (256ms).
[11:02:48.239] <TB0> INFO: Test took 1478ms.
[11:02:48.746] <TB0> INFO: Expecting 2560 events.
[11:02:49.702] <TB0> INFO: 2560 events read in total (241ms).
[11:02:49.702] <TB0> INFO: Test took 1463ms.
[11:02:50.210] <TB0> INFO: Expecting 2560 events.
[11:02:51.165] <TB0> INFO: 2560 events read in total (240ms).
[11:02:51.166] <TB0> INFO: Test took 1464ms.
[11:02:51.673] <TB0> INFO: Expecting 2560 events.
[11:02:52.636] <TB0> INFO: 2560 events read in total (248ms).
[11:02:52.636] <TB0> INFO: Test took 1470ms.
[11:02:53.144] <TB0> INFO: Expecting 2560 events.
[11:02:54.107] <TB0> INFO: 2560 events read in total (249ms).
[11:02:54.107] <TB0> INFO: Test took 1471ms.
[11:02:54.615] <TB0> INFO: Expecting 2560 events.
[11:02:55.593] <TB0> INFO: 2560 events read in total (263ms).
[11:02:55.593] <TB0> INFO: Test took 1485ms.
[11:02:55.597] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:02:56.102] <TB0> INFO: Expecting 655360 events.
[11:03:08.672] <TB0> INFO: 655360 events read in total (11855ms).
[11:03:08.681] <TB0> INFO: Expecting 655360 events.
[11:03:21.140] <TB0> INFO: 655360 events read in total (11873ms).
[11:03:21.153] <TB0> INFO: Expecting 655360 events.
[11:03:33.824] <TB0> INFO: 655360 events read in total (12073ms).
[11:03:33.839] <TB0> INFO: Expecting 655360 events.
[11:03:46.381] <TB0> INFO: 655360 events read in total (11958ms).
[11:03:46.399] <TB0> INFO: Expecting 655360 events.
[11:03:59.354] <TB0> INFO: 655360 events read in total (12365ms).
[11:03:59.377] <TB0> INFO: Expecting 655360 events.
[11:04:11.893] <TB0> INFO: 655360 events read in total (11928ms).
[11:04:11.921] <TB0> INFO: Expecting 655360 events.
[11:04:24.337] <TB0> INFO: 655360 events read in total (11835ms).
[11:04:24.376] <TB0> INFO: Expecting 655360 events.
[11:04:37.070] <TB0> INFO: 655360 events read in total (12142ms).
[11:04:37.103] <TB0> INFO: Expecting 655360 events.
[11:04:49.822] <TB0> INFO: 655360 events read in total (12155ms).
[11:04:49.870] <TB0> INFO: Expecting 655360 events.
[11:05:02.461] <TB0> INFO: 655360 events read in total (12059ms).
[11:05:02.506] <TB0> INFO: Expecting 655360 events.
[11:05:15.037] <TB0> INFO: 655360 events read in total (11967ms).
[11:05:15.088] <TB0> INFO: Expecting 655360 events.
[11:05:27.834] <TB0> INFO: 655360 events read in total (12195ms).
[11:05:27.879] <TB0> INFO: Expecting 655360 events.
[11:05:39.151] <TB0> INFO: 655360 events read in total (10724ms).
[11:05:39.204] <TB0> INFO: Expecting 655360 events.
[11:05:50.405] <TB0> INFO: 655360 events read in total (10640ms).
[11:05:50.476] <TB0> INFO: Expecting 655360 events.
[11:06:01.853] <TB0> INFO: 655360 events read in total (10835ms).
[11:06:01.913] <TB0> INFO: Expecting 655360 events.
[11:06:13.785] <TB0> INFO: 655360 events read in total (11322ms).
[11:06:13.849] <TB0> INFO: Test took 198253ms.
[11:06:13.928] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:06:14.236] <TB0> INFO: Expecting 655360 events.
[11:06:26.973] <TB0> INFO: 655360 events read in total (12022ms).
[11:06:26.981] <TB0> INFO: Expecting 655360 events.
[11:06:39.373] <TB0> INFO: 655360 events read in total (11777ms).
[11:06:39.391] <TB0> INFO: Expecting 655360 events.
[11:06:51.717] <TB0> INFO: 655360 events read in total (11726ms).
[11:06:51.732] <TB0> INFO: Expecting 655360 events.
[11:07:04.206] <TB0> INFO: 655360 events read in total (11880ms).
[11:07:04.226] <TB0> INFO: Expecting 655360 events.
[11:07:16.946] <TB0> INFO: 655360 events read in total (12122ms).
[11:07:16.968] <TB0> INFO: Expecting 655360 events.
[11:07:29.679] <TB0> INFO: 655360 events read in total (12119ms).
[11:07:29.705] <TB0> INFO: Expecting 655360 events.
[11:07:42.578] <TB0> INFO: 655360 events read in total (12281ms).
[11:07:42.606] <TB0> INFO: Expecting 655360 events.
[11:07:55.308] <TB0> INFO: 655360 events read in total (12128ms).
[11:07:55.340] <TB0> INFO: Expecting 655360 events.
[11:08:07.695] <TB0> INFO: 655360 events read in total (11768ms).
[11:08:07.730] <TB0> INFO: Expecting 655360 events.
[11:08:19.943] <TB0> INFO: 655360 events read in total (11624ms).
[11:08:19.982] <TB0> INFO: Expecting 655360 events.
[11:08:32.208] <TB0> INFO: 655360 events read in total (11645ms).
[11:08:32.252] <TB0> INFO: Expecting 655360 events.
[11:08:44.678] <TB0> INFO: 655360 events read in total (11857ms).
[11:08:44.732] <TB0> INFO: Expecting 655360 events.
[11:08:57.211] <TB0> INFO: 655360 events read in total (11924ms).
[11:08:57.261] <TB0> INFO: Expecting 655360 events.
[11:09:09.742] <TB0> INFO: 655360 events read in total (11918ms).
[11:09:09.810] <TB0> INFO: Expecting 655360 events.
[11:09:22.096] <TB0> INFO: 655360 events read in total (11759ms).
[11:09:22.152] <TB0> INFO: Expecting 655360 events.
[11:09:34.709] <TB0> INFO: 655360 events read in total (11993ms).
[11:09:34.769] <TB0> INFO: Test took 200841ms.
[11:09:34.952] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:09:34.964] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:09:34.978] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:09:34.988] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:09:34.996] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:09:35.003] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:09:35.011] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:09:35.018] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:09:35.024] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:09:35.031] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[11:09:35.038] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:09:35.044] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:09:35.051] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:09:35.058] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:09:35.064] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:09:35.070] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:09:35.077] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[11:09:35.113] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C0.dat
[11:09:35.113] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C1.dat
[11:09:35.113] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C2.dat
[11:09:35.113] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C3.dat
[11:09:35.113] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C4.dat
[11:09:35.113] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C5.dat
[11:09:35.113] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C6.dat
[11:09:35.113] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C7.dat
[11:09:35.113] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C8.dat
[11:09:35.113] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C9.dat
[11:09:35.114] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C10.dat
[11:09:35.114] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C11.dat
[11:09:35.114] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C12.dat
[11:09:35.114] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C13.dat
[11:09:35.114] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C14.dat
[11:09:35.114] <TB0> INFO: write dac parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C15.dat
[11:09:35.413] <TB0> INFO: Expecting 41600 events.
[11:09:39.165] <TB0> INFO: 41600 events read in total (3038ms).
[11:09:39.165] <TB0> INFO: Test took 4048ms.
[11:09:39.799] <TB0> INFO: Expecting 41600 events.
[11:09:43.537] <TB0> INFO: 41600 events read in total (3023ms).
[11:09:43.538] <TB0> INFO: Test took 4035ms.
[11:09:44.169] <TB0> INFO: Expecting 41600 events.
[11:09:47.928] <TB0> INFO: 41600 events read in total (3044ms).
[11:09:47.928] <TB0> INFO: Test took 4054ms.
[11:09:48.265] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:09:48.396] <TB0> INFO: Expecting 2560 events.
[11:09:49.351] <TB0> INFO: 2560 events read in total (241ms).
[11:09:49.352] <TB0> INFO: Test took 1087ms.
[11:09:49.353] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:09:49.860] <TB0> INFO: Expecting 2560 events.
[11:09:50.816] <TB0> INFO: 2560 events read in total (241ms).
[11:09:50.816] <TB0> INFO: Test took 1463ms.
[11:09:50.817] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:09:51.324] <TB0> INFO: Expecting 2560 events.
[11:09:52.280] <TB0> INFO: 2560 events read in total (241ms).
[11:09:52.280] <TB0> INFO: Test took 1463ms.
[11:09:52.282] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:09:52.788] <TB0> INFO: Expecting 2560 events.
[11:09:53.744] <TB0> INFO: 2560 events read in total (241ms).
[11:09:53.744] <TB0> INFO: Test took 1462ms.
[11:09:53.747] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:09:54.253] <TB0> INFO: Expecting 2560 events.
[11:09:55.208] <TB0> INFO: 2560 events read in total (241ms).
[11:09:55.209] <TB0> INFO: Test took 1462ms.
[11:09:55.210] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:09:55.717] <TB0> INFO: Expecting 2560 events.
[11:09:56.673] <TB0> INFO: 2560 events read in total (241ms).
[11:09:56.673] <TB0> INFO: Test took 1463ms.
[11:09:56.675] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:09:57.181] <TB0> INFO: Expecting 2560 events.
[11:09:58.137] <TB0> INFO: 2560 events read in total (241ms).
[11:09:58.137] <TB0> INFO: Test took 1462ms.
[11:09:58.139] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:09:58.645] <TB0> INFO: Expecting 2560 events.
[11:09:59.601] <TB0> INFO: 2560 events read in total (241ms).
[11:09:59.601] <TB0> INFO: Test took 1462ms.
[11:09:59.603] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:00.109] <TB0> INFO: Expecting 2560 events.
[11:10:01.065] <TB0> INFO: 2560 events read in total (241ms).
[11:10:01.065] <TB0> INFO: Test took 1462ms.
[11:10:01.067] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:01.574] <TB0> INFO: Expecting 2560 events.
[11:10:02.530] <TB0> INFO: 2560 events read in total (241ms).
[11:10:02.530] <TB0> INFO: Test took 1463ms.
[11:10:02.532] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:03.038] <TB0> INFO: Expecting 2560 events.
[11:10:03.994] <TB0> INFO: 2560 events read in total (241ms).
[11:10:03.994] <TB0> INFO: Test took 1462ms.
[11:10:03.996] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:04.503] <TB0> INFO: Expecting 2560 events.
[11:10:05.458] <TB0> INFO: 2560 events read in total (241ms).
[11:10:05.458] <TB0> INFO: Test took 1462ms.
[11:10:05.460] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:05.967] <TB0> INFO: Expecting 2560 events.
[11:10:06.922] <TB0> INFO: 2560 events read in total (241ms).
[11:10:06.922] <TB0> INFO: Test took 1462ms.
[11:10:06.924] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:07.431] <TB0> INFO: Expecting 2560 events.
[11:10:08.387] <TB0> INFO: 2560 events read in total (241ms).
[11:10:08.387] <TB0> INFO: Test took 1463ms.
[11:10:08.389] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:08.896] <TB0> INFO: Expecting 2560 events.
[11:10:09.853] <TB0> INFO: 2560 events read in total (242ms).
[11:10:09.853] <TB0> INFO: Test took 1464ms.
[11:10:09.855] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:10.362] <TB0> INFO: Expecting 2560 events.
[11:10:11.318] <TB0> INFO: 2560 events read in total (241ms).
[11:10:11.319] <TB0> INFO: Test took 1464ms.
[11:10:11.320] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:11.828] <TB0> INFO: Expecting 2560 events.
[11:10:12.784] <TB0> INFO: 2560 events read in total (241ms).
[11:10:12.785] <TB0> INFO: Test took 1465ms.
[11:10:12.787] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:13.293] <TB0> INFO: Expecting 2560 events.
[11:10:14.250] <TB0> INFO: 2560 events read in total (242ms).
[11:10:14.250] <TB0> INFO: Test took 1464ms.
[11:10:14.252] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:14.759] <TB0> INFO: Expecting 2560 events.
[11:10:15.716] <TB0> INFO: 2560 events read in total (242ms).
[11:10:15.716] <TB0> INFO: Test took 1464ms.
[11:10:15.718] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:16.226] <TB0> INFO: Expecting 2560 events.
[11:10:17.182] <TB0> INFO: 2560 events read in total (241ms).
[11:10:17.183] <TB0> INFO: Test took 1465ms.
[11:10:17.184] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:17.691] <TB0> INFO: Expecting 2560 events.
[11:10:18.648] <TB0> INFO: 2560 events read in total (242ms).
[11:10:18.648] <TB0> INFO: Test took 1464ms.
[11:10:18.650] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:19.157] <TB0> INFO: Expecting 2560 events.
[11:10:20.114] <TB0> INFO: 2560 events read in total (242ms).
[11:10:20.114] <TB0> INFO: Test took 1464ms.
[11:10:20.116] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:20.623] <TB0> INFO: Expecting 2560 events.
[11:10:21.580] <TB0> INFO: 2560 events read in total (242ms).
[11:10:21.580] <TB0> INFO: Test took 1464ms.
[11:10:21.582] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:22.089] <TB0> INFO: Expecting 2560 events.
[11:10:23.046] <TB0> INFO: 2560 events read in total (242ms).
[11:10:23.046] <TB0> INFO: Test took 1464ms.
[11:10:23.048] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:23.554] <TB0> INFO: Expecting 2560 events.
[11:10:24.511] <TB0> INFO: 2560 events read in total (242ms).
[11:10:24.511] <TB0> INFO: Test took 1464ms.
[11:10:24.514] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:25.020] <TB0> INFO: Expecting 2560 events.
[11:10:25.977] <TB0> INFO: 2560 events read in total (242ms).
[11:10:25.977] <TB0> INFO: Test took 1463ms.
[11:10:25.979] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:26.486] <TB0> INFO: Expecting 2560 events.
[11:10:27.442] <TB0> INFO: 2560 events read in total (242ms).
[11:10:27.443] <TB0> INFO: Test took 1464ms.
[11:10:27.445] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:27.951] <TB0> INFO: Expecting 2560 events.
[11:10:28.908] <TB0> INFO: 2560 events read in total (242ms).
[11:10:28.908] <TB0> INFO: Test took 1464ms.
[11:10:28.910] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:29.417] <TB0> INFO: Expecting 2560 events.
[11:10:30.375] <TB0> INFO: 2560 events read in total (243ms).
[11:10:30.375] <TB0> INFO: Test took 1465ms.
[11:10:30.377] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:30.884] <TB0> INFO: Expecting 2560 events.
[11:10:31.840] <TB0> INFO: 2560 events read in total (241ms).
[11:10:31.840] <TB0> INFO: Test took 1463ms.
[11:10:31.842] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:32.349] <TB0> INFO: Expecting 2560 events.
[11:10:33.306] <TB0> INFO: 2560 events read in total (242ms).
[11:10:33.306] <TB0> INFO: Test took 1464ms.
[11:10:33.308] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:10:33.815] <TB0> INFO: Expecting 2560 events.
[11:10:34.772] <TB0> INFO: 2560 events read in total (242ms).
[11:10:34.772] <TB0> INFO: Test took 1464ms.
[11:10:35.467] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 496 seconds
[11:10:35.467] <TB0> INFO: PH scale (per ROC): 73 64 68 70 70 67 67 68 70 65 70 78 68 74 70 67
[11:10:35.467] <TB0> INFO: PH offset (per ROC): 178 187 190 164 180 194 181 184 176 177 177 175 183 177 181 187
[11:10:35.471] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:10:35.471] <TB0> INFO: Decoding statistics:
[11:10:35.471] <TB0> INFO: General information:
[11:10:35.471] <TB0> INFO: 16bit words read: 66454
[11:10:35.471] <TB0> INFO: valid events total: 5120
[11:10:35.471] <TB0> INFO: empty events: 2613
[11:10:35.471] <TB0> INFO: valid events with pixels: 2507
[11:10:35.471] <TB0> INFO: valid pixel hits: 2507
[11:10:35.471] <TB0> INFO: Event errors: 0
[11:10:35.471] <TB0> INFO: start marker: 0
[11:10:35.471] <TB0> INFO: stop marker: 0
[11:10:35.471] <TB0> INFO: overflow: 0
[11:10:35.471] <TB0> INFO: invalid 5bit words: 0
[11:10:35.471] <TB0> INFO: invalid XOR eye diagram: 0
[11:10:35.471] <TB0> INFO: TBM errors: 0
[11:10:35.471] <TB0> INFO: flawed TBM headers: 0
[11:10:35.471] <TB0> INFO: flawed TBM trailers: 0
[11:10:35.471] <TB0> INFO: event ID mismatches: 0
[11:10:35.471] <TB0> INFO: ROC errors: 0
[11:10:35.471] <TB0> INFO: missing ROC header(s): 0
[11:10:35.471] <TB0> INFO: misplaced readback start: 0
[11:10:35.471] <TB0> INFO: Pixel decoding errors: 0
[11:10:35.471] <TB0> INFO: pixel data incomplete: 0
[11:10:35.471] <TB0> INFO: pixel address: 0
[11:10:35.471] <TB0> INFO: pulse height fill bit: 0
[11:10:35.471] <TB0> INFO: buffer corruption: 0
[11:10:35.633] <TB0> INFO: ######################################################################
[11:10:35.633] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[11:10:35.633] <TB0> INFO: ######################################################################
[11:10:35.643] <TB0> INFO: scanning low vcal = 10
[11:10:35.943] <TB0> INFO: Expecting 41600 events.
[11:10:39.635] <TB0> INFO: 41600 events read in total (2978ms).
[11:10:39.635] <TB0> INFO: Test took 3992ms.
[11:10:39.636] <TB0> INFO: scanning low vcal = 20
[11:10:40.143] <TB0> INFO: Expecting 41600 events.
[11:10:43.835] <TB0> INFO: 41600 events read in total (2977ms).
[11:10:43.835] <TB0> INFO: Test took 4199ms.
[11:10:43.837] <TB0> INFO: scanning low vcal = 30
[11:10:44.343] <TB0> INFO: Expecting 41600 events.
[11:10:48.055] <TB0> INFO: 41600 events read in total (2997ms).
[11:10:48.055] <TB0> INFO: Test took 4218ms.
[11:10:48.057] <TB0> INFO: scanning low vcal = 40
[11:10:48.557] <TB0> INFO: Expecting 41600 events.
[11:10:52.682] <TB0> INFO: 41600 events read in total (3410ms).
[11:10:52.683] <TB0> INFO: Test took 4626ms.
[11:10:52.685] <TB0> INFO: scanning low vcal = 50
[11:10:53.137] <TB0> INFO: Expecting 41600 events.
[11:10:57.313] <TB0> INFO: 41600 events read in total (3461ms).
[11:10:57.313] <TB0> INFO: Test took 4628ms.
[11:10:57.316] <TB0> INFO: scanning low vcal = 60
[11:10:57.769] <TB0> INFO: Expecting 41600 events.
[11:11:01.945] <TB0> INFO: 41600 events read in total (3461ms).
[11:11:01.945] <TB0> INFO: Test took 4629ms.
[11:11:01.948] <TB0> INFO: scanning low vcal = 70
[11:11:02.401] <TB0> INFO: Expecting 41600 events.
[11:11:06.577] <TB0> INFO: 41600 events read in total (3461ms).
[11:11:06.577] <TB0> INFO: Test took 4629ms.
[11:11:06.580] <TB0> INFO: scanning low vcal = 80
[11:11:07.033] <TB0> INFO: Expecting 41600 events.
[11:11:11.213] <TB0> INFO: 41600 events read in total (3465ms).
[11:11:11.214] <TB0> INFO: Test took 4634ms.
[11:11:11.217] <TB0> INFO: scanning low vcal = 90
[11:11:11.670] <TB0> INFO: Expecting 41600 events.
[11:11:15.846] <TB0> INFO: 41600 events read in total (3461ms).
[11:11:15.846] <TB0> INFO: Test took 4629ms.
[11:11:15.849] <TB0> INFO: scanning low vcal = 100
[11:11:16.301] <TB0> INFO: Expecting 41600 events.
[11:11:20.609] <TB0> INFO: 41600 events read in total (3593ms).
[11:11:20.610] <TB0> INFO: Test took 4761ms.
[11:11:20.612] <TB0> INFO: scanning low vcal = 110
[11:11:21.065] <TB0> INFO: Expecting 41600 events.
[11:11:25.240] <TB0> INFO: 41600 events read in total (3460ms).
[11:11:25.241] <TB0> INFO: Test took 4629ms.
[11:11:25.243] <TB0> INFO: scanning low vcal = 120
[11:11:25.696] <TB0> INFO: Expecting 41600 events.
[11:11:29.872] <TB0> INFO: 41600 events read in total (3461ms).
[11:11:29.872] <TB0> INFO: Test took 4629ms.
[11:11:29.875] <TB0> INFO: scanning low vcal = 130
[11:11:30.328] <TB0> INFO: Expecting 41600 events.
[11:11:34.503] <TB0> INFO: 41600 events read in total (3460ms).
[11:11:34.504] <TB0> INFO: Test took 4629ms.
[11:11:34.506] <TB0> INFO: scanning low vcal = 140
[11:11:34.959] <TB0> INFO: Expecting 41600 events.
[11:11:39.135] <TB0> INFO: 41600 events read in total (3461ms).
[11:11:39.136] <TB0> INFO: Test took 4630ms.
[11:11:39.138] <TB0> INFO: scanning low vcal = 150
[11:11:39.592] <TB0> INFO: Expecting 41600 events.
[11:11:43.765] <TB0> INFO: 41600 events read in total (3458ms).
[11:11:43.765] <TB0> INFO: Test took 4627ms.
[11:11:43.768] <TB0> INFO: scanning low vcal = 160
[11:11:44.221] <TB0> INFO: Expecting 41600 events.
[11:11:48.397] <TB0> INFO: 41600 events read in total (3461ms).
[11:11:48.397] <TB0> INFO: Test took 4629ms.
[11:11:48.400] <TB0> INFO: scanning low vcal = 170
[11:11:48.853] <TB0> INFO: Expecting 41600 events.
[11:11:53.036] <TB0> INFO: 41600 events read in total (3468ms).
[11:11:53.036] <TB0> INFO: Test took 4636ms.
[11:11:53.040] <TB0> INFO: scanning low vcal = 180
[11:11:53.490] <TB0> INFO: Expecting 41600 events.
[11:11:57.668] <TB0> INFO: 41600 events read in total (3463ms).
[11:11:57.668] <TB0> INFO: Test took 4628ms.
[11:11:57.671] <TB0> INFO: scanning low vcal = 190
[11:11:58.124] <TB0> INFO: Expecting 41600 events.
[11:12:02.299] <TB0> INFO: 41600 events read in total (3460ms).
[11:12:02.300] <TB0> INFO: Test took 4629ms.
[11:12:02.302] <TB0> INFO: scanning low vcal = 200
[11:12:02.756] <TB0> INFO: Expecting 41600 events.
[11:12:06.928] <TB0> INFO: 41600 events read in total (3457ms).
[11:12:06.929] <TB0> INFO: Test took 4627ms.
[11:12:06.931] <TB0> INFO: scanning low vcal = 210
[11:12:07.385] <TB0> INFO: Expecting 41600 events.
[11:12:11.562] <TB0> INFO: 41600 events read in total (3462ms).
[11:12:11.563] <TB0> INFO: Test took 4632ms.
[11:12:11.566] <TB0> INFO: scanning low vcal = 220
[11:12:12.019] <TB0> INFO: Expecting 41600 events.
[11:12:16.191] <TB0> INFO: 41600 events read in total (3457ms).
[11:12:16.191] <TB0> INFO: Test took 4625ms.
[11:12:16.194] <TB0> INFO: scanning low vcal = 230
[11:12:16.647] <TB0> INFO: Expecting 41600 events.
[11:12:20.828] <TB0> INFO: 41600 events read in total (3466ms).
[11:12:20.828] <TB0> INFO: Test took 4634ms.
[11:12:20.831] <TB0> INFO: scanning low vcal = 240
[11:12:21.284] <TB0> INFO: Expecting 41600 events.
[11:12:25.460] <TB0> INFO: 41600 events read in total (3461ms).
[11:12:25.460] <TB0> INFO: Test took 4629ms.
[11:12:25.463] <TB0> INFO: scanning low vcal = 250
[11:12:25.917] <TB0> INFO: Expecting 41600 events.
[11:12:30.097] <TB0> INFO: 41600 events read in total (3465ms).
[11:12:30.097] <TB0> INFO: Test took 4634ms.
[11:12:30.101] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[11:12:30.554] <TB0> INFO: Expecting 41600 events.
[11:12:34.735] <TB0> INFO: 41600 events read in total (3466ms).
[11:12:34.736] <TB0> INFO: Test took 4635ms.
[11:12:34.739] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[11:12:35.191] <TB0> INFO: Expecting 41600 events.
[11:12:39.368] <TB0> INFO: 41600 events read in total (3462ms).
[11:12:39.369] <TB0> INFO: Test took 4630ms.
[11:12:39.371] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[11:12:39.825] <TB0> INFO: Expecting 41600 events.
[11:12:43.998] <TB0> INFO: 41600 events read in total (3458ms).
[11:12:43.998] <TB0> INFO: Test took 4627ms.
[11:12:44.001] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[11:12:44.453] <TB0> INFO: Expecting 41600 events.
[11:12:48.626] <TB0> INFO: 41600 events read in total (3458ms).
[11:12:48.627] <TB0> INFO: Test took 4626ms.
[11:12:48.629] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[11:12:49.082] <TB0> INFO: Expecting 41600 events.
[11:12:53.256] <TB0> INFO: 41600 events read in total (3459ms).
[11:12:53.257] <TB0> INFO: Test took 4628ms.
[11:12:53.693] <TB0> INFO: PixTestGainPedestal::measure() done
[11:13:25.605] <TB0> INFO: PixTestGainPedestal::fit() done
[11:13:25.605] <TB0> INFO: non-linearity mean: 0.968 0.956 0.965 0.963 0.960 0.960 0.961 0.947 0.959 0.958 0.955 0.961 0.961 0.954 0.952 0.954
[11:13:25.605] <TB0> INFO: non-linearity RMS: 0.006 0.007 0.007 0.005 0.006 0.007 0.007 0.008 0.006 0.007 0.006 0.006 0.006 0.010 0.007 0.006
[11:13:25.605] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[11:13:25.623] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[11:13:25.641] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[11:13:25.658] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[11:13:25.675] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[11:13:25.693] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[11:13:25.710] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[11:13:25.728] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[11:13:25.746] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[11:13:25.763] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[11:13:25.781] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[11:13:25.799] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[11:13:25.816] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[11:13:25.834] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[11:13:25.852] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[11:13:25.869] <TB0> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[11:13:25.887] <TB0> INFO: PixTestGainPedestal::fullTest() done, duration: 170 seconds
[11:13:25.887] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:13:25.887] <TB0> INFO: Decoding statistics:
[11:13:25.887] <TB0> INFO: General information:
[11:13:25.887] <TB0> INFO: 16bit words read: 2328072
[11:13:25.887] <TB0> INFO: valid events total: 83200
[11:13:25.887] <TB0> INFO: empty events: 0
[11:13:25.887] <TB0> INFO: valid events with pixels: 83200
[11:13:25.887] <TB0> INFO: valid pixel hits: 664836
[11:13:25.887] <TB0> INFO: Event errors: 0
[11:13:25.887] <TB0> INFO: start marker: 0
[11:13:25.887] <TB0> INFO: stop marker: 0
[11:13:25.887] <TB0> INFO: overflow: 0
[11:13:25.887] <TB0> INFO: invalid 5bit words: 0
[11:13:25.887] <TB0> INFO: invalid XOR eye diagram: 0
[11:13:25.887] <TB0> INFO: TBM errors: 0
[11:13:25.887] <TB0> INFO: flawed TBM headers: 0
[11:13:25.887] <TB0> INFO: flawed TBM trailers: 0
[11:13:25.887] <TB0> INFO: event ID mismatches: 0
[11:13:25.887] <TB0> INFO: ROC errors: 0
[11:13:25.887] <TB0> INFO: missing ROC header(s): 0
[11:13:25.887] <TB0> INFO: misplaced readback start: 0
[11:13:25.887] <TB0> INFO: Pixel decoding errors: 0
[11:13:25.887] <TB0> INFO: pixel data incomplete: 0
[11:13:25.887] <TB0> INFO: pixel address: 0
[11:13:25.887] <TB0> INFO: pulse height fill bit: 0
[11:13:25.887] <TB0> INFO: buffer corruption: 0
[11:13:25.893] <TB0> INFO: readReadbackCal: /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C0.dat .. /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C15.dat
[11:13:25.894] <TB0> INFO: ######################################################################
[11:13:25.894] <TB0> INFO: PixTestReadback::doTest()
[11:13:25.894] <TB0> INFO: ######################################################################
[11:13:25.895] <TB0> INFO: PixTestReadback::RES sent once
[11:13:37.046] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C0.dat
[11:13:37.047] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C1.dat
[11:13:37.047] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C2.dat
[11:13:37.047] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C3.dat
[11:13:37.047] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C4.dat
[11:13:37.047] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C5.dat
[11:13:37.047] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C6.dat
[11:13:37.047] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C7.dat
[11:13:37.047] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C8.dat
[11:13:37.047] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C9.dat
[11:13:37.047] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C10.dat
[11:13:37.047] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C11.dat
[11:13:37.048] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C12.dat
[11:13:37.048] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C13.dat
[11:13:37.048] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C14.dat
[11:13:37.048] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C15.dat
[11:13:37.075] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:13:37.076] <TB0> INFO: PixTestReadback::RES sent once
[11:13:48.197] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C0.dat
[11:13:48.198] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C1.dat
[11:13:48.198] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C2.dat
[11:13:48.198] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C3.dat
[11:13:48.198] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C4.dat
[11:13:48.198] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C5.dat
[11:13:48.198] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C6.dat
[11:13:48.198] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C7.dat
[11:13:48.198] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C8.dat
[11:13:48.198] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C9.dat
[11:13:48.198] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C10.dat
[11:13:48.198] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C11.dat
[11:13:48.198] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C12.dat
[11:13:48.198] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C13.dat
[11:13:48.198] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C14.dat
[11:13:48.198] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C15.dat
[11:13:48.227] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:13:48.227] <TB0> INFO: PixTestReadback::RES sent once
[11:13:56.790] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:13:56.790] <TB0> INFO: Vbg will be calibrated using Vd calibration
[11:13:56.790] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 152.7calibrated Vbg = 1.22774 :::*/*/*/*/
[11:13:56.790] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 151.5calibrated Vbg = 1.22162 :::*/*/*/*/
[11:13:56.790] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 162.6calibrated Vbg = 1.2263 :::*/*/*/*/
[11:13:56.790] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 150.8calibrated Vbg = 1.23742 :::*/*/*/*/
[11:13:56.790] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 156.6calibrated Vbg = 1.24047 :::*/*/*/*/
[11:13:56.790] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 155.4calibrated Vbg = 1.24358 :::*/*/*/*/
[11:13:56.790] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 149calibrated Vbg = 1.23807 :::*/*/*/*/
[11:13:56.790] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 154.7calibrated Vbg = 1.23962 :::*/*/*/*/
[11:13:56.790] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 153.9calibrated Vbg = 1.24317 :::*/*/*/*/
[11:13:56.790] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 153.3calibrated Vbg = 1.23805 :::*/*/*/*/
[11:13:56.790] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 156.3calibrated Vbg = 1.23832 :::*/*/*/*/
[11:13:56.790] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 154.6calibrated Vbg = 1.23928 :::*/*/*/*/
[11:13:56.790] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 151.6calibrated Vbg = 1.22821 :::*/*/*/*/
[11:13:56.790] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 157.1calibrated Vbg = 1.22711 :::*/*/*/*/
[11:13:56.790] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 157.1calibrated Vbg = 1.22989 :::*/*/*/*/
[11:13:56.790] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 151.9calibrated Vbg = 1.22766 :::*/*/*/*/
[11:13:56.793] <TB0> INFO: PixTestReadback::RES sent once
[11:16:50.401] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C0.dat
[11:16:50.401] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C1.dat
[11:16:50.401] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C2.dat
[11:16:50.401] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C3.dat
[11:16:50.401] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C4.dat
[11:16:50.401] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C5.dat
[11:16:50.401] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C6.dat
[11:16:50.401] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C7.dat
[11:16:50.401] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C8.dat
[11:16:50.401] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C9.dat
[11:16:50.401] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C10.dat
[11:16:50.401] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C11.dat
[11:16:50.402] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C12.dat
[11:16:50.402] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C13.dat
[11:16:50.402] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C14.dat
[11:16:50.402] <TB0> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3521_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C15.dat
[11:16:50.428] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[11:16:50.429] <TB0> INFO: PixTestReadback::doTest() done
[11:16:50.429] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:16:50.429] <TB0> INFO: Decoding statistics:
[11:16:50.429] <TB0> INFO: General information:
[11:16:50.429] <TB0> INFO: 16bit words read: 768
[11:16:50.429] <TB0> INFO: valid events total: 64
[11:16:50.429] <TB0> INFO: empty events: 64
[11:16:50.429] <TB0> INFO: valid events with pixels: 0
[11:16:50.429] <TB0> INFO: valid pixel hits: 0
[11:16:50.429] <TB0> INFO: Event errors: 0
[11:16:50.429] <TB0> INFO: start marker: 0
[11:16:50.429] <TB0> INFO: stop marker: 0
[11:16:50.429] <TB0> INFO: overflow: 0
[11:16:50.429] <TB0> INFO: invalid 5bit words: 0
[11:16:50.429] <TB0> INFO: invalid XOR eye diagram: 0
[11:16:50.429] <TB0> INFO: TBM errors: 0
[11:16:50.429] <TB0> INFO: flawed TBM headers: 0
[11:16:50.429] <TB0> INFO: flawed TBM trailers: 0
[11:16:50.429] <TB0> INFO: event ID mismatches: 0
[11:16:50.429] <TB0> INFO: ROC errors: 0
[11:16:50.429] <TB0> INFO: missing ROC header(s): 0
[11:16:50.429] <TB0> INFO: misplaced readback start: 0
[11:16:50.429] <TB0> INFO: Pixel decoding errors: 0
[11:16:50.429] <TB0> INFO: pixel data incomplete: 0
[11:16:50.429] <TB0> INFO: pixel address: 0
[11:16:50.429] <TB0> INFO: pulse height fill bit: 0
[11:16:50.429] <TB0> INFO: buffer corruption: 0
[11:16:50.442] <TB0> INFO: Decoding statistics:
[11:16:50.442] <TB0> INFO: General information:
[11:16:50.442] <TB0> INFO: 16bit words read: 2395294
[11:16:50.442] <TB0> INFO: valid events total: 88384
[11:16:50.442] <TB0> INFO: empty events: 2677
[11:16:50.442] <TB0> INFO: valid events with pixels: 85707
[11:16:50.442] <TB0> INFO: valid pixel hits: 667343
[11:16:50.442] <TB0> INFO: Event errors: 0
[11:16:50.442] <TB0> INFO: start marker: 0
[11:16:50.442] <TB0> INFO: stop marker: 0
[11:16:50.442] <TB0> INFO: overflow: 0
[11:16:50.442] <TB0> INFO: invalid 5bit words: 0
[11:16:50.442] <TB0> INFO: invalid XOR eye diagram: 0
[11:16:50.442] <TB0> INFO: TBM errors: 0
[11:16:50.442] <TB0> INFO: flawed TBM headers: 0
[11:16:50.442] <TB0> INFO: flawed TBM trailers: 0
[11:16:50.442] <TB0> INFO: event ID mismatches: 0
[11:16:50.442] <TB0> INFO: ROC errors: 0
[11:16:50.442] <TB0> INFO: missing ROC header(s): 0
[11:16:50.442] <TB0> INFO: misplaced readback start: 0
[11:16:50.442] <TB0> INFO: Pixel decoding errors: 0
[11:16:50.442] <TB0> INFO: pixel data incomplete: 0
[11:16:50.442] <TB0> INFO: pixel address: 0
[11:16:50.442] <TB0> INFO: pulse height fill bit: 0
[11:16:50.442] <TB0> INFO: buffer corruption: 0
[11:16:50.442] <TB0> INFO: enter test to run
[11:16:50.442] <TB0> INFO: test: exit no parameter change
[11:16:50.637] <TB0> QUIET: Connection to board 73 closed.
[11:16:50.717] <TB0> INFO: pXar: this is the end, my friend