[09:39:15.794] <TB1> INFO: *** Welcome to pxar ***
[09:39:15.794] <TB1> INFO: *** Today: 2015/11/03
[09:39:16.107] <TB1> INFO: *** Version: 9da6
[09:39:16.107] <TB1> INFO: readRocDacs: /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C15.dat
[09:39:16.108] <TB1> INFO: readTbmDacs: /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//tbmParameters_C0b.dat
[09:39:16.108] <TB1> INFO: readMaskFile: /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//defaultMaskFile.dat
[09:39:16.108] <TB1> INFO: readTrimFile: /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters_C15.dat
[09:39:16.176] <TB1> INFO: clk: 4
[09:39:16.176] <TB1> INFO: ctr: 4
[09:39:16.176] <TB1> INFO: sda: 19
[09:39:16.176] <TB1> INFO: tin: 9
[09:39:16.176] <TB1> INFO: level: 15
[09:39:16.176] <TB1> INFO: triggerdelay: 0
[09:39:16.176] <TB1> QUIET: Instanciating API for pxar v2.6.0+26~g89693ff
[09:39:16.176] <TB1> INFO: Log level: INFO
[09:39:16.183] <TB1> INFO: Found DTB DTB_WXBYFL
[09:39:16.195] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[09:39:16.199] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.2
SW version: 4.5
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[09:39:16.201] <TB1> INFO: RPC call hashes of host and DTB match: 398089610
[09:39:17.756] <TB1> INFO: DUT info:
[09:39:17.756] <TB1> INFO: The DUT currently contains the following objects:
[09:39:17.756] <TB1> INFO: 2 TBM Cores tbm08c (2 ON)
[09:39:17.756] <TB1> INFO: TBM Core alpha (0): 7 registers set
[09:39:17.756] <TB1> INFO: TBM Core beta (1): 7 registers set
[09:39:17.756] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[09:39:17.756] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:17.756] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:17.756] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:17.756] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:17.756] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:17.756] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:17.756] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:17.756] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:17.756] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:17.756] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:17.756] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:17.756] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:17.756] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:17.756] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:17.756] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:17.756] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:18.158] <TB1> INFO: enter 'restricted' command line mode
[09:39:18.158] <TB1> INFO: enter test to run
[09:39:18.158] <TB1> INFO: test: pretest no parameter change
[09:39:18.158] <TB1> INFO: running: pretest
[09:39:18.165] <TB1> INFO: ######################################################################
[09:39:18.165] <TB1> INFO: PixTestPretest::doTest()
[09:39:18.165] <TB1> INFO: ######################################################################
[09:39:18.167] <TB1> INFO: ----------------------------------------------------------------------
[09:39:18.167] <TB1> INFO: PixTestPretest::programROC()
[09:39:18.167] <TB1> INFO: ----------------------------------------------------------------------
[09:39:36.190] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:39:36.190] <TB1> INFO: IA differences per ROC: 16.1 16.1 18.5 17.7 18.5 18.5 18.5 18.5 18.5 16.1 16.9 16.9 16.9 16.9 17.7 17.7
[09:39:36.291] <TB1> INFO: ----------------------------------------------------------------------
[09:39:36.291] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:39:36.291] <TB1> INFO: ----------------------------------------------------------------------
[09:39:42.722] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 402.8 mA = 25.175 mA/ROC
[09:39:42.722] <TB1> INFO: i(loss) [mA/ROC]: 20.9 21.8 20.9 21.8 20.9 20.9 20.9 20.9 20.9 20.9 20.9 20.9 20.9 20.9 20.1 20.9
[09:39:42.770] <TB1> INFO: ----------------------------------------------------------------------
[09:39:42.770] <TB1> INFO: PixTestPretest::findTiming()
[09:39:42.770] <TB1> INFO: ----------------------------------------------------------------------
[09:39:42.771] <TB1> INFO: PixTestCmd::init()

[09:41:15.940] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):4, header/trailer: 1, token: 1
[09:41:15.940] <TB1> INFO: (success/tries = 100/100), width = 5
[09:41:15.942] <TB1> INFO: ----------------------------------------------------------------------
[09:41:15.942] <TB1> INFO: PixTestPretest::findWorkingPixel()
[09:41:15.942] <TB1> INFO: ----------------------------------------------------------------------
[09:41:16.081] <TB1> INFO: Expecting 231680 events.


[09:41:23.750] <TB1> INFO: 231680 events read in total (6954ms).
[09:41:23.755] <TB1> INFO: Test took 7810ms.
[09:41:24.167] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:41:24.222] <TB1> INFO: ----------------------------------------------------------------------
[09:41:24.222] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[09:41:24.222] <TB1> INFO: ----------------------------------------------------------------------
[09:41:24.362] <TB1> INFO: Expecting 231680 events.
[09:41:32.980] <TB1> INFO: 231680 events read in total (7903ms).
[09:41:32.985] <TB1> INFO: Test took 8757ms.
[09:41:33.415] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[09:41:33.415] <TB1> INFO: CalDel: 110 115 123 125 115 133 117 120 102 127 116 112 128 114 119 123
[09:41:33.415] <TB1> INFO: VthrComp: 51 51 57 51 51 51 51 52 55 51 52 51 51 52 52 51
[09:41:33.420] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C0.dat
[09:41:33.420] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C1.dat
[09:41:33.421] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C2.dat
[09:41:33.421] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C3.dat
[09:41:33.421] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C4.dat
[09:41:33.421] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C5.dat
[09:41:33.421] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C6.dat
[09:41:33.422] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C7.dat
[09:41:33.422] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C8.dat
[09:41:33.422] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C9.dat
[09:41:33.422] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C10.dat
[09:41:33.423] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C11.dat
[09:41:33.423] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C12.dat
[09:41:33.423] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C13.dat
[09:41:33.423] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C14.dat
[09:41:33.423] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C15.dat
[09:41:33.424] <TB1> INFO: write tbm parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//tbmParameters_C0a.dat
[09:41:33.424] <TB1> INFO: write tbm parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//tbmParameters_C0b.dat
[09:41:33.424] <TB1> INFO: PixTestPretest::doTest() done, duration: 135 seconds
[09:41:33.500] <TB1> INFO: enter test to run
[09:41:33.501] <TB1> INFO: test: fulltest no parameter change
[09:41:33.501] <TB1> INFO: running: fulltest
[09:41:33.501] <TB1> INFO: ######################################################################
[09:41:33.501] <TB1> INFO: PixTestFullTest::doTest()
[09:41:33.501] <TB1> INFO: ######################################################################
[09:41:33.502] <TB1> INFO: ######################################################################
[09:41:33.502] <TB1> INFO: PixTestAlive::doTest()
[09:41:33.502] <TB1> INFO: ######################################################################
[09:41:33.505] <TB1> INFO: ----------------------------------------------------------------------
[09:41:33.505] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:41:33.505] <TB1> INFO: ----------------------------------------------------------------------
[09:41:33.839] <TB1> INFO: Expecting 41600 events.
[09:41:38.199] <TB1> INFO: 41600 events read in total (3645ms).
[09:41:38.199] <TB1> INFO: Test took 4691ms.
[09:41:38.206] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:38.604] <TB1> INFO: PixTestAlive::aliveTest() done
[09:41:38.604] <TB1> INFO: number of dead pixels (per ROC): 1 6 2 0 0 0 9 3 0 0 0 0 0 2 0 0
[09:41:38.605] <TB1> INFO: ----------------------------------------------------------------------
[09:41:38.605] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:41:38.605] <TB1> INFO: ----------------------------------------------------------------------
[09:41:38.918] <TB1> INFO: Expecting 41600 events.
[09:41:42.007] <TB1> INFO: 41600 events read in total (2374ms).
[09:41:42.007] <TB1> INFO: Test took 3400ms.
[09:41:42.007] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:42.008] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:41:42.429] <TB1> INFO: PixTestAlive::maskTest() done
[09:41:42.429] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:41:42.431] <TB1> INFO: ----------------------------------------------------------------------
[09:41:42.431] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:41:42.431] <TB1> INFO: ----------------------------------------------------------------------
[09:41:42.767] <TB1> INFO: Expecting 41600 events.
[09:41:46.984] <TB1> INFO: 41600 events read in total (3502ms).
[09:41:46.985] <TB1> INFO: Test took 4552ms.
[09:41:46.992] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:47.390] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[09:41:47.390] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:41:47.390] <TB1> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[09:41:47.391] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:41:47.391] <TB1> INFO: Decoding statistics:
[09:41:47.391] <TB1> INFO: General information:
[09:41:47.391] <TB1> INFO: 16bit words read: 0
[09:41:47.391] <TB1> INFO: valid events total: 0
[09:41:47.391] <TB1> INFO: empty events: 0
[09:41:47.391] <TB1> INFO: valid events with pixels: 0
[09:41:47.391] <TB1> INFO: valid pixel hits: 0
[09:41:47.391] <TB1> INFO: Event errors: 0
[09:41:47.391] <TB1> INFO: start marker: 0
[09:41:47.391] <TB1> INFO: stop marker: 0
[09:41:47.391] <TB1> INFO: overflow: 0
[09:41:47.391] <TB1> INFO: invalid 5bit words: 0
[09:41:47.391] <TB1> INFO: invalid XOR eye diagram: 0
[09:41:47.391] <TB1> INFO: TBM errors: 0
[09:41:47.391] <TB1> INFO: flawed TBM headers: 0
[09:41:47.391] <TB1> INFO: flawed TBM trailers: 0
[09:41:47.391] <TB1> INFO: event ID mismatches: 0
[09:41:47.391] <TB1> INFO: ROC errors: 0
[09:41:47.391] <TB1> INFO: missing ROC header(s): 0
[09:41:47.391] <TB1> INFO: misplaced readback start: 0
[09:41:47.391] <TB1> INFO: Pixel decoding errors: 0
[09:41:47.391] <TB1> INFO: pixel data incomplete: 0
[09:41:47.391] <TB1> INFO: pixel address: 0
[09:41:47.391] <TB1> INFO: pulse height fill bit: 0
[09:41:47.391] <TB1> INFO: buffer corruption: 0
[09:41:47.407] <TB1> INFO: ######################################################################
[09:41:47.407] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:41:47.407] <TB1> INFO: ######################################################################
[09:41:47.411] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[09:41:47.424] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[09:41:47.424] <TB1> INFO: run 1 of 1
[09:41:47.758] <TB1> INFO: Expecting 3120000 events.
[09:42:43.171] <TB1> INFO: 1273020 events read in total (54697ms).
[09:43:36.236] <TB1> INFO: 2528200 events read in total (107762ms).
[09:44:00.672] <TB1> INFO: 3120000 events read in total (132199ms).
[09:44:00.710] <TB1> INFO: Test took 133286ms.
[09:44:00.779] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:27.271] <TB1> INFO: PixTestBBMap::doTest() done, duration: 159 seconds
[09:44:27.271] <TB1> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
[09:44:27.271] <TB1> INFO: separation cut (per ROC): 141 147 149 145 147 140 140 144 145 142 142 135 142 135 139 133
[09:44:27.271] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:27.271] <TB1> INFO: Decoding statistics:
[09:44:27.271] <TB1> INFO: General information:
[09:44:27.271] <TB1> INFO: 16bit words read: 0
[09:44:27.271] <TB1> INFO: valid events total: 0
[09:44:27.271] <TB1> INFO: empty events: 0
[09:44:27.271] <TB1> INFO: valid events with pixels: 0
[09:44:27.271] <TB1> INFO: valid pixel hits: 0
[09:44:27.271] <TB1> INFO: Event errors: 0
[09:44:27.271] <TB1> INFO: start marker: 0
[09:44:27.271] <TB1> INFO: stop marker: 0
[09:44:27.271] <TB1> INFO: overflow: 0
[09:44:27.271] <TB1> INFO: invalid 5bit words: 0
[09:44:27.271] <TB1> INFO: invalid XOR eye diagram: 0
[09:44:27.271] <TB1> INFO: TBM errors: 0
[09:44:27.271] <TB1> INFO: flawed TBM headers: 0
[09:44:27.271] <TB1> INFO: flawed TBM trailers: 0
[09:44:27.271] <TB1> INFO: event ID mismatches: 0
[09:44:27.271] <TB1> INFO: ROC errors: 0
[09:44:27.271] <TB1> INFO: missing ROC header(s): 0
[09:44:27.271] <TB1> INFO: misplaced readback start: 0
[09:44:27.271] <TB1> INFO: Pixel decoding errors: 0
[09:44:27.271] <TB1> INFO: pixel data incomplete: 0
[09:44:27.271] <TB1> INFO: pixel address: 0
[09:44:27.271] <TB1> INFO: pulse height fill bit: 0
[09:44:27.271] <TB1> INFO: buffer corruption: 0
[09:44:27.351] <TB1> INFO: ######################################################################
[09:44:27.351] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:44:27.351] <TB1> INFO: ######################################################################
[09:44:27.351] <TB1> INFO: ----------------------------------------------------------------------
[09:44:27.351] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:44:27.351] <TB1> INFO: ----------------------------------------------------------------------
[09:44:27.351] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[09:44:27.360] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[09:44:27.360] <TB1> INFO: run 1 of 1
[09:44:27.675] <TB1> INFO: Expecting 26208000 events.
[09:44:59.442] <TB1> INFO: 1366100 events read in total (31051ms).
[09:45:33.534] <TB1> INFO: 2702300 events read in total (65143ms).
[09:46:07.727] <TB1> INFO: 4034600 events read in total (99336ms).
[09:46:41.942] <TB1> INFO: 5361400 events read in total (133551ms).
[09:47:16.704] <TB1> INFO: 6694550 events read in total (168313ms).
[09:47:51.574] <TB1> INFO: 8017700 events read in total (203183ms).
[09:48:26.361] <TB1> INFO: 9342350 events read in total (237970ms).
[09:49:01.289] <TB1> INFO: 10667650 events read in total (272898ms).
[09:49:35.995] <TB1> INFO: 11983300 events read in total (307604ms).
[09:50:10.633] <TB1> INFO: 13293150 events read in total (342242ms).
[09:50:45.409] <TB1> INFO: 14584200 events read in total (377018ms).
[09:51:20.310] <TB1> INFO: 15876950 events read in total (411919ms).
[09:51:54.785] <TB1> INFO: 17166250 events read in total (446394ms).
[09:52:29.168] <TB1> INFO: 18449350 events read in total (480777ms).
[09:53:03.705] <TB1> INFO: 19731500 events read in total (515314ms).
[09:53:38.700] <TB1> INFO: 21015100 events read in total (550309ms).
[09:54:13.374] <TB1> INFO: 22298900 events read in total (584983ms).
[09:54:47.909] <TB1> INFO: 23580600 events read in total (619518ms).
[09:55:22.748] <TB1> INFO: 24873500 events read in total (654357ms).
[09:55:56.627] <TB1> INFO: 26200250 events read in total (688236ms).
[09:55:57.176] <TB1> INFO: 26208000 events read in total (688785ms).
[09:55:57.203] <TB1> INFO: Test took 689843ms.
[09:55:57.256] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:57.355] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:55:58.761] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:56:00.265] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:56:01.611] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:56:03.163] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:56:04.561] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:56:05.897] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:56:07.211] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:56:08.567] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:56:09.933] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:56:11.309] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:56:12.736] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:56:14.333] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:56:15.880] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:56:17.484] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:56:18.987] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[09:56:20.474] <TB1> INFO: PixTestScurves::scurves() done
[09:56:20.474] <TB1> INFO: Vcal mean: 110.15 119.55 127.98 119.67 124.44 117.63 114.97 117.30 125.53 114.80 121.02 110.29 115.66 113.55 115.26 117.60
[09:56:20.474] <TB1> INFO: Vcal RMS: 5.56 8.89 7.67 5.36 6.29 5.01 7.44 6.59 6.63 5.92 5.79 4.41 5.20 5.13 5.28 5.24
[09:56:20.474] <TB1> INFO: PixTestScurves::fullTest() done, duration: 713 seconds
[09:56:20.474] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:20.474] <TB1> INFO: Decoding statistics:
[09:56:20.474] <TB1> INFO: General information:
[09:56:20.474] <TB1> INFO: 16bit words read: 0
[09:56:20.474] <TB1> INFO: valid events total: 0
[09:56:20.475] <TB1> INFO: empty events: 0
[09:56:20.475] <TB1> INFO: valid events with pixels: 0
[09:56:20.475] <TB1> INFO: valid pixel hits: 0
[09:56:20.475] <TB1> INFO: Event errors: 0
[09:56:20.475] <TB1> INFO: start marker: 0
[09:56:20.475] <TB1> INFO: stop marker: 0
[09:56:20.475] <TB1> INFO: overflow: 0
[09:56:20.475] <TB1> INFO: invalid 5bit words: 0
[09:56:20.475] <TB1> INFO: invalid XOR eye diagram: 0
[09:56:20.475] <TB1> INFO: TBM errors: 0
[09:56:20.475] <TB1> INFO: flawed TBM headers: 0
[09:56:20.475] <TB1> INFO: flawed TBM trailers: 0
[09:56:20.475] <TB1> INFO: event ID mismatches: 0
[09:56:20.475] <TB1> INFO: ROC errors: 0
[09:56:20.475] <TB1> INFO: missing ROC header(s): 0
[09:56:20.475] <TB1> INFO: misplaced readback start: 0
[09:56:20.475] <TB1> INFO: Pixel decoding errors: 0
[09:56:20.475] <TB1> INFO: pixel data incomplete: 0
[09:56:20.475] <TB1> INFO: pixel address: 0
[09:56:20.475] <TB1> INFO: pulse height fill bit: 0
[09:56:20.475] <TB1> INFO: buffer corruption: 0
[09:56:20.565] <TB1> INFO: ######################################################################
[09:56:20.565] <TB1> INFO: PixTestTrim::doTest()
[09:56:20.565] <TB1> INFO: ######################################################################
[09:56:20.566] <TB1> INFO: ----------------------------------------------------------------------
[09:56:20.566] <TB1> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[09:56:20.566] <TB1> INFO: ----------------------------------------------------------------------
[09:56:20.693] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:56:20.694] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[09:56:20.705] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[09:56:20.705] <TB1> INFO: run 1 of 1
[09:56:21.063] <TB1> INFO: Expecting 6281600 events.
[09:57:05.551] <TB1> INFO: 1467550 events read in total (43773ms).
[09:57:47.603] <TB1> INFO: 2927690 events read in total (85825ms).
[09:58:33.384] <TB1> INFO: 4374180 events read in total (131607ms).
[09:59:20.217] <TB1> INFO: 5817790 events read in total (178439ms).
[09:59:34.115] <TB1> INFO: 6281600 events read in total (192337ms).
[09:59:34.143] <TB1> INFO: Test took 193438ms.
[09:59:34.191] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:55.937] <TB1> INFO: ROC 0 VthrComp = 108
[09:59:55.937] <TB1> INFO: ROC 1 VthrComp = 109
[09:59:55.938] <TB1> INFO: ROC 2 VthrComp = 123
[09:59:55.939] <TB1> INFO: ROC 3 VthrComp = 115
[09:59:55.939] <TB1> INFO: ROC 4 VthrComp = 116
[09:59:55.939] <TB1> INFO: ROC 5 VthrComp = 114
[09:59:55.940] <TB1> INFO: ROC 6 VthrComp = 112
[09:59:55.940] <TB1> INFO: ROC 7 VthrComp = 112
[09:59:55.940] <TB1> INFO: ROC 8 VthrComp = 118
[09:59:55.940] <TB1> INFO: ROC 9 VthrComp = 108
[09:59:55.941] <TB1> INFO: ROC 10 VthrComp = 111
[09:59:55.941] <TB1> INFO: ROC 11 VthrComp = 108
[09:59:55.941] <TB1> INFO: ROC 12 VthrComp = 110
[09:59:55.941] <TB1> INFO: ROC 13 VthrComp = 110
[09:59:55.941] <TB1> INFO: ROC 14 VthrComp = 110
[09:59:55.942] <TB1> INFO: ROC 15 VthrComp = 110
[09:59:55.942] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:59:55.942] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[09:59:55.952] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[09:59:55.952] <TB1> INFO: run 1 of 1
[09:59:56.260] <TB1> INFO: Expecting 6281600 events.
[10:00:32.067] <TB1> INFO: 910170 events read in total (35092ms).
[10:01:06.020] <TB1> INFO: 1817870 events read in total (69045ms).
[10:01:42.211] <TB1> INFO: 2725930 events read in total (105236ms).
[10:02:19.993] <TB1> INFO: 3628420 events read in total (143018ms).
[10:02:57.305] <TB1> INFO: 4522270 events read in total (180330ms).
[10:03:34.290] <TB1> INFO: 5412300 events read in total (217315ms).
[10:04:11.398] <TB1> INFO: 6281600 events read in total (254423ms).
[10:04:11.476] <TB1> INFO: Test took 255524ms.
[10:04:11.649] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:04:38.968] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 64.0285 for pixel 12/1 mean/min/max = 49.3199/34.5465/64.0933
[10:04:38.968] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 72.0591 for pixel 11/75 mean/min/max = 55.0639/37.7984/72.3294
[10:04:38.968] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 68.3995 for pixel 51/9 mean/min/max = 52.7177/36.8918/68.5436
[10:04:38.969] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 63.5463 for pixel 25/69 mean/min/max = 50.3677/37.1658/63.5696
[10:04:38.969] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 66.2236 for pixel 1/77 mean/min/max = 51.612/36.9626/66.2613
[10:04:38.970] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 59.4197 for pixel 0/15 mean/min/max = 47.7381/35.9702/59.506
[10:04:38.970] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 59.2316 for pixel 17/13 mean/min/max = 46.3332/33.4194/59.2469
[10:04:38.971] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 65.8259 for pixel 17/72 mean/min/max = 50.8019/35.6247/65.9791
[10:04:38.971] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 70.1905 for pixel 15/6 mean/min/max = 53.7768/37.3075/70.246
[10:04:38.972] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 66.3972 for pixel 18/4 mean/min/max = 50.6054/34.7186/66.4922
[10:04:38.972] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 68.3512 for pixel 19/6 mean/min/max = 53.3605/38.3133/68.4077
[10:04:38.972] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 59.9512 for pixel 11/3 mean/min/max = 47.5318/35.0044/60.0593
[10:04:38.973] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 64.9016 for pixel 3/5 mean/min/max = 50.9685/36.6188/65.3181
[10:04:38.973] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 61.8225 for pixel 17/7 mean/min/max = 48.8333/35.8322/61.8344
[10:04:38.974] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 64.4203 for pixel 4/76 mean/min/max = 49.8278/35.2269/64.4287
[10:04:38.974] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 64.9203 for pixel 5/41 mean/min/max = 50.5556/35.9404/65.1708
[10:04:38.974] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:04:39.108] <TB1> INFO: Expecting 514560 events.
[10:04:48.834] <TB1> INFO: 514560 events read in total (9010ms).
[10:04:48.840] <TB1> INFO: Expecting 514560 events.
[10:04:58.532] <TB1> INFO: 514560 events read in total (9038ms).
[10:04:58.542] <TB1> INFO: Expecting 514560 events.
[10:05:08.107] <TB1> INFO: 514560 events read in total (8917ms).
[10:05:08.118] <TB1> INFO: Expecting 514560 events.
[10:05:18.028] <TB1> INFO: 514560 events read in total (9262ms).
[10:05:18.043] <TB1> INFO: Expecting 514560 events.
[10:05:27.805] <TB1> INFO: 514560 events read in total (9122ms).
[10:05:27.820] <TB1> INFO: Expecting 514560 events.
[10:05:37.556] <TB1> INFO: 514560 events read in total (9088ms).
[10:05:37.572] <TB1> INFO: Expecting 514560 events.
[10:05:46.714] <TB1> INFO: 514560 events read in total (8483ms).
[10:05:46.735] <TB1> INFO: Expecting 514560 events.
[10:05:55.685] <TB1> INFO: 514560 events read in total (8302ms).
[10:05:55.707] <TB1> INFO: Expecting 514560 events.
[10:06:04.777] <TB1> INFO: 514560 events read in total (8420ms).
[10:06:04.805] <TB1> INFO: Expecting 514560 events.
[10:06:14.203] <TB1> INFO: 514560 events read in total (8764ms).
[10:06:14.234] <TB1> INFO: Expecting 514560 events.
[10:06:23.891] <TB1> INFO: 514560 events read in total (9029ms).
[10:06:23.920] <TB1> INFO: Expecting 514560 events.
[10:06:33.042] <TB1> INFO: 514560 events read in total (8487ms).
[10:06:33.074] <TB1> INFO: Expecting 514560 events.
[10:06:42.120] <TB1> INFO: 514560 events read in total (8408ms).
[10:06:42.158] <TB1> INFO: Expecting 514560 events.
[10:06:51.208] <TB1> INFO: 514560 events read in total (8422ms).
[10:06:51.241] <TB1> INFO: Expecting 514560 events.
[10:07:01.056] <TB1> INFO: 514560 events read in total (9174ms).
[10:07:01.095] <TB1> INFO: Expecting 514560 events.
[10:07:10.762] <TB1> INFO: 514560 events read in total (9042ms).
[10:07:10.798] <TB1> INFO: Test took 151824ms.
[10:07:12.067] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[10:07:12.076] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[10:07:12.076] <TB1> INFO: run 1 of 1
[10:07:12.391] <TB1> INFO: Expecting 6281600 events.
[10:07:50.780] <TB1> INFO: 878320 events read in total (37673ms).
[10:08:29.060] <TB1> INFO: 1755220 events read in total (75953ms).
[10:09:07.653] <TB1> INFO: 2633250 events read in total (114547ms).
[10:09:43.682] <TB1> INFO: 3506890 events read in total (150575ms).
[10:10:18.110] <TB1> INFO: 4372170 events read in total (185003ms).
[10:10:52.397] <TB1> INFO: 5233440 events read in total (219290ms).
[10:11:26.975] <TB1> INFO: 6093700 events read in total (253868ms).
[10:11:34.753] <TB1> INFO: 6281600 events read in total (261646ms).
[10:11:34.829] <TB1> INFO: Test took 262752ms.
[10:11:35.004] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:11:59.724] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.922897 .. 54.826640
[10:11:59.815] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 10 dacrange: 0 .. 64 (-1/-1) hits flags = 528 (plus default)
[10:11:59.825] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[10:11:59.825] <TB1> INFO: run 1 of 1
[10:12:00.153] <TB1> INFO: Expecting 2704000 events.
[10:12:39.921] <TB1> INFO: 1121670 events read in total (39053ms).
[10:13:20.495] <TB1> INFO: 2252260 events read in total (79628ms).
[10:13:35.824] <TB1> INFO: 2704000 events read in total (94957ms).
[10:13:35.851] <TB1> INFO: Test took 96026ms.
[10:13:35.900] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:13:51.302] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 17.722110 .. 46.155837
[10:13:51.384] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 10 dacrange: 7 .. 56 (-1/-1) hits flags = 528 (plus default)
[10:13:51.393] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[10:13:51.393] <TB1> INFO: run 1 of 1
[10:13:51.701] <TB1> INFO: Expecting 2080000 events.
[10:14:29.174] <TB1> INFO: 1141360 events read in total (36757ms).
[10:15:03.183] <TB1> INFO: 2080000 events read in total (70766ms).
[10:15:03.214] <TB1> INFO: Test took 71822ms.
[10:15:03.253] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:15:17.880] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 23.287767 .. 42.541555
[10:15:17.962] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 10 dacrange: 13 .. 52 (-1/-1) hits flags = 528 (plus default)
[10:15:17.971] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[10:15:17.971] <TB1> INFO: run 1 of 1
[10:15:18.278] <TB1> INFO: Expecting 1664000 events.
[10:15:58.907] <TB1> INFO: 1135300 events read in total (39914ms).
[10:16:17.529] <TB1> INFO: 1664000 events read in total (58536ms).
[10:16:17.544] <TB1> INFO: Test took 59573ms.
[10:16:17.573] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:16:30.635] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 26.157404 .. 42.412494
[10:16:30.714] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 10 dacrange: 16 .. 52 (-1/-1) hits flags = 528 (plus default)
[10:16:30.723] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[10:16:30.723] <TB1> INFO: run 1 of 1
[10:16:31.029] <TB1> INFO: Expecting 1539200 events.
[10:17:12.360] <TB1> INFO: 1106610 events read in total (40616ms).
[10:17:27.601] <TB1> INFO: 1539200 events read in total (55856ms).
[10:17:27.615] <TB1> INFO: Test took 56892ms.
[10:17:27.644] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:17:40.580] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:17:40.580] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[10:17:40.589] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[10:17:40.589] <TB1> INFO: run 1 of 1
[10:17:40.898] <TB1> INFO: Expecting 1705600 events.
[10:18:21.697] <TB1> INFO: 1077740 events read in total (40084ms).
[10:18:43.964] <TB1> INFO: 1705600 events read in total (62351ms).
[10:18:43.979] <TB1> INFO: Test took 63390ms.
[10:18:44.011] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:18:58.151] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C0.dat
[10:18:58.151] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C1.dat
[10:18:58.151] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C2.dat
[10:18:58.152] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C3.dat
[10:18:58.152] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C4.dat
[10:18:58.152] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C5.dat
[10:18:58.152] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C6.dat
[10:18:58.153] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C7.dat
[10:18:58.153] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C8.dat
[10:18:58.153] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C9.dat
[10:18:58.154] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C10.dat
[10:18:58.154] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C11.dat
[10:18:58.154] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C12.dat
[10:18:58.155] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C13.dat
[10:18:58.155] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C14.dat
[10:18:58.155] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C15.dat
[10:18:58.155] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C0.dat
[10:18:58.169] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C1.dat
[10:18:58.177] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C2.dat
[10:18:58.185] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C3.dat
[10:18:58.193] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C4.dat
[10:18:58.200] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C5.dat
[10:18:58.206] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C6.dat
[10:18:58.212] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C7.dat
[10:18:58.218] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C8.dat
[10:18:58.224] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C9.dat
[10:18:58.230] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C10.dat
[10:18:58.236] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C11.dat
[10:18:58.242] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C12.dat
[10:18:58.248] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C13.dat
[10:18:58.254] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C14.dat
[10:18:58.260] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C15.dat
[10:18:58.266] <TB1> INFO: PixTestTrim::trimTest() done
[10:18:58.266] <TB1> INFO: vtrim: 131 162 139 139 136 100 109 135 145 140 138 100 134 128 138 133
[10:18:58.266] <TB1> INFO: vthrcomp: 108 109 123 115 116 114 112 112 118 108 111 108 110 110 110 110
[10:18:58.266] <TB1> INFO: vcal mean: 34.96 34.96 35.01 35.08 35.02 34.88 35.00 34.96 35.00 34.93 34.93 35.05 34.99 35.01 35.01 35.02
[10:18:58.266] <TB1> INFO: vcal RMS: 1.08 1.67 1.23 0.90 0.93 0.84 1.85 1.31 0.98 0.96 0.97 0.88 0.91 1.19 0.95 0.96
[10:18:58.266] <TB1> INFO: bits mean: 8.82 7.70 7.19 7.59 7.61 7.82 9.34 8.22 7.83 8.47 7.39 8.59 7.74 8.64 8.41 8.44
[10:18:58.266] <TB1> INFO: bits RMS: 2.36 2.17 2.43 2.33 2.29 2.61 2.56 2.35 2.19 2.41 2.18 2.57 2.33 2.32 2.40 2.25
[10:18:58.275] <TB1> INFO: ----------------------------------------------------------------------
[10:18:58.275] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[10:18:58.275] <TB1> INFO: ----------------------------------------------------------------------
[10:18:58.279] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[10:18:58.289] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[10:18:58.289] <TB1> INFO: run 1 of 1
[10:18:58.600] <TB1> INFO: Expecting 8320000 events.
[10:19:38.024] <TB1> INFO: 1345590 events read in total (38708ms).
[10:20:21.125] <TB1> INFO: 2677120 events read in total (81810ms).
[10:21:03.001] <TB1> INFO: 4003060 events read in total (123685ms).
[10:21:43.468] <TB1> INFO: 5309650 events read in total (164152ms).
[10:22:24.698] <TB1> INFO: 6612090 events read in total (205382ms).
[10:23:06.739] <TB1> INFO: 7917660 events read in total (247423ms).
[10:23:19.293] <TB1> INFO: 8320000 events read in total (259977ms).
[10:23:19.324] <TB1> INFO: Test took 261035ms.
[10:23:19.400] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:23:47.428] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 205 (-1/-1) hits flags = 528 (plus default)
[10:23:47.437] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[10:23:47.437] <TB1> INFO: run 1 of 1
[10:23:47.764] <TB1> INFO: Expecting 8569600 events.
[10:24:30.008] <TB1> INFO: 1252920 events read in total (41528ms).
[10:25:10.489] <TB1> INFO: 2496160 events read in total (82009ms).
[10:25:51.510] <TB1> INFO: 3733680 events read in total (123030ms).
[10:26:32.499] <TB1> INFO: 4959670 events read in total (164019ms).
[10:27:14.916] <TB1> INFO: 6177170 events read in total (206436ms).
[10:27:56.586] <TB1> INFO: 7393030 events read in total (248106ms).
[10:28:34.129] <TB1> INFO: 8569600 events read in total (285649ms).
[10:28:34.170] <TB1> INFO: Test took 286733ms.
[10:28:34.273] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:29:01.760] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 197 (-1/-1) hits flags = 528 (plus default)
[10:29:01.768] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[10:29:01.771] <TB1> INFO: run 1 of 1
[10:29:02.077] <TB1> INFO: Expecting 8236800 events.
[10:29:46.199] <TB1> INFO: 1286920 events read in total (43407ms).
[10:30:29.726] <TB1> INFO: 2561920 events read in total (86934ms).
[10:31:13.193] <TB1> INFO: 3831320 events read in total (130401ms).
[10:31:52.705] <TB1> INFO: 5084360 events read in total (169913ms).
[10:32:34.385] <TB1> INFO: 6331030 events read in total (211593ms).
[10:33:15.171] <TB1> INFO: 7579260 events read in total (252379ms).
[10:33:36.073] <TB1> INFO: 8236800 events read in total (273281ms).
[10:33:36.121] <TB1> INFO: Test took 274351ms.
[10:33:36.202] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:34:01.393] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 197 (-1/-1) hits flags = 528 (plus default)
[10:34:01.402] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[10:34:01.402] <TB1> INFO: run 1 of 1
[10:34:01.709] <TB1> INFO: Expecting 8236800 events.
[10:34:44.792] <TB1> INFO: 1286770 events read in total (42367ms).
[10:35:27.666] <TB1> INFO: 2561600 events read in total (85241ms).
[10:36:08.550] <TB1> INFO: 3830800 events read in total (126125ms).
[10:36:50.374] <TB1> INFO: 5082990 events read in total (167949ms).
[10:37:32.805] <TB1> INFO: 6329510 events read in total (210381ms).
[10:38:10.364] <TB1> INFO: 7577220 events read in total (247939ms).
[10:38:32.560] <TB1> INFO: 8236800 events read in total (270135ms).
[10:38:32.619] <TB1> INFO: Test took 271217ms.
[10:38:32.717] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:39:02.855] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 193 (-1/-1) hits flags = 528 (plus default)
[10:39:02.864] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[10:39:02.864] <TB1> INFO: run 1 of 1
[10:39:03.195] <TB1> INFO: Expecting 8070400 events.
[10:39:45.763] <TB1> INFO: 1304060 events read in total (41852ms).
[10:40:27.774] <TB1> INFO: 2595290 events read in total (83863ms).
[10:41:09.418] <TB1> INFO: 3881440 events read in total (125508ms).
[10:41:47.207] <TB1> INFO: 5148140 events read in total (163296ms).
[10:42:30.198] <TB1> INFO: 6410400 events read in total (206287ms).
[10:43:12.953] <TB1> INFO: 7676050 events read in total (249042ms).
[10:43:24.792] <TB1> INFO: 8070400 events read in total (260881ms).
[10:43:24.845] <TB1> INFO: Test took 261981ms.
[10:43:24.937] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:43:52.783] <TB1> INFO: PixTestTrim::trimBitTest() done
[10:43:52.786] <TB1> INFO: PixTestTrim::doTest() done, duration: 2852 seconds
[10:43:52.786] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:43:52.786] <TB1> INFO: Decoding statistics:
[10:43:52.786] <TB1> INFO: General information:
[10:43:52.786] <TB1> INFO: 16bit words read: 0
[10:43:52.786] <TB1> INFO: valid events total: 0
[10:43:52.786] <TB1> INFO: empty events: 0
[10:43:52.786] <TB1> INFO: valid events with pixels: 0
[10:43:52.786] <TB1> INFO: valid pixel hits: 0
[10:43:52.786] <TB1> INFO: Event errors: 0
[10:43:52.786] <TB1> INFO: start marker: 0
[10:43:52.786] <TB1> INFO: stop marker: 0
[10:43:52.786] <TB1> INFO: overflow: 0
[10:43:52.786] <TB1> INFO: invalid 5bit words: 0
[10:43:52.786] <TB1> INFO: invalid XOR eye diagram: 0
[10:43:52.786] <TB1> INFO: TBM errors: 0
[10:43:52.786] <TB1> INFO: flawed TBM headers: 0
[10:43:52.786] <TB1> INFO: flawed TBM trailers: 0
[10:43:52.786] <TB1> INFO: event ID mismatches: 0
[10:43:52.786] <TB1> INFO: ROC errors: 0
[10:43:52.786] <TB1> INFO: missing ROC header(s): 0
[10:43:52.786] <TB1> INFO: misplaced readback start: 0
[10:43:52.786] <TB1> INFO: Pixel decoding errors: 0
[10:43:52.786] <TB1> INFO: pixel data incomplete: 0
[10:43:52.786] <TB1> INFO: pixel address: 0
[10:43:52.786] <TB1> INFO: pulse height fill bit: 0
[10:43:52.786] <TB1> INFO: buffer corruption: 0
[10:43:53.615] <TB1> INFO: ######################################################################
[10:43:53.615] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:43:53.615] <TB1> INFO: ######################################################################
[10:43:53.939] <TB1> INFO: Expecting 41600 events.
[10:43:58.179] <TB1> INFO: 41600 events read in total (3525ms).
[10:43:58.180] <TB1> INFO: Test took 4563ms.
[10:43:58.186] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:43:58.887] <TB1> INFO: Expecting 41600 events.
[10:44:03.233] <TB1> INFO: 41600 events read in total (3631ms).
[10:44:03.234] <TB1> INFO: Test took 4696ms.
[10:44:03.240] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:44:03.691] <TB1> INFO: Expecting 41600 events.
[10:44:07.874] <TB1> INFO: 41600 events read in total (3468ms).
[10:44:07.875] <TB1> INFO: Test took 4523ms.
[10:44:07.882] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:44:08.314] <TB1> INFO: Expecting 2560 events.
[10:44:09.275] <TB1> INFO: 2560 events read in total (246ms).
[10:44:09.275] <TB1> INFO: Test took 1384ms.
[10:44:09.784] <TB1> INFO: Expecting 2560 events.
[10:44:10.744] <TB1> INFO: 2560 events read in total (245ms).
[10:44:10.744] <TB1> INFO: Test took 1468ms.
[10:44:11.253] <TB1> INFO: Expecting 2560 events.
[10:44:12.213] <TB1> INFO: 2560 events read in total (244ms).
[10:44:12.213] <TB1> INFO: Test took 1468ms.
[10:44:12.723] <TB1> INFO: Expecting 2560 events.
[10:44:13.685] <TB1> INFO: 2560 events read in total (247ms).
[10:44:13.686] <TB1> INFO: Test took 1472ms.
[10:44:14.195] <TB1> INFO: Expecting 2560 events.
[10:44:15.155] <TB1> INFO: 2560 events read in total (244ms).
[10:44:15.155] <TB1> INFO: Test took 1469ms.
[10:44:15.663] <TB1> INFO: Expecting 2560 events.
[10:44:16.627] <TB1> INFO: 2560 events read in total (248ms).
[10:44:16.627] <TB1> INFO: Test took 1472ms.
[10:44:17.136] <TB1> INFO: Expecting 2560 events.
[10:44:18.101] <TB1> INFO: 2560 events read in total (250ms).
[10:44:18.101] <TB1> INFO: Test took 1473ms.
[10:44:18.611] <TB1> INFO: Expecting 2560 events.
[10:44:19.575] <TB1> INFO: 2560 events read in total (249ms).
[10:44:19.575] <TB1> INFO: Test took 1473ms.
[10:44:20.084] <TB1> INFO: Expecting 2560 events.
[10:44:21.049] <TB1> INFO: 2560 events read in total (249ms).
[10:44:21.049] <TB1> INFO: Test took 1474ms.
[10:44:21.559] <TB1> INFO: Expecting 2560 events.
[10:44:22.522] <TB1> INFO: 2560 events read in total (248ms).
[10:44:22.523] <TB1> INFO: Test took 1473ms.
[10:44:23.032] <TB1> INFO: Expecting 2560 events.
[10:44:23.997] <TB1> INFO: 2560 events read in total (249ms).
[10:44:23.998] <TB1> INFO: Test took 1475ms.
[10:44:24.506] <TB1> INFO: Expecting 2560 events.
[10:44:25.472] <TB1> INFO: 2560 events read in total (250ms).
[10:44:25.472] <TB1> INFO: Test took 1474ms.
[10:44:25.982] <TB1> INFO: Expecting 2560 events.
[10:44:26.940] <TB1> INFO: 2560 events read in total (243ms).
[10:44:26.940] <TB1> INFO: Test took 1468ms.
[10:44:27.450] <TB1> INFO: Expecting 2560 events.
[10:44:28.414] <TB1> INFO: 2560 events read in total (249ms).
[10:44:28.414] <TB1> INFO: Test took 1473ms.
[10:44:28.924] <TB1> INFO: Expecting 2560 events.
[10:44:29.887] <TB1> INFO: 2560 events read in total (248ms).
[10:44:29.888] <TB1> INFO: Test took 1474ms.
[10:44:30.397] <TB1> INFO: Expecting 2560 events.
[10:44:31.356] <TB1> INFO: 2560 events read in total (244ms).
[10:44:31.356] <TB1> INFO: Test took 1468ms.
[10:44:31.361] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:44:31.867] <TB1> INFO: Expecting 655360 events.
[10:44:44.424] <TB1> INFO: 655360 events read in total (11841ms).
[10:44:44.434] <TB1> INFO: Expecting 655360 events.
[10:44:56.355] <TB1> INFO: 655360 events read in total (11341ms).
[10:44:56.368] <TB1> INFO: Expecting 655360 events.
[10:45:08.487] <TB1> INFO: 655360 events read in total (11534ms).
[10:45:08.508] <TB1> INFO: Expecting 655360 events.
[10:45:20.933] <TB1> INFO: 655360 events read in total (11859ms).
[10:45:20.955] <TB1> INFO: Expecting 655360 events.
[10:45:33.109] <TB1> INFO: 655360 events read in total (11588ms).
[10:45:33.136] <TB1> INFO: Expecting 655360 events.
[10:45:45.225] <TB1> INFO: 655360 events read in total (11520ms).
[10:45:45.255] <TB1> INFO: Expecting 655360 events.
[10:45:57.322] <TB1> INFO: 655360 events read in total (11484ms).
[10:45:57.352] <TB1> INFO: Expecting 655360 events.
[10:46:09.537] <TB1> INFO: 655360 events read in total (11608ms).
[10:46:09.570] <TB1> INFO: Expecting 655360 events.
[10:46:20.954] <TB1> INFO: 655360 events read in total (10823ms).
[10:46:20.989] <TB1> INFO: Expecting 655360 events.
[10:46:32.536] <TB1> INFO: 655360 events read in total (10971ms).
[10:46:32.581] <TB1> INFO: Expecting 655360 events.
[10:46:44.300] <TB1> INFO: 655360 events read in total (11171ms).
[10:46:44.345] <TB1> INFO: Expecting 655360 events.
[10:46:55.744] <TB1> INFO: 655360 events read in total (10854ms).
[10:46:55.800] <TB1> INFO: Expecting 655360 events.
[10:47:08.047] <TB1> INFO: 655360 events read in total (11704ms).
[10:47:08.097] <TB1> INFO: Expecting 655360 events.
[10:47:19.996] <TB1> INFO: 655360 events read in total (11345ms).
[10:47:20.073] <TB1> INFO: Expecting 655360 events.
[10:47:32.571] <TB1> INFO: 655360 events read in total (11968ms).
[10:47:32.641] <TB1> INFO: Expecting 655360 events.
[10:47:44.849] <TB1> INFO: 655360 events read in total (11670ms).
[10:47:44.913] <TB1> INFO: Test took 193552ms.
[10:47:44.998] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:47:45.301] <TB1> INFO: Expecting 655360 events.
[10:47:57.599] <TB1> INFO: 655360 events read in total (11582ms).
[10:47:57.609] <TB1> INFO: Expecting 655360 events.
[10:48:09.669] <TB1> INFO: 655360 events read in total (11470ms).
[10:48:09.681] <TB1> INFO: Expecting 655360 events.
[10:48:21.972] <TB1> INFO: 655360 events read in total (11694ms).
[10:48:21.991] <TB1> INFO: Expecting 655360 events.
[10:48:34.181] <TB1> INFO: 655360 events read in total (11611ms).
[10:48:34.205] <TB1> INFO: Expecting 655360 events.
[10:48:46.324] <TB1> INFO: 655360 events read in total (11541ms).
[10:48:46.356] <TB1> INFO: Expecting 655360 events.
[10:48:57.560] <TB1> INFO: 655360 events read in total (10657ms).
[10:48:57.586] <TB1> INFO: Expecting 655360 events.
[10:49:08.860] <TB1> INFO: 655360 events read in total (10678ms).
[10:49:08.891] <TB1> INFO: Expecting 655360 events.
[10:49:21.265] <TB1> INFO: 655360 events read in total (11788ms).
[10:49:21.298] <TB1> INFO: Expecting 655360 events.
[10:49:33.388] <TB1> INFO: 655360 events read in total (11515ms).
[10:49:33.431] <TB1> INFO: Expecting 655360 events.
[10:49:45.435] <TB1> INFO: 655360 events read in total (11445ms).
[10:49:45.475] <TB1> INFO: Expecting 655360 events.
[10:49:57.715] <TB1> INFO: 655360 events read in total (11662ms).
[10:49:57.757] <TB1> INFO: Expecting 655360 events.
[10:50:10.083] <TB1> INFO: 655360 events read in total (11761ms).
[10:50:10.137] <TB1> INFO: Expecting 655360 events.
[10:50:22.223] <TB1> INFO: 655360 events read in total (11543ms).
[10:50:22.282] <TB1> INFO: Expecting 655360 events.
[10:50:34.571] <TB1> INFO: 655360 events read in total (11756ms).
[10:50:34.638] <TB1> INFO: Expecting 655360 events.
[10:50:46.974] <TB1> INFO: 655360 events read in total (11809ms).
[10:50:47.030] <TB1> INFO: Expecting 655360 events.
[10:50:58.984] <TB1> INFO: 655360 events read in total (11397ms).
[10:50:59.087] <TB1> INFO: Test took 194089ms.
[10:50:59.306] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:59.314] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:59.323] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:59.331] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:59.340] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:59.349] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:59.356] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:59.363] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:59.370] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:59.377] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:59.384] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:59.391] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:59.398] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:59.405] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:59.412] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:59.419] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[10:50:59.476] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C0.dat
[10:50:59.476] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C1.dat
[10:50:59.477] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C2.dat
[10:50:59.477] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C3.dat
[10:50:59.477] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C4.dat
[10:50:59.477] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C5.dat
[10:50:59.477] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C6.dat
[10:50:59.477] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C7.dat
[10:50:59.477] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C8.dat
[10:50:59.477] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C9.dat
[10:50:59.478] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C10.dat
[10:50:59.478] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C11.dat
[10:50:59.478] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C12.dat
[10:50:59.478] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C13.dat
[10:50:59.478] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C14.dat
[10:50:59.478] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C15.dat
[10:50:59.817] <TB1> INFO: Expecting 41600 events.
[10:51:03.702] <TB1> INFO: 41600 events read in total (3169ms).
[10:51:03.705] <TB1> INFO: Test took 4222ms.
[10:51:04.357] <TB1> INFO: Expecting 41600 events.
[10:51:08.214] <TB1> INFO: 41600 events read in total (3141ms).
[10:51:08.215] <TB1> INFO: Test took 4186ms.
[10:51:08.863] <TB1> INFO: Expecting 41600 events.
[10:51:12.731] <TB1> INFO: 41600 events read in total (3152ms).
[10:51:12.732] <TB1> INFO: Test took 4187ms.
[10:51:13.071] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:13.204] <TB1> INFO: Expecting 2560 events.
[10:51:14.172] <TB1> INFO: 2560 events read in total (252ms).
[10:51:14.173] <TB1> INFO: Test took 1102ms.
[10:51:14.176] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:14.682] <TB1> INFO: Expecting 2560 events.
[10:51:15.647] <TB1> INFO: 2560 events read in total (250ms).
[10:51:15.648] <TB1> INFO: Test took 1472ms.
[10:51:15.651] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:16.157] <TB1> INFO: Expecting 2560 events.
[10:51:17.124] <TB1> INFO: 2560 events read in total (251ms).
[10:51:17.124] <TB1> INFO: Test took 1473ms.
[10:51:17.127] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:17.633] <TB1> INFO: Expecting 2560 events.
[10:51:18.591] <TB1> INFO: 2560 events read in total (242ms).
[10:51:18.592] <TB1> INFO: Test took 1465ms.
[10:51:18.594] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:19.102] <TB1> INFO: Expecting 2560 events.
[10:51:20.060] <TB1> INFO: 2560 events read in total (243ms).
[10:51:20.061] <TB1> INFO: Test took 1467ms.
[10:51:20.063] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:20.571] <TB1> INFO: Expecting 2560 events.
[10:51:21.530] <TB1> INFO: 2560 events read in total (244ms).
[10:51:21.530] <TB1> INFO: Test took 1467ms.
[10:51:21.532] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:22.040] <TB1> INFO: Expecting 2560 events.
[10:51:22.998] <TB1> INFO: 2560 events read in total (243ms).
[10:51:22.998] <TB1> INFO: Test took 1466ms.
[10:51:23.001] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:23.508] <TB1> INFO: Expecting 2560 events.
[10:51:24.467] <TB1> INFO: 2560 events read in total (244ms).
[10:51:24.467] <TB1> INFO: Test took 1466ms.
[10:51:24.470] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:24.977] <TB1> INFO: Expecting 2560 events.
[10:51:25.935] <TB1> INFO: 2560 events read in total (243ms).
[10:51:25.935] <TB1> INFO: Test took 1465ms.
[10:51:25.938] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:26.445] <TB1> INFO: Expecting 2560 events.
[10:51:27.403] <TB1> INFO: 2560 events read in total (243ms).
[10:51:27.403] <TB1> INFO: Test took 1465ms.
[10:51:27.406] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:27.913] <TB1> INFO: Expecting 2560 events.
[10:51:28.871] <TB1> INFO: 2560 events read in total (243ms).
[10:51:28.871] <TB1> INFO: Test took 1465ms.
[10:51:28.874] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:29.381] <TB1> INFO: Expecting 2560 events.
[10:51:30.340] <TB1> INFO: 2560 events read in total (243ms).
[10:51:30.341] <TB1> INFO: Test took 1467ms.
[10:51:30.343] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:30.851] <TB1> INFO: Expecting 2560 events.
[10:51:31.810] <TB1> INFO: 2560 events read in total (244ms).
[10:51:31.811] <TB1> INFO: Test took 1468ms.
[10:51:31.813] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:32.320] <TB1> INFO: Expecting 2560 events.
[10:51:33.278] <TB1> INFO: 2560 events read in total (242ms).
[10:51:33.279] <TB1> INFO: Test took 1466ms.
[10:51:33.282] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:33.789] <TB1> INFO: Expecting 2560 events.
[10:51:34.747] <TB1> INFO: 2560 events read in total (243ms).
[10:51:34.748] <TB1> INFO: Test took 1466ms.
[10:51:34.751] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:35.257] <TB1> INFO: Expecting 2560 events.
[10:51:36.217] <TB1> INFO: 2560 events read in total (244ms).
[10:51:36.217] <TB1> INFO: Test took 1466ms.
[10:51:36.220] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:36.727] <TB1> INFO: Expecting 2560 events.
[10:51:37.684] <TB1> INFO: 2560 events read in total (242ms).
[10:51:37.685] <TB1> INFO: Test took 1465ms.
[10:51:37.688] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:38.194] <TB1> INFO: Expecting 2560 events.
[10:51:39.154] <TB1> INFO: 2560 events read in total (244ms).
[10:51:39.154] <TB1> INFO: Test took 1466ms.
[10:51:39.158] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:39.663] <TB1> INFO: Expecting 2560 events.
[10:51:40.622] <TB1> INFO: 2560 events read in total (243ms).
[10:51:40.623] <TB1> INFO: Test took 1465ms.
[10:51:40.625] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:41.133] <TB1> INFO: Expecting 2560 events.
[10:51:42.093] <TB1> INFO: 2560 events read in total (245ms).
[10:51:42.093] <TB1> INFO: Test took 1468ms.
[10:51:42.096] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:42.603] <TB1> INFO: Expecting 2560 events.
[10:51:43.562] <TB1> INFO: 2560 events read in total (243ms).
[10:51:43.562] <TB1> INFO: Test took 1466ms.
[10:51:43.565] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:44.072] <TB1> INFO: Expecting 2560 events.
[10:51:45.031] <TB1> INFO: 2560 events read in total (243ms).
[10:51:45.031] <TB1> INFO: Test took 1466ms.
[10:51:45.034] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:45.542] <TB1> INFO: Expecting 2560 events.
[10:51:46.502] <TB1> INFO: 2560 events read in total (245ms).
[10:51:46.503] <TB1> INFO: Test took 1469ms.
[10:51:46.505] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:47.013] <TB1> INFO: Expecting 2560 events.
[10:51:47.971] <TB1> INFO: 2560 events read in total (243ms).
[10:51:47.972] <TB1> INFO: Test took 1467ms.
[10:51:47.974] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:48.481] <TB1> INFO: Expecting 2560 events.
[10:51:49.439] <TB1> INFO: 2560 events read in total (242ms).
[10:51:49.440] <TB1> INFO: Test took 1466ms.
[10:51:49.442] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:49.950] <TB1> INFO: Expecting 2560 events.
[10:51:50.907] <TB1> INFO: 2560 events read in total (242ms).
[10:51:50.908] <TB1> INFO: Test took 1466ms.
[10:51:50.910] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:51.418] <TB1> INFO: Expecting 2560 events.
[10:51:52.376] <TB1> INFO: 2560 events read in total (243ms).
[10:51:52.376] <TB1> INFO: Test took 1466ms.
[10:51:52.379] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:52.887] <TB1> INFO: Expecting 2560 events.
[10:51:53.851] <TB1> INFO: 2560 events read in total (249ms).
[10:51:53.852] <TB1> INFO: Test took 1473ms.
[10:51:53.855] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:54.361] <TB1> INFO: Expecting 2560 events.
[10:51:55.326] <TB1> INFO: 2560 events read in total (249ms).
[10:51:55.327] <TB1> INFO: Test took 1472ms.
[10:51:55.329] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:55.836] <TB1> INFO: Expecting 2560 events.
[10:51:56.799] <TB1> INFO: 2560 events read in total (248ms).
[10:51:56.799] <TB1> INFO: Test took 1470ms.
[10:51:56.803] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:57.310] <TB1> INFO: Expecting 2560 events.
[10:51:58.274] <TB1> INFO: 2560 events read in total (249ms).
[10:51:58.274] <TB1> INFO: Test took 1471ms.
[10:51:58.276] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:51:58.784] <TB1> INFO: Expecting 2560 events.
[10:51:59.748] <TB1> INFO: 2560 events read in total (248ms).
[10:51:59.748] <TB1> INFO: Test took 1472ms.
[10:52:00.518] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 486 seconds
[10:52:00.518] <TB1> INFO: PH scale (per ROC): 67 63 65 63 67 63 64 67 73 66 67 75 74 70 66 56
[10:52:00.518] <TB1> INFO: PH offset (per ROC): 176 189 186 184 179 176 182 179 181 187 192 172 176 181 184 184
[10:52:00.527] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:52:00.527] <TB1> INFO: Decoding statistics:
[10:52:00.527] <TB1> INFO: General information:
[10:52:00.527] <TB1> INFO: 16bit words read: 66442
[10:52:00.527] <TB1> INFO: valid events total: 5120
[10:52:00.527] <TB1> INFO: empty events: 2619
[10:52:00.527] <TB1> INFO: valid events with pixels: 2501
[10:52:00.527] <TB1> INFO: valid pixel hits: 2501
[10:52:00.527] <TB1> INFO: Event errors: 0
[10:52:00.527] <TB1> INFO: start marker: 0
[10:52:00.527] <TB1> INFO: stop marker: 0
[10:52:00.527] <TB1> INFO: overflow: 0
[10:52:00.527] <TB1> INFO: invalid 5bit words: 0
[10:52:00.527] <TB1> INFO: invalid XOR eye diagram: 0
[10:52:00.527] <TB1> INFO: TBM errors: 0
[10:52:00.527] <TB1> INFO: flawed TBM headers: 0
[10:52:00.527] <TB1> INFO: flawed TBM trailers: 0
[10:52:00.527] <TB1> INFO: event ID mismatches: 0
[10:52:00.527] <TB1> INFO: ROC errors: 0
[10:52:00.527] <TB1> INFO: missing ROC header(s): 0
[10:52:00.527] <TB1> INFO: misplaced readback start: 0
[10:52:00.527] <TB1> INFO: Pixel decoding errors: 0
[10:52:00.527] <TB1> INFO: pixel data incomplete: 0
[10:52:00.527] <TB1> INFO: pixel address: 0
[10:52:00.527] <TB1> INFO: pulse height fill bit: 0
[10:52:00.527] <TB1> INFO: buffer corruption: 0
[10:52:00.731] <TB1> INFO: ######################################################################
[10:52:00.731] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:52:00.731] <TB1> INFO: ######################################################################
[10:52:00.743] <TB1> INFO: scanning low vcal = 10
[10:52:01.064] <TB1> INFO: Expecting 41600 events.
[10:52:04.857] <TB1> INFO: 41600 events read in total (3078ms).
[10:52:04.857] <TB1> INFO: Test took 4114ms.
[10:52:04.860] <TB1> INFO: scanning low vcal = 20
[10:52:05.366] <TB1> INFO: Expecting 41600 events.
[10:52:09.150] <TB1> INFO: 41600 events read in total (3068ms).
[10:52:09.150] <TB1> INFO: Test took 4290ms.
[10:52:09.153] <TB1> INFO: scanning low vcal = 30
[10:52:09.660] <TB1> INFO: Expecting 41600 events.
[10:52:13.486] <TB1> INFO: 41600 events read in total (3111ms).
[10:52:13.487] <TB1> INFO: Test took 4334ms.
[10:52:13.490] <TB1> INFO: scanning low vcal = 40
[10:52:13.980] <TB1> INFO: Expecting 41600 events.
[10:52:18.271] <TB1> INFO: 41600 events read in total (3576ms).
[10:52:18.272] <TB1> INFO: Test took 4782ms.
[10:52:18.276] <TB1> INFO: scanning low vcal = 50
[10:52:18.707] <TB1> INFO: Expecting 41600 events.
[10:52:23.007] <TB1> INFO: 41600 events read in total (3584ms).
[10:52:23.008] <TB1> INFO: Test took 4732ms.
[10:52:23.012] <TB1> INFO: scanning low vcal = 60
[10:52:23.449] <TB1> INFO: Expecting 41600 events.
[10:52:27.791] <TB1> INFO: 41600 events read in total (3628ms).
[10:52:27.792] <TB1> INFO: Test took 4780ms.
[10:52:27.796] <TB1> INFO: scanning low vcal = 70
[10:52:28.227] <TB1> INFO: Expecting 41600 events.
[10:52:32.571] <TB1> INFO: 41600 events read in total (3628ms).
[10:52:32.572] <TB1> INFO: Test took 4776ms.
[10:52:32.576] <TB1> INFO: scanning low vcal = 80
[10:52:33.019] <TB1> INFO: Expecting 41600 events.
[10:52:37.318] <TB1> INFO: 41600 events read in total (3583ms).
[10:52:37.318] <TB1> INFO: Test took 4742ms.
[10:52:37.322] <TB1> INFO: scanning low vcal = 90
[10:52:37.769] <TB1> INFO: Expecting 41600 events.
[10:52:42.076] <TB1> INFO: 41600 events read in total (3591ms).
[10:52:42.077] <TB1> INFO: Test took 4755ms.
[10:52:42.081] <TB1> INFO: scanning low vcal = 100
[10:52:42.527] <TB1> INFO: Expecting 41600 events.
[10:52:47.009] <TB1> INFO: 41600 events read in total (3767ms).
[10:52:47.010] <TB1> INFO: Test took 4929ms.
[10:52:47.014] <TB1> INFO: scanning low vcal = 110
[10:52:47.455] <TB1> INFO: Expecting 41600 events.
[10:52:51.793] <TB1> INFO: 41600 events read in total (3622ms).
[10:52:51.793] <TB1> INFO: Test took 4779ms.
[10:52:51.797] <TB1> INFO: scanning low vcal = 120
[10:52:52.235] <TB1> INFO: Expecting 41600 events.
[10:52:56.588] <TB1> INFO: 41600 events read in total (3637ms).
[10:52:56.588] <TB1> INFO: Test took 4791ms.
[10:52:56.591] <TB1> INFO: scanning low vcal = 130
[10:52:57.035] <TB1> INFO: Expecting 41600 events.
[10:53:01.380] <TB1> INFO: 41600 events read in total (3629ms).
[10:53:01.381] <TB1> INFO: Test took 4790ms.
[10:53:01.384] <TB1> INFO: scanning low vcal = 140
[10:53:01.834] <TB1> INFO: Expecting 41600 events.
[10:53:06.102] <TB1> INFO: 41600 events read in total (3552ms).
[10:53:06.103] <TB1> INFO: Test took 4719ms.
[10:53:06.106] <TB1> INFO: scanning low vcal = 150
[10:53:06.547] <TB1> INFO: Expecting 41600 events.
[10:53:10.852] <TB1> INFO: 41600 events read in total (3590ms).
[10:53:10.852] <TB1> INFO: Test took 4746ms.
[10:53:10.856] <TB1> INFO: scanning low vcal = 160
[10:53:11.302] <TB1> INFO: Expecting 41600 events.
[10:53:15.595] <TB1> INFO: 41600 events read in total (3578ms).
[10:53:15.596] <TB1> INFO: Test took 4740ms.
[10:53:15.599] <TB1> INFO: scanning low vcal = 170
[10:53:16.030] <TB1> INFO: Expecting 41600 events.
[10:53:20.397] <TB1> INFO: 41600 events read in total (3652ms).
[10:53:20.398] <TB1> INFO: Test took 4799ms.
[10:53:20.408] <TB1> INFO: scanning low vcal = 180
[10:53:20.840] <TB1> INFO: Expecting 41600 events.
[10:53:25.197] <TB1> INFO: 41600 events read in total (3642ms).
[10:53:25.197] <TB1> INFO: Test took 4789ms.
[10:53:25.201] <TB1> INFO: scanning low vcal = 190
[10:53:25.638] <TB1> INFO: Expecting 41600 events.
[10:53:30.006] <TB1> INFO: 41600 events read in total (3653ms).
[10:53:30.007] <TB1> INFO: Test took 4806ms.
[10:53:30.010] <TB1> INFO: scanning low vcal = 200
[10:53:30.436] <TB1> INFO: Expecting 41600 events.
[10:53:34.794] <TB1> INFO: 41600 events read in total (3644ms).
[10:53:34.795] <TB1> INFO: Test took 4785ms.
[10:53:34.799] <TB1> INFO: scanning low vcal = 210
[10:53:35.228] <TB1> INFO: Expecting 41600 events.
[10:53:39.579] <TB1> INFO: 41600 events read in total (3636ms).
[10:53:39.579] <TB1> INFO: Test took 4780ms.
[10:53:39.583] <TB1> INFO: scanning low vcal = 220
[10:53:40.020] <TB1> INFO: Expecting 41600 events.
[10:53:44.323] <TB1> INFO: 41600 events read in total (3588ms).
[10:53:44.324] <TB1> INFO: Test took 4741ms.
[10:53:44.328] <TB1> INFO: scanning low vcal = 230
[10:53:44.756] <TB1> INFO: Expecting 41600 events.
[10:53:49.106] <TB1> INFO: 41600 events read in total (3634ms).
[10:53:49.107] <TB1> INFO: Test took 4779ms.
[10:53:49.110] <TB1> INFO: scanning low vcal = 240
[10:53:49.548] <TB1> INFO: Expecting 41600 events.
[10:53:53.837] <TB1> INFO: 41600 events read in total (3574ms).
[10:53:53.838] <TB1> INFO: Test took 4728ms.
[10:53:53.841] <TB1> INFO: scanning low vcal = 250
[10:53:54.284] <TB1> INFO: Expecting 41600 events.
[10:53:58.681] <TB1> INFO: 41600 events read in total (3682ms).
[10:53:58.681] <TB1> INFO: Test took 4840ms.
[10:53:58.687] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[10:53:59.117] <TB1> INFO: Expecting 41600 events.
[10:54:03.473] <TB1> INFO: 41600 events read in total (3641ms).
[10:54:03.474] <TB1> INFO: Test took 4787ms.
[10:54:03.477] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[10:54:03.902] <TB1> INFO: Expecting 41600 events.
[10:54:08.112] <TB1> INFO: 41600 events read in total (3495ms).
[10:54:08.112] <TB1> INFO: Test took 4634ms.
[10:54:08.116] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[10:54:08.553] <TB1> INFO: Expecting 41600 events.
[10:54:12.785] <TB1> INFO: 41600 events read in total (3517ms).
[10:54:12.786] <TB1> INFO: Test took 4670ms.
[10:54:12.789] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[10:54:13.222] <TB1> INFO: Expecting 41600 events.
[10:54:17.430] <TB1> INFO: 41600 events read in total (3492ms).
[10:54:17.430] <TB1> INFO: Test took 4641ms.
[10:54:17.434] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[10:54:17.877] <TB1> INFO: Expecting 41600 events.
[10:54:22.088] <TB1> INFO: 41600 events read in total (3496ms).
[10:54:22.089] <TB1> INFO: Test took 4655ms.
[10:54:22.684] <TB1> INFO: PixTestGainPedestal::measure() done
[10:55:00.678] <TB1> INFO: PixTestGainPedestal::fit() done
[10:55:00.678] <TB1> INFO: non-linearity mean: 0.953 0.955 0.956 0.951 0.958 0.955 0.959 0.962 0.964 0.950 0.959 0.957 0.963 0.958 0.959 0.959
[10:55:00.678] <TB1> INFO: non-linearity RMS: 0.007 0.007 0.008 0.009 0.006 0.007 0.006 0.006 0.005 0.007 0.006 0.006 0.005 0.007 0.007 0.009
[10:55:00.678] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[10:55:00.704] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[10:55:00.728] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[10:55:00.752] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[10:55:00.777] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[10:55:00.802] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[10:55:00.827] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[10:55:00.852] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[10:55:00.876] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[10:55:00.902] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[10:55:00.923] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[10:55:00.943] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[10:55:00.963] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[10:55:00.982] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[10:55:01.002] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[10:55:01.022] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[10:55:01.041] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 180 seconds
[10:55:01.041] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:55:01.041] <TB1> INFO: Decoding statistics:
[10:55:01.041] <TB1> INFO: General information:
[10:55:01.041] <TB1> INFO: 16bit words read: 2327592
[10:55:01.041] <TB1> INFO: valid events total: 83200
[10:55:01.041] <TB1> INFO: empty events: 0
[10:55:01.041] <TB1> INFO: valid events with pixels: 83200
[10:55:01.041] <TB1> INFO: valid pixel hits: 664596
[10:55:01.041] <TB1> INFO: Event errors: 0
[10:55:01.041] <TB1> INFO: start marker: 0
[10:55:01.041] <TB1> INFO: stop marker: 0
[10:55:01.041] <TB1> INFO: overflow: 0
[10:55:01.041] <TB1> INFO: invalid 5bit words: 0
[10:55:01.041] <TB1> INFO: invalid XOR eye diagram: 0
[10:55:01.041] <TB1> INFO: TBM errors: 0
[10:55:01.041] <TB1> INFO: flawed TBM headers: 0
[10:55:01.041] <TB1> INFO: flawed TBM trailers: 0
[10:55:01.041] <TB1> INFO: event ID mismatches: 0
[10:55:01.041] <TB1> INFO: ROC errors: 0
[10:55:01.041] <TB1> INFO: missing ROC header(s): 0
[10:55:01.041] <TB1> INFO: misplaced readback start: 0
[10:55:01.041] <TB1> INFO: Pixel decoding errors: 0
[10:55:01.041] <TB1> INFO: pixel data incomplete: 0
[10:55:01.041] <TB1> INFO: pixel address: 0
[10:55:01.041] <TB1> INFO: pulse height fill bit: 0
[10:55:01.041] <TB1> INFO: buffer corruption: 0
[10:55:01.048] <TB1> INFO: readReadbackCal: /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C0.dat .. /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C15.dat
[10:55:01.075] <TB1> INFO: ######################################################################
[10:55:01.075] <TB1> INFO: PixTestReadback::doTest()
[10:55:01.075] <TB1> INFO: ######################################################################
[10:55:01.076] <TB1> INFO: PixTestReadback::RES sent once
[10:55:12.453] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C0.dat
[10:55:12.453] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C1.dat
[10:55:12.453] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C2.dat
[10:55:12.453] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C3.dat
[10:55:12.453] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C4.dat
[10:55:12.453] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C5.dat
[10:55:12.453] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C6.dat
[10:55:12.453] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C7.dat
[10:55:12.453] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C8.dat
[10:55:12.453] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C9.dat
[10:55:12.453] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C10.dat
[10:55:12.453] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C11.dat
[10:55:12.454] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C12.dat
[10:55:12.454] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C13.dat
[10:55:12.454] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C14.dat
[10:55:12.454] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C15.dat
[10:55:12.503] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:55:12.503] <TB1> INFO: PixTestReadback::RES sent once
[10:55:23.753] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C0.dat
[10:55:23.754] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C1.dat
[10:55:23.754] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C2.dat
[10:55:23.754] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C3.dat
[10:55:23.754] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C4.dat
[10:55:23.754] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C5.dat
[10:55:23.755] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C6.dat
[10:55:23.755] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C7.dat
[10:55:23.755] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C8.dat
[10:55:23.755] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C9.dat
[10:55:23.755] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C10.dat
[10:55:23.755] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C11.dat
[10:55:23.755] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C12.dat
[10:55:23.755] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C13.dat
[10:55:23.755] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C14.dat
[10:55:23.755] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C15.dat
[10:55:23.805] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:55:23.805] <TB1> INFO: PixTestReadback::RES sent once
[10:55:32.447] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:55:32.447] <TB1> INFO: Vbg will be calibrated using Vd calibration
[10:55:32.447] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 159.5calibrated Vbg = 1.19594 :::*/*/*/*/
[10:55:32.447] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 162.6calibrated Vbg = 1.19592 :::*/*/*/*/
[10:55:32.447] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 155.6calibrated Vbg = 1.20263 :::*/*/*/*/
[10:55:32.447] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 155.5calibrated Vbg = 1.20868 :::*/*/*/*/
[10:55:32.447] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 156calibrated Vbg = 1.21563 :::*/*/*/*/
[10:55:32.447] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 154.6calibrated Vbg = 1.2161 :::*/*/*/*/
[10:55:32.447] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 155.7calibrated Vbg = 1.22146 :::*/*/*/*/
[10:55:32.447] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 154.3calibrated Vbg = 1.21442 :::*/*/*/*/
[10:55:32.447] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 152.1calibrated Vbg = 1.21384 :::*/*/*/*/
[10:55:32.447] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 154.1calibrated Vbg = 1.20626 :::*/*/*/*/
[10:55:32.447] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 167.3calibrated Vbg = 1.20827 :::*/*/*/*/
[10:55:32.447] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 146.8calibrated Vbg = 1.20381 :::*/*/*/*/
[10:55:32.447] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 154.9calibrated Vbg = 1.19906 :::*/*/*/*/
[10:55:32.447] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 160.3calibrated Vbg = 1.19843 :::*/*/*/*/
[10:55:32.447] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 159calibrated Vbg = 1.19819 :::*/*/*/*/
[10:55:32.447] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 155.5calibrated Vbg = 1.20627 :::*/*/*/*/
[10:55:32.452] <TB1> INFO: PixTestReadback::RES sent once
[10:58:27.389] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C0.dat
[10:58:27.389] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C1.dat
[10:58:27.389] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C2.dat
[10:58:27.389] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C3.dat
[10:58:27.389] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C4.dat
[10:58:27.389] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C5.dat
[10:58:27.389] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C6.dat
[10:58:27.389] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C7.dat
[10:58:27.389] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C8.dat
[10:58:27.389] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C9.dat
[10:58:27.390] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C10.dat
[10:58:27.390] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C11.dat
[10:58:27.390] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C12.dat
[10:58:27.390] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C13.dat
[10:58:27.390] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C14.dat
[10:58:27.390] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C15.dat
[10:58:27.438] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[10:58:27.441] <TB1> INFO: PixTestReadback::doTest() done
[10:58:27.441] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:58:27.441] <TB1> INFO: Decoding statistics:
[10:58:27.441] <TB1> INFO: General information:
[10:58:27.441] <TB1> INFO: 16bit words read: 768
[10:58:27.441] <TB1> INFO: valid events total: 64
[10:58:27.441] <TB1> INFO: empty events: 64
[10:58:27.441] <TB1> INFO: valid events with pixels: 0
[10:58:27.441] <TB1> INFO: valid pixel hits: 0
[10:58:27.441] <TB1> INFO: Event errors: 0
[10:58:27.441] <TB1> INFO: start marker: 0
[10:58:27.441] <TB1> INFO: stop marker: 0
[10:58:27.441] <TB1> INFO: overflow: 0
[10:58:27.441] <TB1> INFO: invalid 5bit words: 0
[10:58:27.441] <TB1> INFO: invalid XOR eye diagram: 0
[10:58:27.441] <TB1> INFO: TBM errors: 0
[10:58:27.441] <TB1> INFO: flawed TBM headers: 0
[10:58:27.441] <TB1> INFO: flawed TBM trailers: 0
[10:58:27.441] <TB1> INFO: event ID mismatches: 0
[10:58:27.441] <TB1> INFO: ROC errors: 0
[10:58:27.441] <TB1> INFO: missing ROC header(s): 0
[10:58:27.441] <TB1> INFO: misplaced readback start: 0
[10:58:27.441] <TB1> INFO: Pixel decoding errors: 0
[10:58:27.441] <TB1> INFO: pixel data incomplete: 0
[10:58:27.441] <TB1> INFO: pixel address: 0
[10:58:27.441] <TB1> INFO: pulse height fill bit: 0
[10:58:27.441] <TB1> INFO: buffer corruption: 0
[10:58:27.456] <TB1> INFO: Decoding statistics:
[10:58:27.456] <TB1> INFO: General information:
[10:58:27.456] <TB1> INFO: 16bit words read: 2394802
[10:58:27.456] <TB1> INFO: valid events total: 88384
[10:58:27.456] <TB1> INFO: empty events: 2683
[10:58:27.456] <TB1> INFO: valid events with pixels: 85701
[10:58:27.456] <TB1> INFO: valid pixel hits: 667097
[10:58:27.456] <TB1> INFO: Event errors: 0
[10:58:27.456] <TB1> INFO: start marker: 0
[10:58:27.456] <TB1> INFO: stop marker: 0
[10:58:27.456] <TB1> INFO: overflow: 0
[10:58:27.456] <TB1> INFO: invalid 5bit words: 0
[10:58:27.456] <TB1> INFO: invalid XOR eye diagram: 0
[10:58:27.456] <TB1> INFO: TBM errors: 0
[10:58:27.456] <TB1> INFO: flawed TBM headers: 0
[10:58:27.456] <TB1> INFO: flawed TBM trailers: 0
[10:58:27.456] <TB1> INFO: event ID mismatches: 0
[10:58:27.456] <TB1> INFO: ROC errors: 0
[10:58:27.456] <TB1> INFO: missing ROC header(s): 0
[10:58:27.456] <TB1> INFO: misplaced readback start: 0
[10:58:27.456] <TB1> INFO: Pixel decoding errors: 0
[10:58:27.456] <TB1> INFO: pixel data incomplete: 0
[10:58:27.456] <TB1> INFO: pixel address: 0
[10:58:27.456] <TB1> INFO: pulse height fill bit: 0
[10:58:27.456] <TB1> INFO: buffer corruption: 0
[10:58:27.456] <TB1> INFO: enter test to run
[10:58:27.456] <TB1> INFO: test: exit no parameter change
[10:58:27.688] <TB1> QUIET: Connection to board 153 closed.
[10:58:27.768] <TB1> INFO: pXar: this is the end, my friend