[11:43:01.097] <TB1> INFO: *** Welcome to pxar ***
[11:43:01.097] <TB1> INFO: *** Today: 2015/11/03
[11:43:01.158] <TB1> INFO: *** Version: 9da6
[11:43:01.158] <TB1> INFO: readRocDacs: /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C15.dat
[11:43:01.159] <TB1> INFO: readTbmDacs: /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//tbmParameters_C0b.dat
[11:43:01.159] <TB1> INFO: readMaskFile: /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//defaultMaskFile.dat
[11:43:01.159] <TB1> INFO: readTrimFile: /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters_C15.dat
[11:43:01.229] <TB1> INFO: clk: 4
[11:43:01.229] <TB1> INFO: ctr: 4
[11:43:01.229] <TB1> INFO: sda: 19
[11:43:01.229] <TB1> INFO: tin: 9
[11:43:01.229] <TB1> INFO: level: 15
[11:43:01.229] <TB1> INFO: triggerdelay: 0
[11:43:01.229] <TB1> QUIET: Instanciating API for pxar v2.6.0+26~g89693ff
[11:43:01.229] <TB1> INFO: Log level: INFO
[11:43:01.237] <TB1> INFO: Found DTB DTB_WXBYFL
[11:43:01.249] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[11:43:01.253] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.2
SW version: 4.5
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[11:43:01.255] <TB1> INFO: RPC call hashes of host and DTB match: 398089610
[11:43:02.805] <TB1> INFO: DUT info:
[11:43:02.805] <TB1> INFO: The DUT currently contains the following objects:
[11:43:02.805] <TB1> INFO: 2 TBM Cores tbm08c (2 ON)
[11:43:02.805] <TB1> INFO: TBM Core alpha (0): 7 registers set
[11:43:02.805] <TB1> INFO: TBM Core beta (1): 7 registers set
[11:43:02.805] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[11:43:02.805] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:02.805] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:02.805] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:02.805] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:02.805] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:02.805] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:02.805] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:02.805] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:02.805] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:02.805] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:02.805] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:02.805] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:02.805] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:02.805] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:02.805] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:02.805] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:03.207] <TB1> INFO: enter 'restricted' command line mode
[11:43:03.207] <TB1> INFO: enter test to run
[11:43:03.207] <TB1> INFO: test: pretest no parameter change
[11:43:03.207] <TB1> INFO: running: pretest
[11:43:03.218] <TB1> INFO: ######################################################################
[11:43:03.218] <TB1> INFO: PixTestPretest::doTest()
[11:43:03.218] <TB1> INFO: ######################################################################
[11:43:03.220] <TB1> INFO: ----------------------------------------------------------------------
[11:43:03.220] <TB1> INFO: PixTestPretest::programROC()
[11:43:03.220] <TB1> INFO: ----------------------------------------------------------------------
[11:43:21.242] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:43:21.242] <TB1> INFO: IA differences per ROC: 16.1 15.3 17.7 16.9 18.5 19.3 18.5 19.3 17.7 16.1 16.1 16.9 16.1 16.9 17.7 17.7
[11:43:21.333] <TB1> INFO: ----------------------------------------------------------------------
[11:43:21.333] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:43:21.333] <TB1> INFO: ----------------------------------------------------------------------
[11:43:27.562] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 392.3 mA = 24.5187 mA/ROC
[11:43:27.562] <TB1> INFO: i(loss) [mA/ROC]: 20.1 20.1 20.1 20.1 20.1 20.9 20.1 20.1 20.1 20.1 19.3 20.1 20.1 20.1 19.3 19.3
[11:43:27.611] <TB1> INFO: ----------------------------------------------------------------------
[11:43:27.611] <TB1> INFO: PixTestPretest::findTiming()
[11:43:27.611] <TB1> INFO: ----------------------------------------------------------------------
[11:43:27.611] <TB1> INFO: PixTestCmd::init()

[11:45:00.520] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):4, header/trailer: 1, token: 1
[11:45:00.520] <TB1> INFO: (success/tries = 100/100), width = 4
[11:45:00.523] <TB1> INFO: ----------------------------------------------------------------------
[11:45:00.523] <TB1> INFO: PixTestPretest::findWorkingPixel()
[11:45:00.523] <TB1> INFO: ----------------------------------------------------------------------
[11:45:00.666] <TB1> INFO: Expecting 231680 events.


[11:45:08.291] <TB1> INFO: 231680 events read in total (6910ms).
[11:45:08.296] <TB1> INFO: Test took 7766ms.
[11:45:08.712] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:45:08.764] <TB1> INFO: ----------------------------------------------------------------------
[11:45:08.764] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[11:45:08.764] <TB1> INFO: ----------------------------------------------------------------------
[11:45:08.905] <TB1> INFO: Expecting 231680 events.
[11:45:17.522] <TB1> INFO: 231680 events read in total (7901ms).
[11:45:17.527] <TB1> INFO: Test took 8755ms.
[11:45:17.971] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[11:45:17.971] <TB1> INFO: CalDel: 118 123 133 133 123 143 126 127 108 137 125 118 139 121 125 130
[11:45:17.971] <TB1> INFO: VthrComp: 51 51 53 51 51 51 51 51 53 51 51 51 51 51 51 51
[11:45:17.974] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C0.dat
[11:45:17.975] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C1.dat
[11:45:17.975] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C2.dat
[11:45:17.975] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C3.dat
[11:45:17.976] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C4.dat
[11:45:17.976] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C5.dat
[11:45:17.976] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C6.dat
[11:45:17.976] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C7.dat
[11:45:17.977] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C8.dat
[11:45:17.977] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C9.dat
[11:45:17.977] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C10.dat
[11:45:17.977] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C11.dat
[11:45:17.977] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C12.dat
[11:45:17.978] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C13.dat
[11:45:17.978] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C14.dat
[11:45:17.978] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C15.dat
[11:45:17.978] <TB1> INFO: write tbm parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//tbmParameters_C0a.dat
[11:45:17.978] <TB1> INFO: write tbm parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//tbmParameters_C0b.dat
[11:45:17.979] <TB1> INFO: PixTestPretest::doTest() done, duration: 134 seconds
[11:45:18.054] <TB1> INFO: enter test to run
[11:45:18.054] <TB1> INFO: test: fulltest no parameter change
[11:45:18.054] <TB1> INFO: running: fulltest
[11:45:18.054] <TB1> INFO: ######################################################################
[11:45:18.054] <TB1> INFO: PixTestFullTest::doTest()
[11:45:18.054] <TB1> INFO: ######################################################################
[11:45:18.056] <TB1> INFO: ######################################################################
[11:45:18.056] <TB1> INFO: PixTestAlive::doTest()
[11:45:18.056] <TB1> INFO: ######################################################################
[11:45:18.058] <TB1> INFO: ----------------------------------------------------------------------
[11:45:18.058] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:45:18.058] <TB1> INFO: ----------------------------------------------------------------------
[11:45:18.404] <TB1> INFO: Expecting 41600 events.
[11:45:22.800] <TB1> INFO: 41600 events read in total (3681ms).
[11:45:22.801] <TB1> INFO: Test took 4741ms.
[11:45:22.808] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:23.202] <TB1> INFO: PixTestAlive::aliveTest() done
[11:45:23.202] <TB1> INFO: number of dead pixels (per ROC): 1 6 2 0 0 0 10 3 0 0 0 0 0 2 0 0
[11:45:23.204] <TB1> INFO: ----------------------------------------------------------------------
[11:45:23.204] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:45:23.204] <TB1> INFO: ----------------------------------------------------------------------
[11:45:23.540] <TB1> INFO: Expecting 41600 events.
[11:45:26.635] <TB1> INFO: 41600 events read in total (2380ms).
[11:45:26.635] <TB1> INFO: Test took 3428ms.
[11:45:26.635] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:26.636] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:45:27.058] <TB1> INFO: PixTestAlive::maskTest() done
[11:45:27.058] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:45:27.060] <TB1> INFO: ----------------------------------------------------------------------
[11:45:27.060] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:45:27.060] <TB1> INFO: ----------------------------------------------------------------------
[11:45:27.403] <TB1> INFO: Expecting 41600 events.
[11:45:31.706] <TB1> INFO: 41600 events read in total (3588ms).
[11:45:31.706] <TB1> INFO: Test took 4642ms.
[11:45:31.712] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:32.108] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[11:45:32.108] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:45:32.108] <TB1> INFO: PixTestAlive::doTest() done, duration: 14 seconds
[11:45:32.108] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:32.108] <TB1> INFO: Decoding statistics:
[11:45:32.108] <TB1> INFO: General information:
[11:45:32.108] <TB1> INFO: 16bit words read: 0
[11:45:32.108] <TB1> INFO: valid events total: 0
[11:45:32.108] <TB1> INFO: empty events: 0
[11:45:32.108] <TB1> INFO: valid events with pixels: 0
[11:45:32.108] <TB1> INFO: valid pixel hits: 0
[11:45:32.108] <TB1> INFO: Event errors: 0
[11:45:32.108] <TB1> INFO: start marker: 0
[11:45:32.108] <TB1> INFO: stop marker: 0
[11:45:32.108] <TB1> INFO: overflow: 0
[11:45:32.108] <TB1> INFO: invalid 5bit words: 0
[11:45:32.108] <TB1> INFO: invalid XOR eye diagram: 0
[11:45:32.108] <TB1> INFO: TBM errors: 0
[11:45:32.108] <TB1> INFO: flawed TBM headers: 0
[11:45:32.108] <TB1> INFO: flawed TBM trailers: 0
[11:45:32.108] <TB1> INFO: event ID mismatches: 0
[11:45:32.108] <TB1> INFO: ROC errors: 0
[11:45:32.108] <TB1> INFO: missing ROC header(s): 0
[11:45:32.108] <TB1> INFO: misplaced readback start: 0
[11:45:32.109] <TB1> INFO: Pixel decoding errors: 0
[11:45:32.109] <TB1> INFO: pixel data incomplete: 0
[11:45:32.109] <TB1> INFO: pixel address: 0
[11:45:32.109] <TB1> INFO: pulse height fill bit: 0
[11:45:32.109] <TB1> INFO: buffer corruption: 0
[11:45:32.119] <TB1> INFO: ######################################################################
[11:45:32.119] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:45:32.119] <TB1> INFO: ######################################################################
[11:45:32.124] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[11:45:32.136] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[11:45:32.136] <TB1> INFO: run 1 of 1
[11:45:32.443] <TB1> INFO: Expecting 3120000 events.
[11:46:26.702] <TB1> INFO: 1232090 events read in total (53544ms).
[11:47:20.198] <TB1> INFO: 2450200 events read in total (107040ms).
[11:47:48.771] <TB1> INFO: 3120000 events read in total (135613ms).
[11:47:48.808] <TB1> INFO: Test took 136672ms.
[11:47:48.877] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:14.527] <TB1> INFO: PixTestBBMap::doTest() done, duration: 162 seconds
[11:48:14.528] <TB1> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:48:14.528] <TB1> INFO: separation cut (per ROC): 133 144 146 141 146 142 137 143 144 135 137 131 134 132 136 126
[11:48:14.528] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:14.528] <TB1> INFO: Decoding statistics:
[11:48:14.528] <TB1> INFO: General information:
[11:48:14.528] <TB1> INFO: 16bit words read: 0
[11:48:14.528] <TB1> INFO: valid events total: 0
[11:48:14.528] <TB1> INFO: empty events: 0
[11:48:14.528] <TB1> INFO: valid events with pixels: 0
[11:48:14.528] <TB1> INFO: valid pixel hits: 0
[11:48:14.528] <TB1> INFO: Event errors: 0
[11:48:14.528] <TB1> INFO: start marker: 0
[11:48:14.528] <TB1> INFO: stop marker: 0
[11:48:14.528] <TB1> INFO: overflow: 0
[11:48:14.528] <TB1> INFO: invalid 5bit words: 0
[11:48:14.528] <TB1> INFO: invalid XOR eye diagram: 0
[11:48:14.528] <TB1> INFO: TBM errors: 0
[11:48:14.528] <TB1> INFO: flawed TBM headers: 0
[11:48:14.528] <TB1> INFO: flawed TBM trailers: 0
[11:48:14.528] <TB1> INFO: event ID mismatches: 0
[11:48:14.528] <TB1> INFO: ROC errors: 0
[11:48:14.528] <TB1> INFO: missing ROC header(s): 0
[11:48:14.528] <TB1> INFO: misplaced readback start: 0
[11:48:14.528] <TB1> INFO: Pixel decoding errors: 0
[11:48:14.528] <TB1> INFO: pixel data incomplete: 0
[11:48:14.528] <TB1> INFO: pixel address: 0
[11:48:14.528] <TB1> INFO: pulse height fill bit: 0
[11:48:14.528] <TB1> INFO: buffer corruption: 0
[11:48:14.631] <TB1> INFO: ######################################################################
[11:48:14.631] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:48:14.631] <TB1> INFO: ######################################################################
[11:48:14.631] <TB1> INFO: ----------------------------------------------------------------------
[11:48:14.631] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:48:14.631] <TB1> INFO: ----------------------------------------------------------------------
[11:48:14.631] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[11:48:14.642] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[11:48:14.642] <TB1> INFO: run 1 of 1
[11:48:15.025] <TB1> INFO: Expecting 26208000 events.
[11:48:47.261] <TB1> INFO: 1254000 events read in total (31521ms).
[11:49:20.701] <TB1> INFO: 2481800 events read in total (64961ms).
[11:49:53.383] <TB1> INFO: 3709450 events read in total (97643ms).
[11:50:26.193] <TB1> INFO: 4932450 events read in total (130453ms).
[11:50:59.373] <TB1> INFO: 6159750 events read in total (163633ms).
[11:51:33.593] <TB1> INFO: 7379950 events read in total (197853ms).
[11:52:07.741] <TB1> INFO: 8601400 events read in total (232001ms).
[11:52:42.176] <TB1> INFO: 9826500 events read in total (266436ms).
[11:53:16.123] <TB1> INFO: 11045600 events read in total (300383ms).
[11:53:50.677] <TB1> INFO: 12265000 events read in total (334937ms).
[11:54:23.922] <TB1> INFO: 13471050 events read in total (368182ms).
[11:54:57.094] <TB1> INFO: 14671400 events read in total (401354ms).
[11:55:30.411] <TB1> INFO: 15869050 events read in total (434671ms).
[11:56:02.907] <TB1> INFO: 17063750 events read in total (467167ms).
[11:56:35.378] <TB1> INFO: 18257550 events read in total (499638ms).
[11:57:08.110] <TB1> INFO: 19446950 events read in total (532370ms).
[11:57:40.060] <TB1> INFO: 20637700 events read in total (564320ms).
[11:58:12.793] <TB1> INFO: 21832250 events read in total (597053ms).
[11:58:45.398] <TB1> INFO: 23021950 events read in total (629658ms).
[11:59:18.902] <TB1> INFO: 24218700 events read in total (663162ms).
[11:59:51.746] <TB1> INFO: 25418700 events read in total (696006ms).
[12:00:11.122] <TB1> INFO: 26208000 events read in total (715382ms).
[12:00:11.153] <TB1> INFO: Test took 716511ms.
[12:00:11.215] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:11.383] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:00:12.822] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:00:14.236] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:00:15.576] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:00:17.012] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:00:18.415] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:00:19.917] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:00:21.604] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:00:23.223] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:00:24.684] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:00:26.099] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:00:27.511] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:00:28.936] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:00:30.424] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:00:31.872] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:00:33.351] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[12:00:34.837] <TB1> INFO: PixTestScurves::scurves() done
[12:00:34.837] <TB1> INFO: Vcal mean: 98.98 107.79 118.78 106.34 111.93 109.46 103.54 107.61 116.78 102.34 110.11 99.31 102.14 105.98 108.74 105.36
[12:00:34.837] <TB1> INFO: Vcal RMS: 5.97 7.67 6.67 5.00 5.41 4.42 7.28 6.12 5.94 6.00 5.00 5.29 5.40 5.43 5.31 5.17
[12:00:34.837] <TB1> INFO: PixTestScurves::fullTest() done, duration: 740 seconds
[12:00:34.837] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:34.837] <TB1> INFO: Decoding statistics:
[12:00:34.837] <TB1> INFO: General information:
[12:00:34.837] <TB1> INFO: 16bit words read: 0
[12:00:34.837] <TB1> INFO: valid events total: 0
[12:00:34.837] <TB1> INFO: empty events: 0
[12:00:34.837] <TB1> INFO: valid events with pixels: 0
[12:00:34.837] <TB1> INFO: valid pixel hits: 0
[12:00:34.837] <TB1> INFO: Event errors: 0
[12:00:34.837] <TB1> INFO: start marker: 0
[12:00:34.837] <TB1> INFO: stop marker: 0
[12:00:34.837] <TB1> INFO: overflow: 0
[12:00:34.837] <TB1> INFO: invalid 5bit words: 0
[12:00:34.837] <TB1> INFO: invalid XOR eye diagram: 0
[12:00:34.837] <TB1> INFO: TBM errors: 0
[12:00:34.837] <TB1> INFO: flawed TBM headers: 0
[12:00:34.837] <TB1> INFO: flawed TBM trailers: 0
[12:00:34.837] <TB1> INFO: event ID mismatches: 0
[12:00:34.837] <TB1> INFO: ROC errors: 0
[12:00:34.837] <TB1> INFO: missing ROC header(s): 0
[12:00:34.837] <TB1> INFO: misplaced readback start: 0
[12:00:34.837] <TB1> INFO: Pixel decoding errors: 0
[12:00:34.837] <TB1> INFO: pixel data incomplete: 0
[12:00:34.837] <TB1> INFO: pixel address: 0
[12:00:34.837] <TB1> INFO: pulse height fill bit: 0
[12:00:34.837] <TB1> INFO: buffer corruption: 0
[12:00:34.917] <TB1> INFO: ######################################################################
[12:00:34.917] <TB1> INFO: PixTestTrim::doTest()
[12:00:34.917] <TB1> INFO: ######################################################################
[12:00:34.919] <TB1> INFO: ----------------------------------------------------------------------
[12:00:34.919] <TB1> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[12:00:34.919] <TB1> INFO: ----------------------------------------------------------------------
[12:00:35.008] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:00:35.008] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:00:35.016] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[12:00:35.016] <TB1> INFO: run 1 of 1
[12:00:35.325] <TB1> INFO: Expecting 6281600 events.
[12:01:17.461] <TB1> INFO: 1431440 events read in total (41419ms).
[12:01:57.715] <TB1> INFO: 2856570 events read in total (81673ms).
[12:02:42.261] <TB1> INFO: 4272960 events read in total (126219ms).
[12:03:26.613] <TB1> INFO: 5686030 events read in total (170571ms).
[12:03:43.855] <TB1> INFO: 6281600 events read in total (187813ms).
[12:03:43.888] <TB1> INFO: Test took 188873ms.
[12:03:43.944] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:04:04.921] <TB1> INFO: ROC 0 VthrComp = 102
[12:04:04.922] <TB1> INFO: ROC 1 VthrComp = 106
[12:04:04.922] <TB1> INFO: ROC 2 VthrComp = 113
[12:04:04.922] <TB1> INFO: ROC 3 VthrComp = 110
[12:04:04.922] <TB1> INFO: ROC 4 VthrComp = 112
[12:04:04.922] <TB1> INFO: ROC 5 VthrComp = 113
[12:04:04.922] <TB1> INFO: ROC 6 VthrComp = 105
[12:04:04.922] <TB1> INFO: ROC 7 VthrComp = 109
[12:04:04.922] <TB1> INFO: ROC 8 VthrComp = 111
[12:04:04.923] <TB1> INFO: ROC 9 VthrComp = 102
[12:04:04.923] <TB1> INFO: ROC 10 VthrComp = 108
[12:04:04.923] <TB1> INFO: ROC 11 VthrComp = 102
[12:04:04.923] <TB1> INFO: ROC 12 VthrComp = 104
[12:04:04.923] <TB1> INFO: ROC 13 VthrComp = 105
[12:04:04.923] <TB1> INFO: ROC 14 VthrComp = 106
[12:04:04.923] <TB1> INFO: ROC 15 VthrComp = 104
[12:04:04.924] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:04:04.924] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:04:04.934] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[12:04:04.934] <TB1> INFO: run 1 of 1
[12:04:05.243] <TB1> INFO: Expecting 6281600 events.
[12:04:42.399] <TB1> INFO: 899890 events read in total (36441ms).
[12:05:15.978] <TB1> INFO: 1796770 events read in total (70020ms).
[12:05:52.613] <TB1> INFO: 2694660 events read in total (106656ms).
[12:06:29.472] <TB1> INFO: 3587670 events read in total (143514ms).
[12:07:06.664] <TB1> INFO: 4473870 events read in total (180706ms).
[12:07:42.712] <TB1> INFO: 5357080 events read in total (216754ms).
[12:08:15.985] <TB1> INFO: 6242370 events read in total (250027ms).
[12:08:17.777] <TB1> INFO: 6281600 events read in total (251819ms).
[12:08:17.834] <TB1> INFO: Test took 252900ms.
[12:08:17.978] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:42.101] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 60.8335 for pixel 5/55 mean/min/max = 46.2671/31.6735/60.8607
[12:08:42.101] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 65.9174 for pixel 2/5 mean/min/max = 49.7326/33.5329/65.9322
[12:08:42.101] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 69.1782 for pixel 16/72 mean/min/max = 52.9392/36.538/69.3403
[12:08:42.101] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 59.9805 for pixel 25/4 mean/min/max = 47.1935/34.3104/60.0765
[12:08:42.102] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 62.0173 for pixel 43/70 mean/min/max = 48.0738/33.9911/62.1566
[12:08:42.102] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 57.7685 for pixel 7/5 mean/min/max = 45.7447/33.6426/57.8468
[12:08:42.102] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 60.4348 for pixel 31/73 mean/min/max = 47.2881/34.1053/60.4709
[12:08:42.102] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 63.4668 for pixel 9/36 mean/min/max = 48.7359/33.939/63.5328
[12:08:42.103] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 72.3005 for pixel 22/68 mean/min/max = 55.6286/38.7398/72.5173
[12:08:42.103] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 62.2783 for pixel 4/74 mean/min/max = 46.9137/31.5023/62.3251
[12:08:42.103] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 62.1119 for pixel 0/42 mean/min/max = 48.3769/34.538/62.2159
[12:08:42.104] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 58.7986 for pixel 49/40 mean/min/max = 45.9309/33.0564/58.8055
[12:08:42.104] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 60.6668 for pixel 0/37 mean/min/max = 47.2557/33.7561/60.7553
[12:08:42.104] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 61.1738 for pixel 18/1 mean/min/max = 47.8516/34.4146/61.2886
[12:08:42.104] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 63.6186 for pixel 0/3 mean/min/max = 48.8648/33.7764/63.9533
[12:08:42.105] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 62.1413 for pixel 24/2 mean/min/max = 47.7793/33.3521/62.2065
[12:08:42.105] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:08:42.238] <TB1> INFO: Expecting 514560 events.
[12:08:52.018] <TB1> INFO: 514560 events read in total (9065ms).
[12:08:52.023] <TB1> INFO: Expecting 514560 events.
[12:09:01.771] <TB1> INFO: 514560 events read in total (9091ms).
[12:09:01.778] <TB1> INFO: Expecting 514560 events.
[12:09:11.552] <TB1> INFO: 514560 events read in total (9112ms).
[12:09:11.563] <TB1> INFO: Expecting 514560 events.
[12:09:21.114] <TB1> INFO: 514560 events read in total (8900ms).
[12:09:21.128] <TB1> INFO: Expecting 514560 events.
[12:09:30.213] <TB1> INFO: 514560 events read in total (8438ms).
[12:09:30.228] <TB1> INFO: Expecting 514560 events.
[12:09:39.173] <TB1> INFO: 514560 events read in total (8289ms).
[12:09:39.190] <TB1> INFO: Expecting 514560 events.
[12:09:48.182] <TB1> INFO: 514560 events read in total (8335ms).
[12:09:48.204] <TB1> INFO: Expecting 514560 events.
[12:09:58.017] <TB1> INFO: 514560 events read in total (9161ms).
[12:09:58.038] <TB1> INFO: Expecting 514560 events.
[12:10:07.077] <TB1> INFO: 514560 events read in total (8391ms).
[12:10:07.100] <TB1> INFO: Expecting 514560 events.
[12:10:16.086] <TB1> INFO: 514560 events read in total (8338ms).
[12:10:16.113] <TB1> INFO: Expecting 514560 events.
[12:10:25.115] <TB1> INFO: 514560 events read in total (8356ms).
[12:10:25.145] <TB1> INFO: Expecting 514560 events.
[12:10:34.881] <TB1> INFO: 514560 events read in total (9092ms).
[12:10:34.911] <TB1> INFO: Expecting 514560 events.
[12:10:44.751] <TB1> INFO: 514560 events read in total (9198ms).
[12:10:44.780] <TB1> INFO: Expecting 514560 events.
[12:10:54.626] <TB1> INFO: 514560 events read in total (9200ms).
[12:10:54.661] <TB1> INFO: Expecting 514560 events.
[12:11:04.505] <TB1> INFO: 514560 events read in total (9212ms).
[12:11:04.541] <TB1> INFO: Expecting 514560 events.
[12:11:14.252] <TB1> INFO: 514560 events read in total (9085ms).
[12:11:14.297] <TB1> INFO: Test took 152192ms.
[12:11:15.590] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[12:11:15.599] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[12:11:15.599] <TB1> INFO: run 1 of 1
[12:11:15.908] <TB1> INFO: Expecting 6281600 events.
[12:11:54.961] <TB1> INFO: 873950 events read in total (38337ms).
[12:12:32.573] <TB1> INFO: 1745370 events read in total (75949ms).
[12:13:09.849] <TB1> INFO: 2617670 events read in total (113225ms).
[12:13:44.876] <TB1> INFO: 3486380 events read in total (148252ms).
[12:14:20.122] <TB1> INFO: 4347730 events read in total (183498ms).
[12:14:56.195] <TB1> INFO: 5205820 events read in total (219571ms).
[12:15:31.448] <TB1> INFO: 6064430 events read in total (254824ms).
[12:15:39.820] <TB1> INFO: 6281600 events read in total (263196ms).
[12:15:39.874] <TB1> INFO: Test took 264275ms.
[12:15:40.019] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:04.887] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.195244 .. 55.915108
[12:16:04.983] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 10 dacrange: 0 .. 65 (-1/-1) hits flags = 528 (plus default)
[12:16:04.992] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[12:16:04.992] <TB1> INFO: run 1 of 1
[12:16:05.329] <TB1> INFO: Expecting 2745600 events.
[12:16:46.224] <TB1> INFO: 1112630 events read in total (40180ms).
[12:17:22.256] <TB1> INFO: 2227360 events read in total (76212ms).
[12:17:39.978] <TB1> INFO: 2745600 events read in total (93934ms).
[12:17:40.000] <TB1> INFO: Test took 95007ms.
[12:17:40.050] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:57.614] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 16.494147 .. 46.708098
[12:17:57.709] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 10 dacrange: 6 .. 56 (-1/-1) hits flags = 528 (plus default)
[12:17:57.719] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[12:17:57.719] <TB1> INFO: run 1 of 1
[12:17:58.051] <TB1> INFO: Expecting 2121600 events.
[12:18:37.717] <TB1> INFO: 1146580 events read in total (38951ms).
[12:19:11.059] <TB1> INFO: 2121600 events read in total (72293ms).
[12:19:11.082] <TB1> INFO: Test took 73364ms.
[12:19:11.121] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:24.245] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 21.593394 .. 42.137049
[12:19:24.346] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 10 dacrange: 11 .. 52 (-1/-1) hits flags = 528 (plus default)
[12:19:24.355] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[12:19:24.355] <TB1> INFO: run 1 of 1
[12:19:24.680] <TB1> INFO: Expecting 1747200 events.
[12:20:07.041] <TB1> INFO: 1153090 events read in total (41645ms).
[12:20:28.203] <TB1> INFO: 1747200 events read in total (62807ms).
[12:20:28.221] <TB1> INFO: Test took 63866ms.
[12:20:28.250] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:43.731] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 22.808661 .. 41.579153
[12:20:43.828] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 10 dacrange: 12 .. 51 (-1/-1) hits flags = 528 (plus default)
[12:20:43.838] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[12:20:43.838] <TB1> INFO: run 1 of 1
[12:20:44.167] <TB1> INFO: Expecting 1664000 events.
[12:21:26.695] <TB1> INFO: 1160790 events read in total (41813ms).
[12:21:44.660] <TB1> INFO: 1664000 events read in total (59778ms).
[12:21:44.674] <TB1> INFO: Test took 60836ms.
[12:21:44.703] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:58.871] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:21:58.871] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:21:58.879] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[12:21:58.879] <TB1> INFO: run 1 of 1
[12:21:59.208] <TB1> INFO: Expecting 1705600 events.
[12:22:41.914] <TB1> INFO: 1076190 events read in total (41991ms).
[12:23:04.796] <TB1> INFO: 1705600 events read in total (64873ms).
[12:23:04.812] <TB1> INFO: Test took 65932ms.
[12:23:04.843] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:20.580] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C0.dat
[12:23:20.580] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C1.dat
[12:23:20.580] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C2.dat
[12:23:20.580] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C3.dat
[12:23:20.580] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C4.dat
[12:23:20.581] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C5.dat
[12:23:20.581] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C6.dat
[12:23:20.581] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C7.dat
[12:23:20.581] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C8.dat
[12:23:20.581] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C9.dat
[12:23:20.581] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C10.dat
[12:23:20.581] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C11.dat
[12:23:20.581] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C12.dat
[12:23:20.582] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C13.dat
[12:23:20.582] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C14.dat
[12:23:20.582] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C15.dat
[12:23:20.582] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C0.dat
[12:23:20.591] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C1.dat
[12:23:20.600] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C2.dat
[12:23:20.608] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C3.dat
[12:23:20.615] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C4.dat
[12:23:20.621] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C5.dat
[12:23:20.627] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C6.dat
[12:23:20.633] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C7.dat
[12:23:20.639] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C8.dat
[12:23:20.645] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C9.dat
[12:23:20.652] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C10.dat
[12:23:20.658] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C11.dat
[12:23:20.664] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C12.dat
[12:23:20.670] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C13.dat
[12:23:20.676] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C14.dat
[12:23:20.682] <TB1> INFO: write trim parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C15.dat
[12:23:20.688] <TB1> INFO: PixTestTrim::trimTest() done
[12:23:20.688] <TB1> INFO: vtrim: 113 130 156 119 124 102 105 127 151 118 110 95 109 120 119 108
[12:23:20.688] <TB1> INFO: vthrcomp: 102 106 113 110 112 113 105 109 111 102 108 102 104 105 106 104
[12:23:20.688] <TB1> INFO: vcal mean: 35.01 34.92 34.98 34.99 34.96 34.98 34.93 35.03 35.04 34.98 35.03 34.98 34.97 34.99 34.98 35.01
[12:23:20.688] <TB1> INFO: vcal RMS: 1.04 1.61 1.27 0.85 0.86 0.82 1.91 1.29 1.03 0.95 0.89 0.87 0.85 1.16 0.88 0.88
[12:23:20.688] <TB1> INFO: bits mean: 9.59 8.42 8.13 8.46 8.99 9.12 8.67 8.83 7.61 9.30 8.40 9.29 8.34 8.63 8.12 8.43
[12:23:20.688] <TB1> INFO: bits RMS: 2.62 2.63 2.20 2.66 2.48 2.61 2.63 2.46 2.08 2.72 2.62 2.66 2.82 2.58 2.75 2.75
[12:23:20.696] <TB1> INFO: ----------------------------------------------------------------------
[12:23:20.697] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[12:23:20.697] <TB1> INFO: ----------------------------------------------------------------------
[12:23:20.701] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:23:20.709] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[12:23:20.709] <TB1> INFO: run 1 of 1
[12:23:21.040] <TB1> INFO: Expecting 8320000 events.
[12:24:04.174] <TB1> INFO: 1254110 events read in total (42419ms).
[12:24:44.789] <TB1> INFO: 2497820 events read in total (83034ms).
[12:25:24.719] <TB1> INFO: 3738330 events read in total (122964ms).
[12:26:02.239] <TB1> INFO: 4966250 events read in total (160484ms).
[12:26:43.719] <TB1> INFO: 6187310 events read in total (201964ms).
[12:27:27.540] <TB1> INFO: 7409540 events read in total (245785ms).
[12:27:57.307] <TB1> INFO: 8320000 events read in total (275552ms).
[12:27:57.349] <TB1> INFO: Test took 276640ms.
[12:27:57.446] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:23.099] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 193 (-1/-1) hits flags = 528 (plus default)
[12:28:23.108] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[12:28:23.108] <TB1> INFO: run 1 of 1
[12:28:23.449] <TB1> INFO: Expecting 8070400 events.
[12:29:05.663] <TB1> INFO: 1216240 events read in total (41499ms).
[12:29:45.974] <TB1> INFO: 2423080 events read in total (81810ms).
[12:30:26.941] <TB1> INFO: 3627490 events read in total (122777ms).
[12:31:05.799] <TB1> INFO: 4820050 events read in total (161635ms).
[12:31:42.421] <TB1> INFO: 6005660 events read in total (198257ms).
[12:32:24.166] <TB1> INFO: 7192760 events read in total (240002ms).
[12:32:54.657] <TB1> INFO: 8070400 events read in total (270493ms).
[12:32:54.703] <TB1> INFO: Test took 271595ms.
[12:32:54.810] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:24.042] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 182 (-1/-1) hits flags = 528 (plus default)
[12:33:24.051] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[12:33:24.051] <TB1> INFO: run 1 of 1
[12:33:24.364] <TB1> INFO: Expecting 7612800 events.
[12:34:08.221] <TB1> INFO: 1260960 events read in total (43142ms).
[12:34:50.891] <TB1> INFO: 2511230 events read in total (85812ms).
[12:35:33.770] <TB1> INFO: 3756940 events read in total (128691ms).
[12:36:14.617] <TB1> INFO: 4987590 events read in total (169538ms).
[12:36:59.277] <TB1> INFO: 6214180 events read in total (214198ms).
[12:37:38.715] <TB1> INFO: 7445290 events read in total (253636ms).
[12:37:44.278] <TB1> INFO: 7612800 events read in total (259199ms).
[12:37:44.325] <TB1> INFO: Test took 260274ms.
[12:37:44.416] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:10.563] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 181 (-1/-1) hits flags = 528 (plus default)
[12:38:10.572] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[12:38:10.572] <TB1> INFO: run 1 of 1
[12:38:10.894] <TB1> INFO: Expecting 7571200 events.
[12:38:50.800] <TB1> INFO: 1264580 events read in total (39191ms).
[12:39:28.433] <TB1> INFO: 2518470 events read in total (76824ms).
[12:40:09.242] <TB1> INFO: 3767340 events read in total (117633ms).
[12:40:47.458] <TB1> INFO: 5000830 events read in total (155849ms).
[12:41:29.423] <TB1> INFO: 6230580 events read in total (197814ms).
[12:42:11.156] <TB1> INFO: 7468080 events read in total (239547ms).
[12:42:14.869] <TB1> INFO: 7571200 events read in total (243260ms).
[12:42:14.909] <TB1> INFO: Test took 244337ms.
[12:42:14.990] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:42:42.539] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 181 (-1/-1) hits flags = 528 (plus default)
[12:42:42.548] <TB1> INFO: dacScan split into 1 runs with ntrig = 10
[12:42:42.548] <TB1> INFO: run 1 of 1
[12:42:42.867] <TB1> INFO: Expecting 7571200 events.
[12:43:26.994] <TB1> INFO: 1263940 events read in total (43412ms).
[12:44:04.628] <TB1> INFO: 2516890 events read in total (81046ms).
[12:44:44.982] <TB1> INFO: 3765340 events read in total (121400ms).
[12:45:22.097] <TB1> INFO: 4997700 events read in total (158515ms).
[12:46:02.159] <TB1> INFO: 6227250 events read in total (198577ms).
[12:46:43.699] <TB1> INFO: 7463780 events read in total (240118ms).
[12:46:47.896] <TB1> INFO: 7571200 events read in total (244314ms).
[12:46:47.941] <TB1> INFO: Test took 245393ms.
[12:46:48.028] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:11.930] <TB1> INFO: PixTestTrim::trimBitTest() done
[12:47:11.932] <TB1> INFO: PixTestTrim::doTest() done, duration: 2797 seconds
[12:47:11.932] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:11.932] <TB1> INFO: Decoding statistics:
[12:47:11.932] <TB1> INFO: General information:
[12:47:11.932] <TB1> INFO: 16bit words read: 0
[12:47:11.932] <TB1> INFO: valid events total: 0
[12:47:11.932] <TB1> INFO: empty events: 0
[12:47:11.932] <TB1> INFO: valid events with pixels: 0
[12:47:11.932] <TB1> INFO: valid pixel hits: 0
[12:47:11.932] <TB1> INFO: Event errors: 0
[12:47:11.932] <TB1> INFO: start marker: 0
[12:47:11.932] <TB1> INFO: stop marker: 0
[12:47:11.932] <TB1> INFO: overflow: 0
[12:47:11.932] <TB1> INFO: invalid 5bit words: 0
[12:47:11.933] <TB1> INFO: invalid XOR eye diagram: 0
[12:47:11.933] <TB1> INFO: TBM errors: 0
[12:47:11.933] <TB1> INFO: flawed TBM headers: 0
[12:47:11.933] <TB1> INFO: flawed TBM trailers: 0
[12:47:11.933] <TB1> INFO: event ID mismatches: 0
[12:47:11.933] <TB1> INFO: ROC errors: 0
[12:47:11.933] <TB1> INFO: missing ROC header(s): 0
[12:47:11.933] <TB1> INFO: misplaced readback start: 0
[12:47:11.933] <TB1> INFO: Pixel decoding errors: 0
[12:47:11.933] <TB1> INFO: pixel data incomplete: 0
[12:47:11.933] <TB1> INFO: pixel address: 0
[12:47:11.933] <TB1> INFO: pulse height fill bit: 0
[12:47:11.933] <TB1> INFO: buffer corruption: 0
[12:47:12.600] <TB1> INFO: ######################################################################
[12:47:12.600] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:47:12.600] <TB1> INFO: ######################################################################
[12:47:12.906] <TB1> INFO: Expecting 41600 events.
[12:47:17.090] <TB1> INFO: 41600 events read in total (3468ms).
[12:47:17.091] <TB1> INFO: Test took 4489ms.
[12:47:17.097] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:17.776] <TB1> INFO: Expecting 41600 events.
[12:47:22.271] <TB1> INFO: 41600 events read in total (3779ms).
[12:47:22.272] <TB1> INFO: Test took 4816ms.
[12:47:22.293] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:22.710] <TB1> INFO: Expecting 41600 events.
[12:47:27.220] <TB1> INFO: 41600 events read in total (3795ms).
[12:47:27.221] <TB1> INFO: Test took 4836ms.
[12:47:27.228] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:47:27.649] <TB1> INFO: Expecting 2560 events.
[12:47:28.612] <TB1> INFO: 2560 events read in total (248ms).
[12:47:28.612] <TB1> INFO: Test took 1377ms.
[12:47:29.125] <TB1> INFO: Expecting 2560 events.
[12:47:30.089] <TB1> INFO: 2560 events read in total (249ms).
[12:47:30.089] <TB1> INFO: Test took 1476ms.
[12:47:30.599] <TB1> INFO: Expecting 2560 events.
[12:47:31.562] <TB1> INFO: 2560 events read in total (248ms).
[12:47:31.562] <TB1> INFO: Test took 1473ms.
[12:47:32.071] <TB1> INFO: Expecting 2560 events.
[12:47:33.032] <TB1> INFO: 2560 events read in total (246ms).
[12:47:33.032] <TB1> INFO: Test took 1469ms.
[12:47:33.541] <TB1> INFO: Expecting 2560 events.
[12:47:34.503] <TB1> INFO: 2560 events read in total (246ms).
[12:47:34.503] <TB1> INFO: Test took 1470ms.
[12:47:35.012] <TB1> INFO: Expecting 2560 events.
[12:47:35.977] <TB1> INFO: 2560 events read in total (249ms).
[12:47:35.977] <TB1> INFO: Test took 1473ms.
[12:47:36.486] <TB1> INFO: Expecting 2560 events.
[12:47:37.451] <TB1> INFO: 2560 events read in total (250ms).
[12:47:37.451] <TB1> INFO: Test took 1473ms.
[12:47:37.961] <TB1> INFO: Expecting 2560 events.
[12:47:38.925] <TB1> INFO: 2560 events read in total (249ms).
[12:47:38.926] <TB1> INFO: Test took 1474ms.
[12:47:39.436] <TB1> INFO: Expecting 2560 events.
[12:47:40.400] <TB1> INFO: 2560 events read in total (249ms).
[12:47:40.400] <TB1> INFO: Test took 1474ms.
[12:47:40.909] <TB1> INFO: Expecting 2560 events.
[12:47:41.873] <TB1> INFO: 2560 events read in total (248ms).
[12:47:41.874] <TB1> INFO: Test took 1473ms.
[12:47:42.383] <TB1> INFO: Expecting 2560 events.
[12:47:43.346] <TB1> INFO: 2560 events read in total (248ms).
[12:47:43.346] <TB1> INFO: Test took 1472ms.
[12:47:43.855] <TB1> INFO: Expecting 2560 events.
[12:47:44.819] <TB1> INFO: 2560 events read in total (248ms).
[12:47:44.819] <TB1> INFO: Test took 1472ms.
[12:47:45.328] <TB1> INFO: Expecting 2560 events.
[12:47:46.292] <TB1> INFO: 2560 events read in total (248ms).
[12:47:46.293] <TB1> INFO: Test took 1473ms.
[12:47:46.803] <TB1> INFO: Expecting 2560 events.
[12:47:47.765] <TB1> INFO: 2560 events read in total (247ms).
[12:47:47.765] <TB1> INFO: Test took 1472ms.
[12:47:48.274] <TB1> INFO: Expecting 2560 events.
[12:47:49.233] <TB1> INFO: 2560 events read in total (244ms).
[12:47:49.234] <TB1> INFO: Test took 1468ms.
[12:47:49.743] <TB1> INFO: Expecting 2560 events.
[12:47:50.707] <TB1> INFO: 2560 events read in total (249ms).
[12:47:50.708] <TB1> INFO: Test took 1474ms.
[12:47:50.713] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:47:51.219] <TB1> INFO: Expecting 655360 events.
[12:48:03.500] <TB1> INFO: 655360 events read in total (11565ms).
[12:48:03.509] <TB1> INFO: Expecting 655360 events.
[12:48:15.834] <TB1> INFO: 655360 events read in total (11731ms).
[12:48:15.846] <TB1> INFO: Expecting 655360 events.
[12:48:28.007] <TB1> INFO: 655360 events read in total (11565ms).
[12:48:28.023] <TB1> INFO: Expecting 655360 events.
[12:48:39.843] <TB1> INFO: 655360 events read in total (11225ms).
[12:48:39.863] <TB1> INFO: Expecting 655360 events.
[12:48:52.097] <TB1> INFO: 655360 events read in total (11644ms).
[12:48:52.119] <TB1> INFO: Expecting 655360 events.
[12:49:03.487] <TB1> INFO: 655360 events read in total (10783ms).
[12:49:03.514] <TB1> INFO: Expecting 655360 events.
[12:49:14.869] <TB1> INFO: 655360 events read in total (10793ms).
[12:49:14.904] <TB1> INFO: Expecting 655360 events.
[12:49:26.966] <TB1> INFO: 655360 events read in total (11505ms).
[12:49:26.998] <TB1> INFO: Expecting 655360 events.
[12:49:39.349] <TB1> INFO: 655360 events read in total (11779ms).
[12:49:39.385] <TB1> INFO: Expecting 655360 events.
[12:49:50.929] <TB1> INFO: 655360 events read in total (10973ms).
[12:49:50.972] <TB1> INFO: Expecting 655360 events.
[12:50:02.464] <TB1> INFO: 655360 events read in total (10938ms).
[12:50:02.514] <TB1> INFO: Expecting 655360 events.
[12:50:13.914] <TB1> INFO: 655360 events read in total (10866ms).
[12:50:13.965] <TB1> INFO: Expecting 655360 events.
[12:50:25.500] <TB1> INFO: 655360 events read in total (10986ms).
[12:50:25.558] <TB1> INFO: Expecting 655360 events.
[12:50:37.445] <TB1> INFO: 655360 events read in total (11352ms).
[12:50:37.500] <TB1> INFO: Expecting 655360 events.
[12:50:50.052] <TB1> INFO: 655360 events read in total (11999ms).
[12:50:50.129] <TB1> INFO: Expecting 655360 events.
[12:51:02.490] <TB1> INFO: 655360 events read in total (11834ms).
[12:51:02.553] <TB1> INFO: Test took 191840ms.
[12:51:02.634] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:51:02.941] <TB1> INFO: Expecting 655360 events.
[12:51:14.885] <TB1> INFO: 655360 events read in total (11229ms).
[12:51:14.894] <TB1> INFO: Expecting 655360 events.
[12:51:27.231] <TB1> INFO: 655360 events read in total (11748ms).
[12:51:27.246] <TB1> INFO: Expecting 655360 events.
[12:51:39.448] <TB1> INFO: 655360 events read in total (11623ms).
[12:51:39.465] <TB1> INFO: Expecting 655360 events.
[12:51:51.435] <TB1> INFO: 655360 events read in total (11379ms).
[12:51:51.454] <TB1> INFO: Expecting 655360 events.
[12:52:03.547] <TB1> INFO: 655360 events read in total (11521ms).
[12:52:03.575] <TB1> INFO: Expecting 655360 events.
[12:52:15.952] <TB1> INFO: 655360 events read in total (11817ms).
[12:52:15.981] <TB1> INFO: Expecting 655360 events.
[12:52:28.250] <TB1> INFO: 655360 events read in total (11688ms).
[12:52:28.284] <TB1> INFO: Expecting 655360 events.
[12:52:40.337] <TB1> INFO: 655360 events read in total (11498ms).
[12:52:40.380] <TB1> INFO: Expecting 655360 events.
[12:52:52.729] <TB1> INFO: 655360 events read in total (11818ms).
[12:52:52.773] <TB1> INFO: Expecting 655360 events.
[12:53:05.084] <TB1> INFO: 655360 events read in total (11762ms).
[12:53:05.124] <TB1> INFO: Expecting 655360 events.
[12:53:17.105] <TB1> INFO: 655360 events read in total (11411ms).
[12:53:17.149] <TB1> INFO: Expecting 655360 events.
[12:53:29.175] <TB1> INFO: 655360 events read in total (11454ms).
[12:53:29.230] <TB1> INFO: Expecting 655360 events.
[12:53:41.741] <TB1> INFO: 655360 events read in total (11946ms).
[12:53:41.793] <TB1> INFO: Expecting 655360 events.
[12:53:53.946] <TB1> INFO: 655360 events read in total (11603ms).
[12:53:54.002] <TB1> INFO: Expecting 655360 events.
[12:54:05.583] <TB1> INFO: 655360 events read in total (11034ms).
[12:54:05.643] <TB1> INFO: Expecting 655360 events.
[12:54:16.971] <TB1> INFO: 655360 events read in total (10795ms).
[12:54:17.065] <TB1> INFO: Test took 194431ms.
[12:54:17.261] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:54:17.269] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:54:17.276] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:54:17.283] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:54:17.290] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:54:17.297] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:54:17.304] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:54:17.313] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:54:17.321] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:54:17.329] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[12:54:17.337] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:54:17.345] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:54:17.353] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:54:17.359] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:54:17.366] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:54:17.373] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:54:17.380] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[12:54:17.435] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C0.dat
[12:54:17.435] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C1.dat
[12:54:17.435] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C2.dat
[12:54:17.435] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C3.dat
[12:54:17.435] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C4.dat
[12:54:17.435] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C5.dat
[12:54:17.435] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C6.dat
[12:54:17.436] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C7.dat
[12:54:17.436] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C8.dat
[12:54:17.436] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C9.dat
[12:54:17.436] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C10.dat
[12:54:17.436] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C11.dat
[12:54:17.436] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C12.dat
[12:54:17.438] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C13.dat
[12:54:17.438] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C14.dat
[12:54:17.438] <TB1> INFO: write dac parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C15.dat
[12:54:17.747] <TB1> INFO: Expecting 41600 events.
[12:54:21.539] <TB1> INFO: 41600 events read in total (3076ms).
[12:54:21.539] <TB1> INFO: Test took 4097ms.
[12:54:22.180] <TB1> INFO: Expecting 41600 events.
[12:54:26.047] <TB1> INFO: 41600 events read in total (3152ms).
[12:54:26.048] <TB1> INFO: Test took 4177ms.
[12:54:26.723] <TB1> INFO: Expecting 41600 events.
[12:54:30.659] <TB1> INFO: 41600 events read in total (3220ms).
[12:54:30.659] <TB1> INFO: Test took 4274ms.
[12:54:30.979] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:31.111] <TB1> INFO: Expecting 2560 events.
[12:54:32.074] <TB1> INFO: 2560 events read in total (248ms).
[12:54:32.074] <TB1> INFO: Test took 1096ms.
[12:54:32.078] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:32.584] <TB1> INFO: Expecting 2560 events.
[12:54:33.543] <TB1> INFO: 2560 events read in total (244ms).
[12:54:33.543] <TB1> INFO: Test took 1465ms.
[12:54:33.546] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:34.053] <TB1> INFO: Expecting 2560 events.
[12:54:35.019] <TB1> INFO: 2560 events read in total (251ms).
[12:54:35.019] <TB1> INFO: Test took 1473ms.
[12:54:35.022] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:35.529] <TB1> INFO: Expecting 2560 events.
[12:54:36.488] <TB1> INFO: 2560 events read in total (243ms).
[12:54:36.488] <TB1> INFO: Test took 1466ms.
[12:54:36.491] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:36.999] <TB1> INFO: Expecting 2560 events.
[12:54:37.956] <TB1> INFO: 2560 events read in total (242ms).
[12:54:37.957] <TB1> INFO: Test took 1466ms.
[12:54:37.959] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:38.467] <TB1> INFO: Expecting 2560 events.
[12:54:39.427] <TB1> INFO: 2560 events read in total (245ms).
[12:54:39.428] <TB1> INFO: Test took 1469ms.
[12:54:39.430] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:39.937] <TB1> INFO: Expecting 2560 events.
[12:54:40.895] <TB1> INFO: 2560 events read in total (243ms).
[12:54:40.895] <TB1> INFO: Test took 1465ms.
[12:54:40.898] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:41.405] <TB1> INFO: Expecting 2560 events.
[12:54:42.363] <TB1> INFO: 2560 events read in total (242ms).
[12:54:42.364] <TB1> INFO: Test took 1466ms.
[12:54:42.367] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:42.874] <TB1> INFO: Expecting 2560 events.
[12:54:43.834] <TB1> INFO: 2560 events read in total (245ms).
[12:54:43.834] <TB1> INFO: Test took 1467ms.
[12:54:43.837] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:44.344] <TB1> INFO: Expecting 2560 events.
[12:54:45.302] <TB1> INFO: 2560 events read in total (243ms).
[12:54:45.302] <TB1> INFO: Test took 1465ms.
[12:54:45.305] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:45.813] <TB1> INFO: Expecting 2560 events.
[12:54:46.770] <TB1> INFO: 2560 events read in total (242ms).
[12:54:46.770] <TB1> INFO: Test took 1465ms.
[12:54:46.773] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:47.280] <TB1> INFO: Expecting 2560 events.
[12:54:48.240] <TB1> INFO: 2560 events read in total (244ms).
[12:54:48.240] <TB1> INFO: Test took 1467ms.
[12:54:48.243] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:48.750] <TB1> INFO: Expecting 2560 events.
[12:54:49.709] <TB1> INFO: 2560 events read in total (244ms).
[12:54:49.709] <TB1> INFO: Test took 1467ms.
[12:54:49.713] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:50.219] <TB1> INFO: Expecting 2560 events.
[12:54:51.178] <TB1> INFO: 2560 events read in total (244ms).
[12:54:51.179] <TB1> INFO: Test took 1466ms.
[12:54:51.181] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:51.688] <TB1> INFO: Expecting 2560 events.
[12:54:52.646] <TB1> INFO: 2560 events read in total (242ms).
[12:54:52.646] <TB1> INFO: Test took 1465ms.
[12:54:52.649] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:53.156] <TB1> INFO: Expecting 2560 events.
[12:54:54.113] <TB1> INFO: 2560 events read in total (242ms).
[12:54:54.114] <TB1> INFO: Test took 1465ms.
[12:54:54.116] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:54.624] <TB1> INFO: Expecting 2560 events.
[12:54:55.582] <TB1> INFO: 2560 events read in total (243ms).
[12:54:55.582] <TB1> INFO: Test took 1466ms.
[12:54:55.584] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:56.092] <TB1> INFO: Expecting 2560 events.
[12:54:57.050] <TB1> INFO: 2560 events read in total (243ms).
[12:54:57.050] <TB1> INFO: Test took 1466ms.
[12:54:57.053] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:57.560] <TB1> INFO: Expecting 2560 events.
[12:54:58.519] <TB1> INFO: 2560 events read in total (244ms).
[12:54:58.519] <TB1> INFO: Test took 1467ms.
[12:54:58.522] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:54:59.029] <TB1> INFO: Expecting 2560 events.
[12:54:59.987] <TB1> INFO: 2560 events read in total (243ms).
[12:54:59.988] <TB1> INFO: Test took 1466ms.
[12:54:59.990] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:00.498] <TB1> INFO: Expecting 2560 events.
[12:55:01.457] <TB1> INFO: 2560 events read in total (244ms).
[12:55:01.457] <TB1> INFO: Test took 1467ms.
[12:55:01.460] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:01.967] <TB1> INFO: Expecting 2560 events.
[12:55:02.925] <TB1> INFO: 2560 events read in total (243ms).
[12:55:02.926] <TB1> INFO: Test took 1466ms.
[12:55:02.928] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:03.436] <TB1> INFO: Expecting 2560 events.
[12:55:04.394] <TB1> INFO: 2560 events read in total (243ms).
[12:55:04.394] <TB1> INFO: Test took 1466ms.
[12:55:04.397] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:04.904] <TB1> INFO: Expecting 2560 events.
[12:55:05.867] <TB1> INFO: 2560 events read in total (248ms).
[12:55:05.868] <TB1> INFO: Test took 1471ms.
[12:55:05.871] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:06.377] <TB1> INFO: Expecting 2560 events.
[12:55:07.341] <TB1> INFO: 2560 events read in total (248ms).
[12:55:07.341] <TB1> INFO: Test took 1470ms.
[12:55:07.344] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:07.851] <TB1> INFO: Expecting 2560 events.
[12:55:08.811] <TB1> INFO: 2560 events read in total (245ms).
[12:55:08.811] <TB1> INFO: Test took 1467ms.
[12:55:08.815] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:09.322] <TB1> INFO: Expecting 2560 events.
[12:55:10.285] <TB1> INFO: 2560 events read in total (248ms).
[12:55:10.285] <TB1> INFO: Test took 1471ms.
[12:55:10.291] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:10.795] <TB1> INFO: Expecting 2560 events.
[12:55:11.760] <TB1> INFO: 2560 events read in total (249ms).
[12:55:11.761] <TB1> INFO: Test took 1471ms.
[12:55:11.766] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:12.271] <TB1> INFO: Expecting 2560 events.
[12:55:13.234] <TB1> INFO: 2560 events read in total (248ms).
[12:55:13.235] <TB1> INFO: Test took 1469ms.
[12:55:13.238] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:13.744] <TB1> INFO: Expecting 2560 events.
[12:55:14.709] <TB1> INFO: 2560 events read in total (249ms).
[12:55:14.709] <TB1> INFO: Test took 1471ms.
[12:55:14.713] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:15.219] <TB1> INFO: Expecting 2560 events.
[12:55:16.184] <TB1> INFO: 2560 events read in total (249ms).
[12:55:16.184] <TB1> INFO: Test took 1472ms.
[12:55:16.188] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:16.694] <TB1> INFO: Expecting 2560 events.
[12:55:17.657] <TB1> INFO: 2560 events read in total (247ms).
[12:55:17.657] <TB1> INFO: Test took 1470ms.
[12:55:18.426] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 485 seconds
[12:55:18.426] <TB1> INFO: PH scale (per ROC): 80 73 78 76 76 73 76 79 80 77 77 85 80 80 74 65
[12:55:18.426] <TB1> INFO: PH offset (per ROC): 156 169 164 163 161 157 161 160 163 166 173 147 157 160 165 164
[12:55:18.435] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:18.435] <TB1> INFO: Decoding statistics:
[12:55:18.435] <TB1> INFO: General information:
[12:55:18.435] <TB1> INFO: 16bit words read: 66440
[12:55:18.435] <TB1> INFO: valid events total: 5120
[12:55:18.435] <TB1> INFO: empty events: 2620
[12:55:18.435] <TB1> INFO: valid events with pixels: 2500
[12:55:18.435] <TB1> INFO: valid pixel hits: 2500
[12:55:18.435] <TB1> INFO: Event errors: 0
[12:55:18.435] <TB1> INFO: start marker: 0
[12:55:18.435] <TB1> INFO: stop marker: 0
[12:55:18.435] <TB1> INFO: overflow: 0
[12:55:18.435] <TB1> INFO: invalid 5bit words: 0
[12:55:18.435] <TB1> INFO: invalid XOR eye diagram: 0
[12:55:18.435] <TB1> INFO: TBM errors: 0
[12:55:18.435] <TB1> INFO: flawed TBM headers: 0
[12:55:18.435] <TB1> INFO: flawed TBM trailers: 0
[12:55:18.435] <TB1> INFO: event ID mismatches: 0
[12:55:18.435] <TB1> INFO: ROC errors: 0
[12:55:18.435] <TB1> INFO: missing ROC header(s): 0
[12:55:18.435] <TB1> INFO: misplaced readback start: 0
[12:55:18.435] <TB1> INFO: Pixel decoding errors: 0
[12:55:18.435] <TB1> INFO: pixel data incomplete: 0
[12:55:18.435] <TB1> INFO: pixel address: 0
[12:55:18.435] <TB1> INFO: pulse height fill bit: 0
[12:55:18.435] <TB1> INFO: buffer corruption: 0
[12:55:18.624] <TB1> INFO: ######################################################################
[12:55:18.624] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:55:18.624] <TB1> INFO: ######################################################################
[12:55:18.639] <TB1> INFO: scanning low vcal = 10
[12:55:18.953] <TB1> INFO: Expecting 41600 events.
[12:55:22.733] <TB1> INFO: 41600 events read in total (3064ms).
[12:55:22.733] <TB1> INFO: Test took 4094ms.
[12:55:22.736] <TB1> INFO: scanning low vcal = 20
[12:55:23.243] <TB1> INFO: Expecting 41600 events.
[12:55:26.980] <TB1> INFO: 41600 events read in total (3021ms).
[12:55:26.980] <TB1> INFO: Test took 4244ms.
[12:55:26.983] <TB1> INFO: scanning low vcal = 30
[12:55:27.490] <TB1> INFO: Expecting 41600 events.
[12:55:31.325] <TB1> INFO: 41600 events read in total (3120ms).
[12:55:31.326] <TB1> INFO: Test took 4343ms.
[12:55:31.329] <TB1> INFO: scanning low vcal = 40
[12:55:31.818] <TB1> INFO: Expecting 41600 events.
[12:55:36.124] <TB1> INFO: 41600 events read in total (3591ms).
[12:55:36.124] <TB1> INFO: Test took 4795ms.
[12:55:36.128] <TB1> INFO: scanning low vcal = 50
[12:55:36.572] <TB1> INFO: Expecting 41600 events.
[12:55:40.880] <TB1> INFO: 41600 events read in total (3593ms).
[12:55:40.881] <TB1> INFO: Test took 4753ms.
[12:55:40.891] <TB1> INFO: scanning low vcal = 60
[12:55:41.331] <TB1> INFO: Expecting 41600 events.
[12:55:45.639] <TB1> INFO: 41600 events read in total (3593ms).
[12:55:45.639] <TB1> INFO: Test took 4748ms.
[12:55:45.643] <TB1> INFO: scanning low vcal = 70
[12:55:46.081] <TB1> INFO: Expecting 41600 events.
[12:55:50.306] <TB1> INFO: 41600 events read in total (3509ms).
[12:55:50.307] <TB1> INFO: Test took 4664ms.
[12:55:50.310] <TB1> INFO: scanning low vcal = 80
[12:55:50.756] <TB1> INFO: Expecting 41600 events.
[12:55:54.972] <TB1> INFO: 41600 events read in total (3501ms).
[12:55:54.973] <TB1> INFO: Test took 4663ms.
[12:55:54.977] <TB1> INFO: scanning low vcal = 90
[12:55:55.424] <TB1> INFO: Expecting 41600 events.
[12:55:59.617] <TB1> INFO: 41600 events read in total (3478ms).
[12:55:59.618] <TB1> INFO: Test took 4641ms.
[12:55:59.622] <TB1> INFO: scanning low vcal = 100
[12:56:00.069] <TB1> INFO: Expecting 41600 events.
[12:56:04.434] <TB1> INFO: 41600 events read in total (3650ms).
[12:56:04.435] <TB1> INFO: Test took 4813ms.
[12:56:04.440] <TB1> INFO: scanning low vcal = 110
[12:56:04.872] <TB1> INFO: Expecting 41600 events.
[12:56:09.093] <TB1> INFO: 41600 events read in total (3506ms).
[12:56:09.094] <TB1> INFO: Test took 4654ms.
[12:56:09.097] <TB1> INFO: scanning low vcal = 120
[12:56:09.529] <TB1> INFO: Expecting 41600 events.
[12:56:13.773] <TB1> INFO: 41600 events read in total (3529ms).
[12:56:13.774] <TB1> INFO: Test took 4677ms.
[12:56:13.778] <TB1> INFO: scanning low vcal = 130
[12:56:14.211] <TB1> INFO: Expecting 41600 events.
[12:56:18.572] <TB1> INFO: 41600 events read in total (3646ms).
[12:56:18.573] <TB1> INFO: Test took 4795ms.
[12:56:18.576] <TB1> INFO: scanning low vcal = 140
[12:56:19.000] <TB1> INFO: Expecting 41600 events.
[12:56:23.386] <TB1> INFO: 41600 events read in total (3671ms).
[12:56:23.388] <TB1> INFO: Test took 4812ms.
[12:56:23.392] <TB1> INFO: scanning low vcal = 150
[12:56:23.823] <TB1> INFO: Expecting 41600 events.
[12:56:28.227] <TB1> INFO: 41600 events read in total (3688ms).
[12:56:28.228] <TB1> INFO: Test took 4836ms.
[12:56:28.231] <TB1> INFO: scanning low vcal = 160
[12:56:28.651] <TB1> INFO: Expecting 41600 events.
[12:56:33.022] <TB1> INFO: 41600 events read in total (3655ms).
[12:56:33.023] <TB1> INFO: Test took 4792ms.
[12:56:33.026] <TB1> INFO: scanning low vcal = 170
[12:56:33.453] <TB1> INFO: Expecting 41600 events.
[12:56:37.817] <TB1> INFO: 41600 events read in total (3648ms).
[12:56:37.817] <TB1> INFO: Test took 4791ms.
[12:56:37.822] <TB1> INFO: scanning low vcal = 180
[12:56:38.251] <TB1> INFO: Expecting 41600 events.
[12:56:42.563] <TB1> INFO: 41600 events read in total (3597ms).
[12:56:42.564] <TB1> INFO: Test took 4742ms.
[12:56:42.567] <TB1> INFO: scanning low vcal = 190
[12:56:43.006] <TB1> INFO: Expecting 41600 events.
[12:56:47.362] <TB1> INFO: 41600 events read in total (3641ms).
[12:56:47.363] <TB1> INFO: Test took 4796ms.
[12:56:47.366] <TB1> INFO: scanning low vcal = 200
[12:56:47.811] <TB1> INFO: Expecting 41600 events.
[12:56:52.114] <TB1> INFO: 41600 events read in total (3588ms).
[12:56:52.114] <TB1> INFO: Test took 4748ms.
[12:56:52.118] <TB1> INFO: scanning low vcal = 210
[12:56:52.561] <TB1> INFO: Expecting 41600 events.
[12:56:56.818] <TB1> INFO: 41600 events read in total (3542ms).
[12:56:56.819] <TB1> INFO: Test took 4701ms.
[12:56:56.822] <TB1> INFO: scanning low vcal = 220
[12:56:57.271] <TB1> INFO: Expecting 41600 events.
[12:57:01.628] <TB1> INFO: 41600 events read in total (3642ms).
[12:57:01.629] <TB1> INFO: Test took 4807ms.
[12:57:01.633] <TB1> INFO: scanning low vcal = 230
[12:57:02.061] <TB1> INFO: Expecting 41600 events.
[12:57:06.402] <TB1> INFO: 41600 events read in total (3626ms).
[12:57:06.403] <TB1> INFO: Test took 4769ms.
[12:57:06.407] <TB1> INFO: scanning low vcal = 240
[12:57:06.851] <TB1> INFO: Expecting 41600 events.
[12:57:11.217] <TB1> INFO: 41600 events read in total (3651ms).
[12:57:11.217] <TB1> INFO: Test took 4810ms.
[12:57:11.221] <TB1> INFO: scanning low vcal = 250
[12:57:11.646] <TB1> INFO: Expecting 41600 events.
[12:57:16.035] <TB1> INFO: 41600 events read in total (3674ms).
[12:57:16.036] <TB1> INFO: Test took 4815ms.
[12:57:16.041] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[12:57:16.460] <TB1> INFO: Expecting 41600 events.
[12:57:20.739] <TB1> INFO: 41600 events read in total (3564ms).
[12:57:20.740] <TB1> INFO: Test took 4698ms.
[12:57:20.744] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[12:57:21.194] <TB1> INFO: Expecting 41600 events.
[12:57:25.503] <TB1> INFO: 41600 events read in total (3593ms).
[12:57:25.504] <TB1> INFO: Test took 4760ms.
[12:57:25.508] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[12:57:25.941] <TB1> INFO: Expecting 41600 events.
[12:57:30.251] <TB1> INFO: 41600 events read in total (3594ms).
[12:57:30.251] <TB1> INFO: Test took 4743ms.
[12:57:30.255] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[12:57:30.685] <TB1> INFO: Expecting 41600 events.
[12:57:35.001] <TB1> INFO: 41600 events read in total (3600ms).
[12:57:35.002] <TB1> INFO: Test took 4747ms.
[12:57:35.006] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:57:35.433] <TB1> INFO: Expecting 41600 events.
[12:57:39.747] <TB1> INFO: 41600 events read in total (3598ms).
[12:57:39.748] <TB1> INFO: Test took 4742ms.
[12:57:40.249] <TB1> INFO: PixTestGainPedestal::measure() done
[12:58:14.731] <TB1> INFO: PixTestGainPedestal::fit() done
[12:58:14.731] <TB1> INFO: non-linearity mean: 0.957 0.956 0.955 0.957 0.956 0.951 0.960 0.961 0.961 0.951 0.956 0.955 0.955 0.958 0.955 0.963
[12:58:14.731] <TB1> INFO: non-linearity RMS: 0.004 0.006 0.006 0.004 0.005 0.006 0.006 0.005 0.004 0.006 0.005 0.006 0.005 0.006 0.006 0.006
[12:58:14.731] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[12:58:14.753] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[12:58:14.777] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[12:58:14.802] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[12:58:14.822] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[12:58:14.842] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[12:58:14.861] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[12:58:14.881] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[12:58:14.901] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[12:58:14.920] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[12:58:14.939] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[12:58:14.958] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[12:58:14.978] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[12:58:14.997] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[12:58:15.019] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[12:58:15.041] <TB1> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[12:58:15.067] <TB1> INFO: PixTestGainPedestal::fullTest() done, duration: 176 seconds
[12:58:15.067] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:15.067] <TB1> INFO: Decoding statistics:
[12:58:15.067] <TB1> INFO: General information:
[12:58:15.067] <TB1> INFO: 16bit words read: 2328876
[12:58:15.067] <TB1> INFO: valid events total: 83200
[12:58:15.067] <TB1> INFO: empty events: 0
[12:58:15.067] <TB1> INFO: valid events with pixels: 83200
[12:58:15.067] <TB1> INFO: valid pixel hits: 665238
[12:58:15.067] <TB1> INFO: Event errors: 0
[12:58:15.067] <TB1> INFO: start marker: 0
[12:58:15.067] <TB1> INFO: stop marker: 0
[12:58:15.067] <TB1> INFO: overflow: 0
[12:58:15.067] <TB1> INFO: invalid 5bit words: 0
[12:58:15.067] <TB1> INFO: invalid XOR eye diagram: 0
[12:58:15.067] <TB1> INFO: TBM errors: 0
[12:58:15.067] <TB1> INFO: flawed TBM headers: 0
[12:58:15.067] <TB1> INFO: flawed TBM trailers: 0
[12:58:15.067] <TB1> INFO: event ID mismatches: 0
[12:58:15.067] <TB1> INFO: ROC errors: 0
[12:58:15.067] <TB1> INFO: missing ROC header(s): 0
[12:58:15.067] <TB1> INFO: misplaced readback start: 0
[12:58:15.067] <TB1> INFO: Pixel decoding errors: 0
[12:58:15.067] <TB1> INFO: pixel data incomplete: 0
[12:58:15.067] <TB1> INFO: pixel address: 0
[12:58:15.067] <TB1> INFO: pulse height fill bit: 0
[12:58:15.067] <TB1> INFO: buffer corruption: 0
[12:58:15.076] <TB1> INFO: readReadbackCal: /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C15.dat
[12:58:15.077] <TB1> INFO: ######################################################################
[12:58:15.077] <TB1> INFO: PixTestReadback::doTest()
[12:58:15.077] <TB1> INFO: ######################################################################
[12:58:15.078] <TB1> INFO: PixTestReadback::RES sent once
[12:58:26.450] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C0.dat
[12:58:26.450] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C1.dat
[12:58:26.450] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C2.dat
[12:58:26.451] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C3.dat
[12:58:26.451] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C4.dat
[12:58:26.451] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C5.dat
[12:58:26.451] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C6.dat
[12:58:26.451] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C7.dat
[12:58:26.451] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C8.dat
[12:58:26.451] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C9.dat
[12:58:26.451] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C10.dat
[12:58:26.451] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C11.dat
[12:58:26.451] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C12.dat
[12:58:26.451] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C13.dat
[12:58:26.451] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C14.dat
[12:58:26.452] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C15.dat
[12:58:26.503] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[12:58:26.503] <TB1> INFO: PixTestReadback::RES sent once
[12:58:37.762] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C0.dat
[12:58:37.762] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C1.dat
[12:58:37.762] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C2.dat
[12:58:37.762] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C3.dat
[12:58:37.762] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C4.dat
[12:58:37.762] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C5.dat
[12:58:37.762] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C6.dat
[12:58:37.762] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C7.dat
[12:58:37.762] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C8.dat
[12:58:37.763] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C9.dat
[12:58:37.763] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C10.dat
[12:58:37.763] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C11.dat
[12:58:37.763] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C12.dat
[12:58:37.763] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C13.dat
[12:58:37.763] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C14.dat
[12:58:37.763] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C15.dat
[12:58:37.811] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[12:58:37.811] <TB1> INFO: PixTestReadback::RES sent once
[12:58:46.448] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[12:58:46.448] <TB1> INFO: Vbg will be calibrated using Vd calibration
[12:58:46.448] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 158.7calibrated Vbg = 1.17591 :::*/*/*/*/
[12:58:46.448] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 162.5calibrated Vbg = 1.17416 :::*/*/*/*/
[12:58:46.448] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 154.2calibrated Vbg = 1.17364 :::*/*/*/*/
[12:58:46.448] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 154.8calibrated Vbg = 1.18689 :::*/*/*/*/
[12:58:46.448] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 154.7calibrated Vbg = 1.1931 :::*/*/*/*/
[12:58:46.448] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 153.9calibrated Vbg = 1.19381 :::*/*/*/*/
[12:58:46.448] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 155calibrated Vbg = 1.19769 :::*/*/*/*/
[12:58:46.448] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 154.2calibrated Vbg = 1.1984 :::*/*/*/*/
[12:58:46.448] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 150.6calibrated Vbg = 1.193 :::*/*/*/*/
[12:58:46.448] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 153.3calibrated Vbg = 1.18662 :::*/*/*/*/
[12:58:46.448] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 167.6calibrated Vbg = 1.1876 :::*/*/*/*/
[12:58:46.449] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 146.4calibrated Vbg = 1.18711 :::*/*/*/*/
[12:58:46.449] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 156.1calibrated Vbg = 1.18883 :::*/*/*/*/
[12:58:46.449] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 162.7calibrated Vbg = 1.18714 :::*/*/*/*/
[12:58:46.449] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 158.9calibrated Vbg = 1.17665 :::*/*/*/*/
[12:58:46.449] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 155calibrated Vbg = 1.18037 :::*/*/*/*/
[12:58:46.452] <TB1> INFO: PixTestReadback::RES sent once
[13:01:41.308] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C0.dat
[13:01:41.309] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C1.dat
[13:01:41.309] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C2.dat
[13:01:41.309] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C3.dat
[13:01:41.309] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C4.dat
[13:01:41.309] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C5.dat
[13:01:41.309] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C6.dat
[13:01:41.309] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C7.dat
[13:01:41.309] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C8.dat
[13:01:41.310] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C9.dat
[13:01:41.310] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C10.dat
[13:01:41.310] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C11.dat
[13:01:41.310] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C12.dat
[13:01:41.310] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C13.dat
[13:01:41.310] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C14.dat
[13:01:41.310] <TB1> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3513_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C15.dat
[13:01:41.356] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[13:01:41.357] <TB1> INFO: PixTestReadback::doTest() done
[13:01:41.357] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:41.357] <TB1> INFO: Decoding statistics:
[13:01:41.357] <TB1> INFO: General information:
[13:01:41.357] <TB1> INFO: 16bit words read: 768
[13:01:41.357] <TB1> INFO: valid events total: 64
[13:01:41.357] <TB1> INFO: empty events: 64
[13:01:41.357] <TB1> INFO: valid events with pixels: 0
[13:01:41.357] <TB1> INFO: valid pixel hits: 0
[13:01:41.357] <TB1> INFO: Event errors: 0
[13:01:41.357] <TB1> INFO: start marker: 0
[13:01:41.357] <TB1> INFO: stop marker: 0
[13:01:41.357] <TB1> INFO: overflow: 0
[13:01:41.357] <TB1> INFO: invalid 5bit words: 0
[13:01:41.357] <TB1> INFO: invalid XOR eye diagram: 0
[13:01:41.357] <TB1> INFO: TBM errors: 0
[13:01:41.357] <TB1> INFO: flawed TBM headers: 0
[13:01:41.357] <TB1> INFO: flawed TBM trailers: 0
[13:01:41.357] <TB1> INFO: event ID mismatches: 0
[13:01:41.357] <TB1> INFO: ROC errors: 0
[13:01:41.357] <TB1> INFO: missing ROC header(s): 0
[13:01:41.357] <TB1> INFO: misplaced readback start: 0
[13:01:41.357] <TB1> INFO: Pixel decoding errors: 0
[13:01:41.357] <TB1> INFO: pixel data incomplete: 0
[13:01:41.357] <TB1> INFO: pixel address: 0
[13:01:41.357] <TB1> INFO: pulse height fill bit: 0
[13:01:41.357] <TB1> INFO: buffer corruption: 0
[13:01:41.371] <TB1> INFO: Decoding statistics:
[13:01:41.371] <TB1> INFO: General information:
[13:01:41.371] <TB1> INFO: 16bit words read: 2396084
[13:01:41.371] <TB1> INFO: valid events total: 88384
[13:01:41.371] <TB1> INFO: empty events: 2684
[13:01:41.371] <TB1> INFO: valid events with pixels: 85700
[13:01:41.371] <TB1> INFO: valid pixel hits: 667738
[13:01:41.371] <TB1> INFO: Event errors: 0
[13:01:41.371] <TB1> INFO: start marker: 0
[13:01:41.371] <TB1> INFO: stop marker: 0
[13:01:41.371] <TB1> INFO: overflow: 0
[13:01:41.371] <TB1> INFO: invalid 5bit words: 0
[13:01:41.371] <TB1> INFO: invalid XOR eye diagram: 0
[13:01:41.371] <TB1> INFO: TBM errors: 0
[13:01:41.371] <TB1> INFO: flawed TBM headers: 0
[13:01:41.371] <TB1> INFO: flawed TBM trailers: 0
[13:01:41.371] <TB1> INFO: event ID mismatches: 0
[13:01:41.371] <TB1> INFO: ROC errors: 0
[13:01:41.371] <TB1> INFO: missing ROC header(s): 0
[13:01:41.371] <TB1> INFO: misplaced readback start: 0
[13:01:41.371] <TB1> INFO: Pixel decoding errors: 0
[13:01:41.371] <TB1> INFO: pixel data incomplete: 0
[13:01:41.371] <TB1> INFO: pixel address: 0
[13:01:41.371] <TB1> INFO: pulse height fill bit: 0
[13:01:41.371] <TB1> INFO: buffer corruption: 0
[13:01:41.371] <TB1> INFO: enter test to run
[13:01:41.371] <TB1> INFO: test: exit no parameter change
[13:01:41.541] <TB1> QUIET: Connection to board 153 closed.
[13:01:41.621] <TB1> INFO: pXar: this is the end, my friend