[18:12:17.876] <TB1> INFO: *** Welcome to pxar ***
[18:12:17.877] <TB1> INFO: *** Today: 2015/10/29
[18:12:17.888] <TB1> INFO: *** Version: 9da6-dirty
[18:12:17.888] <TB1> INFO: readRocDacs: /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C0.dat .. /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C15.dat
[18:12:17.889] <TB1> INFO: readTbmDacs: /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//tbmParameters_C0a.dat .. /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//tbmParameters_C0b.dat
[18:12:17.889] <TB1> INFO: readMaskFile: /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//defaultMaskFile.dat
[18:12:17.889] <TB1> INFO: readTrimFile: /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters_C0.dat .. /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters_C15.dat
[18:12:18.002] <TB1> INFO: clk: 4
[18:12:18.002] <TB1> INFO: ctr: 4
[18:12:18.002] <TB1> INFO: sda: 19
[18:12:18.002] <TB1> INFO: tin: 9
[18:12:18.002] <TB1> INFO: level: 15
[18:12:18.002] <TB1> INFO: triggerdelay: 0
[18:12:18.002] <TB1> QUIET: Instanciating API for pxar prod-11
[18:12:18.002] <TB1> INFO: Log level: INFO
[18:12:18.012] <TB1> INFO: Found DTB DTB_WWVH60
[18:12:18.026] <TB1> QUIET: Connection to board DTB_WWVH60 opened.
[18:12:18.029] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 129
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WWVH60
MAC address: 40D855118081
Hostname: pixelDTB129
Comment:
------------------------------------------------------
[18:12:18.032] <TB1> INFO: RPC call hashes of host and DTB match: 397073690
[18:12:19.731] <TB1> INFO: DUT info:
[18:12:19.731] <TB1> INFO: The DUT currently contains the following objects:
[18:12:19.731] <TB1> INFO: 2 TBM Cores tbm08c (2 ON)
[18:12:19.733] <TB1> INFO: TBM Core alpha (0): 7 registers set
[18:12:19.734] <TB1> INFO: TBM Core beta (1): 7 registers set
[18:12:19.734] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[18:12:19.734] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:19.734] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:19.736] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:19.737] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:19.737] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:19.737] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:19.737] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:19.737] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:19.737] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:19.740] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:19.740] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:19.740] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:19.740] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:19.740] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:19.740] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:19.740] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:20.141] <TB1> INFO: enter 'restricted' command line mode
[18:12:20.141] <TB1> INFO: enter test to run
[18:12:20.141] <TB1> INFO: test: FullTest no parameter change
[18:12:20.141] <TB1> INFO: running: fulltest
[18:12:20.147] <TB1> INFO: ######################################################################
[18:12:20.148] <TB1> INFO: PixTestFullTest::doTest()
[18:12:20.148] <TB1> INFO: ######################################################################
[18:12:20.152] <TB1> INFO: ######################################################################
[18:12:20.152] <TB1> INFO: PixTestPretest::doTest()
[18:12:20.152] <TB1> INFO: ######################################################################
[18:12:20.155] <TB1> INFO: ----------------------------------------------------------------------
[18:12:20.155] <TB1> INFO: PixTestPretest::programROC()
[18:12:20.155] <TB1> INFO: ----------------------------------------------------------------------
[18:12:38.172] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[18:12:38.173] <TB1> INFO: IA differences per ROC: 16.1 15.3 17.7 17.7 17.7 19.3 18.5 19.3 17.7 15.3 16.1 16.9 16.1 16.9 17.7 17.7
[18:12:38.258] <TB1> INFO: ----------------------------------------------------------------------
[18:12:38.260] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[18:12:38.263] <TB1> INFO: ----------------------------------------------------------------------
[18:12:42.640] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 396.3 mA = 24.7688 mA/ROC
[18:12:42.641] <TB1> INFO: ----------------------------------------------------------------------
[18:12:42.641] <TB1> INFO: PixTestPretest::findTiming()
[18:12:42.641] <TB1> INFO: ----------------------------------------------------------------------
[18:12:42.641] <TB1> INFO: PixTestCmd::init()
[18:12:43.270] <TB1> WARNING: Not unmasking DUT, not setting Calibrate bits!
[18:14:16.237] <TB1> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):4, header/trailer: 1, token: 1
[18:14:16.237] <TB1> INFO: (success/tries = 100/100), width = 4
[18:14:16.241] <TB1> INFO: ----------------------------------------------------------------------
[18:14:16.241] <TB1> INFO: PixTestPretest::findWorkingPixel()
[18:14:16.241] <TB1> INFO: ----------------------------------------------------------------------
[18:14:16.386] <TB1> INFO: Expecting 231680 events.
[18:14:21.575] <TB1> ERROR: <datapipe.cc/CheckEventValidity:L484> Channel 0 Number of ROCs (1) != Token Chain Length (8)
[18:14:21.579] <TB1> ERROR: <datapipe.cc/CheckEventID:L457> Channel 0 Event ID mismatch: local ID (21) != TBM ID (2)
[18:14:24.412] <TB1> INFO: 231680 events read in total (7248ms).
[18:14:24.422] <TB1> INFO: Test took 8177ms.
[18:14:24.869] <TB1> INFO: Found working pixel in all ROCs: col/row = 12/22
[18:14:24.912] <TB1> INFO: ----------------------------------------------------------------------
[18:14:24.912] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[18:14:24.912] <TB1> INFO: ----------------------------------------------------------------------
[18:14:25.054] <TB1> INFO: Expecting 231680 events.
[18:14:33.051] <TB1> INFO: 231680 events read in total (7218ms).
[18:14:33.060] <TB1> INFO: Test took 8140ms.
[18:14:33.518] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[18:14:33.518] <TB1> INFO: CalDel: 117 123 134 133 122 143 126 126 108 135 125 118 140 121 125 130
[18:14:33.518] <TB1> INFO: VthrComp: 51 51 54 51 51 51 51 51 54 51 51 51 51 51 51 51
[18:14:33.523] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C0.dat
[18:14:33.524] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C1.dat
[18:14:33.525] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C2.dat
[18:14:33.525] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C3.dat
[18:14:33.526] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C4.dat
[18:14:33.526] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C5.dat
[18:14:33.527] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C6.dat
[18:14:33.527] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C7.dat
[18:14:33.528] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C8.dat
[18:14:33.529] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C9.dat
[18:14:33.529] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C10.dat
[18:14:33.530] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C11.dat
[18:14:33.530] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C12.dat
[18:14:33.531] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C13.dat
[18:14:33.532] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C14.dat
[18:14:33.533] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C15.dat
[18:14:33.533] <TB1> INFO: write tbm parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//tbmParameters_C0a.dat
[18:14:33.534] <TB1> INFO: write tbm parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//tbmParameters_C0b.dat
[18:14:33.535] <TB1> INFO: PixTestPretest::doTest() done, duration: 133 seconds
[18:14:33.535] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:14:33.535] <TB1> INFO: Decoding statistics:
[18:14:33.535] <TB1> INFO: General information:
[18:14:33.535] <TB1> INFO: 16bit words read: 7154770
[18:14:33.535] <TB1> INFO: valid events total: 463360
[18:14:33.535] <TB1> INFO: empty events: 299740
[18:14:33.535] <TB1> INFO: valid events with pixels: 163620
[18:14:33.535] <TB1> INFO: valid pixel hits: 797225
[18:14:33.535] <TB1> INFO: Event errors: 0
[18:14:33.535] <TB1> INFO: start marker: 0
[18:14:33.535] <TB1> INFO: stop marker: 0
[18:14:33.535] <TB1> INFO: overflow: 0
[18:14:33.535] <TB1> INFO: invalid 5bit words: 0
[18:14:33.535] <TB1> INFO: invalid XOR eye diagram: 0
[18:14:33.535] <TB1> INFO: TBM errors: 0
[18:14:33.535] <TB1> INFO: flawed TBM headers: 0
[18:14:33.535] <TB1> INFO: flawed TBM trailers: 0
[18:14:33.536] <TB1> INFO: event ID mismatches: 0
[18:14:33.536] <TB1> INFO: ROC errors: 0
[18:14:33.536] <TB1> INFO: missing ROC header(s): 0
[18:14:33.536] <TB1> INFO: misplaced readback start: 0
[18:14:33.536] <TB1> INFO: Pixel decoding errors: 0
[18:14:33.536] <TB1> INFO: pixel data incomplete: 0
[18:14:33.536] <TB1> INFO: pixel address: 0
[18:14:33.536] <TB1> INFO: pulse height fill bit: 0
[18:14:33.536] <TB1> INFO: buffer corruption: 0
[18:14:33.730] <TB1> INFO: ######################################################################
[18:14:33.730] <TB1> INFO: PixTestAlive::doTest()
[18:14:33.730] <TB1> INFO: ######################################################################
[18:14:33.732] <TB1> INFO: ----------------------------------------------------------------------
[18:14:33.732] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:14:33.732] <TB1> INFO: ----------------------------------------------------------------------
[18:14:34.141] <TB1> INFO: Expecting 41600 events.
[18:14:38.734] <TB1> INFO: 41600 events read in total (3815ms).
[18:14:38.735] <TB1> INFO: Test took 4999ms.
[18:14:38.746] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:14:39.177] <TB1> INFO: PixTestAlive::aliveTest() done
[18:14:39.178] <TB1> INFO: number of dead pixels (per ROC): 1 6 2 0 0 0 10 3 0 0 0 0 0 2 0 0
[18:14:39.180] <TB1> INFO: ----------------------------------------------------------------------
[18:14:39.183] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:14:39.183] <TB1> INFO: ----------------------------------------------------------------------
[18:14:39.529] <TB1> INFO: Expecting 41600 events.
[18:14:42.734] <TB1> INFO: 41600 events read in total (2426ms).
[18:14:42.735] <TB1> INFO: Test took 3549ms.
[18:14:42.735] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:14:42.736] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[18:14:43.211] <TB1> INFO: PixTestAlive::maskTest() done
[18:14:43.211] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[18:14:43.213] <TB1> INFO: ----------------------------------------------------------------------
[18:14:43.213] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:14:43.213] <TB1> INFO: ----------------------------------------------------------------------
[18:14:43.650] <TB1> INFO: Expecting 41600 events.
[18:14:48.264] <TB1> INFO: 41600 events read in total (3836ms).
[18:14:48.265] <TB1> INFO: Test took 5048ms.
[18:14:48.287] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:14:48.709] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[18:14:48.709] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[18:14:48.709] <TB1> INFO: PixTestAlive::doTest() done, duration: 14 seconds
[18:14:48.709] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:14:48.709] <TB1> INFO: Decoding statistics:
[18:14:48.709] <TB1> INFO: General information:
[18:14:48.709] <TB1> INFO: 16bit words read: 0
[18:14:48.709] <TB1> INFO: valid events total: 0
[18:14:48.709] <TB1> INFO: empty events: 0
[18:14:48.709] <TB1> INFO: valid events with pixels: 0
[18:14:48.709] <TB1> INFO: valid pixel hits: 0
[18:14:48.709] <TB1> INFO: Event errors: 0
[18:14:48.709] <TB1> INFO: start marker: 0
[18:14:48.709] <TB1> INFO: stop marker: 0
[18:14:48.709] <TB1> INFO: overflow: 0
[18:14:48.709] <TB1> INFO: invalid 5bit words: 0
[18:14:48.709] <TB1> INFO: invalid XOR eye diagram: 0
[18:14:48.709] <TB1> INFO: TBM errors: 0
[18:14:48.709] <TB1> INFO: flawed TBM headers: 0
[18:14:48.709] <TB1> INFO: flawed TBM trailers: 0
[18:14:48.709] <TB1> INFO: event ID mismatches: 0
[18:14:48.709] <TB1> INFO: ROC errors: 0
[18:14:48.709] <TB1> INFO: missing ROC header(s): 0
[18:14:48.709] <TB1> INFO: misplaced readback start: 0
[18:14:48.709] <TB1> INFO: Pixel decoding errors: 0
[18:14:48.710] <TB1> INFO: pixel data incomplete: 0
[18:14:48.710] <TB1> INFO: pixel address: 0
[18:14:48.710] <TB1> INFO: pulse height fill bit: 0
[18:14:48.710] <TB1> INFO: buffer corruption: 0
[18:14:48.722] <TB1> INFO: ######################################################################
[18:14:48.722] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[18:14:48.722] <TB1> INFO: ######################################################################
[18:14:48.725] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[18:14:48.757] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[18:14:48.757] <TB1> INFO: run 1 of 1
[18:14:49.221] <TB1> INFO: Expecting 3120000 events.
[18:15:39.469] <TB1> INFO: 1239430 events read in total (49469ms).
[18:16:28.602] <TB1> INFO: 2464530 events read in total (98602ms).
[18:16:56.209] <TB1> INFO: 3120000 events read in total (126209ms).
[18:16:56.285] <TB1> INFO: Test took 127528ms.
[18:16:56.407] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:17:58.795] <TB1> INFO: PixTestBBMap::doTest() done, duration: 190 seconds
[18:17:58.801] <TB1> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
[18:17:58.805] <TB1> INFO: separation cut (per ROC): 136 143 146 143 147 142 137 143 146 139 140 131 134 132 140 128
[18:17:58.811] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:17:58.811] <TB1> INFO: Decoding statistics:
[18:17:58.811] <TB1> INFO: General information:
[18:17:58.811] <TB1> INFO: 16bit words read: 0
[18:17:58.811] <TB1> INFO: valid events total: 0
[18:17:58.811] <TB1> INFO: empty events: 0
[18:17:58.811] <TB1> INFO: valid events with pixels: 0
[18:17:58.811] <TB1> INFO: valid pixel hits: 0
[18:17:58.811] <TB1> INFO: Event errors: 0
[18:17:58.811] <TB1> INFO: start marker: 0
[18:17:58.812] <TB1> INFO: stop marker: 0
[18:17:58.812] <TB1> INFO: overflow: 0
[18:17:58.812] <TB1> INFO: invalid 5bit words: 0
[18:17:58.812] <TB1> INFO: invalid XOR eye diagram: 0
[18:17:58.812] <TB1> INFO: TBM errors: 0
[18:17:58.812] <TB1> INFO: flawed TBM headers: 0
[18:17:58.812] <TB1> INFO: flawed TBM trailers: 0
[18:17:58.812] <TB1> INFO: event ID mismatches: 0
[18:17:58.812] <TB1> INFO: ROC errors: 0
[18:17:58.812] <TB1> INFO: missing ROC header(s): 0
[18:17:58.812] <TB1> INFO: misplaced readback start: 0
[18:17:58.812] <TB1> INFO: Pixel decoding errors: 0
[18:17:58.812] <TB1> INFO: pixel data incomplete: 0
[18:17:58.812] <TB1> INFO: pixel address: 0
[18:17:58.812] <TB1> INFO: pulse height fill bit: 0
[18:17:58.812] <TB1> INFO: buffer corruption: 0
[18:17:59.150] <TB1> INFO: ######################################################################
[18:17:59.150] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[18:17:59.150] <TB1> INFO: ######################################################################
[18:17:59.151] <TB1> INFO: ----------------------------------------------------------------------
[18:17:59.151] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[18:17:59.151] <TB1> INFO: ----------------------------------------------------------------------
[18:17:59.152] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[18:17:59.189] <TB1> INFO: dacScan split into 1 runs with ntrig = 50
[18:17:59.189] <TB1> INFO: run 1 of 1
[18:17:59.747] <TB1> INFO: Expecting 26208000 events.
[18:18:37.967] <TB1> INFO: 1267150 events read in total (37441ms).
[18:19:15.546] <TB1> INFO: 2507000 events read in total (75020ms).
[18:19:53.044] <TB1> INFO: 3746750 events read in total (112518ms).
[18:20:30.740] <TB1> INFO: 4981700 events read in total (150214ms).
[18:21:09.665] <TB1> INFO: 6219600 events read in total (189139ms).
[18:21:48.368] <TB1> INFO: 7451900 events read in total (227842ms).
[18:22:28.687] <TB1> INFO: 8685750 events read in total (268161ms).
[18:23:07.157] <TB1> INFO: 9920550 events read in total (306631ms).
[18:23:46.004] <TB1> INFO: 11152500 events read in total (345478ms).
[18:24:24.721] <TB1> INFO: 12379700 events read in total (384195ms).
[18:25:03.233] <TB1> INFO: 13596100 events read in total (422707ms).
[18:25:41.787] <TB1> INFO: 14806800 events read in total (461261ms).
[18:26:20.409] <TB1> INFO: 16014150 events read in total (499883ms).
[18:26:58.949] <TB1> INFO: 17222400 events read in total (538423ms).
[18:27:37.324] <TB1> INFO: 18424150 events read in total (576798ms).
[18:28:21.595] <TB1> INFO: 19623450 events read in total (621069ms).
[18:29:00.873] <TB1> INFO: 20827550 events read in total (660347ms).
[18:29:42.437] <TB1> INFO: 22028450 events read in total (701911ms).
[18:30:21.599] <TB1> INFO: 23232500 events read in total (741073ms).
[18:31:00.837] <TB1> INFO: 24438450 events read in total (780311ms).
[18:31:40.301] <TB1> INFO: 25648550 events read in total (819775ms).
[18:31:58.474] <TB1> INFO: 26208000 events read in total (837948ms).
[18:31:58.548] <TB1> INFO: Test took 839359ms.
[18:31:58.736] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:31:59.282] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:32:02.519] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:32:05.704] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:32:08.709] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:32:11.840] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:32:14.897] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:32:18.007] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:32:21.047] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:32:24.078] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:32:27.016] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:32:30.072] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:32:33.270] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:32:38.222] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:32:42.655] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:32:46.208] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:32:50.621] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[18:32:53.763] <TB1> INFO: PixTestScurves::scurves() done
[18:32:53.763] <TB1> INFO: Vcal mean: 101.03 106.86 117.39 109.43 112.86 109.91 103.60 107.58 116.94 103.83 112.66 100.46 102.30 106.55 111.21 106.91
[18:32:53.763] <TB1> INFO: Vcal RMS: 6.04 7.71 6.57 4.92 5.53 4.47 7.31 6.16 6.03 5.98 5.18 5.37 5.49 5.48 5.40 5.20
[18:32:53.763] <TB1> INFO: PixTestScurves::fullTest() done, duration: 894 seconds
[18:32:53.763] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:32:53.763] <TB1> INFO: Decoding statistics:
[18:32:53.763] <TB1> INFO: General information:
[18:32:53.763] <TB1> INFO: 16bit words read: 0
[18:32:53.763] <TB1> INFO: valid events total: 0
[18:32:53.763] <TB1> INFO: empty events: 0
[18:32:53.763] <TB1> INFO: valid events with pixels: 0
[18:32:53.763] <TB1> INFO: valid pixel hits: 0
[18:32:53.763] <TB1> INFO: Event errors: 0
[18:32:53.763] <TB1> INFO: start marker: 0
[18:32:53.763] <TB1> INFO: stop marker: 0
[18:32:53.763] <TB1> INFO: overflow: 0
[18:32:53.763] <TB1> INFO: invalid 5bit words: 0
[18:32:53.763] <TB1> INFO: invalid XOR eye diagram: 0
[18:32:53.763] <TB1> INFO: TBM errors: 0
[18:32:53.763] <TB1> INFO: flawed TBM headers: 0
[18:32:53.763] <TB1> INFO: flawed TBM trailers: 0
[18:32:53.763] <TB1> INFO: event ID mismatches: 0
[18:32:53.764] <TB1> INFO: ROC errors: 0
[18:32:53.764] <TB1> INFO: missing ROC header(s): 0
[18:32:53.764] <TB1> INFO: misplaced readback start: 0
[18:32:53.764] <TB1> INFO: Pixel decoding errors: 0
[18:32:53.764] <TB1> INFO: pixel data incomplete: 0
[18:32:53.764] <TB1> INFO: pixel address: 0
[18:32:53.764] <TB1> INFO: pulse height fill bit: 0
[18:32:53.764] <TB1> INFO: buffer corruption: 0
[18:32:53.939] <TB1> INFO: ######################################################################
[18:32:53.939] <TB1> INFO: PixTestTrim::doTest()
[18:32:53.939] <TB1> INFO: ######################################################################
[18:32:53.940] <TB1> INFO: ----------------------------------------------------------------------
[18:32:53.941] <TB1> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[18:32:53.941] <TB1> INFO: ----------------------------------------------------------------------
[18:32:54.074] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[18:32:54.074] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:32:54.114] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:32:54.114] <TB1> INFO: run 1 of 1
[18:32:54.657] <TB1> INFO: Expecting 5025280 events.
[18:33:44.001] <TB1> INFO: 1432768 events read in total (49563ms).
[18:34:33.002] <TB1> INFO: 2859120 events read in total (97564ms).
[18:35:20.743] <TB1> INFO: 4274968 events read in total (145306ms).
[18:35:47.029] <TB1> INFO: 5025280 events read in total (171591ms).
[18:35:47.116] <TB1> INFO: Test took 173001ms.
[18:35:47.237] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:36:38.967] <TB1> INFO: ROC 0 VthrComp = 103
[18:36:38.972] <TB1> INFO: ROC 1 VthrComp = 105
[18:36:38.974] <TB1> INFO: ROC 2 VthrComp = 113
[18:36:38.976] <TB1> INFO: ROC 3 VthrComp = 112
[18:36:39.001] <TB1> INFO: ROC 4 VthrComp = 113
[18:36:39.004] <TB1> INFO: ROC 5 VthrComp = 112
[18:36:39.014] <TB1> INFO: ROC 6 VthrComp = 105
[18:36:39.016] <TB1> INFO: ROC 7 VthrComp = 108
[18:36:39.022] <TB1> INFO: ROC 8 VthrComp = 112
[18:36:39.027] <TB1> INFO: ROC 9 VthrComp = 102
[18:36:39.030] <TB1> INFO: ROC 10 VthrComp = 109
[18:36:39.031] <TB1> INFO: ROC 11 VthrComp = 103
[18:36:39.031] <TB1> INFO: ROC 12 VthrComp = 103
[18:36:39.031] <TB1> INFO: ROC 13 VthrComp = 105
[18:36:39.032] <TB1> INFO: ROC 14 VthrComp = 107
[18:36:39.032] <TB1> INFO: ROC 15 VthrComp = 104
[18:36:39.032] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[18:36:39.033] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:36:39.066] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:36:39.066] <TB1> INFO: run 1 of 1
[18:36:39.549] <TB1> INFO: Expecting 5025280 events.
[18:37:18.301] <TB1> INFO: 899152 events read in total (37972ms).
[18:37:57.514] <TB1> INFO: 1795616 events read in total (77185ms).
[18:38:37.825] <TB1> INFO: 2691200 events read in total (117496ms).
[18:39:17.889] <TB1> INFO: 3577752 events read in total (157560ms).
[18:39:57.913] <TB1> INFO: 4460896 events read in total (197584ms).
[18:40:26.428] <TB1> INFO: 5025280 events read in total (226099ms).
[18:40:26.580] <TB1> INFO: Test took 227513ms.
[18:40:26.955] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:41:31.998] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 61.631 for pixel 0/76 mean/min/max = 46.9621/32.0782/61.8459
[18:41:32.006] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 65.2543 for pixel 21/77 mean/min/max = 49.2625/33.109/65.4159
[18:41:32.011] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 68.7122 for pixel 12/18 mean/min/max = 52.4321/36.0425/68.8218
[18:41:32.017] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 59.8597 for pixel 1/12 mean/min/max = 46.6423/33.4036/59.8809
[18:41:32.025] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 61.7061 for pixel 49/79 mean/min/max = 47.8988/33.6863/62.1113
[18:41:32.029] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 58.4726 for pixel 29/3 mean/min/max = 46.2373/33.9497/58.5249
[18:41:32.030] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 60.1631 for pixel 51/0 mean/min/max = 46.8381/33.4586/60.2177
[18:41:32.031] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 64.1511 for pixel 10/3 mean/min/max = 49.0848/33.9915/64.1781
[18:41:32.032] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 70.4066 for pixel 22/68 mean/min/max = 53.7451/36.8558/70.6344
[18:41:32.033] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 63.8011 for pixel 5/22 mean/min/max = 48.0286/32.2153/63.8419
[18:41:32.047] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 63.5471 for pixel 12/6 mean/min/max = 49.2854/34.8894/63.6814
[18:41:32.055] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 58.7788 for pixel 18/10 mean/min/max = 45.5966/32.3001/58.893
[18:41:32.066] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 60.1881 for pixel 18/15 mean/min/max = 46.5147/32.6973/60.332
[18:41:32.075] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 61.6703 for pixel 15/28 mean/min/max = 47.9331/34.1853/61.6809
[18:41:32.076] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 65.2486 for pixel 5/2 mean/min/max = 49.7885/34.095/65.482
[18:41:32.076] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 63.5427 for pixel 13/8 mean/min/max = 48.6625/33.7568/63.5682
[18:41:32.077] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:41:32.247] <TB1> INFO: Expecting 411648 events.
[18:41:41.471] <TB1> INFO: 411648 events read in total (8431ms).
[18:41:41.484] <TB1> INFO: Expecting 411648 events.
[18:41:50.230] <TB1> INFO: 411648 events read in total (8102ms).
[18:41:50.248] <TB1> INFO: Expecting 411648 events.
[18:41:58.922] <TB1> INFO: 411648 events read in total (8044ms).
[18:41:58.944] <TB1> INFO: Expecting 411648 events.
[18:42:07.607] <TB1> INFO: 411648 events read in total (8043ms).
[18:42:07.638] <TB1> INFO: Expecting 411648 events.
[18:42:16.282] <TB1> INFO: 411648 events read in total (8030ms).
[18:42:16.309] <TB1> INFO: Expecting 411648 events.
[18:42:24.987] <TB1> INFO: 411648 events read in total (8053ms).
[18:42:25.027] <TB1> INFO: Expecting 411648 events.
[18:42:33.563] <TB1> INFO: 411648 events read in total (7926ms).
[18:42:33.597] <TB1> INFO: Expecting 411648 events.
[18:42:42.337] <TB1> INFO: 411648 events read in total (8114ms).
[18:42:42.385] <TB1> INFO: Expecting 411648 events.
[18:42:51.159] <TB1> INFO: 411648 events read in total (8187ms).
[18:42:51.212] <TB1> INFO: Expecting 411648 events.
[18:42:59.905] <TB1> INFO: 411648 events read in total (8112ms).
[18:42:59.961] <TB1> INFO: Expecting 411648 events.
[18:43:08.654] <TB1> INFO: 411648 events read in total (8103ms).
[18:43:08.721] <TB1> INFO: Expecting 411648 events.
[18:43:17.373] <TB1> INFO: 411648 events read in total (8080ms).
[18:43:17.435] <TB1> INFO: Expecting 411648 events.
[18:43:26.154] <TB1> INFO: 411648 events read in total (8124ms).
[18:43:26.229] <TB1> INFO: Expecting 411648 events.
[18:43:35.260] <TB1> INFO: 411648 events read in total (8465ms).
[18:43:35.336] <TB1> INFO: Expecting 411648 events.
[18:43:44.017] <TB1> INFO: 411648 events read in total (8103ms).
[18:43:44.092] <TB1> INFO: Expecting 411648 events.
[18:43:52.947] <TB1> INFO: 411648 events read in total (8280ms).
[18:43:53.031] <TB1> INFO: Test took 140954ms.
[18:43:54.997] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[18:43:55.023] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:43:55.023] <TB1> INFO: run 1 of 1
[18:43:55.427] <TB1> INFO: Expecting 5025280 events.
[18:44:35.082] <TB1> INFO: 872416 events read in total (38875ms).
[18:45:14.238] <TB1> INFO: 1743680 events read in total (78031ms).
[18:45:53.913] <TB1> INFO: 2614880 events read in total (117706ms).
[18:46:35.959] <TB1> INFO: 3476344 events read in total (159752ms).
[18:47:16.631] <TB1> INFO: 4334048 events read in total (200427ms).
[18:47:49.318] <TB1> INFO: 5025280 events read in total (233111ms).
[18:47:49.511] <TB1> INFO: Test took 234488ms.
[18:47:49.961] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:48:53.535] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.097072 .. 55.709429
[18:48:53.654] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 65 (-1/-1) hits flags = 528 (plus default)
[18:48:53.687] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:48:53.693] <TB1> INFO: run 1 of 1
[18:48:54.126] <TB1> INFO: Expecting 2196480 events.
[18:49:38.890] <TB1> INFO: 1117016 events read in total (43980ms).
[18:50:21.541] <TB1> INFO: 2196480 events read in total (86631ms).
[18:50:21.603] <TB1> INFO: Test took 87904ms.
[18:50:21.693] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:50:52.388] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 14.983061 .. 45.842026
[18:50:52.484] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 4 .. 55 (-1/-1) hits flags = 528 (plus default)
[18:50:52.504] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:50:52.504] <TB1> INFO: run 1 of 1
[18:50:52.903] <TB1> INFO: Expecting 1730560 events.
[18:51:39.056] <TB1> INFO: 1174352 events read in total (45367ms).
[18:52:01.549] <TB1> INFO: 1730560 events read in total (67860ms).
[18:52:01.620] <TB1> INFO: Test took 69116ms.
[18:52:01.759] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:52:29.877] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 21.952000 .. 42.645327
[18:52:29.987] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 11 .. 52 (-1/-1) hits flags = 528 (plus default)
[18:52:30.018] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:52:30.018] <TB1> INFO: run 1 of 1
[18:52:30.500] <TB1> INFO: Expecting 1397760 events.
[18:53:17.326] <TB1> INFO: 1154800 events read in total (46048ms).
[18:53:26.507] <TB1> INFO: 1397760 events read in total (55230ms).
[18:53:26.546] <TB1> INFO: Test took 56528ms.
[18:53:26.608] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:53:53.161] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 23.004820 .. 41.515144
[18:53:53.270] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 13 .. 51 (-1/-1) hits flags = 528 (plus default)
[18:53:53.295] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:53:53.295] <TB1> INFO: run 1 of 1
[18:53:53.724] <TB1> INFO: Expecting 1297920 events.
[18:54:41.162] <TB1> INFO: 1151240 events read in total (46660ms).
[18:54:47.204] <TB1> INFO: 1297920 events read in total (52702ms).
[18:54:47.224] <TB1> INFO: Test took 53929ms.
[18:54:47.286] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:55:14.837] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[18:55:14.837] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[18:55:14.858] <TB1> INFO: dacScan split into 1 runs with ntrig = 8
[18:55:14.858] <TB1> INFO: run 1 of 1
[18:55:15.340] <TB1> INFO: Expecting 1364480 events.
[18:56:08.500] <TB1> INFO: 1076232 events read in total (52379ms).
[18:56:24.428] <TB1> INFO: 1364480 events read in total (68307ms).
[18:56:24.499] <TB1> INFO: Test took 69641ms.
[18:56:24.655] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:56:59.741] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C0.dat
[18:56:59.741] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C1.dat
[18:56:59.741] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C2.dat
[18:56:59.741] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C3.dat
[18:56:59.741] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C4.dat
[18:56:59.742] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C5.dat
[18:56:59.742] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C6.dat
[18:56:59.742] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C7.dat
[18:56:59.742] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C8.dat
[18:56:59.742] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C9.dat
[18:56:59.742] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C10.dat
[18:56:59.742] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C11.dat
[18:56:59.742] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C12.dat
[18:56:59.742] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C13.dat
[18:56:59.743] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C14.dat
[18:56:59.743] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C15.dat
[18:56:59.743] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C0.dat
[18:56:59.752] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C1.dat
[18:56:59.759] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C2.dat
[18:56:59.767] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C3.dat
[18:56:59.775] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C4.dat
[18:56:59.783] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C5.dat
[18:56:59.795] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C6.dat
[18:56:59.806] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C7.dat
[18:56:59.820] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C8.dat
[18:56:59.840] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C9.dat
[18:56:59.853] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C10.dat
[18:56:59.876] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C11.dat
[18:56:59.890] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C12.dat
[18:56:59.914] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C13.dat
[18:56:59.925] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C14.dat
[18:56:59.937] <TB1> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C15.dat
[18:56:59.969] <TB1> INFO: PixTestTrim::trimTest() done
[18:56:59.969] <TB1> INFO: vtrim: 113 135 153 125 115 107 93 123 145 126 120 98 115 125 136 121
[18:56:59.970] <TB1> INFO: vthrcomp: 103 105 113 112 113 112 105 108 112 102 109 103 103 105 107 104
[18:56:59.970] <TB1> INFO: vcal mean: 34.96 34.90 34.97 34.98 34.97 34.99 34.92 34.99 34.93 34.95 34.97 34.96 34.92 34.98 35.01 35.00
[18:56:59.970] <TB1> INFO: vcal RMS: 1.09 1.65 1.33 0.92 0.93 0.90 1.94 1.33 1.05 1.09 0.99 0.96 0.97 1.22 0.98 1.00
[18:56:59.970] <TB1> INFO: bits mean: 9.18 8.93 8.18 9.00 8.55 9.12 8.21 8.57 7.96 9.10 8.51 9.64 9.26 8.80 8.40 8.80
[18:56:59.970] <TB1> INFO: bits RMS: 2.71 2.52 2.24 2.62 2.66 2.52 2.91 2.54 2.20 2.65 2.47 2.63 2.63 2.51 2.55 2.50
[18:56:59.995] <TB1> INFO: ----------------------------------------------------------------------
[18:56:59.996] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[18:56:59.996] <TB1> INFO: ----------------------------------------------------------------------
[18:57:00.003] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[18:57:00.077] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[18:57:00.090] <TB1> INFO: run 1 of 1
[18:57:00.575] <TB1> INFO: Expecting 4160000 events.
[18:57:52.012] <TB1> INFO: 1260065 events read in total (50650ms).
[18:58:43.011] <TB1> INFO: 2504735 events read in total (101649ms).
[18:59:38.073] <TB1> INFO: 3736250 events read in total (156712ms).
[18:59:57.151] <TB1> INFO: 4160000 events read in total (175789ms).
[18:59:57.260] <TB1> INFO: Test took 177167ms.
[18:59:57.466] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:00:54.323] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 196 (-1/-1) hits flags = 528 (plus default)
[19:00:54.353] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[19:00:54.353] <TB1> INFO: run 1 of 1
[19:00:54.741] <TB1> INFO: Expecting 4097600 events.
[19:01:57.337] <TB1> INFO: 1211330 events read in total (61818ms).
[19:02:48.899] <TB1> INFO: 2408840 events read in total (113380ms).
[19:03:43.808] <TB1> INFO: 3594105 events read in total (168289ms).
[19:04:08.511] <TB1> INFO: 4097600 events read in total (192992ms).
[19:04:08.666] <TB1> INFO: Test took 194313ms.
[19:04:08.934] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:05:10.855] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 183 (-1/-1) hits flags = 528 (plus default)
[19:05:10.920] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[19:05:10.920] <TB1> INFO: run 1 of 1
[19:05:11.366] <TB1> INFO: Expecting 3827200 events.
[19:06:03.366] <TB1> INFO: 1263180 events read in total (51221ms).
[19:06:55.688] <TB1> INFO: 2507910 events read in total (103543ms).
[19:07:47.607] <TB1> INFO: 3743450 events read in total (155462ms).
[19:07:51.343] <TB1> INFO: 3827200 events read in total (159199ms).
[19:07:51.443] <TB1> INFO: Test took 160524ms.
[19:07:51.636] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:08:48.022] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 183 (-1/-1) hits flags = 528 (plus default)
[19:08:48.063] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[19:08:48.063] <TB1> INFO: run 1 of 1
[19:08:48.470] <TB1> INFO: Expecting 3827200 events.
[19:09:42.331] <TB1> INFO: 1262755 events read in total (53082ms).
[19:10:33.742] <TB1> INFO: 2506850 events read in total (104493ms).
[19:11:26.420] <TB1> INFO: 3741550 events read in total (157171ms).
[19:11:30.580] <TB1> INFO: 3827200 events read in total (161331ms).
[19:11:30.670] <TB1> INFO: Test took 162612ms.
[19:11:30.833] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:12:26.759] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[19:12:26.783] <TB1> INFO: dacScan split into 1 runs with ntrig = 5
[19:12:26.783] <TB1> INFO: run 1 of 1
[19:12:27.215] <TB1> INFO: Expecting 3848000 events.
[19:13:26.353] <TB1> INFO: 1257430 events read in total (58359ms).
[19:14:26.657] <TB1> INFO: 2496945 events read in total (118663ms).
[19:15:19.569] <TB1> INFO: 3727380 events read in total (171575ms).
[19:15:24.580] <TB1> INFO: 3848000 events read in total (176586ms).
[19:15:24.658] <TB1> INFO: Test took 177875ms.
[19:15:24.805] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:16:21.311] <TB1> INFO: PixTestTrim::trimBitTest() done
[19:16:21.318] <TB1> INFO: PixTestTrim::doTest() done, duration: 2607 seconds
[19:16:21.318] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:16:21.318] <TB1> INFO: Decoding statistics:
[19:16:21.318] <TB1> INFO: General information:
[19:16:21.318] <TB1> INFO: 16bit words read: 0
[19:16:21.318] <TB1> INFO: valid events total: 0
[19:16:21.319] <TB1> INFO: empty events: 0
[19:16:21.320] <TB1> INFO: valid events with pixels: 0
[19:16:21.320] <TB1> INFO: valid pixel hits: 0
[19:16:21.320] <TB1> INFO: Event errors: 0
[19:16:21.320] <TB1> INFO: start marker: 0
[19:16:21.320] <TB1> INFO: stop marker: 0
[19:16:21.320] <TB1> INFO: overflow: 0
[19:16:21.320] <TB1> INFO: invalid 5bit words: 0
[19:16:21.320] <TB1> INFO: invalid XOR eye diagram: 0
[19:16:21.320] <TB1> INFO: TBM errors: 0
[19:16:21.320] <TB1> INFO: flawed TBM headers: 0
[19:16:21.321] <TB1> INFO: flawed TBM trailers: 0
[19:16:21.321] <TB1> INFO: event ID mismatches: 0
[19:16:21.321] <TB1> INFO: ROC errors: 0
[19:16:21.321] <TB1> INFO: missing ROC header(s): 0
[19:16:21.321] <TB1> INFO: misplaced readback start: 0
[19:16:21.321] <TB1> INFO: Pixel decoding errors: 0
[19:16:21.321] <TB1> INFO: pixel data incomplete: 0
[19:16:21.321] <TB1> INFO: pixel address: 0
[19:16:21.321] <TB1> INFO: pulse height fill bit: 0
[19:16:21.321] <TB1> INFO: buffer corruption: 0
[19:16:22.771] <TB1> INFO: ######################################################################
[19:16:22.771] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[19:16:22.771] <TB1> INFO: ######################################################################
[19:16:23.195] <TB1> INFO: Expecting 41600 events.
[19:16:27.941] <TB1> INFO: 41600 events read in total (3967ms).
[19:16:27.943] <TB1> INFO: Test took 5170ms.
[19:16:27.956] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:16:28.757] <TB1> INFO: Expecting 41600 events.
[19:16:33.763] <TB1> INFO: 41600 events read in total (4227ms).
[19:16:33.766] <TB1> INFO: Test took 5421ms.
[19:16:33.780] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:16:34.257] <TB1> INFO: Expecting 41600 events.
[19:16:39.326] <TB1> INFO: 41600 events read in total (4287ms).
[19:16:39.327] <TB1> INFO: Test took 5514ms.
[19:16:39.340] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:16:39.770] <TB1> INFO: Expecting 2560 events.
[19:16:40.799] <TB1> INFO: 2560 events read in total (250ms).
[19:16:40.800] <TB1> INFO: Test took 1445ms.
[19:16:41.373] <TB1> INFO: Expecting 2560 events.
[19:16:42.402] <TB1> INFO: 2560 events read in total (250ms).
[19:16:42.403] <TB1> INFO: Test took 1602ms.
[19:16:42.974] <TB1> INFO: Expecting 2560 events.
[19:16:44.010] <TB1> INFO: 2560 events read in total (247ms).
[19:16:44.017] <TB1> INFO: Test took 1610ms.
[19:16:44.583] <TB1> INFO: Expecting 2560 events.
[19:16:45.612] <TB1> INFO: 2560 events read in total (250ms).
[19:16:45.620] <TB1> INFO: Test took 1601ms.
[19:16:46.187] <TB1> INFO: Expecting 2560 events.
[19:16:47.214] <TB1> INFO: 2560 events read in total (249ms).
[19:16:47.215] <TB1> INFO: Test took 1594ms.
[19:16:47.787] <TB1> INFO: Expecting 2560 events.
[19:16:48.820] <TB1> INFO: 2560 events read in total (249ms).
[19:16:48.821] <TB1> INFO: Test took 1604ms.
[19:16:49.395] <TB1> INFO: Expecting 2560 events.
[19:16:50.429] <TB1> INFO: 2560 events read in total (249ms).
[19:16:50.430] <TB1> INFO: Test took 1606ms.
[19:16:51.003] <TB1> INFO: Expecting 2560 events.
[19:16:52.031] <TB1> INFO: 2560 events read in total (250ms).
[19:16:52.031] <TB1> INFO: Test took 1601ms.
[19:16:52.603] <TB1> INFO: Expecting 2560 events.
[19:16:53.634] <TB1> INFO: 2560 events read in total (252ms).
[19:16:53.635] <TB1> INFO: Test took 1604ms.
[19:16:54.226] <TB1> INFO: Expecting 2560 events.
[19:16:55.255] <TB1> INFO: 2560 events read in total (250ms).
[19:16:55.255] <TB1> INFO: Test took 1620ms.
[19:16:55.828] <TB1> INFO: Expecting 2560 events.
[19:16:56.857] <TB1> INFO: 2560 events read in total (250ms).
[19:16:56.858] <TB1> INFO: Test took 1602ms.
[19:16:57.429] <TB1> INFO: Expecting 2560 events.
[19:16:58.459] <TB1> INFO: 2560 events read in total (250ms).
[19:16:58.460] <TB1> INFO: Test took 1602ms.
[19:16:59.031] <TB1> INFO: Expecting 2560 events.
[19:17:00.059] <TB1> INFO: 2560 events read in total (248ms).
[19:17:00.062] <TB1> INFO: Test took 1602ms.
[19:17:00.631] <TB1> INFO: Expecting 2560 events.
[19:17:01.661] <TB1> INFO: 2560 events read in total (251ms).
[19:17:01.661] <TB1> INFO: Test took 1599ms.
[19:17:02.233] <TB1> INFO: Expecting 2560 events.
[19:17:03.261] <TB1> INFO: 2560 events read in total (250ms).
[19:17:03.263] <TB1> INFO: Test took 1598ms.
[19:17:03.834] <TB1> INFO: Expecting 2560 events.
[19:17:04.863] <TB1> INFO: 2560 events read in total (250ms).
[19:17:04.864] <TB1> INFO: Test took 1597ms.
[19:17:04.873] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:17:05.438] <TB1> INFO: Expecting 655360 events.
[19:17:19.957] <TB1> INFO: 655360 events read in total (13738ms).
[19:17:20.005] <TB1> INFO: Expecting 655360 events.
[19:17:33.962] <TB1> INFO: 655360 events read in total (13430ms).
[19:17:34.009] <TB1> INFO: Expecting 655360 events.
[19:17:49.183] <TB1> INFO: 655360 events read in total (14647ms).
[19:17:49.265] <TB1> INFO: Expecting 655360 events.
[19:18:03.595] <TB1> INFO: 655360 events read in total (13792ms).
[19:18:03.684] <TB1> INFO: Expecting 655360 events.
[19:18:17.666] <TB1> INFO: 655360 events read in total (13454ms).
[19:18:17.718] <TB1> INFO: Expecting 655360 events.
[19:18:31.213] <TB1> INFO: 655360 events read in total (12963ms).
[19:18:31.298] <TB1> INFO: Expecting 655360 events.
[19:18:44.693] <TB1> INFO: 655360 events read in total (12868ms).
[19:18:44.760] <TB1> INFO: Expecting 655360 events.
[19:18:58.597] <TB1> INFO: 655360 events read in total (13312ms).
[19:18:58.668] <TB1> INFO: Expecting 655360 events.
[19:19:12.706] <TB1> INFO: 655360 events read in total (13510ms).
[19:19:12.795] <TB1> INFO: Expecting 655360 events.
[19:19:26.664] <TB1> INFO: 655360 events read in total (13342ms).
[19:19:26.756] <TB1> INFO: Expecting 655360 events.
[19:19:40.699] <TB1> INFO: 655360 events read in total (13416ms).
[19:19:40.789] <TB1> INFO: Expecting 655360 events.
[19:19:54.823] <TB1> INFO: 655360 events read in total (13507ms).
[19:19:54.934] <TB1> INFO: Expecting 655360 events.
[19:20:09.067] <TB1> INFO: 655360 events read in total (13607ms).
[19:20:09.183] <TB1> INFO: Expecting 655360 events.
[19:20:23.150] <TB1> INFO: 655360 events read in total (13440ms).
[19:20:23.261] <TB1> INFO: Expecting 655360 events.
[19:20:36.876] <TB1> INFO: 655360 events read in total (13084ms).
[19:20:37.013] <TB1> INFO: Expecting 655360 events.
[19:20:51.166] <TB1> INFO: 655360 events read in total (13626ms).
[19:20:51.333] <TB1> INFO: Test took 226460ms.
[19:20:51.540] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:20:51.907] <TB1> INFO: Expecting 655360 events.
[19:21:06.383] <TB1> INFO: 655360 events read in total (13697ms).
[19:21:06.412] <TB1> INFO: Expecting 655360 events.
[19:21:20.405] <TB1> INFO: 655360 events read in total (13467ms).
[19:21:20.463] <TB1> INFO: Expecting 655360 events.
[19:21:34.547] <TB1> INFO: 655360 events read in total (13550ms).
[19:21:34.588] <TB1> INFO: Expecting 655360 events.
[19:21:48.347] <TB1> INFO: 655360 events read in total (13227ms).
[19:21:48.410] <TB1> INFO: Expecting 655360 events.
[19:22:02.452] <TB1> INFO: 655360 events read in total (13515ms).
[19:22:02.514] <TB1> INFO: Expecting 655360 events.
[19:22:16.049] <TB1> INFO: 655360 events read in total (13008ms).
[19:22:16.122] <TB1> INFO: Expecting 655360 events.
[19:22:29.691] <TB1> INFO: 655360 events read in total (13042ms).
[19:22:29.783] <TB1> INFO: Expecting 655360 events.
[19:22:43.488] <TB1> INFO: 655360 events read in total (13179ms).
[19:22:43.598] <TB1> INFO: Expecting 655360 events.
[19:22:57.083] <TB1> INFO: 655360 events read in total (12959ms).
[19:22:57.180] <TB1> INFO: Expecting 655360 events.
[19:23:10.900] <TB1> INFO: 655360 events read in total (13193ms).
[19:23:11.020] <TB1> INFO: Expecting 655360 events.
[19:23:24.675] <TB1> INFO: 655360 events read in total (13126ms).
[19:23:24.763] <TB1> INFO: Expecting 655360 events.
[19:23:38.284] <TB1> INFO: 655360 events read in total (12995ms).
[19:23:38.385] <TB1> INFO: Expecting 655360 events.
[19:23:51.730] <TB1> INFO: 655360 events read in total (12819ms).
[19:23:51.829] <TB1> INFO: Expecting 655360 events.
[19:24:05.860] <TB1> INFO: 655360 events read in total (13505ms).
[19:24:05.986] <TB1> INFO: Expecting 655360 events.
[19:24:20.061] <TB1> INFO: 655360 events read in total (13548ms).
[19:24:20.210] <TB1> INFO: Expecting 655360 events.
[19:24:33.618] <TB1> INFO: 655360 events read in total (12877ms).
[19:24:33.730] <TB1> INFO: Test took 222190ms.
[19:24:34.123] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:24:34.145] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:24:34.166] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:24:34.186] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:24:34.210] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:24:34.238] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:24:34.257] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:24:34.282] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:24:34.304] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:24:34.329] <TB1> INFO: For ROC 8: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[19:24:34.338] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[19:24:34.363] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:24:34.390] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:24:34.413] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:24:34.441] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:24:34.470] <TB1> INFO: For ROC 12: No solutions with PhScale > 20 could be found. Looking for a solution with PhScale < 20.
[19:24:34.481] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[19:24:34.509] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:24:34.530] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:24:34.548] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[19:24:34.610] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C0.dat
[19:24:34.613] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C1.dat
[19:24:34.617] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C2.dat
[19:24:34.619] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C3.dat
[19:24:34.621] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C4.dat
[19:24:34.629] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C5.dat
[19:24:34.631] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C6.dat
[19:24:34.633] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C7.dat
[19:24:34.633] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C8.dat
[19:24:34.633] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C9.dat
[19:24:34.633] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C10.dat
[19:24:34.633] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C11.dat
[19:24:34.634] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C12.dat
[19:24:34.634] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C13.dat
[19:24:34.636] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C14.dat
[19:24:34.639] <TB1> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C15.dat
[19:24:35.097] <TB1> INFO: Expecting 41600 events.
[19:24:39.402] <TB1> INFO: 41600 events read in total (3527ms).
[19:24:39.408] <TB1> INFO: Test took 4764ms.
[19:24:40.156] <TB1> INFO: Expecting 41600 events.
[19:24:44.507] <TB1> INFO: 41600 events read in total (3571ms).
[19:24:44.512] <TB1> INFO: Test took 4789ms.
[19:24:45.231] <TB1> INFO: Expecting 41600 events.
[19:24:49.741] <TB1> INFO: 41600 events read in total (3731ms).
[19:24:49.742] <TB1> INFO: Test took 4942ms.
[19:24:50.043] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:24:50.178] <TB1> INFO: Expecting 2560 events.
[19:24:51.208] <TB1> INFO: 2560 events read in total (251ms).
[19:24:51.209] <TB1> INFO: Test took 1166ms.
[19:24:51.213] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:24:51.781] <TB1> INFO: Expecting 2560 events.
[19:24:52.814] <TB1> INFO: 2560 events read in total (250ms).
[19:24:52.819] <TB1> INFO: Test took 1606ms.
[19:24:52.823] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:24:53.387] <TB1> INFO: Expecting 2560 events.
[19:24:54.423] <TB1> INFO: 2560 events read in total (251ms).
[19:24:54.434] <TB1> INFO: Test took 1611ms.
[19:24:54.440] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:24:54.996] <TB1> INFO: Expecting 2560 events.
[19:24:56.025] <TB1> INFO: 2560 events read in total (250ms).
[19:24:56.033] <TB1> INFO: Test took 1593ms.
[19:24:56.040] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:24:56.598] <TB1> INFO: Expecting 2560 events.
[19:24:57.635] <TB1> INFO: 2560 events read in total (251ms).
[19:24:57.643] <TB1> INFO: Test took 1603ms.
[19:24:57.649] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:24:58.209] <TB1> INFO: Expecting 2560 events.
[19:24:59.238] <TB1> INFO: 2560 events read in total (250ms).
[19:24:59.239] <TB1> INFO: Test took 1590ms.
[19:24:59.242] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:24:59.811] <TB1> INFO: Expecting 2560 events.
[19:25:00.842] <TB1> INFO: 2560 events read in total (252ms).
[19:25:00.842] <TB1> INFO: Test took 1601ms.
[19:25:00.846] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:01.414] <TB1> INFO: Expecting 2560 events.
[19:25:02.443] <TB1> INFO: 2560 events read in total (250ms).
[19:25:02.444] <TB1> INFO: Test took 1599ms.
[19:25:02.448] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:03.016] <TB1> INFO: Expecting 2560 events.
[19:25:04.049] <TB1> INFO: 2560 events read in total (254ms).
[19:25:04.049] <TB1> INFO: Test took 1601ms.
[19:25:04.052] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:04.626] <TB1> INFO: Expecting 2560 events.
[19:25:05.657] <TB1> INFO: 2560 events read in total (251ms).
[19:25:05.658] <TB1> INFO: Test took 1607ms.
[19:25:05.662] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:06.230] <TB1> INFO: Expecting 2560 events.
[19:25:07.260] <TB1> INFO: 2560 events read in total (251ms).
[19:25:07.264] <TB1> INFO: Test took 1602ms.
[19:25:07.269] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:07.837] <TB1> INFO: Expecting 2560 events.
[19:25:08.871] <TB1> INFO: 2560 events read in total (256ms).
[19:25:08.878] <TB1> INFO: Test took 1609ms.
[19:25:08.885] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:09.446] <TB1> INFO: Expecting 2560 events.
[19:25:10.475] <TB1> INFO: 2560 events read in total (250ms).
[19:25:10.481] <TB1> INFO: Test took 1596ms.
[19:25:10.493] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:11.048] <TB1> INFO: Expecting 2560 events.
[19:25:12.087] <TB1> INFO: 2560 events read in total (257ms).
[19:25:12.090] <TB1> INFO: Test took 1597ms.
[19:25:12.094] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:12.661] <TB1> INFO: Expecting 2560 events.
[19:25:13.690] <TB1> INFO: 2560 events read in total (250ms).
[19:25:13.690] <TB1> INFO: Test took 1596ms.
[19:25:13.698] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:14.264] <TB1> INFO: Expecting 2560 events.
[19:25:15.295] <TB1> INFO: 2560 events read in total (252ms).
[19:25:15.300] <TB1> INFO: Test took 1603ms.
[19:25:15.304] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:15.868] <TB1> INFO: Expecting 2560 events.
[19:25:16.898] <TB1> INFO: 2560 events read in total (252ms).
[19:25:16.904] <TB1> INFO: Test took 1600ms.
[19:25:16.908] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:17.477] <TB1> INFO: Expecting 2560 events.
[19:25:18.508] <TB1> INFO: 2560 events read in total (253ms).
[19:25:18.508] <TB1> INFO: Test took 1600ms.
[19:25:18.516] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:19.082] <TB1> INFO: Expecting 2560 events.
[19:25:20.108] <TB1> INFO: 2560 events read in total (248ms).
[19:25:20.108] <TB1> INFO: Test took 1593ms.
[19:25:20.115] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:20.681] <TB1> INFO: Expecting 2560 events.
[19:25:21.708] <TB1> INFO: 2560 events read in total (249ms).
[19:25:21.708] <TB1> INFO: Test took 1594ms.
[19:25:21.714] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:22.281] <TB1> INFO: Expecting 2560 events.
[19:25:23.309] <TB1> INFO: 2560 events read in total (249ms).
[19:25:23.310] <TB1> INFO: Test took 1596ms.
[19:25:23.316] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:23.883] <TB1> INFO: Expecting 2560 events.
[19:25:24.921] <TB1> INFO: 2560 events read in total (247ms).
[19:25:24.922] <TB1> INFO: Test took 1606ms.
[19:25:24.927] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:25.494] <TB1> INFO: Expecting 2560 events.
[19:25:26.521] <TB1> INFO: 2560 events read in total (248ms).
[19:25:26.522] <TB1> INFO: Test took 1595ms.
[19:25:26.529] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:27.094] <TB1> INFO: Expecting 2560 events.
[19:25:28.124] <TB1> INFO: 2560 events read in total (251ms).
[19:25:28.124] <TB1> INFO: Test took 1596ms.
[19:25:28.128] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:28.698] <TB1> INFO: Expecting 2560 events.
[19:25:29.727] <TB1> INFO: 2560 events read in total (250ms).
[19:25:29.732] <TB1> INFO: Test took 1604ms.
[19:25:29.736] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:30.300] <TB1> INFO: Expecting 2560 events.
[19:25:31.328] <TB1> INFO: 2560 events read in total (250ms).
[19:25:31.330] <TB1> INFO: Test took 1594ms.
[19:25:31.335] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:31.901] <TB1> INFO: Expecting 2560 events.
[19:25:32.929] <TB1> INFO: 2560 events read in total (250ms).
[19:25:32.934] <TB1> INFO: Test took 1599ms.
[19:25:32.939] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:33.503] <TB1> INFO: Expecting 2560 events.
[19:25:34.535] <TB1> INFO: 2560 events read in total (249ms).
[19:25:34.537] <TB1> INFO: Test took 1598ms.
[19:25:34.544] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:35.108] <TB1> INFO: Expecting 2560 events.
[19:25:36.137] <TB1> INFO: 2560 events read in total (250ms).
[19:25:36.142] <TB1> INFO: Test took 1599ms.
[19:25:36.145] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:36.709] <TB1> INFO: Expecting 2560 events.
[19:25:37.738] <TB1> INFO: 2560 events read in total (249ms).
[19:25:37.743] <TB1> INFO: Test took 1598ms.
[19:25:37.751] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:38.312] <TB1> INFO: Expecting 2560 events.
[19:25:39.340] <TB1> INFO: 2560 events read in total (250ms).
[19:25:39.340] <TB1> INFO: Test took 1589ms.
[19:25:39.346] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:39.921] <TB1> INFO: Expecting 2560 events.
[19:25:40.957] <TB1> INFO: 2560 events read in total (257ms).
[19:25:40.958] <TB1> INFO: Test took 1612ms.
[19:25:41.733] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 558 seconds
[19:25:41.733] <TB1> INFO: PH scale (per ROC): 79 73 79 74 77 73 77 79 80 76 78 84 80 80 78 65
[19:25:41.733] <TB1> INFO: PH offset (per ROC): 155 167 162 162 160 156 159 159 162 166 171 147 156 159 162 162
[19:25:41.748] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:25:41.748] <TB1> INFO: Decoding statistics:
[19:25:41.748] <TB1> INFO: General information:
[19:25:41.748] <TB1> INFO: 16bit words read: 66434
[19:25:41.748] <TB1> INFO: valid events total: 5120
[19:25:41.748] <TB1> INFO: empty events: 2623
[19:25:41.749] <TB1> INFO: valid events with pixels: 2497
[19:25:41.749] <TB1> INFO: valid pixel hits: 2497
[19:25:41.749] <TB1> INFO: Event errors: 0
[19:25:41.749] <TB1> INFO: start marker: 0
[19:25:41.749] <TB1> INFO: stop marker: 0
[19:25:41.749] <TB1> INFO: overflow: 0
[19:25:41.749] <TB1> INFO: invalid 5bit words: 0
[19:25:41.749] <TB1> INFO: invalid XOR eye diagram: 0
[19:25:41.749] <TB1> INFO: TBM errors: 0
[19:25:41.749] <TB1> INFO: flawed TBM headers: 0
[19:25:41.749] <TB1> INFO: flawed TBM trailers: 0
[19:25:41.749] <TB1> INFO: event ID mismatches: 0
[19:25:41.749] <TB1> INFO: ROC errors: 0
[19:25:41.749] <TB1> INFO: missing ROC header(s): 0
[19:25:41.749] <TB1> INFO: misplaced readback start: 0
[19:25:41.749] <TB1> INFO: Pixel decoding errors: 0
[19:25:41.749] <TB1> INFO: pixel data incomplete: 0
[19:25:41.749] <TB1> INFO: pixel address: 0
[19:25:41.749] <TB1> INFO: pulse height fill bit: 0
[19:25:41.749] <TB1> INFO: buffer corruption: 0
[19:25:42.069] <TB1> INFO: ######################################################################
[19:25:42.069] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[19:25:42.069] <TB1> INFO: ######################################################################
[19:25:42.091] <TB1> INFO: scanning low vcal = 10
[19:25:42.497] <TB1> INFO: Expecting 41600 events.
[19:25:45.939] <TB1> INFO: 41600 events read in total (2662ms).
[19:25:45.944] <TB1> INFO: Test took 3853ms.
[19:25:45.947] <TB1> INFO: scanning low vcal = 20
[19:25:46.512] <TB1> INFO: Expecting 41600 events.
[19:25:50.014] <TB1> INFO: 41600 events read in total (2723ms).
[19:25:50.015] <TB1> INFO: Test took 4068ms.
[19:25:50.017] <TB1> INFO: scanning low vcal = 30
[19:25:50.612] <TB1> INFO: Expecting 41600 events.
[19:25:54.194] <TB1> INFO: 41600 events read in total (2796ms).
[19:25:54.200] <TB1> INFO: Test took 4183ms.
[19:25:54.203] <TB1> INFO: scanning low vcal = 40
[19:25:54.724] <TB1> INFO: Expecting 41600 events.
[19:25:58.682] <TB1> INFO: 41600 events read in total (3180ms).
[19:25:58.689] <TB1> INFO: Test took 4486ms.
[19:25:58.698] <TB1> INFO: scanning low vcal = 50
[19:25:59.172] <TB1> INFO: Expecting 41600 events.
[19:26:03.174] <TB1> INFO: 41600 events read in total (3224ms).
[19:26:03.178] <TB1> INFO: Test took 4480ms.
[19:26:03.182] <TB1> INFO: scanning low vcal = 60
[19:26:03.639] <TB1> INFO: Expecting 41600 events.
[19:26:07.769] <TB1> INFO: 41600 events read in total (3351ms).
[19:26:07.782] <TB1> INFO: Test took 4600ms.
[19:26:07.786] <TB1> INFO: scanning low vcal = 70
[19:26:08.240] <TB1> INFO: Expecting 41600 events.
[19:26:12.303] <TB1> INFO: 41600 events read in total (3284ms).
[19:26:12.305] <TB1> INFO: Test took 4519ms.
[19:26:12.311] <TB1> INFO: scanning low vcal = 80
[19:26:12.807] <TB1> INFO: Expecting 41600 events.
[19:26:16.849] <TB1> INFO: 41600 events read in total (3263ms).
[19:26:16.874] <TB1> INFO: Test took 4563ms.
[19:26:16.884] <TB1> INFO: scanning low vcal = 90
[19:26:17.343] <TB1> INFO: Expecting 41600 events.
[19:26:21.657] <TB1> INFO: 41600 events read in total (3534ms).
[19:26:21.665] <TB1> INFO: Test took 4774ms.
[19:26:21.672] <TB1> INFO: scanning low vcal = 100
[19:26:22.248] <TB1> INFO: Expecting 41600 events.
[19:26:26.332] <TB1> INFO: 41600 events read in total (3303ms).
[19:26:26.333] <TB1> INFO: Test took 4660ms.
[19:26:26.340] <TB1> INFO: scanning low vcal = 110
[19:26:26.818] <TB1> INFO: Expecting 41600 events.
[19:26:30.909] <TB1> INFO: 41600 events read in total (3312ms).
[19:26:30.910] <TB1> INFO: Test took 4567ms.
[19:26:30.919] <TB1> INFO: scanning low vcal = 120
[19:26:31.383] <TB1> INFO: Expecting 41600 events.
[19:26:35.538] <TB1> INFO: 41600 events read in total (3377ms).
[19:26:35.540] <TB1> INFO: Test took 4621ms.
[19:26:35.548] <TB1> INFO: scanning low vcal = 130
[19:26:36.008] <TB1> INFO: Expecting 41600 events.
[19:26:40.136] <TB1> INFO: 41600 events read in total (3349ms).
[19:26:40.138] <TB1> INFO: Test took 4590ms.
[19:26:40.146] <TB1> INFO: scanning low vcal = 140
[19:26:40.791] <TB1> INFO: Expecting 41600 events.
[19:26:44.889] <TB1> INFO: 41600 events read in total (3320ms).
[19:26:44.895] <TB1> INFO: Test took 4749ms.
[19:26:44.899] <TB1> INFO: scanning low vcal = 150
[19:26:45.365] <TB1> INFO: Expecting 41600 events.
[19:26:49.669] <TB1> INFO: 41600 events read in total (3519ms).
[19:26:49.671] <TB1> INFO: Test took 4772ms.
[19:26:49.677] <TB1> INFO: scanning low vcal = 160
[19:26:50.133] <TB1> INFO: Expecting 41600 events.
[19:26:54.340] <TB1> INFO: 41600 events read in total (3429ms).
[19:26:54.342] <TB1> INFO: Test took 4665ms.
[19:26:54.348] <TB1> INFO: scanning low vcal = 170
[19:26:54.787] <TB1> INFO: Expecting 41600 events.
[19:26:58.825] <TB1> INFO: 41600 events read in total (3260ms).
[19:26:58.828] <TB1> INFO: Test took 4480ms.
[19:26:58.837] <TB1> INFO: scanning low vcal = 180
[19:26:59.246] <TB1> INFO: Expecting 41600 events.
[19:27:03.255] <TB1> INFO: 41600 events read in total (3230ms).
[19:27:03.256] <TB1> INFO: Test took 4419ms.
[19:27:03.263] <TB1> INFO: scanning low vcal = 190
[19:27:03.716] <TB1> INFO: Expecting 41600 events.
[19:27:07.753] <TB1> INFO: 41600 events read in total (3259ms).
[19:27:07.755] <TB1> INFO: Test took 4492ms.
[19:27:07.761] <TB1> INFO: scanning low vcal = 200
[19:27:08.230] <TB1> INFO: Expecting 41600 events.
[19:27:12.241] <TB1> INFO: 41600 events read in total (3233ms).
[19:27:12.242] <TB1> INFO: Test took 4481ms.
[19:27:12.249] <TB1> INFO: scanning low vcal = 210
[19:27:12.716] <TB1> INFO: Expecting 41600 events.
[19:27:16.709] <TB1> INFO: 41600 events read in total (3214ms).
[19:27:16.710] <TB1> INFO: Test took 4461ms.
[19:27:16.717] <TB1> INFO: scanning low vcal = 220
[19:27:17.187] <TB1> INFO: Expecting 41600 events.
[19:27:21.315] <TB1> INFO: 41600 events read in total (3349ms).
[19:27:21.321] <TB1> INFO: Test took 4603ms.
[19:27:21.327] <TB1> INFO: scanning low vcal = 230
[19:27:21.747] <TB1> INFO: Expecting 41600 events.
[19:27:25.795] <TB1> INFO: 41600 events read in total (3269ms).
[19:27:25.796] <TB1> INFO: Test took 4469ms.
[19:27:25.804] <TB1> INFO: scanning low vcal = 240
[19:27:26.265] <TB1> INFO: Expecting 41600 events.
[19:27:30.340] <TB1> INFO: 41600 events read in total (3295ms).
[19:27:30.341] <TB1> INFO: Test took 4538ms.
[19:27:30.348] <TB1> INFO: scanning low vcal = 250
[19:27:30.803] <TB1> INFO: Expecting 41600 events.
[19:27:34.943] <TB1> INFO: 41600 events read in total (3362ms).
[19:27:34.954] <TB1> INFO: Test took 4605ms.
[19:27:34.965] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[19:27:35.471] <TB1> INFO: Expecting 41600 events.
[19:27:39.548] <TB1> INFO: 41600 events read in total (3298ms).
[19:27:39.549] <TB1> INFO: Test took 4584ms.
[19:27:39.555] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[19:27:39.997] <TB1> INFO: Expecting 41600 events.
[19:27:44.041] <TB1> INFO: 41600 events read in total (3265ms).
[19:27:44.042] <TB1> INFO: Test took 4486ms.
[19:27:44.049] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[19:27:44.480] <TB1> INFO: Expecting 41600 events.
[19:27:48.556] <TB1> INFO: 41600 events read in total (3294ms).
[19:27:48.557] <TB1> INFO: Test took 4508ms.
[19:27:48.564] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[19:27:49.062] <TB1> INFO: Expecting 41600 events.
[19:27:53.273] <TB1> INFO: 41600 events read in total (3433ms).
[19:27:53.274] <TB1> INFO: Test took 4710ms.
[19:27:53.279] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[19:27:53.720] <TB1> INFO: Expecting 41600 events.
[19:27:57.748] <TB1> INFO: 41600 events read in total (3246ms).
[19:27:57.749] <TB1> INFO: Test took 4470ms.
[19:27:58.547] <TB1> INFO: PixTestGainPedestal::measure() done
[19:29:12.668] <TB1> INFO: PixTestGainPedestal::fit() done
[19:29:12.668] <TB1> INFO: non-linearity mean: 0.953 0.957 0.956 0.955 0.958 0.952 0.961 0.961 0.961 0.951 0.956 0.954 0.956 0.958 0.960 0.963
[19:29:12.668] <TB1> INFO: non-linearity RMS: 0.005 0.005 0.006 0.005 0.005 0.006 0.005 0.005 0.005 0.006 0.006 0.006 0.005 0.006 0.005 0.006
[19:29:12.668] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C0.dat
[19:29:12.704] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C1.dat
[19:29:12.740] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C2.dat
[19:29:12.777] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C3.dat
[19:29:12.814] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C4.dat
[19:29:12.847] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C5.dat
[19:29:12.884] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C6.dat
[19:29:12.915] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C7.dat
[19:29:12.950] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C8.dat
[19:29:12.985] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C9.dat
[19:29:13.023] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C10.dat
[19:29:13.058] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C11.dat
[19:29:13.088] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C12.dat
[19:29:13.122] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C13.dat
[19:29:13.157] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C14.dat
[19:29:13.192] <TB1> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C15.dat
[19:29:13.220] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 211 seconds
[19:29:13.220] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:29:13.220] <TB1> INFO: Decoding statistics:
[19:29:13.220] <TB1> INFO: General information:
[19:29:13.220] <TB1> INFO: 16bit words read: 2328814
[19:29:13.220] <TB1> INFO: valid events total: 83200
[19:29:13.220] <TB1> INFO: empty events: 0
[19:29:13.220] <TB1> INFO: valid events with pixels: 83200
[19:29:13.220] <TB1> INFO: valid pixel hits: 665207
[19:29:13.220] <TB1> INFO: Event errors: 0
[19:29:13.220] <TB1> INFO: start marker: 0
[19:29:13.220] <TB1> INFO: stop marker: 0
[19:29:13.220] <TB1> INFO: overflow: 0
[19:29:13.220] <TB1> INFO: invalid 5bit words: 0
[19:29:13.220] <TB1> INFO: invalid XOR eye diagram: 0
[19:29:13.220] <TB1> INFO: TBM errors: 0
[19:29:13.220] <TB1> INFO: flawed TBM headers: 0
[19:29:13.220] <TB1> INFO: flawed TBM trailers: 0
[19:29:13.220] <TB1> INFO: event ID mismatches: 0
[19:29:13.220] <TB1> INFO: ROC errors: 0
[19:29:13.220] <TB1> INFO: missing ROC header(s): 0
[19:29:13.220] <TB1> INFO: misplaced readback start: 0
[19:29:13.220] <TB1> INFO: Pixel decoding errors: 0
[19:29:13.220] <TB1> INFO: pixel data incomplete: 0
[19:29:13.220] <TB1> INFO: pixel address: 0
[19:29:13.220] <TB1> INFO: pulse height fill bit: 0
[19:29:13.220] <TB1> INFO: buffer corruption: 0
[19:29:13.234] <TB1> INFO: readReadbackCal: /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C0.dat .. /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C15.dat
[19:29:13.287] <TB1> INFO: ######################################################################
[19:29:13.287] <TB1> INFO: PixTestTrim::doTest()
[19:29:13.287] <TB1> INFO: ######################################################################
[19:29:13.291] <TB1> INFO: PixTestReadback::RES sent once
[19:29:26.042] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C0.dat
[19:29:26.042] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C1.dat
[19:29:26.043] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C2.dat
[19:29:26.043] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C3.dat
[19:29:26.044] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C4.dat
[19:29:26.044] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C5.dat
[19:29:26.044] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C6.dat
[19:29:26.044] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C7.dat
[19:29:26.044] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C8.dat
[19:29:26.044] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C9.dat
[19:29:26.044] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C10.dat
[19:29:26.048] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C11.dat
[19:29:26.048] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C12.dat
[19:29:26.049] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C13.dat
[19:29:26.049] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C14.dat
[19:29:26.049] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C15.dat
[19:29:26.086] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[19:29:26.087] <TB1> INFO: PixTestReadback::RES sent once
[19:29:38.870] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C0.dat
[19:29:38.871] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C1.dat
[19:29:38.871] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C2.dat
[19:29:38.871] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C3.dat
[19:29:38.871] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C4.dat
[19:29:38.871] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C5.dat
[19:29:38.871] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C6.dat
[19:29:38.871] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C7.dat
[19:29:38.871] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C8.dat
[19:29:38.872] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C9.dat
[19:29:38.872] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C10.dat
[19:29:38.872] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C11.dat
[19:29:38.872] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C12.dat
[19:29:38.872] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C13.dat
[19:29:38.872] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C14.dat
[19:29:38.872] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C15.dat
[19:29:38.913] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[19:29:38.913] <TB1> INFO: PixTestReadback::RES sent once
[19:29:48.786] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[19:29:48.786] <TB1> INFO: Vbg will be calibrated using Vd calibration
[19:29:48.786] <TB1> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 158.7calibrated Vbg = 1.1906 :::*/*/*/*/
[19:29:48.786] <TB1> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 162.6calibrated Vbg = 1.18887 :::*/*/*/*/
[19:29:48.786] <TB1> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 154.2calibrated Vbg = 1.19183 :::*/*/*/*/
[19:29:48.786] <TB1> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 154.3calibrated Vbg = 1.196 :::*/*/*/*/
[19:29:48.786] <TB1> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 154.3calibrated Vbg = 1.20183 :::*/*/*/*/
[19:29:48.786] <TB1> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 154.1calibrated Vbg = 1.20491 :::*/*/*/*/
[19:29:48.786] <TB1> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 154.9calibrated Vbg = 1.20826 :::*/*/*/*/
[19:29:48.787] <TB1> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 154calibrated Vbg = 1.20427 :::*/*/*/*/
[19:29:48.787] <TB1> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 150.4calibrated Vbg = 1.20609 :::*/*/*/*/
[19:29:48.787] <TB1> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 153.1calibrated Vbg = 1.1978 :::*/*/*/*/
[19:29:48.787] <TB1> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 167.3calibrated Vbg = 1.20228 :::*/*/*/*/
[19:29:48.787] <TB1> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 146.1calibrated Vbg = 1.20199 :::*/*/*/*/
[19:29:48.787] <TB1> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 155.7calibrated Vbg = 1.19673 :::*/*/*/*/
[19:29:48.787] <TB1> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 162.6calibrated Vbg = 1.19662 :::*/*/*/*/
[19:29:48.787] <TB1> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 159calibrated Vbg = 1.19118 :::*/*/*/*/
[19:29:48.787] <TB1> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 155.4calibrated Vbg = 1.1958 :::*/*/*/*/
[19:29:48.790] <TB1> INFO: PixTestReadback::RES sent once
[19:33:00.361] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C0.dat
[19:33:00.361] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C1.dat
[19:33:00.362] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C2.dat
[19:33:00.362] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C3.dat
[19:33:00.362] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C4.dat
[19:33:00.362] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C5.dat
[19:33:00.362] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C6.dat
[19:33:00.362] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C7.dat
[19:33:00.362] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C8.dat
[19:33:00.362] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C9.dat
[19:33:00.363] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C10.dat
[19:33:00.363] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C11.dat
[19:33:00.363] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C12.dat
[19:33:00.363] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C13.dat
[19:33:00.363] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C14.dat
[19:33:00.363] <TB1> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3513_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C15.dat
[19:33:00.407] <TB1> INFO: PixTestPattern:: pg_setup set to default.
[19:33:00.409] <TB1> INFO: PixTestReadback::doTest() done
[19:33:00.410] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:33:00.410] <TB1> INFO: Decoding statistics:
[19:33:00.410] <TB1> INFO: General information:
[19:33:00.410] <TB1> INFO: 16bit words read: 768
[19:33:00.410] <TB1> INFO: valid events total: 64
[19:33:00.410] <TB1> INFO: empty events: 64
[19:33:00.410] <TB1> INFO: valid events with pixels: 0
[19:33:00.410] <TB1> INFO: valid pixel hits: 0
[19:33:00.410] <TB1> INFO: Event errors: 0
[19:33:00.410] <TB1> INFO: start marker: 0
[19:33:00.410] <TB1> INFO: stop marker: 0
[19:33:00.410] <TB1> INFO: overflow: 0
[19:33:00.410] <TB1> INFO: invalid 5bit words: 0
[19:33:00.410] <TB1> INFO: invalid XOR eye diagram: 0
[19:33:00.410] <TB1> INFO: TBM errors: 0
[19:33:00.410] <TB1> INFO: flawed TBM headers: 0
[19:33:00.410] <TB1> INFO: flawed TBM trailers: 0
[19:33:00.410] <TB1> INFO: event ID mismatches: 0
[19:33:00.410] <TB1> INFO: ROC errors: 0
[19:33:00.410] <TB1> INFO: missing ROC header(s): 0
[19:33:00.410] <TB1> INFO: misplaced readback start: 0
[19:33:00.410] <TB1> INFO: Pixel decoding errors: 0
[19:33:00.410] <TB1> INFO: pixel data incomplete: 0
[19:33:00.410] <TB1> INFO: pixel address: 0
[19:33:00.410] <TB1> INFO: pulse height fill bit: 0
[19:33:00.410] <TB1> INFO: buffer corruption: 0
[19:33:00.439] <TB1> INFO: Decoding statistics:
[19:33:00.439] <TB1> INFO: General information:
[19:33:00.439] <TB1> INFO: 16bit words read: 9550786
[19:33:00.439] <TB1> INFO: valid events total: 551744
[19:33:00.439] <TB1> INFO: empty events: 302427
[19:33:00.439] <TB1> INFO: valid events with pixels: 249317
[19:33:00.439] <TB1> INFO: valid pixel hits: 1464929
[19:33:00.440] <TB1> INFO: Event errors: 0
[19:33:00.440] <TB1> INFO: start marker: 0
[19:33:00.440] <TB1> INFO: stop marker: 0
[19:33:00.440] <TB1> INFO: overflow: 0
[19:33:00.440] <TB1> INFO: invalid 5bit words: 0
[19:33:00.440] <TB1> INFO: invalid XOR eye diagram: 0
[19:33:00.440] <TB1> INFO: TBM errors: 0
[19:33:00.440] <TB1> INFO: flawed TBM headers: 0
[19:33:00.440] <TB1> INFO: flawed TBM trailers: 0
[19:33:00.440] <TB1> INFO: event ID mismatches: 0
[19:33:00.440] <TB1> INFO: ROC errors: 0
[19:33:00.440] <TB1> INFO: missing ROC header(s): 0
[19:33:00.440] <TB1> INFO: misplaced readback start: 0
[19:33:00.440] <TB1> INFO: Pixel decoding errors: 0
[19:33:00.440] <TB1> INFO: pixel data incomplete: 0
[19:33:00.440] <TB1> INFO: pixel address: 0
[19:33:00.440] <TB1> INFO: pulse height fill bit: 0
[19:33:00.440] <TB1> INFO: buffer corruption: 0
[19:33:00.440] <TB1> INFO: enter test to run
[19:33:00.440] <TB1> INFO: test: no parameter change
[19:33:00.729] <TB1> QUIET: Connection to board 129 closed.
[19:33:00.735] <TB1> INFO: pXar: this is the end, my friend