[18:12:08.277] <TB0> INFO: *** Welcome to pxar ***
[18:12:08.277] <TB0> INFO: *** Today: 2015/10/29
[18:12:08.515] <TB0> INFO: *** Version: 9da6-dirty
[18:12:08.515] <TB0> INFO: readRocDacs: /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C0.dat .. /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C15.dat
[18:12:08.516] <TB0> INFO: readTbmDacs: /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//tbmParameters_C0a.dat .. /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//tbmParameters_C0b.dat
[18:12:08.517] <TB0> INFO: readMaskFile: /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//defaultMaskFile.dat
[18:12:08.517] <TB0> INFO: readTrimFile: /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters_C0.dat .. /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters_C15.dat
[18:12:08.651] <TB0> INFO: clk: 4
[18:12:08.651] <TB0> INFO: ctr: 4
[18:12:08.651] <TB0> INFO: sda: 19
[18:12:08.652] <TB0> INFO: tin: 9
[18:12:08.652] <TB0> INFO: level: 15
[18:12:08.652] <TB0> INFO: triggerdelay: 0
[18:12:08.652] <TB0> QUIET: Instanciating API for pxar prod-11
[18:12:08.652] <TB0> INFO: Log level: INFO
[18:12:08.660] <TB0> INFO: Found DTB DTB_WWVBIQ
[18:12:08.667] <TB0> QUIET: Connection to board DTB_WWVBIQ opened.
[18:12:08.671] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 127
HW version: DTB1.2
FW version: 4.2
SW version: 4.4
USB id: DTB_WWVBIQ
MAC address: 40D85511807F
Hostname: pixelDTB127
Comment:
------------------------------------------------------
[18:12:08.675] <TB0> INFO: RPC call hashes of host and DTB match: 397073690
[18:12:10.222] <TB0> INFO: DUT info:
[18:12:10.222] <TB0> INFO: The DUT currently contains the following objects:
[18:12:10.223] <TB0> INFO: 2 TBM Cores tbm08c (2 ON)
[18:12:10.223] <TB0> INFO: TBM Core alpha (0): 7 registers set
[18:12:10.223] <TB0> INFO: TBM Core beta (1): 7 registers set
[18:12:10.223] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[18:12:10.223] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:10.223] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:10.223] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:10.223] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:10.223] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:10.223] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:10.223] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:10.223] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:10.223] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:10.223] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:10.223] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:10.223] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:10.223] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:10.223] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:10.223] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:10.223] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[18:12:10.626] <TB0> INFO: enter 'restricted' command line mode
[18:12:10.627] <TB0> INFO: enter test to run
[18:12:10.627] <TB0> INFO: test: FullTest no parameter change
[18:12:10.627] <TB0> INFO: running: fulltest
[18:12:10.633] <TB0> INFO: ######################################################################
[18:12:10.633] <TB0> INFO: PixTestFullTest::doTest()
[18:12:10.633] <TB0> INFO: ######################################################################
[18:12:10.637] <TB0> INFO: ######################################################################
[18:12:10.637] <TB0> INFO: PixTestPretest::doTest()
[18:12:10.637] <TB0> INFO: ######################################################################
[18:12:10.639] <TB0> INFO: ----------------------------------------------------------------------
[18:12:10.639] <TB0> INFO: PixTestPretest::programROC()
[18:12:10.639] <TB0> INFO: ----------------------------------------------------------------------
[18:12:28.656] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[18:12:28.657] <TB0> INFO: IA differences per ROC: 16.9 16.1 17.7 16.9 16.1 15.3 16.1 15.3 19.3 15.3 17.7 16.9 18.5 17.7 16.9 17.7
[18:12:28.857] <TB0> INFO: ----------------------------------------------------------------------
[18:12:28.857] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[18:12:28.857] <TB0> INFO: ----------------------------------------------------------------------
[18:12:48.433] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 391.5 mA = 24.4688 mA/ROC
[18:12:48.437] <TB0> INFO: ----------------------------------------------------------------------
[18:12:48.437] <TB0> INFO: PixTestPretest::findTiming()
[18:12:48.437] <TB0> INFO: ----------------------------------------------------------------------
[18:12:48.437] <TB0> INFO: PixTestCmd::init()
[18:12:49.033] <TB0> WARNING: Not unmasking DUT, not setting Calibrate bits!
[18:14:38.485] <TB0> INFO: TBM phases: 160MHz: 4, 400MHz: 6, TBM delays: ROC(0/1):3, header/trailer: 1, token: 0
[18:14:38.485] <TB0> INFO: (success/tries = 100/100), width = 4
[18:14:38.491] <TB0> INFO: ----------------------------------------------------------------------
[18:14:38.491] <TB0> INFO: PixTestPretest::findWorkingPixel()
[18:14:38.491] <TB0> INFO: ----------------------------------------------------------------------
[18:14:38.638] <TB0> INFO: Expecting 231680 events.
[18:14:43.325] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L484> Channel 0 Number of ROCs (1) != Token Chain Length (8)
[18:14:43.333] <TB0> ERROR: <datapipe.cc/CheckEventID:L457> Channel 0 Event ID mismatch: local ID (21) != TBM ID (2)
[18:14:46.397] <TB0> INFO: 231680 events read in total (7043ms).
[18:14:46.409] <TB0> INFO: Test took 7914ms.
[18:14:46.805] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[18:14:46.850] <TB0> INFO: ----------------------------------------------------------------------
[18:14:46.850] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[18:14:46.850] <TB0> INFO: ----------------------------------------------------------------------
[18:14:47.007] <TB0> INFO: Expecting 231680 events.
[18:14:54.620] <TB0> INFO: 231680 events read in total (6897ms).
[18:14:54.647] <TB0> INFO: Test took 7790ms.
[18:14:54.984] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[18:14:54.984] <TB0> INFO: CalDel: 101 125 153 129 123 87 117 118 125 143 123 124 135 137 130 110
[18:14:54.984] <TB0> INFO: VthrComp: 52 51 56 53 52 52 51 53 51 52 51 52 55 53 51 62
[18:14:54.991] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C0.dat
[18:14:54.991] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C1.dat
[18:14:54.992] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C2.dat
[18:14:54.994] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C3.dat
[18:14:54.995] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C4.dat
[18:14:54.996] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C5.dat
[18:14:54.996] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C6.dat
[18:14:54.997] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C7.dat
[18:14:54.998] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C8.dat
[18:14:54.998] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C9.dat
[18:14:54.999] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C10.dat
[18:14:54.999] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C11.dat
[18:14:54.000] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C12.dat
[18:14:54.001] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C13.dat
[18:14:55.001] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C14.dat
[18:14:55.002] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters_C15.dat
[18:14:55.007] <TB0> INFO: write tbm parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//tbmParameters_C0a.dat
[18:14:55.007] <TB0> INFO: write tbm parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//tbmParameters_C0b.dat
[18:14:55.007] <TB0> INFO: PixTestPretest::doTest() done, duration: 164 seconds
[18:14:55.007] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:14:55.007] <TB0> INFO: Decoding statistics:
[18:14:55.007] <TB0> INFO: General information:
[18:14:55.007] <TB0> INFO: 16bit words read: 7199490
[18:14:55.007] <TB0> INFO: valid events total: 463360
[18:14:55.007] <TB0> INFO: empty events: 260819
[18:14:55.007] <TB0> INFO: valid events with pixels: 202541
[18:14:55.007] <TB0> INFO: valid pixel hits: 819585
[18:14:55.007] <TB0> INFO: Event errors: 0
[18:14:55.007] <TB0> INFO: start marker: 0
[18:14:55.007] <TB0> INFO: stop marker: 0
[18:14:55.007] <TB0> INFO: overflow: 0
[18:14:55.007] <TB0> INFO: invalid 5bit words: 0
[18:14:55.007] <TB0> INFO: invalid XOR eye diagram: 0
[18:14:55.007] <TB0> INFO: TBM errors: 0
[18:14:55.007] <TB0> INFO: flawed TBM headers: 0
[18:14:55.007] <TB0> INFO: flawed TBM trailers: 0
[18:14:55.007] <TB0> INFO: event ID mismatches: 0
[18:14:55.007] <TB0> INFO: ROC errors: 0
[18:14:55.007] <TB0> INFO: missing ROC header(s): 0
[18:14:55.007] <TB0> INFO: misplaced readback start: 0
[18:14:55.007] <TB0> INFO: Pixel decoding errors: 0
[18:14:55.007] <TB0> INFO: pixel data incomplete: 0
[18:14:55.007] <TB0> INFO: pixel address: 0
[18:14:55.007] <TB0> INFO: pulse height fill bit: 0
[18:14:55.007] <TB0> INFO: buffer corruption: 0
[18:14:55.187] <TB0> INFO: ######################################################################
[18:14:55.187] <TB0> INFO: PixTestAlive::doTest()
[18:14:55.187] <TB0> INFO: ######################################################################
[18:14:55.189] <TB0> INFO: ----------------------------------------------------------------------
[18:14:55.189] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:14:55.189] <TB0> INFO: ----------------------------------------------------------------------
[18:14:55.589] <TB0> INFO: Expecting 41600 events.
[18:15:00.158] <TB0> INFO: 41600 events read in total (3854ms).
[18:15:00.163] <TB0> INFO: Test took 4964ms.
[18:15:00.184] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:15:00.522] <TB0> INFO: PixTestAlive::aliveTest() done
[18:15:00.522] <TB0> INFO: number of dead pixels (per ROC): 2 3 0 3 0 0 3 0 0 1 0 0 1 0 1 2
[18:15:00.524] <TB0> INFO: ----------------------------------------------------------------------
[18:15:00.524] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:15:00.524] <TB0> INFO: ----------------------------------------------------------------------
[18:15:00.927] <TB0> INFO: Expecting 41600 events.
[18:15:04.008] <TB0> INFO: 41600 events read in total (2366ms).
[18:15:04.008] <TB0> INFO: Test took 3483ms.
[18:15:04.008] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:15:04.009] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[18:15:04.411] <TB0> INFO: PixTestAlive::maskTest() done
[18:15:04.411] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[18:15:04.415] <TB0> INFO: ----------------------------------------------------------------------
[18:15:04.416] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[18:15:04.416] <TB0> INFO: ----------------------------------------------------------------------
[18:15:04.815] <TB0> INFO: Expecting 41600 events.
[18:15:09.200] <TB0> INFO: 41600 events read in total (3669ms).
[18:15:09.202] <TB0> INFO: Test took 4785ms.
[18:15:09.214] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:15:09.595] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[18:15:09.595] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[18:15:09.595] <TB0> INFO: PixTestAlive::doTest() done, duration: 14 seconds
[18:15:09.595] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:15:09.595] <TB0> INFO: Decoding statistics:
[18:15:09.595] <TB0> INFO: General information:
[18:15:09.595] <TB0> INFO: 16bit words read: 0
[18:15:09.595] <TB0> INFO: valid events total: 0
[18:15:09.596] <TB0> INFO: empty events: 0
[18:15:09.596] <TB0> INFO: valid events with pixels: 0
[18:15:09.596] <TB0> INFO: valid pixel hits: 0
[18:15:09.596] <TB0> INFO: Event errors: 0
[18:15:09.596] <TB0> INFO: start marker: 0
[18:15:09.596] <TB0> INFO: stop marker: 0
[18:15:09.596] <TB0> INFO: overflow: 0
[18:15:09.596] <TB0> INFO: invalid 5bit words: 0
[18:15:09.596] <TB0> INFO: invalid XOR eye diagram: 0
[18:15:09.596] <TB0> INFO: TBM errors: 0
[18:15:09.596] <TB0> INFO: flawed TBM headers: 0
[18:15:09.596] <TB0> INFO: flawed TBM trailers: 0
[18:15:09.596] <TB0> INFO: event ID mismatches: 0
[18:15:09.596] <TB0> INFO: ROC errors: 0
[18:15:09.597] <TB0> INFO: missing ROC header(s): 0
[18:15:09.597] <TB0> INFO: misplaced readback start: 0
[18:15:09.597] <TB0> INFO: Pixel decoding errors: 0
[18:15:09.597] <TB0> INFO: pixel data incomplete: 0
[18:15:09.597] <TB0> INFO: pixel address: 0
[18:15:09.597] <TB0> INFO: pulse height fill bit: 0
[18:15:09.597] <TB0> INFO: buffer corruption: 0
[18:15:09.611] <TB0> INFO: ######################################################################
[18:15:09.611] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[18:15:09.611] <TB0> INFO: ######################################################################
[18:15:09.618] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[18:15:09.652] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[18:15:09.652] <TB0> INFO: run 1 of 1
[18:15:10.049] <TB0> INFO: Expecting 3120000 events.
[18:16:00.945] <TB0> INFO: 1295775 events read in total (50180ms).
[18:16:51.742] <TB0> INFO: 2569525 events read in total (100977ms).
[18:17:19.227] <TB0> INFO: 3120000 events read in total (128463ms).
[18:17:19.384] <TB0> INFO: Test took 129733ms.
[18:17:19.568] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:18:19.304] <TB0> INFO: PixTestBBMap::doTest() done, duration: 189 seconds
[18:18:19.304] <TB0> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[18:18:19.305] <TB0> INFO: separation cut (per ROC): 150 147 145 147 140 152 138 149 147 142 141 148 145 148 137 163
[18:18:19.310] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:18:19.310] <TB0> INFO: Decoding statistics:
[18:18:19.310] <TB0> INFO: General information:
[18:18:19.310] <TB0> INFO: 16bit words read: 0
[18:18:19.313] <TB0> INFO: valid events total: 0
[18:18:19.313] <TB0> INFO: empty events: 0
[18:18:19.316] <TB0> INFO: valid events with pixels: 0
[18:18:19.316] <TB0> INFO: valid pixel hits: 0
[18:18:19.316] <TB0> INFO: Event errors: 0
[18:18:19.316] <TB0> INFO: start marker: 0
[18:18:19.316] <TB0> INFO: stop marker: 0
[18:18:19.320] <TB0> INFO: overflow: 0
[18:18:19.320] <TB0> INFO: invalid 5bit words: 0
[18:18:19.320] <TB0> INFO: invalid XOR eye diagram: 0
[18:18:19.320] <TB0> INFO: TBM errors: 0
[18:18:19.320] <TB0> INFO: flawed TBM headers: 0
[18:18:19.320] <TB0> INFO: flawed TBM trailers: 0
[18:18:19.320] <TB0> INFO: event ID mismatches: 0
[18:18:19.320] <TB0> INFO: ROC errors: 0
[18:18:19.320] <TB0> INFO: missing ROC header(s): 0
[18:18:19.320] <TB0> INFO: misplaced readback start: 0
[18:18:19.320] <TB0> INFO: Pixel decoding errors: 0
[18:18:19.320] <TB0> INFO: pixel data incomplete: 0
[18:18:19.320] <TB0> INFO: pixel address: 0
[18:18:19.320] <TB0> INFO: pulse height fill bit: 0
[18:18:19.320] <TB0> INFO: buffer corruption: 0
[18:18:19.494] <TB0> INFO: ######################################################################
[18:18:19.494] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[18:18:19.494] <TB0> INFO: ######################################################################
[18:18:19.494] <TB0> INFO: ----------------------------------------------------------------------
[18:18:19.494] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[18:18:19.494] <TB0> INFO: ----------------------------------------------------------------------
[18:18:19.495] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[18:18:19.524] <TB0> INFO: dacScan split into 1 runs with ntrig = 50
[18:18:19.524] <TB0> INFO: run 1 of 1
[18:18:20.035] <TB0> INFO: Expecting 26208000 events.
[18:19:00.057] <TB0> INFO: 1354650 events read in total (39307ms).
[18:19:38.904] <TB0> INFO: 2675150 events read in total (78154ms).
[18:20:17.723] <TB0> INFO: 3983900 events read in total (116973ms).
[18:20:56.549] <TB0> INFO: 5295650 events read in total (155799ms).
[18:21:41.163] <TB0> INFO: 6603150 events read in total (200413ms).
[18:22:22.738] <TB0> INFO: 7905850 events read in total (241988ms).
[18:23:01.708] <TB0> INFO: 9210500 events read in total (280958ms).
[18:23:40.446] <TB0> INFO: 10507250 events read in total (319696ms).
[18:24:19.194] <TB0> INFO: 11804250 events read in total (358444ms).
[18:24:58.127] <TB0> INFO: 13096550 events read in total (397377ms).
[18:25:37.058] <TB0> INFO: 14368250 events read in total (436308ms).
[18:26:16.020] <TB0> INFO: 15636300 events read in total (475270ms).
[18:26:54.853] <TB0> INFO: 16901050 events read in total (514103ms).
[18:27:33.925] <TB0> INFO: 18164800 events read in total (553175ms).
[18:28:18.554] <TB0> INFO: 19427500 events read in total (597804ms).
[18:28:58.015] <TB0> INFO: 20688450 events read in total (637265ms).
[18:29:40.164] <TB0> INFO: 21947900 events read in total (679414ms).
[18:30:19.782] <TB0> INFO: 23209000 events read in total (719032ms).
[18:30:59.344] <TB0> INFO: 24468050 events read in total (758594ms).
[18:31:38.848] <TB0> INFO: 25732400 events read in total (798098ms).
[18:31:52.517] <TB0> INFO: 26208000 events read in total (811767ms).
[18:31:52.591] <TB0> INFO: Test took 813067ms.
[18:31:52.716] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:31:53.064] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:31:55.999] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:31:58.909] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:32:01.809] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:32:04.663] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:32:07.724] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:32:10.778] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:32:13.970] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:32:18.720] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:32:23.178] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:32:27.597] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:32:31.808] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:32:35.202] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:32:38.359] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:32:41.463] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:32:45.977] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[18:32:49.341] <TB0> INFO: PixTestScurves::scurves() done
[18:32:49.347] <TB0> INFO: Vcal mean: 113.05 116.70 117.16 113.89 110.50 120.71 107.24 116.39 107.30 112.31 114.71 114.11 118.42 119.07 106.54 127.21
[18:32:49.369] <TB0> INFO: Vcal RMS: 5.89 7.14 8.50 6.81 5.10 6.04 6.11 6.31 5.41 5.71 5.64 5.70 6.24 6.60 5.45 8.03
[18:32:49.375] <TB0> INFO: PixTestScurves::fullTest() done, duration: 869 seconds
[18:32:49.382] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:32:49.383] <TB0> INFO: Decoding statistics:
[18:32:49.383] <TB0> INFO: General information:
[18:32:49.383] <TB0> INFO: 16bit words read: 0
[18:32:49.383] <TB0> INFO: valid events total: 0
[18:32:49.383] <TB0> INFO: empty events: 0
[18:32:49.383] <TB0> INFO: valid events with pixels: 0
[18:32:49.383] <TB0> INFO: valid pixel hits: 0
[18:32:49.383] <TB0> INFO: Event errors: 0
[18:32:49.383] <TB0> INFO: start marker: 0
[18:32:49.383] <TB0> INFO: stop marker: 0
[18:32:49.383] <TB0> INFO: overflow: 0
[18:32:49.383] <TB0> INFO: invalid 5bit words: 0
[18:32:49.383] <TB0> INFO: invalid XOR eye diagram: 0
[18:32:49.383] <TB0> INFO: TBM errors: 0
[18:32:49.383] <TB0> INFO: flawed TBM headers: 0
[18:32:49.387] <TB0> INFO: flawed TBM trailers: 0
[18:32:49.396] <TB0> INFO: event ID mismatches: 0
[18:32:49.396] <TB0> INFO: ROC errors: 0
[18:32:49.396] <TB0> INFO: missing ROC header(s): 0
[18:32:49.396] <TB0> INFO: misplaced readback start: 0
[18:32:49.396] <TB0> INFO: Pixel decoding errors: 0
[18:32:49.397] <TB0> INFO: pixel data incomplete: 0
[18:32:49.397] <TB0> INFO: pixel address: 0
[18:32:49.397] <TB0> INFO: pulse height fill bit: 0
[18:32:49.403] <TB0> INFO: buffer corruption: 0
[18:32:49.686] <TB0> INFO: ######################################################################
[18:32:49.694] <TB0> INFO: PixTestTrim::doTest()
[18:32:49.699] <TB0> INFO: ######################################################################
[18:32:49.726] <TB0> INFO: ----------------------------------------------------------------------
[18:32:49.737] <TB0> INFO: PixTestTrim::trimTest() ntrig = 8, vcal = 35
[18:32:49.745] <TB0> INFO: ----------------------------------------------------------------------
[18:32:49.983] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[18:32:49.983] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:32:50.016] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:32:50.027] <TB0> INFO: run 1 of 1
[18:32:50.603] <TB0> INFO: Expecting 5025280 events.
[18:33:41.352] <TB0> INFO: 1472184 events read in total (50028ms).
[18:34:28.355] <TB0> INFO: 2934016 events read in total (97031ms).
[18:35:15.238] <TB0> INFO: 4375112 events read in total (143915ms).
[18:35:37.390] <TB0> INFO: 5025280 events read in total (166066ms).
[18:35:37.455] <TB0> INFO: Test took 167427ms.
[18:35:37.538] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:36:26.274] <TB0> INFO: ROC 0 VthrComp = 112
[18:36:26.278] <TB0> INFO: ROC 1 VthrComp = 110
[18:36:26.278] <TB0> INFO: ROC 2 VthrComp = 111
[18:36:26.278] <TB0> INFO: ROC 3 VthrComp = 109
[18:36:26.278] <TB0> INFO: ROC 4 VthrComp = 110
[18:36:26.278] <TB0> INFO: ROC 5 VthrComp = 111
[18:36:26.278] <TB0> INFO: ROC 6 VthrComp = 107
[18:36:26.278] <TB0> INFO: ROC 7 VthrComp = 111
[18:36:26.278] <TB0> INFO: ROC 8 VthrComp = 110
[18:36:26.279] <TB0> INFO: ROC 9 VthrComp = 108
[18:36:26.279] <TB0> INFO: ROC 10 VthrComp = 108
[18:36:26.279] <TB0> INFO: ROC 11 VthrComp = 112
[18:36:26.279] <TB0> INFO: ROC 12 VthrComp = 110
[18:36:26.280] <TB0> INFO: ROC 13 VthrComp = 110
[18:36:26.280] <TB0> INFO: ROC 14 VthrComp = 105
[18:36:26.281] <TB0> INFO: ROC 15 VthrComp = 78
[18:36:26.281] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[18:36:26.281] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 8 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[18:36:26.309] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:36:26.309] <TB0> INFO: run 1 of 1
[18:36:26.865] <TB0> INFO: Expecting 5025280 events.
[18:37:07.947] <TB0> INFO: 917896 events read in total (40350ms).
[18:37:46.245] <TB0> INFO: 1833488 events read in total (78648ms).
[18:38:24.599] <TB0> INFO: 2746112 events read in total (117003ms).
[18:39:08.222] <TB0> INFO: 3646224 events read in total (160625ms).
[18:39:46.959] <TB0> INFO: 4542760 events read in total (199362ms).
[18:40:07.580] <TB0> INFO: 5025280 events read in total (219983ms).
[18:40:07.722] <TB0> INFO: Test took 221412ms.
[18:40:08.027] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:41:09.751] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 64.7581 for pixel 51/79 mean/min/max = 49.8821/34.9708/64.7934
[18:41:09.752] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 68.1494 for pixel 8/18 mean/min/max = 51.6886/35.1605/68.2166
[18:41:09.754] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 72.7971 for pixel 1/7 mean/min/max = 53.4783/34.1196/72.8369
[18:41:09.758] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 69.0819 for pixel 5/72 mean/min/max = 52.3453/35.1704/69.5201
[18:41:09.761] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 61.878 for pixel 6/3 mean/min/max = 47.8914/33.8079/61.9749
[18:41:09.765] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 75.5193 for pixel 17/10 mean/min/max = 57.8176/40.0311/75.6041
[18:41:09.769] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 63.8433 for pixel 12/53 mean/min/max = 48.8211/33.7052/63.937
[18:41:09.774] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 72.8068 for pixel 0/21 mean/min/max = 55.1961/37.5515/72.8408
[18:41:09.775] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 64.2599 for pixel 23/18 mean/min/max = 49.4639/34.6343/64.2936
[18:41:09.779] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 66.9959 for pixel 10/1 mean/min/max = 50.82/34.6292/67.0107
[18:41:09.780] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 69.3515 for pixel 0/76 mean/min/max = 53.1237/36.3026/69.9449
[18:41:09.780] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 64.7722 for pixel 23/74 mean/min/max = 49.0264/33.1986/64.8543
[18:41:09.781] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 73.2937 for pixel 1/67 mean/min/max = 55.7106/37.8392/73.582
[18:41:09.803] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 74.5487 for pixel 51/79 mean/min/max = 57.0951/39.0095/75.1807
[18:41:09.815] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 62.5559 for pixel 5/63 mean/min/max = 48.3986/34.0015/62.7957
[18:41:09.827] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 125.085 for pixel 51/50 mean/min/max = 106.879/88.3238/125.435
[18:41:09.831] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[18:41:09.992] <TB0> INFO: Expecting 411648 events.
[18:41:19.012] <TB0> INFO: 411648 events read in total (8305ms).
[18:41:19.055] <TB0> INFO: Expecting 411648 events.
[18:41:27.781] <TB0> INFO: 411648 events read in total (8179ms).
[18:41:27.820] <TB0> INFO: Expecting 411648 events.
[18:41:37.122] <TB0> INFO: 411648 events read in total (8773ms).
[18:41:37.147] <TB0> INFO: Expecting 411648 events.
[18:41:45.659] <TB0> INFO: 411648 events read in total (7918ms).
[18:41:45.683] <TB0> INFO: Expecting 411648 events.
[18:41:54.313] <TB0> INFO: 411648 events read in total (8007ms).
[18:41:54.365] <TB0> INFO: Expecting 411648 events.
[18:42:03.306] <TB0> INFO: 411648 events read in total (8340ms).
[18:42:03.345] <TB0> INFO: Expecting 411648 events.
[18:42:11.978] <TB0> INFO: 411648 events read in total (8029ms).
[18:42:12.020] <TB0> INFO: Expecting 411648 events.
[18:42:20.714] <TB0> INFO: 411648 events read in total (8078ms).
[18:42:20.761] <TB0> INFO: Expecting 411648 events.
[18:42:29.456] <TB0> INFO: 411648 events read in total (8106ms).
[18:42:29.501] <TB0> INFO: Expecting 411648 events.
[18:42:38.200] <TB0> INFO: 411648 events read in total (8099ms).
[18:42:38.253] <TB0> INFO: Expecting 411648 events.
[18:42:46.895] <TB0> INFO: 411648 events read in total (8048ms).
[18:42:46.957] <TB0> INFO: Expecting 411648 events.
[18:42:55.603] <TB0> INFO: 411648 events read in total (8065ms).
[18:42:55.676] <TB0> INFO: Expecting 411648 events.
[18:43:04.397] <TB0> INFO: 411648 events read in total (8139ms).
[18:43:04.471] <TB0> INFO: Expecting 411648 events.
[18:43:13.175] <TB0> INFO: 411648 events read in total (8128ms).
[18:43:13.238] <TB0> INFO: Expecting 411648 events.
[18:43:21.894] <TB0> INFO: 411648 events read in total (8061ms).
[18:43:21.976] <TB0> INFO: Expecting 411648 events.
[18:43:30.637] <TB0> INFO: 411648 events read in total (8086ms).
[18:43:30.730] <TB0> INFO: Test took 140899ms.
[18:43:32.325] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 8 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[18:43:32.344] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:43:32.344] <TB0> INFO: run 1 of 1
[18:43:32.711] <TB0> INFO: Expecting 5025280 events.
[18:44:09.504] <TB0> INFO: 881720 events read in total (36078ms).
[18:44:47.905] <TB0> INFO: 1762312 events read in total (74479ms).
[18:45:25.871] <TB0> INFO: 2641264 events read in total (112446ms).
[18:46:04.129] <TB0> INFO: 3508864 events read in total (150704ms).
[18:46:42.767] <TB0> INFO: 4371696 events read in total (189341ms).
[18:47:12.863] <TB0> INFO: 5025280 events read in total (219437ms).
[18:47:12.998] <TB0> INFO: Test took 220654ms.
[18:47:13.289] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:48:05.819] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.213921 .. 255.000000
[18:48:06.054] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 8 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[18:48:06.085] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:48:06.085] <TB0> INFO: run 1 of 1
[18:48:06.615] <TB0> INFO: Expecting 8519680 events.
[18:48:52.882] <TB0> INFO: 825648 events read in total (45547ms).
[18:49:30.311] <TB0> INFO: 1651304 events read in total (82977ms).
[18:50:07.893] <TB0> INFO: 2476600 events read in total (120558ms).
[18:50:46.230] <TB0> INFO: 3302856 events read in total (158895ms).
[18:51:23.886] <TB0> INFO: 4128704 events read in total (196551ms).
[18:52:02.261] <TB0> INFO: 4956224 events read in total (234926ms).
[18:52:40.721] <TB0> INFO: 5784296 events read in total (273386ms).
[18:53:19.869] <TB0> INFO: 6611880 events read in total (312534ms).
[18:53:59.904] <TB0> INFO: 7440008 events read in total (352569ms).
[18:54:39.135] <TB0> INFO: 8268248 events read in total (391800ms).
[18:54:50.651] <TB0> INFO: 8519680 events read in total (403316ms).
[18:54:50.868] <TB0> INFO: Test took 404783ms.
[18:54:51.430] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:55:55.892] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 18.237796 .. 77.778559
[18:55:56.002] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 8 dacrange: 8 .. 87 (-1/-1) hits flags = 528 (plus default)
[18:55:56.024] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:55:56.025] <TB0> INFO: run 1 of 1
[18:55:56.696] <TB0> INFO: Expecting 2662400 events.
[18:56:44.448] <TB0> INFO: 950264 events read in total (47036ms).
[18:57:23.968] <TB0> INFO: 1900240 events read in total (86556ms).
[18:57:55.912] <TB0> INFO: 2662400 events read in total (118500ms).
[18:57:56.017] <TB0> INFO: Test took 119993ms.
[18:57:56.189] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[18:58:33.082] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 1.932252 .. 56.319394
[18:58:33.191] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 8 dacrange: 1 .. 66 (-1/-1) hits flags = 528 (plus default)
[18:58:33.212] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[18:58:33.212] <TB0> INFO: run 1 of 1
[18:58:33.647] <TB0> INFO: Expecting 2196480 events.
[18:59:24.563] <TB0> INFO: 1092080 events read in total (50199ms).
[19:00:08.130] <TB0> INFO: 2183824 events read in total (93767ms).
[19:00:08.962] <TB0> INFO: 2196480 events read in total (94598ms).
[19:00:08.991] <TB0> INFO: Test took 95778ms.
[19:00:09.102] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:00:40.020] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 0.285189 .. 58.936614
[19:00:40.155] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 8 dacrange: 0 .. 68 (-1/-1) hits flags = 528 (plus default)
[19:00:40.180] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[19:00:40.180] <TB0> INFO: run 1 of 1
[19:00:40.662] <TB0> INFO: Expecting 2296320 events.
[19:01:33.160] <TB0> INFO: 1085016 events read in total (51782ms).
[19:02:14.060] <TB0> INFO: 2169936 events read in total (92682ms).
[19:02:19.298] <TB0> INFO: 2296320 events read in total (97921ms).
[19:02:19.338] <TB0> INFO: Test took 99157ms.
[19:02:19.425] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:02:51.572] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[19:02:51.572] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 8 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[19:02:51.593] <TB0> INFO: dacScan split into 1 runs with ntrig = 8
[19:02:51.593] <TB0> INFO: run 1 of 1
[19:02:51.975] <TB0> INFO: Expecting 1364480 events.
[19:03:38.812] <TB0> INFO: 1077136 events read in total (46122ms).
[19:03:50.705] <TB0> INFO: 1364480 events read in total (58015ms).
[19:03:50.809] <TB0> INFO: Test took 59216ms.
[19:03:50.927] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:04:21.436] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C0.dat
[19:04:21.436] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C1.dat
[19:04:21.436] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C2.dat
[19:04:21.436] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C3.dat
[19:04:21.437] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C4.dat
[19:04:21.437] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C5.dat
[19:04:21.437] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C6.dat
[19:04:21.437] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C7.dat
[19:04:21.438] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C8.dat
[19:04:21.438] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C9.dat
[19:04:21.438] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C10.dat
[19:04:21.438] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C11.dat
[19:04:21.438] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C12.dat
[19:04:21.438] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C13.dat
[19:04:21.439] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C14.dat
[19:04:21.439] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C15.dat
[19:04:21.439] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C0.dat
[19:04:21.471] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C1.dat
[19:04:21.510] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C2.dat
[19:04:21.571] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C3.dat
[19:04:21.632] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C4.dat
[19:04:21.688] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C5.dat
[19:04:21.778] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C6.dat
[19:04:21.851] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C7.dat
[19:04:21.890] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C8.dat
[19:04:21.904] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C9.dat
[19:04:21.923] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C10.dat
[19:04:21.946] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C11.dat
[19:04:21.964] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C12.dat
[19:04:21.983] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C13.dat
[19:04:21.999] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C14.dat
[19:04:22.013] <TB0> INFO: write trim parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//trimParameters35_C15.dat
[19:04:22.028] <TB0> INFO: PixTestTrim::trimTest() done
[19:04:22.028] <TB0> INFO: vtrim: 115 134 121 139 115 168 121 151 134 129 133 133 154 144 125 236
[19:04:22.028] <TB0> INFO: vthrcomp: 112 110 111 109 110 111 107 111 110 108 108 112 110 110 105 78
[19:04:22.028] <TB0> INFO: vcal mean: 35.00 34.98 35.07 34.96 35.01 35.04 34.96 35.03 35.00 34.98 35.10 35.02 34.97 35.00 34.99 37.82
[19:04:22.028] <TB0> INFO: vcal RMS: 1.23 1.43 1.08 1.35 0.97 1.11 1.27 1.06 0.96 1.23 1.06 1.01 1.24 1.09 1.11 4.41
[19:04:22.028] <TB0> INFO: bits mean: 7.80 8.36 7.52 7.96 8.55 6.70 8.94 6.94 8.55 8.66 7.66 8.91 7.53 6.35 8.64 1.48
[19:04:22.028] <TB0> INFO: bits RMS: 2.63 2.34 2.59 2.44 2.66 2.09 2.42 2.30 2.45 2.33 2.38 2.51 2.19 2.37 2.56 0.86
[19:04:22.040] <TB0> INFO: ----------------------------------------------------------------------
[19:04:22.040] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[19:04:22.040] <TB0> INFO: ----------------------------------------------------------------------
[19:04:22.046] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[19:04:22.096] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[19:04:22.096] <TB0> INFO: run 1 of 1
[19:04:22.838] <TB0> INFO: Expecting 4160000 events.
[19:05:20.243] <TB0> INFO: 1324890 events read in total (56689ms).
[19:06:10.558] <TB0> INFO: 2624215 events read in total (107004ms).
[19:07:01.065] <TB0> INFO: 3909845 events read in total (157511ms).
[19:07:10.662] <TB0> INFO: 4160000 events read in total (167108ms).
[19:07:10.735] <TB0> INFO: Test took 168639ms.
[19:07:10.876] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:08:08.668] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[19:08:08.689] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[19:08:08.689] <TB0> INFO: run 1 of 1
[19:08:09.123] <TB0> INFO: Expecting 5324800 events.
[19:09:04.476] <TB0> INFO: 1102590 events read in total (54637ms).
[19:09:54.735] <TB0> INFO: 2196520 events read in total (104896ms).
[19:10:42.073] <TB0> INFO: 3281320 events read in total (152235ms).
[19:11:30.383] <TB0> INFO: 4359735 events read in total (200544ms).
[19:12:11.922] <TB0> INFO: 5324800 events read in total (242083ms).
[19:12:12.108] <TB0> INFO: Test took 243420ms.
[19:12:12.481] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:13:23.946] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 205 (-1/-1) hits flags = 528 (plus default)
[19:13:24.009] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[19:13:24.009] <TB0> INFO: run 1 of 1
[19:13:24.694] <TB0> INFO: Expecting 4284800 events.
[19:14:24.478] <TB0> INFO: 1235490 events read in total (59068ms).
[19:15:14.469] <TB0> INFO: 2452460 events read in total (109059ms).
[19:16:02.569] <TB0> INFO: 3654585 events read in total (157159ms).
[19:16:27.862] <TB0> INFO: 4284800 events read in total (182452ms).
[19:16:27.960] <TB0> INFO: Test took 183925ms.
[19:16:28.138] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:17:32.043] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[19:17:32.082] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[19:17:32.082] <TB0> INFO: run 1 of 1
[19:17:32.587] <TB0> INFO: Expecting 4305600 events.
[19:18:26.047] <TB0> INFO: 1230840 events read in total (52745ms).
[19:19:12.891] <TB0> INFO: 2443730 events read in total (99589ms).
[19:19:59.647] <TB0> INFO: 3641900 events read in total (146346ms).
[19:20:25.727] <TB0> INFO: 4305600 events read in total (172425ms).
[19:20:25.828] <TB0> INFO: Test took 173746ms.
[19:20:26.014] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:21:29.695] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 206 (-1/-1) hits flags = 528 (plus default)
[19:21:29.759] <TB0> INFO: dacScan split into 1 runs with ntrig = 5
[19:21:29.759] <TB0> INFO: run 1 of 1
[19:21:30.205] <TB0> INFO: Expecting 4305600 events.
[19:22:19.740] <TB0> INFO: 1230480 events read in total (48820ms).
[19:23:05.865] <TB0> INFO: 2443240 events read in total (94945ms).
[19:23:51.404] <TB0> INFO: 3640900 events read in total (140484ms).
[19:24:18.849] <TB0> INFO: 4305600 events read in total (167929ms).
[19:24:18.944] <TB0> INFO: Test took 169186ms.
[19:24:19.195] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:25:17.571] <TB0> INFO: PixTestTrim::trimBitTest() done
[19:25:17.575] <TB0> INFO: PixTestTrim::doTest() done, duration: 3147 seconds
[19:25:17.575] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:25:17.575] <TB0> INFO: Decoding statistics:
[19:25:17.576] <TB0> INFO: General information:
[19:25:17.576] <TB0> INFO: 16bit words read: 0
[19:25:17.576] <TB0> INFO: valid events total: 0
[19:25:17.576] <TB0> INFO: empty events: 0
[19:25:17.576] <TB0> INFO: valid events with pixels: 0
[19:25:17.576] <TB0> INFO: valid pixel hits: 0
[19:25:17.576] <TB0> INFO: Event errors: 0
[19:25:17.576] <TB0> INFO: start marker: 0
[19:25:17.576] <TB0> INFO: stop marker: 0
[19:25:17.576] <TB0> INFO: overflow: 0
[19:25:17.576] <TB0> INFO: invalid 5bit words: 0
[19:25:17.576] <TB0> INFO: invalid XOR eye diagram: 0
[19:25:17.576] <TB0> INFO: TBM errors: 0
[19:25:17.576] <TB0> INFO: flawed TBM headers: 0
[19:25:17.576] <TB0> INFO: flawed TBM trailers: 0
[19:25:17.576] <TB0> INFO: event ID mismatches: 0
[19:25:17.576] <TB0> INFO: ROC errors: 0
[19:25:17.576] <TB0> INFO: missing ROC header(s): 0
[19:25:17.576] <TB0> INFO: misplaced readback start: 0
[19:25:17.576] <TB0> INFO: Pixel decoding errors: 0
[19:25:17.576] <TB0> INFO: pixel data incomplete: 0
[19:25:17.576] <TB0> INFO: pixel address: 0
[19:25:17.576] <TB0> INFO: pulse height fill bit: 0
[19:25:17.576] <TB0> INFO: buffer corruption: 0
[19:25:18.708] <TB0> INFO: ######################################################################
[19:25:18.708] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[19:25:18.708] <TB0> INFO: ######################################################################
[19:25:19.056] <TB0> INFO: Expecting 41600 events.
[19:25:23.352] <TB0> INFO: 41600 events read in total (3581ms).
[19:25:23.357] <TB0> INFO: Test took 4644ms.
[19:25:23.369] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:25:24.053] <TB0> INFO: Expecting 41600 events.
[19:25:28.527] <TB0> INFO: 41600 events read in total (3758ms).
[19:25:28.530] <TB0> INFO: Test took 4829ms.
[19:25:28.546] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:25:28.975] <TB0> INFO: Expecting 41600 events.
[19:25:33.517] <TB0> INFO: 41600 events read in total (3827ms).
[19:25:33.519] <TB0> INFO: Test took 4935ms.
[19:25:33.536] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:25:33.896] <TB0> INFO: Expecting 2560 events.
[19:25:34.858] <TB0> INFO: 2560 events read in total (246ms).
[19:25:34.858] <TB0> INFO: Test took 1305ms.
[19:25:35.366] <TB0> INFO: Expecting 2560 events.
[19:25:36.329] <TB0> INFO: 2560 events read in total (248ms).
[19:25:36.329] <TB0> INFO: Test took 1463ms.
[19:25:36.842] <TB0> INFO: Expecting 2560 events.
[19:25:37.805] <TB0> INFO: 2560 events read in total (245ms).
[19:25:37.805] <TB0> INFO: Test took 1476ms.
[19:25:38.316] <TB0> INFO: Expecting 2560 events.
[19:25:39.277] <TB0> INFO: 2560 events read in total (246ms).
[19:25:39.280] <TB0> INFO: Test took 1473ms.
[19:25:39.785] <TB0> INFO: Expecting 2560 events.
[19:25:40.750] <TB0> INFO: 2560 events read in total (249ms).
[19:25:40.756] <TB0> INFO: Test took 1474ms.
[19:25:41.259] <TB0> INFO: Expecting 2560 events.
[19:25:42.220] <TB0> INFO: 2560 events read in total (246ms).
[19:25:42.225] <TB0> INFO: Test took 1469ms.
[19:25:42.730] <TB0> INFO: Expecting 2560 events.
[19:25:43.690] <TB0> INFO: 2560 events read in total (245ms).
[19:25:43.691] <TB0> INFO: Test took 1463ms.
[19:25:44.199] <TB0> INFO: Expecting 2560 events.
[19:25:45.164] <TB0> INFO: 2560 events read in total (245ms).
[19:25:45.166] <TB0> INFO: Test took 1474ms.
[19:25:45.673] <TB0> INFO: Expecting 2560 events.
[19:25:46.634] <TB0> INFO: 2560 events read in total (246ms).
[19:25:46.635] <TB0> INFO: Test took 1465ms.
[19:25:47.145] <TB0> INFO: Expecting 2560 events.
[19:25:48.106] <TB0> INFO: 2560 events read in total (246ms).
[19:25:48.108] <TB0> INFO: Test took 1471ms.
[19:25:48.640] <TB0> INFO: Expecting 2560 events.
[19:25:49.617] <TB0> INFO: 2560 events read in total (253ms).
[19:25:49.625] <TB0> INFO: Test took 1516ms.
[19:25:50.154] <TB0> INFO: Expecting 2560 events.
[19:25:51.116] <TB0> INFO: 2560 events read in total (246ms).
[19:25:51.117] <TB0> INFO: Test took 1491ms.
[19:25:51.639] <TB0> INFO: Expecting 2560 events.
[19:25:52.598] <TB0> INFO: 2560 events read in total (244ms).
[19:25:52.598] <TB0> INFO: Test took 1481ms.
[19:25:53.140] <TB0> INFO: Expecting 2560 events.
[19:25:54.109] <TB0> INFO: 2560 events read in total (251ms).
[19:25:54.109] <TB0> INFO: Test took 1510ms.
[19:25:54.617] <TB0> INFO: Expecting 2560 events.
[19:25:55.579] <TB0> INFO: 2560 events read in total (246ms).
[19:25:55.584] <TB0> INFO: Test took 1469ms.
[19:25:56.102] <TB0> INFO: Expecting 2560 events.
[19:25:57.063] <TB0> INFO: 2560 events read in total (245ms).
[19:25:57.076] <TB0> INFO: Test took 1489ms.
[19:25:57.088] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:25:57.576] <TB0> INFO: Expecting 655360 events.
[19:26:11.641] <TB0> INFO: 655360 events read in total (13350ms).
[19:26:11.663] <TB0> INFO: Expecting 655360 events.
[19:26:26.070] <TB0> INFO: 655360 events read in total (13880ms).
[19:26:26.101] <TB0> INFO: Expecting 655360 events.
[19:26:39.954] <TB0> INFO: 655360 events read in total (13326ms).
[19:26:40.035] <TB0> INFO: Expecting 655360 events.
[19:26:53.804] <TB0> INFO: 655360 events read in total (13235ms).
[19:26:53.877] <TB0> INFO: Expecting 655360 events.
[19:27:07.335] <TB0> INFO: 655360 events read in total (12931ms).
[19:27:07.387] <TB0> INFO: Expecting 655360 events.
[19:27:20.921] <TB0> INFO: 655360 events read in total (13008ms).
[19:27:20.990] <TB0> INFO: Expecting 655360 events.
[19:27:34.422] <TB0> INFO: 655360 events read in total (12903ms).
[19:27:34.489] <TB0> INFO: Expecting 655360 events.
[19:27:47.928] <TB0> INFO: 655360 events read in total (12910ms).
[19:27:48.002] <TB0> INFO: Expecting 655360 events.
[19:28:01.972] <TB0> INFO: 655360 events read in total (13444ms).
[19:28:02.084] <TB0> INFO: Expecting 655360 events.
[19:28:17.298] <TB0> INFO: 655360 events read in total (14687ms).
[19:28:17.406] <TB0> INFO: Expecting 655360 events.
[19:28:32.964] <TB0> INFO: 655360 events read in total (15031ms).
[19:28:33.162] <TB0> INFO: Expecting 655360 events.
[19:28:47.006] <TB0> INFO: 655360 events read in total (13310ms).
[19:28:47.101] <TB0> INFO: Expecting 655360 events.
[19:29:01.958] <TB0> INFO: 655360 events read in total (14330ms).
[19:29:02.091] <TB0> INFO: Expecting 655360 events.
[19:29:16.754] <TB0> INFO: 655360 events read in total (14130ms).
[19:29:16.887] <TB0> INFO: Expecting 655360 events.
[19:29:30.750] <TB0> INFO: 655360 events read in total (13332ms).
[19:29:30.874] <TB0> INFO: Expecting 655360 events.
[19:29:45.427] <TB0> INFO: 655360 events read in total (14026ms).
[19:29:45.568] <TB0> INFO: Test took 228480ms.
[19:29:45.738] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:29:46.038] <TB0> INFO: Expecting 655360 events.
[19:30:00.875] <TB0> INFO: 655360 events read in total (14122ms).
[19:30:00.897] <TB0> INFO: Expecting 655360 events.
[19:30:15.718] <TB0> INFO: 655360 events read in total (14290ms).
[19:30:15.742] <TB0> INFO: Expecting 655360 events.
[19:30:30.247] <TB0> INFO: 655360 events read in total (13978ms).
[19:30:30.289] <TB0> INFO: Expecting 655360 events.
[19:30:45.242] <TB0> INFO: 655360 events read in total (14427ms).
[19:30:45.292] <TB0> INFO: Expecting 655360 events.
[19:31:00.038] <TB0> INFO: 655360 events read in total (14219ms).
[19:31:00.100] <TB0> INFO: Expecting 655360 events.
[19:31:13.464] <TB0> INFO: 655360 events read in total (12837ms).
[19:31:13.528] <TB0> INFO: Expecting 655360 events.
[19:31:26.901] <TB0> INFO: 655360 events read in total (12844ms).
[19:31:26.974] <TB0> INFO: Expecting 655360 events.
[19:31:40.320] <TB0> INFO: 655360 events read in total (12819ms).
[19:31:40.383] <TB0> INFO: Expecting 655360 events.
[19:31:54.170] <TB0> INFO: 655360 events read in total (13258ms).
[19:31:54.257] <TB0> INFO: Expecting 655360 events.
[19:32:07.593] <TB0> INFO: 655360 events read in total (12809ms).
[19:32:07.687] <TB0> INFO: Expecting 655360 events.
[19:32:20.894] <TB0> INFO: 655360 events read in total (12680ms).
[19:32:20.977] <TB0> INFO: Expecting 655360 events.
[19:32:34.276] <TB0> INFO: 655360 events read in total (12773ms).
[19:32:34.381] <TB0> INFO: Expecting 655360 events.
[19:32:47.710] <TB0> INFO: 655360 events read in total (12803ms).
[19:32:47.807] <TB0> INFO: Expecting 655360 events.
[19:33:02.978] <TB0> INFO: 655360 events read in total (14644ms).
[19:33:03.099] <TB0> INFO: Expecting 655360 events.
[19:33:17.233] <TB0> INFO: 655360 events read in total (13607ms).
[19:33:17.360] <TB0> INFO: Expecting 655360 events.
[19:33:30.656] <TB0> INFO: 655360 events read in total (12768ms).
[19:33:30.787] <TB0> INFO: Test took 225049ms.
[19:33:31.114] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[19:33:31.130] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[19:33:31.148] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[19:33:31.166] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[19:33:31.185] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[19:33:31.204] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[19:33:31.222] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[19:33:31.242] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[19:33:31.260] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[19:33:31.282] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[19:33:31.302] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[19:33:31.323] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[19:33:31.341] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[19:33:31.362] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[19:33:31.380] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[19:33:31.400] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[19:33:31.461] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C0.dat
[19:33:31.466] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C1.dat
[19:33:31.469] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C2.dat
[19:33:31.472] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C3.dat
[19:33:31.474] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C4.dat
[19:33:31.476] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C5.dat
[19:33:31.478] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C6.dat
[19:33:31.482] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C7.dat
[19:33:31.485] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C8.dat
[19:33:31.486] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C9.dat
[19:33:31.486] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C10.dat
[19:33:31.487] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C11.dat
[19:33:31.488] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C12.dat
[19:33:31.488] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C13.dat
[19:33:31.488] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C14.dat
[19:33:31.488] <TB0> INFO: write dac parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//dacParameters35_C15.dat
[19:33:31.902] <TB0> INFO: Expecting 41600 events.
[19:33:35.960] <TB0> INFO: 41600 events read in total (3343ms).
[19:33:35.962] <TB0> INFO: Test took 4470ms.
[19:33:36.669] <TB0> INFO: Expecting 41600 events.
[19:33:40.800] <TB0> INFO: 41600 events read in total (3415ms).
[19:33:40.802] <TB0> INFO: Test took 4559ms.
[19:33:41.467] <TB0> INFO: Expecting 41600 events.
[19:33:45.866] <TB0> INFO: 41600 events read in total (3683ms).
[19:33:45.868] <TB0> INFO: Test took 4789ms.
[19:33:46.174] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:33:46.311] <TB0> INFO: Expecting 2560 events.
[19:33:47.273] <TB0> INFO: 2560 events read in total (246ms).
[19:33:47.274] <TB0> INFO: Test took 1100ms.
[19:33:47.279] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:33:47.783] <TB0> INFO: Expecting 2560 events.
[19:33:48.787] <TB0> INFO: 2560 events read in total (283ms).
[19:33:48.788] <TB0> INFO: Test took 1509ms.
[19:33:48.793] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:33:49.297] <TB0> INFO: Expecting 2560 events.
[19:33:50.263] <TB0> INFO: 2560 events read in total (250ms).
[19:33:50.264] <TB0> INFO: Test took 1472ms.
[19:33:50.276] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:33:50.807] <TB0> INFO: Expecting 2560 events.
[19:33:51.785] <TB0> INFO: 2560 events read in total (262ms).
[19:33:51.786] <TB0> INFO: Test took 1510ms.
[19:33:51.788] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:33:52.295] <TB0> INFO: Expecting 2560 events.
[19:33:53.260] <TB0> INFO: 2560 events read in total (248ms).
[19:33:53.260] <TB0> INFO: Test took 1472ms.
[19:33:53.266] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:33:53.770] <TB0> INFO: Expecting 2560 events.
[19:33:54.745] <TB0> INFO: 2560 events read in total (257ms).
[19:33:54.746] <TB0> INFO: Test took 1481ms.
[19:33:54.750] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:33:55.255] <TB0> INFO: Expecting 2560 events.
[19:33:56.215] <TB0> INFO: 2560 events read in total (244ms).
[19:33:56.216] <TB0> INFO: Test took 1466ms.
[19:33:56.222] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:33:56.725] <TB0> INFO: Expecting 2560 events.
[19:33:57.685] <TB0> INFO: 2560 events read in total (244ms).
[19:33:57.687] <TB0> INFO: Test took 1465ms.
[19:33:57.695] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:33:58.195] <TB0> INFO: Expecting 2560 events.
[19:33:59.156] <TB0> INFO: 2560 events read in total (246ms).
[19:33:59.157] <TB0> INFO: Test took 1462ms.
[19:33:59.160] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:33:59.666] <TB0> INFO: Expecting 2560 events.
[19:34:00.644] <TB0> INFO: 2560 events read in total (262ms).
[19:34:00.644] <TB0> INFO: Test took 1485ms.
[19:34:00.650] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:01.164] <TB0> INFO: Expecting 2560 events.
[19:34:02.124] <TB0> INFO: 2560 events read in total (245ms).
[19:34:02.124] <TB0> INFO: Test took 1474ms.
[19:34:02.130] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:02.634] <TB0> INFO: Expecting 2560 events.
[19:34:03.634] <TB0> INFO: 2560 events read in total (283ms).
[19:34:03.636] <TB0> INFO: Test took 1506ms.
[19:34:03.641] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:04.147] <TB0> INFO: Expecting 2560 events.
[19:34:05.106] <TB0> INFO: 2560 events read in total (244ms).
[19:34:05.107] <TB0> INFO: Test took 1466ms.
[19:34:05.113] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:05.619] <TB0> INFO: Expecting 2560 events.
[19:34:06.589] <TB0> INFO: 2560 events read in total (254ms).
[19:34:06.589] <TB0> INFO: Test took 1476ms.
[19:34:06.592] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:07.122] <TB0> INFO: Expecting 2560 events.
[19:34:08.083] <TB0> INFO: 2560 events read in total (245ms).
[19:34:08.084] <TB0> INFO: Test took 1492ms.
[19:34:08.091] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:08.598] <TB0> INFO: Expecting 2560 events.
[19:34:09.572] <TB0> INFO: 2560 events read in total (254ms).
[19:34:09.573] <TB0> INFO: Test took 1482ms.
[19:34:09.578] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:10.083] <TB0> INFO: Expecting 2560 events.
[19:34:11.043] <TB0> INFO: 2560 events read in total (244ms).
[19:34:11.044] <TB0> INFO: Test took 1466ms.
[19:34:11.049] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:11.553] <TB0> INFO: Expecting 2560 events.
[19:34:12.513] <TB0> INFO: 2560 events read in total (245ms).
[19:34:12.517] <TB0> INFO: Test took 1468ms.
[19:34:12.524] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:13.024] <TB0> INFO: Expecting 2560 events.
[19:34:13.998] <TB0> INFO: 2560 events read in total (250ms).
[19:34:13.999] <TB0> INFO: Test took 1475ms.
[19:34:13.001] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:14.510] <TB0> INFO: Expecting 2560 events.
[19:34:15.471] <TB0> INFO: 2560 events read in total (245ms).
[19:34:15.472] <TB0> INFO: Test took 1471ms.
[19:34:15.475] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:15.981] <TB0> INFO: Expecting 2560 events.
[19:34:16.942] <TB0> INFO: 2560 events read in total (245ms).
[19:34:16.943] <TB0> INFO: Test took 1468ms.
[19:34:16.948] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:17.453] <TB0> INFO: Expecting 2560 events.
[19:34:18.426] <TB0> INFO: 2560 events read in total (257ms).
[19:34:18.428] <TB0> INFO: Test took 1480ms.
[19:34:18.433] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:18.937] <TB0> INFO: Expecting 2560 events.
[19:34:19.897] <TB0> INFO: 2560 events read in total (245ms).
[19:34:19.897] <TB0> INFO: Test took 1464ms.
[19:34:19.903] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:20.407] <TB0> INFO: Expecting 2560 events.
[19:34:21.369] <TB0> INFO: 2560 events read in total (246ms).
[19:34:21.371] <TB0> INFO: Test took 1468ms.
[19:34:21.376] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:21.879] <TB0> INFO: Expecting 2560 events.
[19:34:22.840] <TB0> INFO: 2560 events read in total (246ms).
[19:34:22.840] <TB0> INFO: Test took 1464ms.
[19:34:22.846] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:23.349] <TB0> INFO: Expecting 2560 events.
[19:34:24.309] <TB0> INFO: 2560 events read in total (244ms).
[19:34:24.310] <TB0> INFO: Test took 1464ms.
[19:34:24.318] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:24.820] <TB0> INFO: Expecting 2560 events.
[19:34:25.780] <TB0> INFO: 2560 events read in total (245ms).
[19:34:25.780] <TB0> INFO: Test took 1463ms.
[19:34:25.785] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:26.290] <TB0> INFO: Expecting 2560 events.
[19:34:27.250] <TB0> INFO: 2560 events read in total (245ms).
[19:34:27.254] <TB0> INFO: Test took 1470ms.
[19:34:27.257] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:27.761] <TB0> INFO: Expecting 2560 events.
[19:34:28.722] <TB0> INFO: 2560 events read in total (246ms).
[19:34:28.722] <TB0> INFO: Test took 1465ms.
[19:34:28.725] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:29.237] <TB0> INFO: Expecting 2560 events.
[19:34:30.208] <TB0> INFO: 2560 events read in total (256ms).
[19:34:30.208] <TB0> INFO: Test took 1484ms.
[19:34:30.212] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:30.718] <TB0> INFO: Expecting 2560 events.
[19:34:31.680] <TB0> INFO: 2560 events read in total (247ms).
[19:34:31.680] <TB0> INFO: Test took 1469ms.
[19:34:31.685] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[19:34:32.190] <TB0> INFO: Expecting 2560 events.
[19:34:33.150] <TB0> INFO: 2560 events read in total (245ms).
[19:34:33.151] <TB0> INFO: Test took 1466ms.
[19:34:33.861] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 555 seconds
[19:34:33.861] <TB0> INFO: PH scale (per ROC): 80 82 73 75 73 91 81 77 76 77 75 75 75 73 68 69
[19:34:33.861] <TB0> INFO: PH offset (per ROC): 156 157 175 174 158 163 162 153 173 155 163 183 173 162 166 163
[19:34:33.871] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:34:33.871] <TB0> INFO: Decoding statistics:
[19:34:33.871] <TB0> INFO: General information:
[19:34:33.871] <TB0> INFO: 16bit words read: 66388
[19:34:33.872] <TB0> INFO: valid events total: 5120
[19:34:33.872] <TB0> INFO: empty events: 2646
[19:34:33.872] <TB0> INFO: valid events with pixels: 2474
[19:34:33.872] <TB0> INFO: valid pixel hits: 2474
[19:34:33.872] <TB0> INFO: Event errors: 0
[19:34:33.872] <TB0> INFO: start marker: 0
[19:34:33.872] <TB0> INFO: stop marker: 0
[19:34:33.872] <TB0> INFO: overflow: 0
[19:34:33.872] <TB0> INFO: invalid 5bit words: 0
[19:34:33.872] <TB0> INFO: invalid XOR eye diagram: 0
[19:34:33.872] <TB0> INFO: TBM errors: 0
[19:34:33.872] <TB0> INFO: flawed TBM headers: 0
[19:34:33.872] <TB0> INFO: flawed TBM trailers: 0
[19:34:33.872] <TB0> INFO: event ID mismatches: 0
[19:34:33.872] <TB0> INFO: ROC errors: 0
[19:34:33.872] <TB0> INFO: missing ROC header(s): 0
[19:34:33.872] <TB0> INFO: misplaced readback start: 0
[19:34:33.872] <TB0> INFO: Pixel decoding errors: 0
[19:34:33.872] <TB0> INFO: pixel data incomplete: 0
[19:34:33.872] <TB0> INFO: pixel address: 0
[19:34:33.872] <TB0> INFO: pulse height fill bit: 0
[19:34:33.872] <TB0> INFO: buffer corruption: 0
[19:34:34.263] <TB0> INFO: ######################################################################
[19:34:34.263] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[19:34:34.263] <TB0> INFO: ######################################################################
[19:34:34.284] <TB0> INFO: scanning low vcal = 10
[19:34:34.655] <TB0> INFO: Expecting 41600 events.
[19:34:37.826] <TB0> INFO: 41600 events read in total (2455ms).
[19:34:37.828] <TB0> INFO: Test took 3543ms.
[19:34:37.833] <TB0> INFO: scanning low vcal = 20
[19:34:38.336] <TB0> INFO: Expecting 41600 events.
[19:34:41.528] <TB0> INFO: 41600 events read in total (2476ms).
[19:34:41.528] <TB0> INFO: Test took 3695ms.
[19:34:41.534] <TB0> INFO: scanning low vcal = 30
[19:34:42.037] <TB0> INFO: Expecting 41600 events.
[19:34:45.247] <TB0> INFO: 41600 events read in total (2495ms).
[19:34:45.249] <TB0> INFO: Test took 3715ms.
[19:34:45.254] <TB0> INFO: scanning low vcal = 40
[19:34:45.743] <TB0> INFO: Expecting 41600 events.
[19:34:49.498] <TB0> INFO: 41600 events read in total (3040ms).
[19:34:49.503] <TB0> INFO: Test took 4249ms.
[19:34:49.507] <TB0> INFO: scanning low vcal = 50
[19:34:49.878] <TB0> INFO: Expecting 41600 events.
[19:34:53.672] <TB0> INFO: 41600 events read in total (3078ms).
[19:34:53.676] <TB0> INFO: Test took 4169ms.
[19:34:53.681] <TB0> INFO: scanning low vcal = 60
[19:34:54.074] <TB0> INFO: Expecting 41600 events.
[19:34:57.860] <TB0> INFO: 41600 events read in total (3071ms).
[19:34:57.866] <TB0> INFO: Test took 4185ms.
[19:34:57.871] <TB0> INFO: scanning low vcal = 70
[19:34:58.259] <TB0> INFO: Expecting 41600 events.
[19:35:02.041] <TB0> INFO: 41600 events read in total (3067ms).
[19:35:02.042] <TB0> INFO: Test took 4171ms.
[19:35:02.049] <TB0> INFO: scanning low vcal = 80
[19:35:02.435] <TB0> INFO: Expecting 41600 events.
[19:35:06.219] <TB0> INFO: 41600 events read in total (3068ms).
[19:35:06.221] <TB0> INFO: Test took 4172ms.
[19:35:06.227] <TB0> INFO: scanning low vcal = 90
[19:35:06.763] <TB0> INFO: Expecting 41600 events.
[19:35:10.660] <TB0> INFO: 41600 events read in total (3181ms).
[19:35:10.662] <TB0> INFO: Test took 4435ms.
[19:35:10.669] <TB0> INFO: scanning low vcal = 100
[19:35:11.046] <TB0> INFO: Expecting 41600 events.
[19:35:14.821] <TB0> INFO: 41600 events read in total (3059ms).
[19:35:14.824] <TB0> INFO: Test took 4155ms.
[19:35:14.829] <TB0> INFO: scanning low vcal = 110
[19:35:15.208] <TB0> INFO: Expecting 41600 events.
[19:35:18.998] <TB0> INFO: 41600 events read in total (3074ms).
[19:35:18.999] <TB0> INFO: Test took 4169ms.
[19:35:19.005] <TB0> INFO: scanning low vcal = 120
[19:35:19.361] <TB0> INFO: Expecting 41600 events.
[19:35:23.150] <TB0> INFO: 41600 events read in total (3073ms).
[19:35:23.152] <TB0> INFO: Test took 4147ms.
[19:35:23.158] <TB0> INFO: scanning low vcal = 130
[19:35:23.534] <TB0> INFO: Expecting 41600 events.
[19:35:27.300] <TB0> INFO: 41600 events read in total (3050ms).
[19:35:27.302] <TB0> INFO: Test took 4144ms.
[19:35:27.307] <TB0> INFO: scanning low vcal = 140
[19:35:27.673] <TB0> INFO: Expecting 41600 events.
[19:35:31.418] <TB0> INFO: 41600 events read in total (3029ms).
[19:35:31.420] <TB0> INFO: Test took 4113ms.
[19:35:31.427] <TB0> INFO: scanning low vcal = 150
[19:35:31.832] <TB0> INFO: Expecting 41600 events.
[19:35:35.656] <TB0> INFO: 41600 events read in total (3109ms).
[19:35:35.659] <TB0> INFO: Test took 4232ms.
[19:35:35.665] <TB0> INFO: scanning low vcal = 160
[19:35:36.155] <TB0> INFO: Expecting 41600 events.
[19:35:39.921] <TB0> INFO: 41600 events read in total (3050ms).
[19:35:39.923] <TB0> INFO: Test took 4258ms.
[19:35:39.930] <TB0> INFO: scanning low vcal = 170
[19:35:40.351] <TB0> INFO: Expecting 41600 events.
[19:35:44.108] <TB0> INFO: 41600 events read in total (3042ms).
[19:35:44.110] <TB0> INFO: Test took 4180ms.
[19:35:44.120] <TB0> INFO: scanning low vcal = 180
[19:35:44.500] <TB0> INFO: Expecting 41600 events.
[19:35:48.262] <TB0> INFO: 41600 events read in total (3047ms).
[19:35:48.266] <TB0> INFO: Test took 4145ms.
[19:35:48.271] <TB0> INFO: scanning low vcal = 190
[19:35:48.694] <TB0> INFO: Expecting 41600 events.
[19:35:52.450] <TB0> INFO: 41600 events read in total (3041ms).
[19:35:52.452] <TB0> INFO: Test took 4181ms.
[19:35:52.458] <TB0> INFO: scanning low vcal = 200
[19:35:52.847] <TB0> INFO: Expecting 41600 events.
[19:35:56.601] <TB0> INFO: 41600 events read in total (3039ms).
[19:35:56.602] <TB0> INFO: Test took 4144ms.
[19:35:56.608] <TB0> INFO: scanning low vcal = 210
[19:35:57.010] <TB0> INFO: Expecting 41600 events.
[19:36:00.809] <TB0> INFO: 41600 events read in total (3083ms).
[19:36:00.810] <TB0> INFO: Test took 4202ms.
[19:36:00.816] <TB0> INFO: scanning low vcal = 220
[19:36:01.227] <TB0> INFO: Expecting 41600 events.
[19:36:04.991] <TB0> INFO: 41600 events read in total (3048ms).
[19:36:04.992] <TB0> INFO: Test took 4176ms.
[19:36:04.998] <TB0> INFO: scanning low vcal = 230
[19:36:05.403] <TB0> INFO: Expecting 41600 events.
[19:36:09.152] <TB0> INFO: 41600 events read in total (3033ms).
[19:36:09.154] <TB0> INFO: Test took 4156ms.
[19:36:09.160] <TB0> INFO: scanning low vcal = 240
[19:36:09.549] <TB0> INFO: Expecting 41600 events.
[19:36:13.285] <TB0> INFO: 41600 events read in total (3021ms).
[19:36:13.287] <TB0> INFO: Test took 4126ms.
[19:36:13.293] <TB0> INFO: scanning low vcal = 250
[19:36:13.712] <TB0> INFO: Expecting 41600 events.
[19:36:17.489] <TB0> INFO: 41600 events read in total (3061ms).
[19:36:17.491] <TB0> INFO: Test took 4198ms.
[19:36:17.506] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[19:36:17.892] <TB0> INFO: Expecting 41600 events.
[19:36:21.614] <TB0> INFO: 41600 events read in total (3006ms).
[19:36:21.615] <TB0> INFO: Test took 4108ms.
[19:36:21.622] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[19:36:22.035] <TB0> INFO: Expecting 41600 events.
[19:36:25.802] <TB0> INFO: 41600 events read in total (3052ms).
[19:36:25.803] <TB0> INFO: Test took 4181ms.
[19:36:25.808] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[19:36:26.197] <TB0> INFO: Expecting 41600 events.
[19:36:30.021] <TB0> INFO: 41600 events read in total (3109ms).
[19:36:30.023] <TB0> INFO: Test took 4215ms.
[19:36:30.028] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[19:36:30.445] <TB0> INFO: Expecting 41600 events.
[19:36:34.290] <TB0> INFO: 41600 events read in total (3130ms).
[19:36:34.291] <TB0> INFO: Test took 4263ms.
[19:36:34.297] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[19:36:34.695] <TB0> INFO: Expecting 41600 events.
[19:36:38.436] <TB0> INFO: 41600 events read in total (3025ms).
[19:36:38.438] <TB0> INFO: Test took 4141ms.
[19:36:39.308] <TB0> INFO: PixTestGainPedestal::measure() done
[19:37:46.061] <TB0> INFO: PixTestGainPedestal::fit() done
[19:37:46.062] <TB0> INFO: non-linearity mean: 0.956 0.957 0.954 0.953 0.960 0.956 0.962 0.956 0.953 0.956 0.959 0.955 0.960 0.959 0.956 0.959
[19:37:46.062] <TB0> INFO: non-linearity RMS: 0.007 0.006 0.007 0.007 0.005 0.006 0.006 0.007 0.007 0.005 0.005 0.006 0.006 0.007 0.007 0.007
[19:37:46.062] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C0.dat
[19:37:46.102] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C1.dat
[19:37:46.140] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C2.dat
[19:37:46.178] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C3.dat
[19:37:46.240] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C4.dat
[19:37:46.298] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C5.dat
[19:37:46.354] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C6.dat
[19:37:46.400] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C7.dat
[19:37:46.434] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C8.dat
[19:37:46.467] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C9.dat
[19:37:46.500] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C10.dat
[19:37:46.533] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C11.dat
[19:37:46.567] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C12.dat
[19:37:46.601] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C13.dat
[19:37:46.636] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C14.dat
[19:37:46.669] <TB0> INFO: write gain/ped parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//phCalibrationFitErr35_C15.dat
[19:37:46.703] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 192 seconds
[19:37:46.703] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:37:46.703] <TB0> INFO: Decoding statistics:
[19:37:46.703] <TB0> INFO: General information:
[19:37:46.703] <TB0> INFO: 16bit words read: 2329340
[19:37:46.703] <TB0> INFO: valid events total: 83200
[19:37:46.703] <TB0> INFO: empty events: 0
[19:37:46.703] <TB0> INFO: valid events with pixels: 83200
[19:37:46.703] <TB0> INFO: valid pixel hits: 665470
[19:37:46.703] <TB0> INFO: Event errors: 0
[19:37:46.703] <TB0> INFO: start marker: 0
[19:37:46.703] <TB0> INFO: stop marker: 0
[19:37:46.703] <TB0> INFO: overflow: 0
[19:37:46.703] <TB0> INFO: invalid 5bit words: 0
[19:37:46.703] <TB0> INFO: invalid XOR eye diagram: 0
[19:37:46.703] <TB0> INFO: TBM errors: 0
[19:37:46.703] <TB0> INFO: flawed TBM headers: 0
[19:37:46.703] <TB0> INFO: flawed TBM trailers: 0
[19:37:46.703] <TB0> INFO: event ID mismatches: 0
[19:37:46.703] <TB0> INFO: ROC errors: 0
[19:37:46.703] <TB0> INFO: missing ROC header(s): 0
[19:37:46.703] <TB0> INFO: misplaced readback start: 0
[19:37:46.703] <TB0> INFO: Pixel decoding errors: 0
[19:37:46.703] <TB0> INFO: pixel data incomplete: 0
[19:37:46.703] <TB0> INFO: pixel address: 0
[19:37:46.703] <TB0> INFO: pulse height fill bit: 0
[19:37:46.703] <TB0> INFO: buffer corruption: 0
[19:37:46.716] <TB0> INFO: readReadbackCal: /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C0.dat .. /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C15.dat
[19:37:46.719] <TB0> INFO: ######################################################################
[19:37:46.719] <TB0> INFO: PixTestTrim::doTest()
[19:37:46.719] <TB0> INFO: ######################################################################
[19:37:46.731] <TB0> INFO: PixTestReadback::RES sent once
[19:37:57.990] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C0.dat
[19:37:57.990] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C1.dat
[19:37:57.990] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C2.dat
[19:37:57.991] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C3.dat
[19:37:57.991] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C4.dat
[19:37:57.991] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C5.dat
[19:37:57.991] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C6.dat
[19:37:57.991] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C7.dat
[19:37:57.991] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C8.dat
[19:37:57.991] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C9.dat
[19:37:57.992] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C10.dat
[19:37:57.992] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C11.dat
[19:37:57.992] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C12.dat
[19:37:57.992] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C13.dat
[19:37:57.993] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C14.dat
[19:37:57.993] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C15.dat
[19:37:58.128] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[19:37:58.134] <TB0> INFO: PixTestReadback::RES sent once
[19:38:09.383] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C0.dat
[19:38:09.386] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C1.dat
[19:38:09.388] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C2.dat
[19:38:09.395] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C3.dat
[19:38:09.397] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C4.dat
[19:38:09.401] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C5.dat
[19:38:09.405] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C6.dat
[19:38:09.408] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C7.dat
[19:38:09.410] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C8.dat
[19:38:09.413] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C9.dat
[19:38:09.417] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C10.dat
[19:38:09.420] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C11.dat
[19:38:09.423] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C12.dat
[19:38:09.427] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C13.dat
[19:38:09.437] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C14.dat
[19:38:09.437] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C15.dat
[19:38:09.763] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[19:38:09.764] <TB0> INFO: PixTestReadback::RES sent once
[19:38:18.788] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[19:38:18.788] <TB0> INFO: Vbg will be calibrated using Vd calibration
[19:38:18.789] <TB0> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 153.8calibrated Vbg = 1.19192 :::*/*/*/*/
[19:38:18.789] <TB0> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 160.2calibrated Vbg = 1.18844 :::*/*/*/*/
[19:38:18.789] <TB0> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 150.7calibrated Vbg = 1.19712 :::*/*/*/*/
[19:38:18.789] <TB0> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 161.3calibrated Vbg = 1.20041 :::*/*/*/*/
[19:38:18.789] <TB0> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 144.7calibrated Vbg = 1.20409 :::*/*/*/*/
[19:38:18.789] <TB0> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 166.3calibrated Vbg = 1.20613 :::*/*/*/*/
[19:38:18.789] <TB0> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 151.4calibrated Vbg = 1.20256 :::*/*/*/*/
[19:38:18.789] <TB0> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 145.2calibrated Vbg = 1.20807 :::*/*/*/*/
[19:38:18.789] <TB0> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 151calibrated Vbg = 1.20615 :::*/*/*/*/
[19:38:18.789] <TB0> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 151.7calibrated Vbg = 1.20597 :::*/*/*/*/
[19:38:18.789] <TB0> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 149.1calibrated Vbg = 1.20751 :::*/*/*/*/
[19:38:18.789] <TB0> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 155.4calibrated Vbg = 1.20262 :::*/*/*/*/
[19:38:18.789] <TB0> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 147.3calibrated Vbg = 1.19308 :::*/*/*/*/
[19:38:18.789] <TB0> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 145.4calibrated Vbg = 1.18985 :::*/*/*/*/
[19:38:18.790] <TB0> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 155.4calibrated Vbg = 1.1891 :::*/*/*/*/
[19:38:18.790] <TB0> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 169calibrated Vbg = 1.19328 :::*/*/*/*/
[19:38:18.792] <TB0> INFO: PixTestReadback::RES sent once
[19:38:19.619] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L484> Channel 0 Number of ROCs (6) != Token Chain Length (8)
[19:38:19.620] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L484> Channel 0 Number of ROCs (7) != Token Chain Length (8)
[19:38:19.620] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L484> Channel 0 Number of ROCs (7) != Token Chain Length (8)
[19:38:19.620] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L484> Channel 0 Number of ROCs (7) != Token Chain Length (8)
[19:38:19.620] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L484> Channel 0 Number of ROCs (7) != Token Chain Length (8)
[19:38:19.620] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L484> Channel 0 Number of ROCs (7) != Token Chain Length (8)
[19:38:19.620] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L484> Channel 0 Number of ROCs (6) != Token Chain Length (8)
[19:38:19.620] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L484> Channel 0 Number of ROCs (7) != Token Chain Length (8)
[19:38:19.620] <TB0> ERROR: <datapipe.cc/CheckEventValidity:L484> Channel 0 Number of ROCs (7) != Token Chain Length (8)
[19:41:14.160] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C0.dat
[19:41:14.160] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C1.dat
[19:41:14.160] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C2.dat
[19:41:14.160] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C3.dat
[19:41:14.160] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C4.dat
[19:41:14.160] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C5.dat
[19:41:14.160] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C6.dat
[19:41:14.161] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C7.dat
[19:41:14.161] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C8.dat
[19:41:14.161] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C9.dat
[19:41:14.161] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C10.dat
[19:41:14.161] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C11.dat
[19:41:14.161] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C12.dat
[19:41:14.161] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C13.dat
[19:41:14.161] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C14.dat
[19:41:14.161] <TB0> INFO: write readback calibration parameters into /home/michelecms/DTB/elComandante/DATA/M3512_FullQualification_2015-10-29_13h38m_1446122315//003_Fulltest_m20//readbackCal_C15.dat
[19:41:14.284] <TB0> INFO: PixTestPattern:: pg_setup set to default.
[19:41:14.291] <TB0> INFO: PixTestReadback::doTest() done
[19:41:14.294] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[19:41:14.294] <TB0> INFO: Decoding statistics:
[19:41:14.294] <TB0> INFO: General information:
[19:41:14.294] <TB0> INFO: 16bit words read: 768
[19:41:14.294] <TB0> INFO: valid events total: 64
[19:41:14.294] <TB0> INFO: empty events: 64
[19:41:14.294] <TB0> INFO: valid events with pixels: 0
[19:41:14.294] <TB0> INFO: valid pixel hits: 0
[19:41:14.294] <TB0> INFO: Event errors: 0
[19:41:14.294] <TB0> INFO: start marker: 0
[19:41:14.294] <TB0> INFO: stop marker: 0
[19:41:14.295] <TB0> INFO: overflow: 0
[19:41:14.295] <TB0> INFO: invalid 5bit words: 0
[19:41:14.295] <TB0> INFO: invalid XOR eye diagram: 0
[19:41:14.295] <TB0> INFO: TBM errors: 0
[19:41:14.295] <TB0> INFO: flawed TBM headers: 0
[19:41:14.295] <TB0> INFO: flawed TBM trailers: 0
[19:41:14.295] <TB0> INFO: event ID mismatches: 0
[19:41:14.295] <TB0> INFO: ROC errors: 0
[19:41:14.295] <TB0> INFO: missing ROC header(s): 0
[19:41:14.296] <TB0> INFO: misplaced readback start: 0
[19:41:14.296] <TB0> INFO: Pixel decoding errors: 0
[19:41:14.296] <TB0> INFO: pixel data incomplete: 0
[19:41:14.296] <TB0> INFO: pixel address: 0
[19:41:14.296] <TB0> INFO: pulse height fill bit: 0
[19:41:14.296] <TB0> INFO: buffer corruption: 0
[19:41:14.340] <TB0> INFO: Decoding statistics:
[19:41:14.340] <TB0> INFO: General information:
[19:41:14.340] <TB0> INFO: 16bit words read: 9595986
[19:41:14.340] <TB0> INFO: valid events total: 551744
[19:41:14.340] <TB0> INFO: empty events: 263529
[19:41:14.340] <TB0> INFO: valid events with pixels: 288215
[19:41:14.340] <TB0> INFO: valid pixel hits: 1487529
[19:41:14.340] <TB0> INFO: Event errors: 0
[19:41:14.340] <TB0> INFO: start marker: 0
[19:41:14.340] <TB0> INFO: stop marker: 0
[19:41:14.340] <TB0> INFO: overflow: 0
[19:41:14.340] <TB0> INFO: invalid 5bit words: 0
[19:41:14.341] <TB0> INFO: invalid XOR eye diagram: 0
[19:41:14.341] <TB0> INFO: TBM errors: 0
[19:41:14.341] <TB0> INFO: flawed TBM headers: 0
[19:41:14.341] <TB0> INFO: flawed TBM trailers: 0
[19:41:14.341] <TB0> INFO: event ID mismatches: 0
[19:41:14.341] <TB0> INFO: ROC errors: 0
[19:41:14.341] <TB0> INFO: missing ROC header(s): 0
[19:41:14.341] <TB0> INFO: misplaced readback start: 0
[19:41:14.341] <TB0> INFO: Pixel decoding errors: 0
[19:41:14.341] <TB0> INFO: pixel data incomplete: 0
[19:41:14.341] <TB0> INFO: pixel address: 0
[19:41:14.341] <TB0> INFO: pulse height fill bit: 0
[19:41:14.348] <TB0> INFO: buffer corruption: 0
[19:41:14.348] <TB0> INFO: enter test to run
[19:41:14.348] <TB0> INFO: test: no parameter change
[19:41:14.740] <TB0> QUIET: Connection to board 127 closed.
[19:41:14.745] <TB0> INFO: pXar: this is the end, my friend