[09:39:35.843] <TB3> INFO: *** Welcome to pxar ***
[09:39:35.843] <TB3> INFO: *** Today: 2015/11/03
[09:39:36.071] <TB3> INFO: *** Version: 9da6
[09:39:36.071] <TB3> INFO: readRocDacs: /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C15.dat
[09:39:36.072] <TB3> INFO: readTbmDacs: /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//tbmParameters_C0b.dat
[09:39:36.072] <TB3> INFO: readMaskFile: /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//defaultMaskFile.dat
[09:39:36.072] <TB3> INFO: readTrimFile: /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters_C15.dat
[09:39:36.159] <TB3> INFO: clk: 4
[09:39:36.159] <TB3> INFO: ctr: 4
[09:39:36.159] <TB3> INFO: sda: 19
[09:39:36.159] <TB3> INFO: tin: 9
[09:39:36.159] <TB3> INFO: level: 15
[09:39:36.159] <TB3> INFO: triggerdelay: 0
[09:39:36.159] <TB3> QUIET: Instanciating API for pxar v2.6.0+26~g89693ff
[09:39:36.160] <TB3> INFO: Log level: INFO
[09:39:36.167] <TB3> INFO: Found DTB DTB_WZ4I6J
[09:39:36.176] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[09:39:36.180] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.2
SW version: 4.5
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[09:39:36.182] <TB3> INFO: RPC call hashes of host and DTB match: 398089610
[09:39:37.744] <TB3> INFO: DUT info:
[09:39:37.744] <TB3> INFO: The DUT currently contains the following objects:
[09:39:37.744] <TB3> INFO: 2 TBM Cores tbm08c (2 ON)
[09:39:37.744] <TB3> INFO: TBM Core alpha (0): 7 registers set
[09:39:37.744] <TB3> INFO: TBM Core beta (1): 7 registers set
[09:39:37.744] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[09:39:37.744] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:37.745] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:37.745] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:37.745] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:37.745] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:37.745] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:37.745] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:37.745] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:37.745] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:37.745] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:37.745] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:37.745] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:37.745] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:37.745] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:37.745] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:37.745] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[09:39:38.146] <TB3> INFO: enter 'restricted' command line mode
[09:39:38.146] <TB3> INFO: enter test to run
[09:39:38.146] <TB3> INFO: test: pretest no parameter change
[09:39:38.146] <TB3> INFO: running: pretest
[09:39:38.152] <TB3> INFO: ######################################################################
[09:39:38.152] <TB3> INFO: PixTestPretest::doTest()
[09:39:38.152] <TB3> INFO: ######################################################################
[09:39:38.155] <TB3> INFO: ----------------------------------------------------------------------
[09:39:38.155] <TB3> INFO: PixTestPretest::programROC()
[09:39:38.155] <TB3> INFO: ----------------------------------------------------------------------
[09:39:56.174] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[09:39:56.174] <TB3> INFO: IA differences per ROC: 16.9 16.1 16.1 16.1 16.9 17.7 16.9 16.9 16.9 16.1 16.9 16.9 17.7 17.7 16.9 16.9
[09:39:56.253] <TB3> INFO: ----------------------------------------------------------------------
[09:39:56.253] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[09:39:56.253] <TB3> INFO: ----------------------------------------------------------------------
[09:40:02.256] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 387.5 mA = 24.2188 mA/ROC
[09:40:02.256] <TB3> INFO: i(loss) [mA/ROC]: 19.3 20.1 19.3 20.1 20.1 20.1 19.3 20.1 19.3 19.3 19.3 20.1 19.3 19.3 19.3 19.3
[09:40:02.285] <TB3> INFO: ----------------------------------------------------------------------
[09:40:02.285] <TB3> INFO: PixTestPretest::findTiming()
[09:40:02.285] <TB3> INFO: ----------------------------------------------------------------------
[09:40:02.285] <TB3> INFO: PixTestCmd::init()
[09:40:02.879] <TB3> WARNING: Not unmasking DUT, not setting Calibrate bits!
[09:41:38.857] <TB3> INFO: TBM phases: 160MHz: 7, 400MHz: 7, TBM delays: ROC(0/1):4, header/trailer: 1, token: 1
[09:41:38.857] <TB3> INFO: (success/tries = 100/100), width = 4
[09:41:38.858] <TB3> INFO: ----------------------------------------------------------------------
[09:41:38.858] <TB3> INFO: PixTestPretest::findWorkingPixel()
[09:41:38.858] <TB3> INFO: ----------------------------------------------------------------------
[09:41:38.996] <TB3> INFO: Expecting 231680 events.
[09:41:43.608] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L488> Channel 0 Number of ROCs (1) != Token Chain Length (8)
[09:41:43.611] <TB3> ERROR: <datapipe.cc/CheckEventID:L461> Channel 0 Event ID mismatch: local ID (21) != TBM ID (2)
[09:41:46.390] <TB3> INFO: 231680 events read in total (6679ms).
[09:41:46.395] <TB3> INFO: Test took 7534ms.
[09:41:46.803] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[09:41:46.836] <TB3> INFO: ----------------------------------------------------------------------
[09:41:46.837] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[09:41:46.837] <TB3> INFO: ----------------------------------------------------------------------
[09:41:46.972] <TB3> INFO: Expecting 231680 events.
[09:41:55.388] <TB3> INFO: 231680 events read in total (7701ms).
[09:41:55.392] <TB3> INFO: Test took 8551ms.
[09:41:55.811] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[09:41:55.811] <TB3> INFO: CalDel: 134 105 103 120 110 125 134 129 129 108 122 117 98 120 124 119
[09:41:55.811] <TB3> INFO: VthrComp: 52 51 54 53 51 51 51 54 51 51 52 51 56 57 51 51
[09:41:55.815] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C0.dat
[09:41:55.815] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C1.dat
[09:41:55.815] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C2.dat
[09:41:55.816] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C3.dat
[09:41:55.816] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C4.dat
[09:41:55.816] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C5.dat
[09:41:55.816] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C6.dat
[09:41:55.817] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C7.dat
[09:41:55.817] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C8.dat
[09:41:55.817] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C9.dat
[09:41:55.817] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C10.dat
[09:41:55.818] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C11.dat
[09:41:55.818] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C12.dat
[09:41:55.818] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C13.dat
[09:41:55.818] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C14.dat
[09:41:55.818] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters_C15.dat
[09:41:55.819] <TB3> INFO: write tbm parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//tbmParameters_C0a.dat
[09:41:55.819] <TB3> INFO: write tbm parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//tbmParameters_C0b.dat
[09:41:55.819] <TB3> INFO: PixTestPretest::doTest() done, duration: 137 seconds
[09:41:55.903] <TB3> INFO: enter test to run
[09:41:55.905] <TB3> INFO: test: fulltest no parameter change
[09:41:55.905] <TB3> INFO: running: fulltest
[09:41:55.905] <TB3> INFO: ######################################################################
[09:41:55.905] <TB3> INFO: PixTestFullTest::doTest()
[09:41:55.905] <TB3> INFO: ######################################################################
[09:41:55.906] <TB3> INFO: ######################################################################
[09:41:55.906] <TB3> INFO: PixTestAlive::doTest()
[09:41:55.906] <TB3> INFO: ######################################################################
[09:41:55.908] <TB3> INFO: ----------------------------------------------------------------------
[09:41:55.908] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:41:55.908] <TB3> INFO: ----------------------------------------------------------------------
[09:41:56.231] <TB3> INFO: Expecting 41600 events.
[09:42:00.535] <TB3> INFO: 41600 events read in total (3589ms).
[09:42:00.536] <TB3> INFO: Test took 4627ms.
[09:42:00.550] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:00.922] <TB3> INFO: PixTestAlive::aliveTest() done
[09:42:00.922] <TB3> INFO: number of dead pixels (per ROC): 0 19 4 0 0 1 5 0 1 7 0 0 0 6 3 0
[09:42:00.924] <TB3> INFO: ----------------------------------------------------------------------
[09:42:00.924] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:42:00.924] <TB3> INFO: ----------------------------------------------------------------------
[09:42:01.256] <TB3> INFO: Expecting 41600 events.
[09:42:04.388] <TB3> INFO: 41600 events read in total (2417ms).
[09:42:04.389] <TB3> INFO: Test took 3463ms.
[09:42:04.389] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:04.389] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[09:42:04.801] <TB3> INFO: PixTestAlive::maskTest() done
[09:42:04.801] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:42:04.803] <TB3> INFO: ----------------------------------------------------------------------
[09:42:04.803] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[09:42:04.803] <TB3> INFO: ----------------------------------------------------------------------
[09:42:05.142] <TB3> INFO: Expecting 41600 events.
[09:42:09.486] <TB3> INFO: 41600 events read in total (3629ms).
[09:42:09.487] <TB3> INFO: Test took 4682ms.
[09:42:09.493] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:09.872] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[09:42:09.872] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[09:42:09.872] <TB3> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[09:42:09.872] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:42:09.872] <TB3> INFO: Decoding statistics:
[09:42:09.872] <TB3> INFO: General information:
[09:42:09.872] <TB3> INFO: 16bit words read: 0
[09:42:09.872] <TB3> INFO: valid events total: 0
[09:42:09.872] <TB3> INFO: empty events: 0
[09:42:09.872] <TB3> INFO: valid events with pixels: 0
[09:42:09.872] <TB3> INFO: valid pixel hits: 0
[09:42:09.872] <TB3> INFO: Event errors: 0
[09:42:09.872] <TB3> INFO: start marker: 0
[09:42:09.872] <TB3> INFO: stop marker: 0
[09:42:09.872] <TB3> INFO: overflow: 0
[09:42:09.872] <TB3> INFO: invalid 5bit words: 0
[09:42:09.872] <TB3> INFO: invalid XOR eye diagram: 0
[09:42:09.872] <TB3> INFO: TBM errors: 0
[09:42:09.872] <TB3> INFO: flawed TBM headers: 0
[09:42:09.872] <TB3> INFO: flawed TBM trailers: 0
[09:42:09.872] <TB3> INFO: event ID mismatches: 0
[09:42:09.872] <TB3> INFO: ROC errors: 0
[09:42:09.873] <TB3> INFO: missing ROC header(s): 0
[09:42:09.873] <TB3> INFO: misplaced readback start: 0
[09:42:09.873] <TB3> INFO: Pixel decoding errors: 0
[09:42:09.873] <TB3> INFO: pixel data incomplete: 0
[09:42:09.873] <TB3> INFO: pixel address: 0
[09:42:09.873] <TB3> INFO: pulse height fill bit: 0
[09:42:09.873] <TB3> INFO: buffer corruption: 0
[09:42:09.883] <TB3> INFO: ######################################################################
[09:42:09.883] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[09:42:09.883] <TB3> INFO: ######################################################################
[09:42:09.886] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[09:42:09.899] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[09:42:09.899] <TB3> INFO: run 1 of 1
[09:42:10.231] <TB3> INFO: Expecting 3120000 events.
[09:43:03.712] <TB3> INFO: 1287600 events read in total (52765ms).
[09:43:55.801] <TB3> INFO: 2557690 events read in total (104855ms).
[09:44:17.463] <TB3> INFO: 3120000 events read in total (126517ms).
[09:44:17.501] <TB3> INFO: Test took 127603ms.
[09:44:17.568] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:43.550] <TB3> INFO: PixTestBBMap::doTest() done, duration: 153 seconds
[09:44:43.550] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
[09:44:43.550] <TB3> INFO: separation cut (per ROC): 140 151 145 140 144 142 135 140 136 138 146 139 147 140 139 135
[09:44:43.550] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:44:43.550] <TB3> INFO: Decoding statistics:
[09:44:43.550] <TB3> INFO: General information:
[09:44:43.550] <TB3> INFO: 16bit words read: 0
[09:44:43.550] <TB3> INFO: valid events total: 0
[09:44:43.550] <TB3> INFO: empty events: 0
[09:44:43.550] <TB3> INFO: valid events with pixels: 0
[09:44:43.550] <TB3> INFO: valid pixel hits: 0
[09:44:43.550] <TB3> INFO: Event errors: 0
[09:44:43.550] <TB3> INFO: start marker: 0
[09:44:43.550] <TB3> INFO: stop marker: 0
[09:44:43.550] <TB3> INFO: overflow: 0
[09:44:43.550] <TB3> INFO: invalid 5bit words: 0
[09:44:43.550] <TB3> INFO: invalid XOR eye diagram: 0
[09:44:43.550] <TB3> INFO: TBM errors: 0
[09:44:43.550] <TB3> INFO: flawed TBM headers: 0
[09:44:43.550] <TB3> INFO: flawed TBM trailers: 0
[09:44:43.550] <TB3> INFO: event ID mismatches: 0
[09:44:43.550] <TB3> INFO: ROC errors: 0
[09:44:43.550] <TB3> INFO: missing ROC header(s): 0
[09:44:43.550] <TB3> INFO: misplaced readback start: 0
[09:44:43.550] <TB3> INFO: Pixel decoding errors: 0
[09:44:43.550] <TB3> INFO: pixel data incomplete: 0
[09:44:43.550] <TB3> INFO: pixel address: 0
[09:44:43.550] <TB3> INFO: pulse height fill bit: 0
[09:44:43.550] <TB3> INFO: buffer corruption: 0
[09:44:43.637] <TB3> INFO: ######################################################################
[09:44:43.637] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:44:43.637] <TB3> INFO: ######################################################################
[09:44:43.637] <TB3> INFO: ----------------------------------------------------------------------
[09:44:43.637] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[09:44:43.637] <TB3> INFO: ----------------------------------------------------------------------
[09:44:43.638] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[09:44:43.647] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[09:44:43.647] <TB3> INFO: run 1 of 1
[09:44:43.957] <TB3> INFO: Expecting 26208000 events.
[09:45:18.572] <TB3> INFO: 1392250 events read in total (33900ms).
[09:45:52.469] <TB3> INFO: 2758850 events read in total (67797ms).
[09:46:26.506] <TB3> INFO: 4122750 events read in total (101834ms).
[09:47:00.094] <TB3> INFO: 5476000 events read in total (135422ms).
[09:47:33.673] <TB3> INFO: 6829550 events read in total (169001ms).
[09:48:07.327] <TB3> INFO: 8183850 events read in total (202655ms).
[09:48:40.324] <TB3> INFO: 9534450 events read in total (235652ms).
[09:49:12.821] <TB3> INFO: 10877600 events read in total (268149ms).
[09:49:46.092] <TB3> INFO: 12221450 events read in total (301420ms).
[09:50:20.159] <TB3> INFO: 13544750 events read in total (335487ms).
[09:50:54.853] <TB3> INFO: 14858400 events read in total (370181ms).
[09:51:29.615] <TB3> INFO: 16168550 events read in total (404943ms).
[09:52:03.921] <TB3> INFO: 17467350 events read in total (439249ms).
[09:52:38.579] <TB3> INFO: 18772750 events read in total (473907ms).
[09:53:13.188] <TB3> INFO: 20070350 events read in total (508516ms).
[09:53:47.907] <TB3> INFO: 21370250 events read in total (543235ms).
[09:54:22.213] <TB3> INFO: 22667300 events read in total (577541ms).
[09:54:57.142] <TB3> INFO: 23970550 events read in total (612470ms).
[09:55:32.011] <TB3> INFO: 25278750 events read in total (647339ms).
[09:55:55.733] <TB3> INFO: 26208000 events read in total (671061ms).
[09:55:55.761] <TB3> INFO: Test took 672114ms.
[09:55:55.815] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:55:55.932] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:55:57.238] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:55:58.603] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:56:00.207] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:56:01.532] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:56:02.880] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:56:04.338] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:56:05.932] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:56:07.422] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:56:08.842] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:56:10.205] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:56:11.586] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:56:12.930] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:56:14.242] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:56:15.664] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:56:17.262] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[09:56:18.765] <TB3> INFO: PixTestScurves::scurves() done
[09:56:18.765] <TB3> INFO: Vcal mean: 117.52 124.91 124.25 119.57 119.75 119.05 112.09 124.59 112.01 115.17 129.23 117.09 127.18 117.92 114.95 115.51
[09:56:18.765] <TB3> INFO: Vcal RMS: 6.28 10.50 7.60 6.12 6.07 6.30 6.95 6.51 5.57 6.93 8.55 5.08 6.27 7.89 6.78 6.21
[09:56:18.765] <TB3> INFO: PixTestScurves::fullTest() done, duration: 695 seconds
[09:56:18.765] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:56:18.765] <TB3> INFO: Decoding statistics:
[09:56:18.765] <TB3> INFO: General information:
[09:56:18.765] <TB3> INFO: 16bit words read: 0
[09:56:18.765] <TB3> INFO: valid events total: 0
[09:56:18.765] <TB3> INFO: empty events: 0
[09:56:18.765] <TB3> INFO: valid events with pixels: 0
[09:56:18.765] <TB3> INFO: valid pixel hits: 0
[09:56:18.765] <TB3> INFO: Event errors: 0
[09:56:18.765] <TB3> INFO: start marker: 0
[09:56:18.765] <TB3> INFO: stop marker: 0
[09:56:18.765] <TB3> INFO: overflow: 0
[09:56:18.765] <TB3> INFO: invalid 5bit words: 0
[09:56:18.765] <TB3> INFO: invalid XOR eye diagram: 0
[09:56:18.765] <TB3> INFO: TBM errors: 0
[09:56:18.765] <TB3> INFO: flawed TBM headers: 0
[09:56:18.765] <TB3> INFO: flawed TBM trailers: 0
[09:56:18.765] <TB3> INFO: event ID mismatches: 0
[09:56:18.765] <TB3> INFO: ROC errors: 0
[09:56:18.765] <TB3> INFO: missing ROC header(s): 0
[09:56:18.765] <TB3> INFO: misplaced readback start: 0
[09:56:18.765] <TB3> INFO: Pixel decoding errors: 0
[09:56:18.765] <TB3> INFO: pixel data incomplete: 0
[09:56:18.765] <TB3> INFO: pixel address: 0
[09:56:18.765] <TB3> INFO: pulse height fill bit: 0
[09:56:18.765] <TB3> INFO: buffer corruption: 0
[09:56:18.845] <TB3> INFO: ######################################################################
[09:56:18.845] <TB3> INFO: PixTestTrim::doTest()
[09:56:18.845] <TB3> INFO: ######################################################################
[09:56:18.848] <TB3> INFO: ----------------------------------------------------------------------
[09:56:18.848] <TB3> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[09:56:18.848] <TB3> INFO: ----------------------------------------------------------------------
[09:56:18.943] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[09:56:18.943] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[09:56:18.952] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[09:56:18.952] <TB3> INFO: run 1 of 1
[09:56:19.280] <TB3> INFO: Expecting 6281600 events.
[09:57:04.204] <TB3> INFO: 1475650 events read in total (44209ms).
[09:57:46.246] <TB3> INFO: 2944160 events read in total (86251ms).
[09:58:32.765] <TB3> INFO: 4398820 events read in total (132770ms).
[09:59:19.878] <TB3> INFO: 5847960 events read in total (179883ms).
[09:59:32.967] <TB3> INFO: 6281600 events read in total (192972ms).
[09:59:32.998] <TB3> INFO: Test took 194047ms.
[09:59:33.044] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[09:59:54.380] <TB3> INFO: ROC 0 VthrComp = 106
[09:59:54.380] <TB3> INFO: ROC 1 VthrComp = 111
[09:59:54.381] <TB3> INFO: ROC 2 VthrComp = 112
[09:59:54.381] <TB3> INFO: ROC 3 VthrComp = 110
[09:59:54.381] <TB3> INFO: ROC 4 VthrComp = 114
[09:59:54.381] <TB3> INFO: ROC 5 VthrComp = 110
[09:59:54.381] <TB3> INFO: ROC 6 VthrComp = 106
[09:59:54.381] <TB3> INFO: ROC 7 VthrComp = 112
[09:59:54.381] <TB3> INFO: ROC 8 VthrComp = 106
[09:59:54.382] <TB3> INFO: ROC 9 VthrComp = 109
[09:59:54.382] <TB3> INFO: ROC 10 VthrComp = 116
[09:59:54.382] <TB3> INFO: ROC 11 VthrComp = 111
[09:59:54.382] <TB3> INFO: ROC 12 VthrComp = 118
[09:59:54.382] <TB3> INFO: ROC 13 VthrComp = 109
[09:59:54.382] <TB3> INFO: ROC 14 VthrComp = 106
[09:59:54.382] <TB3> INFO: ROC 15 VthrComp = 109
[09:59:54.382] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[09:59:54.382] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[09:59:54.392] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[09:59:54.392] <TB3> INFO: run 1 of 1
[09:59:54.700] <TB3> INFO: Expecting 6281600 events.
[10:00:30.317] <TB3> INFO: 910990 events read in total (34902ms).
[10:01:04.986] <TB3> INFO: 1819250 events read in total (69571ms).
[10:01:41.333] <TB3> INFO: 2728740 events read in total (105918ms).
[10:02:19.506] <TB3> INFO: 3632720 events read in total (144091ms).
[10:02:57.145] <TB3> INFO: 4527140 events read in total (181730ms).
[10:03:34.191] <TB3> INFO: 5417750 events read in total (218777ms).
[10:04:11.483] <TB3> INFO: 6281600 events read in total (256068ms).
[10:04:11.568] <TB3> INFO: Test took 257176ms.
[10:04:11.726] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:04:38.032] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 71.4244 for pixel 0/1 mean/min/max = 53.0669/34.5807/71.5531
[10:04:38.033] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 74.0503 for pixel 6/18 mean/min/max = 56.3511/38.571/74.1312
[10:04:38.033] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 71.0345 for pixel 13/1 mean/min/max = 54.807/38.4767/71.1373
[10:04:38.033] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 69.5562 for pixel 18/78 mean/min/max = 53.0817/36.5694/69.5941
[10:04:38.034] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 64.1757 for pixel 17/66 mean/min/max = 49.8235/35.4697/64.1774
[10:04:38.034] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 68.7508 for pixel 6/6 mean/min/max = 52.7081/36.4635/68.9527
[10:04:38.035] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 62.6724 for pixel 0/57 mean/min/max = 48.3475/33.9988/62.6961
[10:04:38.035] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 68.4416 for pixel 7/5 mean/min/max = 52.2589/36.0756/68.4423
[10:04:38.035] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 62.9997 for pixel 1/3 mean/min/max = 48.7569/34.4158/63.098
[10:04:38.036] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 63.1218 for pixel 22/14 mean/min/max = 49.2696/35.1525/63.3867
[10:04:38.036] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 68.9367 for pixel 17/66 mean/min/max = 52.9487/36.8423/69.0552
[10:04:38.037] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 62.1626 for pixel 1/79 mean/min/max = 49.4328/36.6442/62.2214
[10:04:38.037] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 67.7462 for pixel 28/7 mean/min/max = 52.2933/36.7676/67.8191
[10:04:38.037] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 72.1741 for pixel 5/3 mean/min/max = 54.8295/37.4228/72.2362
[10:04:38.038] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 64.4534 for pixel 15/71 mean/min/max = 49.3072/33.7713/64.8432
[10:04:38.038] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 62.9709 for pixel 0/51 mean/min/max = 48.654/34.3126/62.9955
[10:04:38.038] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:04:38.170] <TB3> INFO: Expecting 514560 events.
[10:04:47.803] <TB3> INFO: 514560 events read in total (8918ms).
[10:04:47.808] <TB3> INFO: Expecting 514560 events.
[10:04:57.478] <TB3> INFO: 514560 events read in total (9006ms).
[10:04:57.487] <TB3> INFO: Expecting 514560 events.
[10:05:06.820] <TB3> INFO: 514560 events read in total (8681ms).
[10:05:06.830] <TB3> INFO: Expecting 514560 events.
[10:05:16.699] <TB3> INFO: 514560 events read in total (9208ms).
[10:05:16.713] <TB3> INFO: Expecting 514560 events.
[10:05:26.373] <TB3> INFO: 514560 events read in total (9015ms).
[10:05:26.390] <TB3> INFO: Expecting 514560 events.
[10:05:35.924] <TB3> INFO: 514560 events read in total (8892ms).
[10:05:35.941] <TB3> INFO: Expecting 514560 events.
[10:05:45.147] <TB3> INFO: 514560 events read in total (8564ms).
[10:05:45.172] <TB3> INFO: Expecting 514560 events.
[10:05:54.068] <TB3> INFO: 514560 events read in total (8260ms).
[10:05:54.089] <TB3> INFO: Expecting 514560 events.
[10:06:03.080] <TB3> INFO: 514560 events read in total (8337ms).
[10:06:03.112] <TB3> INFO: Expecting 514560 events.
[10:06:12.096] <TB3> INFO: 514560 events read in total (8362ms).
[10:06:12.121] <TB3> INFO: Expecting 514560 events.
[10:06:21.600] <TB3> INFO: 514560 events read in total (8839ms).
[10:06:21.627] <TB3> INFO: Expecting 514560 events.
[10:06:31.013] <TB3> INFO: 514560 events read in total (8748ms).
[10:06:31.045] <TB3> INFO: Expecting 514560 events.
[10:06:40.033] <TB3> INFO: 514560 events read in total (8349ms).
[10:06:40.067] <TB3> INFO: Expecting 514560 events.
[10:06:49.043] <TB3> INFO: 514560 events read in total (8340ms).
[10:06:49.079] <TB3> INFO: Expecting 514560 events.
[10:06:58.235] <TB3> INFO: 514560 events read in total (8515ms).
[10:06:58.279] <TB3> INFO: Expecting 514560 events.
[10:07:07.892] <TB3> INFO: 514560 events read in total (8991ms).
[10:07:07.929] <TB3> INFO: Test took 149891ms.
[10:07:09.066] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[10:07:09.076] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:07:09.076] <TB3> INFO: run 1 of 1
[10:07:09.394] <TB3> INFO: Expecting 6281600 events.
[10:07:48.001] <TB3> INFO: 877110 events read in total (37892ms).
[10:08:26.844] <TB3> INFO: 1752310 events read in total (76735ms).
[10:09:05.949] <TB3> INFO: 2629120 events read in total (115840ms).
[10:09:42.056] <TB3> INFO: 3502260 events read in total (151947ms).
[10:10:16.369] <TB3> INFO: 4366380 events read in total (186260ms).
[10:10:50.831] <TB3> INFO: 5226800 events read in total (220722ms).
[10:11:25.773] <TB3> INFO: 6087340 events read in total (255664ms).
[10:11:33.905] <TB3> INFO: 6281600 events read in total (263796ms).
[10:11:33.964] <TB3> INFO: Test took 264888ms.
[10:11:34.119] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:12:00.234] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.038306 .. 255.000000
[10:12:00.316] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 10 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[10:12:00.325] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:12:00.325] <TB3> INFO: run 1 of 1
[10:12:00.633] <TB3> INFO: Expecting 10649600 events.
[10:12:35.892] <TB3> INFO: 826080 events read in total (34544ms).
[10:13:10.935] <TB3> INFO: 1652380 events read in total (69587ms).
[10:13:42.330] <TB3> INFO: 2478440 events read in total (100982ms).
[10:14:17.565] <TB3> INFO: 3304480 events read in total (136217ms).
[10:14:50.460] <TB3> INFO: 4130370 events read in total (169112ms).
[10:15:23.877] <TB3> INFO: 4956910 events read in total (202529ms).
[10:15:58.076] <TB3> INFO: 5785210 events read in total (236728ms).
[10:16:29.872] <TB3> INFO: 6614090 events read in total (268524ms).
[10:17:04.998] <TB3> INFO: 7443110 events read in total (303650ms).
[10:17:37.037] <TB3> INFO: 8271540 events read in total (335689ms).
[10:18:11.551] <TB3> INFO: 9099650 events read in total (370204ms).
[10:18:45.782] <TB3> INFO: 9928740 events read in total (404434ms).
[10:19:16.022] <TB3> INFO: 10649600 events read in total (434674ms).
[10:19:16.129] <TB3> INFO: Test took 435804ms.
[10:19:16.398] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:19:47.973] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 7.344569 .. 75.988548
[10:19:48.054] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 10 dacrange: 7 .. 85 (-1/-1) hits flags = 528 (plus default)
[10:19:48.063] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:19:48.063] <TB3> INFO: run 1 of 1
[10:19:48.366] <TB3> INFO: Expecting 3286400 events.
[10:20:26.348] <TB3> INFO: 963000 events read in total (37262ms).
[10:21:03.178] <TB3> INFO: 1925890 events read in total (74093ms).
[10:21:39.564] <TB3> INFO: 2888080 events read in total (110479ms).
[10:21:53.635] <TB3> INFO: 3286400 events read in total (124549ms).
[10:21:53.682] <TB3> INFO: Test took 125620ms.
[10:21:53.765] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:22:10.518] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 1.968208 .. 60.721952
[10:22:10.615] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 10 dacrange: 1 .. 70 (-1/-1) hits flags = 528 (plus default)
[10:22:10.624] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:22:10.624] <TB3> INFO: run 1 of 1
[10:22:10.959] <TB3> INFO: Expecting 2912000 events.
[10:22:46.978] <TB3> INFO: 1065410 events read in total (35304ms).
[10:23:24.297] <TB3> INFO: 2130900 events read in total (72623ms).
[10:23:51.501] <TB3> INFO: 2912000 events read in total (99827ms).
[10:23:51.531] <TB3> INFO: Test took 100908ms.
[10:23:51.593] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:24:08.103] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 1.968208 .. 60.721952
[10:24:08.201] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 10 dacrange: 1 .. 70 (-1/-1) hits flags = 528 (plus default)
[10:24:08.210] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:24:08.210] <TB3> INFO: run 1 of 1
[10:24:08.545] <TB3> INFO: Expecting 2912000 events.
[10:24:49.586] <TB3> INFO: 1066890 events read in total (40319ms).
[10:25:26.524] <TB3> INFO: 2133350 events read in total (77257ms).
[10:25:53.545] <TB3> INFO: 2912000 events read in total (104278ms).
[10:25:53.566] <TB3> INFO: Test took 105356ms.
[10:25:53.617] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:26:10.911] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[10:26:10.911] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[10:26:10.919] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:26:10.919] <TB3> INFO: run 1 of 1
[10:26:11.235] <TB3> INFO: Expecting 1705600 events.
[10:26:49.679] <TB3> INFO: 1077270 events read in total (37722ms).
[10:27:14.024] <TB3> INFO: 1705600 events read in total (62067ms).
[10:27:14.041] <TB3> INFO: Test took 63122ms.
[10:27:14.073] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:27:27.696] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C0.dat
[10:27:27.696] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C1.dat
[10:27:27.696] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C2.dat
[10:27:27.696] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C3.dat
[10:27:27.696] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C4.dat
[10:27:27.697] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C5.dat
[10:27:27.697] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C6.dat
[10:27:27.697] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C7.dat
[10:27:27.697] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C8.dat
[10:27:27.697] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C9.dat
[10:27:27.697] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C10.dat
[10:27:27.697] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C11.dat
[10:27:27.698] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C12.dat
[10:27:27.698] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C13.dat
[10:27:27.698] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C14.dat
[10:27:27.698] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C15.dat
[10:27:27.698] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C0.dat
[10:27:27.706] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C1.dat
[10:27:27.715] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C2.dat
[10:27:27.722] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C3.dat
[10:27:27.730] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C4.dat
[10:27:27.736] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C5.dat
[10:27:27.742] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C6.dat
[10:27:27.748] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C7.dat
[10:27:27.754] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C8.dat
[10:27:27.761] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C9.dat
[10:27:27.769] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C10.dat
[10:27:27.777] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C11.dat
[10:27:27.785] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C12.dat
[10:27:27.792] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C13.dat
[10:27:27.800] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C14.dat
[10:27:27.808] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//trimParameters35_C15.dat
[10:27:27.816] <TB3> INFO: PixTestTrim::trimTest() done
[10:27:27.816] <TB3> INFO: vtrim: 119 156 143 150 139 143 112 137 129 129 147 125 144 133 116 114
[10:27:27.816] <TB3> INFO: vthrcomp: 106 111 112 110 114 110 106 112 106 109 116 111 118 109 106 109
[10:27:27.816] <TB3> INFO: vcal mean: 35.00 34.82 34.91 35.02 34.97 34.95 35.01 34.94 35.02 34.93 34.98 34.99 34.93 34.92 34.93 35.00
[10:27:27.816] <TB3> INFO: vcal RMS: 1.07 2.58 1.45 1.00 1.01 0.99 1.51 1.01 1.07 1.70 1.22 0.90 1.00 1.64 1.36 0.96
[10:27:27.816] <TB3> INFO: bits mean: 7.40 7.66 7.48 7.89 8.21 7.76 8.14 7.86 8.67 8.46 8.04 8.16 8.19 7.23 8.90 8.77
[10:27:27.816] <TB3> INFO: bits RMS: 2.66 2.13 2.17 2.21 2.41 2.25 2.77 2.35 2.47 2.45 2.20 2.28 2.17 2.33 2.45 2.47
[10:27:27.824] <TB3> INFO: ----------------------------------------------------------------------
[10:27:27.824] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[10:27:27.824] <TB3> INFO: ----------------------------------------------------------------------
[10:27:27.828] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[10:27:27.838] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:27:27.838] <TB3> INFO: run 1 of 1
[10:27:28.168] <TB3> INFO: Expecting 8320000 events.
[10:28:08.883] <TB3> INFO: 1376310 events read in total (40000ms).
[10:28:48.962] <TB3> INFO: 2737150 events read in total (80079ms).
[10:29:30.516] <TB3> INFO: 4086420 events read in total (121633ms).
[10:30:12.357] <TB3> INFO: 5413670 events read in total (163474ms).
[10:30:54.793] <TB3> INFO: 6737370 events read in total (205910ms).
[10:31:37.364] <TB3> INFO: 8060080 events read in total (248481ms).
[10:31:45.854] <TB3> INFO: 8320000 events read in total (256971ms).
[10:31:45.895] <TB3> INFO: Test took 258057ms.
[10:31:45.968] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:32:10.905] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 204 (-1/-1) hits flags = 528 (plus default)
[10:32:10.913] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:32:10.913] <TB3> INFO: run 1 of 1
[10:32:11.220] <TB3> INFO: Expecting 8528000 events.
[10:32:49.646] <TB3> INFO: 1279930 events read in total (37711ms).
[10:33:30.926] <TB3> INFO: 2547230 events read in total (78991ms).
[10:34:09.388] <TB3> INFO: 3808490 events read in total (117454ms).
[10:34:49.482] <TB3> INFO: 5053200 events read in total (157547ms).
[10:35:31.338] <TB3> INFO: 6289000 events read in total (199403ms).
[10:36:11.306] <TB3> INFO: 7523570 events read in total (239371ms).
[10:36:45.951] <TB3> INFO: 8528000 events read in total (274016ms).
[10:36:46.002] <TB3> INFO: Test took 275089ms.
[10:36:46.093] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:37:12.544] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 195 (-1/-1) hits flags = 528 (plus default)
[10:37:12.553] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:37:12.553] <TB3> INFO: run 1 of 1
[10:37:12.879] <TB3> INFO: Expecting 8153600 events.
[10:37:54.867] <TB3> INFO: 1320650 events read in total (41271ms).
[10:38:36.188] <TB3> INFO: 2627170 events read in total (82592ms).
[10:39:18.218] <TB3> INFO: 3925980 events read in total (124623ms).
[10:40:01.276] <TB3> INFO: 5203020 events read in total (167680ms).
[10:40:44.858] <TB3> INFO: 6475160 events read in total (211262ms).
[10:41:23.657] <TB3> INFO: 7748540 events read in total (250061ms).
[10:41:36.080] <TB3> INFO: 8153600 events read in total (262484ms).
[10:41:36.133] <TB3> INFO: Test took 263580ms.
[10:41:36.226] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:42:02.333] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 194 (-1/-1) hits flags = 528 (plus default)
[10:42:02.341] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:42:02.341] <TB3> INFO: run 1 of 1
[10:42:02.650] <TB3> INFO: Expecting 8112000 events.
[10:42:48.615] <TB3> INFO: 1324090 events read in total (45250ms).
[10:43:29.156] <TB3> INFO: 2635050 events read in total (85792ms).
[10:44:10.595] <TB3> INFO: 3937150 events read in total (127230ms).
[10:44:54.978] <TB3> INFO: 5217490 events read in total (171613ms).
[10:45:39.130] <TB3> INFO: 6493010 events read in total (215765ms).
[10:46:20.238] <TB3> INFO: 7770690 events read in total (256873ms).
[10:46:30.401] <TB3> INFO: 8112000 events read in total (267036ms).
[10:46:30.445] <TB3> INFO: Test took 268103ms.
[10:46:30.527] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:46:55.964] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 196 (-1/-1) hits flags = 528 (plus default)
[10:46:55.976] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[10:46:55.976] <TB3> INFO: run 1 of 1
[10:46:56.309] <TB3> INFO: Expecting 8195200 events.
[10:47:41.096] <TB3> INFO: 1314080 events read in total (44072ms).
[10:48:25.672] <TB3> INFO: 2614160 events read in total (88649ms).
[10:49:03.737] <TB3> INFO: 3906740 events read in total (126713ms).
[10:49:46.933] <TB3> INFO: 5178800 events read in total (169909ms).
[10:50:28.893] <TB3> INFO: 6444980 events read in total (211869ms).
[10:51:11.146] <TB3> INFO: 7712290 events read in total (254122ms).
[10:51:26.034] <TB3> INFO: 8195200 events read in total (269010ms).
[10:51:26.096] <TB3> INFO: Test took 270120ms.
[10:51:26.188] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:51.672] <TB3> INFO: PixTestTrim::trimBitTest() done
[10:51:51.675] <TB3> INFO: PixTestTrim::doTest() done, duration: 3332 seconds
[10:51:51.675] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:51.675] <TB3> INFO: Decoding statistics:
[10:51:51.675] <TB3> INFO: General information:
[10:51:51.675] <TB3> INFO: 16bit words read: 0
[10:51:51.675] <TB3> INFO: valid events total: 0
[10:51:51.675] <TB3> INFO: empty events: 0
[10:51:51.675] <TB3> INFO: valid events with pixels: 0
[10:51:51.675] <TB3> INFO: valid pixel hits: 0
[10:51:51.675] <TB3> INFO: Event errors: 0
[10:51:51.675] <TB3> INFO: start marker: 0
[10:51:51.675] <TB3> INFO: stop marker: 0
[10:51:51.675] <TB3> INFO: overflow: 0
[10:51:51.675] <TB3> INFO: invalid 5bit words: 0
[10:51:51.675] <TB3> INFO: invalid XOR eye diagram: 0
[10:51:51.675] <TB3> INFO: TBM errors: 0
[10:51:51.675] <TB3> INFO: flawed TBM headers: 0
[10:51:51.675] <TB3> INFO: flawed TBM trailers: 0
[10:51:51.675] <TB3> INFO: event ID mismatches: 0
[10:51:51.675] <TB3> INFO: ROC errors: 0
[10:51:51.675] <TB3> INFO: missing ROC header(s): 0
[10:51:51.675] <TB3> INFO: misplaced readback start: 0
[10:51:51.675] <TB3> INFO: Pixel decoding errors: 0
[10:51:51.675] <TB3> INFO: pixel data incomplete: 0
[10:51:51.675] <TB3> INFO: pixel address: 0
[10:51:51.675] <TB3> INFO: pulse height fill bit: 0
[10:51:51.675] <TB3> INFO: buffer corruption: 0
[10:51:52.388] <TB3> INFO: ######################################################################
[10:51:52.388] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[10:51:52.388] <TB3> INFO: ######################################################################
[10:51:52.693] <TB3> INFO: Expecting 41600 events.
[10:51:56.990] <TB3> INFO: 41600 events read in total (3582ms).
[10:51:56.991] <TB3> INFO: Test took 4602ms.
[10:51:56.997] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:51:57.689] <TB3> INFO: Expecting 41600 events.
[10:52:01.989] <TB3> INFO: 41600 events read in total (3585ms).
[10:52:01.990] <TB3> INFO: Test took 4644ms.
[10:52:01.996] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:52:02.442] <TB3> INFO: Expecting 41600 events.
[10:52:06.700] <TB3> INFO: 41600 events read in total (3543ms).
[10:52:06.701] <TB3> INFO: Test took 4583ms.
[10:52:06.709] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:52:07.135] <TB3> INFO: Expecting 2560 events.
[10:52:08.099] <TB3> INFO: 2560 events read in total (249ms).
[10:52:08.099] <TB3> INFO: Test took 1382ms.
[10:52:08.607] <TB3> INFO: Expecting 2560 events.
[10:52:09.566] <TB3> INFO: 2560 events read in total (244ms).
[10:52:09.566] <TB3> INFO: Test took 1466ms.
[10:52:10.074] <TB3> INFO: Expecting 2560 events.
[10:52:11.036] <TB3> INFO: 2560 events read in total (247ms).
[10:52:11.037] <TB3> INFO: Test took 1471ms.
[10:52:11.545] <TB3> INFO: Expecting 2560 events.
[10:52:12.507] <TB3> INFO: 2560 events read in total (247ms).
[10:52:12.508] <TB3> INFO: Test took 1471ms.
[10:52:13.016] <TB3> INFO: Expecting 2560 events.
[10:52:13.977] <TB3> INFO: 2560 events read in total (246ms).
[10:52:13.978] <TB3> INFO: Test took 1470ms.
[10:52:14.486] <TB3> INFO: Expecting 2560 events.
[10:52:15.447] <TB3> INFO: 2560 events read in total (246ms).
[10:52:15.447] <TB3> INFO: Test took 1469ms.
[10:52:15.956] <TB3> INFO: Expecting 2560 events.
[10:52:16.919] <TB3> INFO: 2560 events read in total (248ms).
[10:52:16.924] <TB3> INFO: Test took 1476ms.
[10:52:17.426] <TB3> INFO: Expecting 2560 events.
[10:52:18.383] <TB3> INFO: 2560 events read in total (242ms).
[10:52:18.383] <TB3> INFO: Test took 1459ms.
[10:52:18.892] <TB3> INFO: Expecting 2560 events.
[10:52:19.854] <TB3> INFO: 2560 events read in total (247ms).
[10:52:19.855] <TB3> INFO: Test took 1472ms.
[10:52:20.362] <TB3> INFO: Expecting 2560 events.
[10:52:21.325] <TB3> INFO: 2560 events read in total (248ms).
[10:52:21.325] <TB3> INFO: Test took 1470ms.
[10:52:21.833] <TB3> INFO: Expecting 2560 events.
[10:52:22.793] <TB3> INFO: 2560 events read in total (245ms).
[10:52:22.794] <TB3> INFO: Test took 1469ms.
[10:52:23.301] <TB3> INFO: Expecting 2560 events.
[10:52:24.259] <TB3> INFO: 2560 events read in total (243ms).
[10:52:24.259] <TB3> INFO: Test took 1465ms.
[10:52:24.768] <TB3> INFO: Expecting 2560 events.
[10:52:25.731] <TB3> INFO: 2560 events read in total (248ms).
[10:52:25.732] <TB3> INFO: Test took 1472ms.
[10:52:26.240] <TB3> INFO: Expecting 2560 events.
[10:52:27.206] <TB3> INFO: 2560 events read in total (251ms).
[10:52:27.207] <TB3> INFO: Test took 1475ms.
[10:52:27.714] <TB3> INFO: Expecting 2560 events.
[10:52:28.672] <TB3> INFO: 2560 events read in total (243ms).
[10:52:28.674] <TB3> INFO: Test took 1467ms.
[10:52:29.181] <TB3> INFO: Expecting 2560 events.
[10:52:30.143] <TB3> INFO: 2560 events read in total (247ms).
[10:52:30.144] <TB3> INFO: Test took 1470ms.
[10:52:30.148] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:52:30.652] <TB3> INFO: Expecting 655360 events.
[10:52:42.827] <TB3> INFO: 655360 events read in total (11460ms).
[10:52:42.835] <TB3> INFO: Expecting 655360 events.
[10:52:54.995] <TB3> INFO: 655360 events read in total (11561ms).
[10:52:55.008] <TB3> INFO: Expecting 655360 events.
[10:53:06.932] <TB3> INFO: 655360 events read in total (11331ms).
[10:53:06.951] <TB3> INFO: Expecting 655360 events.
[10:53:18.845] <TB3> INFO: 655360 events read in total (11323ms).
[10:53:18.864] <TB3> INFO: Expecting 655360 events.
[10:53:31.070] <TB3> INFO: 655360 events read in total (11617ms).
[10:53:31.098] <TB3> INFO: Expecting 655360 events.
[10:53:43.157] <TB3> INFO: 655360 events read in total (11482ms).
[10:53:43.184] <TB3> INFO: Expecting 655360 events.
[10:53:55.103] <TB3> INFO: 655360 events read in total (11338ms).
[10:53:55.136] <TB3> INFO: Expecting 655360 events.
[10:54:06.798] <TB3> INFO: 655360 events read in total (11087ms).
[10:54:06.864] <TB3> INFO: Expecting 655360 events.
[10:54:18.067] <TB3> INFO: 655360 events read in total (10662ms).
[10:54:18.103] <TB3> INFO: Expecting 655360 events.
[10:54:29.836] <TB3> INFO: 655360 events read in total (11158ms).
[10:54:29.893] <TB3> INFO: Expecting 655360 events.
[10:54:41.204] <TB3> INFO: 655360 events read in total (10784ms).
[10:54:41.248] <TB3> INFO: Expecting 655360 events.
[10:54:52.554] <TB3> INFO: 655360 events read in total (10737ms).
[10:54:52.603] <TB3> INFO: Expecting 655360 events.
[10:55:04.465] <TB3> INFO: 655360 events read in total (11299ms).
[10:55:04.515] <TB3> INFO: Expecting 655360 events.
[10:55:16.716] <TB3> INFO: 655360 events read in total (11644ms).
[10:55:16.769] <TB3> INFO: Expecting 655360 events.
[10:55:29.041] <TB3> INFO: 655360 events read in total (11729ms).
[10:55:29.097] <TB3> INFO: Expecting 655360 events.
[10:55:41.406] <TB3> INFO: 655360 events read in total (11755ms).
[10:55:41.466] <TB3> INFO: Test took 191318ms.
[10:55:41.543] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:55:41.852] <TB3> INFO: Expecting 655360 events.
[10:55:54.088] <TB3> INFO: 655360 events read in total (11521ms).
[10:55:54.097] <TB3> INFO: Expecting 655360 events.
[10:56:06.185] <TB3> INFO: 655360 events read in total (11468ms).
[10:56:06.197] <TB3> INFO: Expecting 655360 events.
[10:56:18.432] <TB3> INFO: 655360 events read in total (11634ms).
[10:56:18.451] <TB3> INFO: Expecting 655360 events.
[10:56:30.003] <TB3> INFO: 655360 events read in total (10975ms).
[10:56:30.024] <TB3> INFO: Expecting 655360 events.
[10:56:41.346] <TB3> INFO: 655360 events read in total (10728ms).
[10:56:41.372] <TB3> INFO: Expecting 655360 events.
[10:56:52.722] <TB3> INFO: 655360 events read in total (10783ms).
[10:56:52.754] <TB3> INFO: Expecting 655360 events.
[10:57:05.110] <TB3> INFO: 655360 events read in total (11797ms).
[10:57:05.139] <TB3> INFO: Expecting 655360 events.
[10:57:17.099] <TB3> INFO: 655360 events read in total (11380ms).
[10:57:17.133] <TB3> INFO: Expecting 655360 events.
[10:57:29.433] <TB3> INFO: 655360 events read in total (11714ms).
[10:57:29.472] <TB3> INFO: Expecting 655360 events.
[10:57:41.548] <TB3> INFO: 655360 events read in total (11510ms).
[10:57:41.588] <TB3> INFO: Expecting 655360 events.
[10:57:53.961] <TB3> INFO: 655360 events read in total (11789ms).
[10:57:54.008] <TB3> INFO: Expecting 655360 events.
[10:58:06.237] <TB3> INFO: 655360 events read in total (11676ms).
[10:58:06.282] <TB3> INFO: Expecting 655360 events.
[10:58:18.597] <TB3> INFO: 655360 events read in total (11744ms).
[10:58:18.646] <TB3> INFO: Expecting 655360 events.
[10:58:30.926] <TB3> INFO: 655360 events read in total (11735ms).
[10:58:30.977] <TB3> INFO: Expecting 655360 events.
[10:58:43.219] <TB3> INFO: 655360 events read in total (11696ms).
[10:58:43.275] <TB3> INFO: Expecting 655360 events.
[10:58:55.379] <TB3> INFO: 655360 events read in total (11546ms).
[10:58:55.449] <TB3> INFO: Test took 193906ms.
[10:58:55.663] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:58:55.670] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:58:55.677] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:58:55.686] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:58:55.695] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:58:55.703] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:58:55.712] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[10:58:55.719] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:58:55.726] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[10:58:55.735] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:58:55.744] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:58:55.752] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:58:55.759] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:58:55.766] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:58:55.773] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:58:55.780] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:58:55.787] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:58:55.794] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[10:58:55.801] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[10:58:55.841] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C0.dat
[10:58:55.841] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C1.dat
[10:58:55.841] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C2.dat
[10:58:55.842] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C3.dat
[10:58:55.842] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C4.dat
[10:58:55.842] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C5.dat
[10:58:55.842] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C6.dat
[10:58:55.842] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C7.dat
[10:58:55.843] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C8.dat
[10:58:55.843] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C9.dat
[10:58:55.843] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C10.dat
[10:58:55.843] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C11.dat
[10:58:55.844] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C12.dat
[10:58:55.844] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C13.dat
[10:58:55.844] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C14.dat
[10:58:55.844] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//dacParameters35_C15.dat
[10:58:56.152] <TB3> INFO: Expecting 41600 events.
[10:59:00.015] <TB3> INFO: 41600 events read in total (3148ms).
[10:59:00.016] <TB3> INFO: Test took 4168ms.
[10:59:00.650] <TB3> INFO: Expecting 41600 events.
[10:59:04.488] <TB3> INFO: 41600 events read in total (3123ms).
[10:59:04.489] <TB3> INFO: Test took 4146ms.
[10:59:05.128] <TB3> INFO: Expecting 41600 events.
[10:59:09.074] <TB3> INFO: 41600 events read in total (3231ms).
[10:59:09.074] <TB3> INFO: Test took 4259ms.
[10:59:09.380] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:09.513] <TB3> INFO: Expecting 2560 events.
[10:59:10.475] <TB3> INFO: 2560 events read in total (247ms).
[10:59:10.475] <TB3> INFO: Test took 1095ms.
[10:59:10.479] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:10.984] <TB3> INFO: Expecting 2560 events.
[10:59:11.945] <TB3> INFO: 2560 events read in total (246ms).
[10:59:11.946] <TB3> INFO: Test took 1467ms.
[10:59:11.948] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:12.455] <TB3> INFO: Expecting 2560 events.
[10:59:13.416] <TB3> INFO: 2560 events read in total (246ms).
[10:59:13.416] <TB3> INFO: Test took 1468ms.
[10:59:13.419] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:13.925] <TB3> INFO: Expecting 2560 events.
[10:59:14.888] <TB3> INFO: 2560 events read in total (248ms).
[10:59:14.889] <TB3> INFO: Test took 1470ms.
[10:59:14.892] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:15.397] <TB3> INFO: Expecting 2560 events.
[10:59:16.354] <TB3> INFO: 2560 events read in total (242ms).
[10:59:16.354] <TB3> INFO: Test took 1462ms.
[10:59:16.357] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:16.863] <TB3> INFO: Expecting 2560 events.
[10:59:17.828] <TB3> INFO: 2560 events read in total (250ms).
[10:59:17.828] <TB3> INFO: Test took 1471ms.
[10:59:17.830] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:18.337] <TB3> INFO: Expecting 2560 events.
[10:59:19.298] <TB3> INFO: 2560 events read in total (246ms).
[10:59:19.298] <TB3> INFO: Test took 1468ms.
[10:59:19.301] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:19.807] <TB3> INFO: Expecting 2560 events.
[10:59:20.769] <TB3> INFO: 2560 events read in total (247ms).
[10:59:20.769] <TB3> INFO: Test took 1469ms.
[10:59:20.772] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:21.278] <TB3> INFO: Expecting 2560 events.
[10:59:22.239] <TB3> INFO: 2560 events read in total (246ms).
[10:59:22.240] <TB3> INFO: Test took 1468ms.
[10:59:22.243] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:22.749] <TB3> INFO: Expecting 2560 events.
[10:59:23.710] <TB3> INFO: 2560 events read in total (246ms).
[10:59:23.711] <TB3> INFO: Test took 1468ms.
[10:59:23.713] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:24.219] <TB3> INFO: Expecting 2560 events.
[10:59:25.179] <TB3> INFO: 2560 events read in total (245ms).
[10:59:25.179] <TB3> INFO: Test took 1466ms.
[10:59:25.182] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:25.688] <TB3> INFO: Expecting 2560 events.
[10:59:26.652] <TB3> INFO: 2560 events read in total (249ms).
[10:59:26.652] <TB3> INFO: Test took 1471ms.
[10:59:26.655] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:27.161] <TB3> INFO: Expecting 2560 events.
[10:59:28.123] <TB3> INFO: 2560 events read in total (248ms).
[10:59:28.124] <TB3> INFO: Test took 1469ms.
[10:59:28.127] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:28.632] <TB3> INFO: Expecting 2560 events.
[10:59:29.597] <TB3> INFO: 2560 events read in total (246ms).
[10:59:29.597] <TB3> INFO: Test took 1470ms.
[10:59:29.601] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:30.106] <TB3> INFO: Expecting 2560 events.
[10:59:31.067] <TB3> INFO: 2560 events read in total (246ms).
[10:59:31.068] <TB3> INFO: Test took 1468ms.
[10:59:31.070] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:31.577] <TB3> INFO: Expecting 2560 events.
[10:59:32.539] <TB3> INFO: 2560 events read in total (247ms).
[10:59:32.539] <TB3> INFO: Test took 1469ms.
[10:59:32.543] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:33.048] <TB3> INFO: Expecting 2560 events.
[10:59:34.011] <TB3> INFO: 2560 events read in total (248ms).
[10:59:34.012] <TB3> INFO: Test took 1469ms.
[10:59:34.015] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:34.521] <TB3> INFO: Expecting 2560 events.
[10:59:35.482] <TB3> INFO: 2560 events read in total (246ms).
[10:59:35.482] <TB3> INFO: Test took 1468ms.
[10:59:35.485] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:35.991] <TB3> INFO: Expecting 2560 events.
[10:59:36.953] <TB3> INFO: 2560 events read in total (247ms).
[10:59:36.953] <TB3> INFO: Test took 1468ms.
[10:59:36.956] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:37.463] <TB3> INFO: Expecting 2560 events.
[10:59:38.425] <TB3> INFO: 2560 events read in total (247ms).
[10:59:38.425] <TB3> INFO: Test took 1469ms.
[10:59:38.427] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:38.934] <TB3> INFO: Expecting 2560 events.
[10:59:39.896] <TB3> INFO: 2560 events read in total (247ms).
[10:59:39.896] <TB3> INFO: Test took 1469ms.
[10:59:39.899] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:40.405] <TB3> INFO: Expecting 2560 events.
[10:59:41.368] <TB3> INFO: 2560 events read in total (248ms).
[10:59:41.368] <TB3> INFO: Test took 1469ms.
[10:59:41.370] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:41.877] <TB3> INFO: Expecting 2560 events.
[10:59:42.839] <TB3> INFO: 2560 events read in total (247ms).
[10:59:42.839] <TB3> INFO: Test took 1469ms.
[10:59:42.841] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:43.348] <TB3> INFO: Expecting 2560 events.
[10:59:44.311] <TB3> INFO: 2560 events read in total (248ms).
[10:59:44.311] <TB3> INFO: Test took 1470ms.
[10:59:44.315] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:44.820] <TB3> INFO: Expecting 2560 events.
[10:59:45.781] <TB3> INFO: 2560 events read in total (246ms).
[10:59:45.781] <TB3> INFO: Test took 1467ms.
[10:59:45.784] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:46.290] <TB3> INFO: Expecting 2560 events.
[10:59:47.252] <TB3> INFO: 2560 events read in total (247ms).
[10:59:47.253] <TB3> INFO: Test took 1469ms.
[10:59:47.255] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:47.762] <TB3> INFO: Expecting 2560 events.
[10:59:48.725] <TB3> INFO: 2560 events read in total (248ms).
[10:59:48.725] <TB3> INFO: Test took 1470ms.
[10:59:48.729] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:49.233] <TB3> INFO: Expecting 2560 events.
[10:59:50.192] <TB3> INFO: 2560 events read in total (244ms).
[10:59:50.192] <TB3> INFO: Test took 1464ms.
[10:59:50.194] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:50.701] <TB3> INFO: Expecting 2560 events.
[10:59:51.661] <TB3> INFO: 2560 events read in total (245ms).
[10:59:51.661] <TB3> INFO: Test took 1467ms.
[10:59:51.663] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:52.170] <TB3> INFO: Expecting 2560 events.
[10:59:53.130] <TB3> INFO: 2560 events read in total (245ms).
[10:59:53.130] <TB3> INFO: Test took 1467ms.
[10:59:53.133] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:53.639] <TB3> INFO: Expecting 2560 events.
[10:59:54.603] <TB3> INFO: 2560 events read in total (249ms).
[10:59:54.603] <TB3> INFO: Test took 1471ms.
[10:59:54.606] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[10:59:55.112] <TB3> INFO: Expecting 2560 events.
[10:59:56.074] <TB3> INFO: 2560 events read in total (247ms).
[10:59:56.075] <TB3> INFO: Test took 1469ms.
[10:59:56.802] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 484 seconds
[10:59:56.802] <TB3> INFO: PH scale (per ROC): 62 63 66 64 64 62 60 62 69 63 61 70 65 66 70 70
[10:59:56.802] <TB3> INFO: PH offset (per ROC): 191 179 192 200 184 171 188 189 184 169 189 186 205 176 180 186
[10:59:56.810] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[10:59:56.810] <TB3> INFO: Decoding statistics:
[10:59:56.810] <TB3> INFO: General information:
[10:59:56.810] <TB3> INFO: 16bit words read: 66448
[10:59:56.810] <TB3> INFO: valid events total: 5120
[10:59:56.810] <TB3> INFO: empty events: 2616
[10:59:56.810] <TB3> INFO: valid events with pixels: 2504
[10:59:56.810] <TB3> INFO: valid pixel hits: 2504
[10:59:56.811] <TB3> INFO: Event errors: 0
[10:59:56.811] <TB3> INFO: start marker: 0
[10:59:56.811] <TB3> INFO: stop marker: 0
[10:59:56.811] <TB3> INFO: overflow: 0
[10:59:56.811] <TB3> INFO: invalid 5bit words: 0
[10:59:56.811] <TB3> INFO: invalid XOR eye diagram: 0
[10:59:56.811] <TB3> INFO: TBM errors: 0
[10:59:56.811] <TB3> INFO: flawed TBM headers: 0
[10:59:56.811] <TB3> INFO: flawed TBM trailers: 0
[10:59:56.811] <TB3> INFO: event ID mismatches: 0
[10:59:56.811] <TB3> INFO: ROC errors: 0
[10:59:56.811] <TB3> INFO: missing ROC header(s): 0
[10:59:56.811] <TB3> INFO: misplaced readback start: 0
[10:59:56.811] <TB3> INFO: Pixel decoding errors: 0
[10:59:56.811] <TB3> INFO: pixel data incomplete: 0
[10:59:56.811] <TB3> INFO: pixel address: 0
[10:59:56.811] <TB3> INFO: pulse height fill bit: 0
[10:59:56.811] <TB3> INFO: buffer corruption: 0
[10:59:56.982] <TB3> INFO: ######################################################################
[10:59:56.982] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[10:59:56.982] <TB3> INFO: ######################################################################
[10:59:56.994] <TB3> INFO: scanning low vcal = 10
[10:59:57.314] <TB3> INFO: Expecting 41600 events.
[11:00:01.083] <TB3> INFO: 41600 events read in total (3053ms).
[11:00:01.083] <TB3> INFO: Test took 4089ms.
[11:00:01.085] <TB3> INFO: scanning low vcal = 20
[11:00:01.591] <TB3> INFO: Expecting 41600 events.
[11:00:05.351] <TB3> INFO: 41600 events read in total (3045ms).
[11:00:05.351] <TB3> INFO: Test took 4266ms.
[11:00:05.354] <TB3> INFO: scanning low vcal = 30
[11:00:05.859] <TB3> INFO: Expecting 41600 events.
[11:00:09.694] <TB3> INFO: 41600 events read in total (3120ms).
[11:00:09.695] <TB3> INFO: Test took 4341ms.
[11:00:09.697] <TB3> INFO: scanning low vcal = 40
[11:00:10.184] <TB3> INFO: Expecting 41600 events.
[11:00:14.516] <TB3> INFO: 41600 events read in total (3617ms).
[11:00:14.517] <TB3> INFO: Test took 4820ms.
[11:00:14.520] <TB3> INFO: scanning low vcal = 50
[11:00:14.930] <TB3> INFO: Expecting 41600 events.
[11:00:19.282] <TB3> INFO: 41600 events read in total (3637ms).
[11:00:19.283] <TB3> INFO: Test took 4763ms.
[11:00:19.285] <TB3> INFO: scanning low vcal = 60
[11:00:19.718] <TB3> INFO: Expecting 41600 events.
[11:00:24.078] <TB3> INFO: 41600 events read in total (3644ms).
[11:00:24.079] <TB3> INFO: Test took 4794ms.
[11:00:24.082] <TB3> INFO: scanning low vcal = 70
[11:00:24.510] <TB3> INFO: Expecting 41600 events.
[11:00:28.831] <TB3> INFO: 41600 events read in total (3606ms).
[11:00:28.831] <TB3> INFO: Test took 4749ms.
[11:00:28.834] <TB3> INFO: scanning low vcal = 80
[11:00:29.278] <TB3> INFO: Expecting 41600 events.
[11:00:33.603] <TB3> INFO: 41600 events read in total (3610ms).
[11:00:33.603] <TB3> INFO: Test took 4769ms.
[11:00:33.606] <TB3> INFO: scanning low vcal = 90
[11:00:34.037] <TB3> INFO: Expecting 41600 events.
[11:00:38.392] <TB3> INFO: 41600 events read in total (3640ms).
[11:00:38.392] <TB3> INFO: Test took 4786ms.
[11:00:38.395] <TB3> INFO: scanning low vcal = 100
[11:00:38.813] <TB3> INFO: Expecting 41600 events.
[11:00:43.200] <TB3> INFO: 41600 events read in total (3672ms).
[11:00:43.200] <TB3> INFO: Test took 4805ms.
[11:00:43.203] <TB3> INFO: scanning low vcal = 110
[11:00:43.649] <TB3> INFO: Expecting 41600 events.
[11:00:48.015] <TB3> INFO: 41600 events read in total (3651ms).
[11:00:48.016] <TB3> INFO: Test took 4813ms.
[11:00:48.019] <TB3> INFO: scanning low vcal = 120
[11:00:48.462] <TB3> INFO: Expecting 41600 events.
[11:00:52.821] <TB3> INFO: 41600 events read in total (3644ms).
[11:00:52.822] <TB3> INFO: Test took 4803ms.
[11:00:52.825] <TB3> INFO: scanning low vcal = 130
[11:00:53.265] <TB3> INFO: Expecting 41600 events.
[11:00:57.634] <TB3> INFO: 41600 events read in total (3654ms).
[11:00:57.635] <TB3> INFO: Test took 4810ms.
[11:00:57.647] <TB3> INFO: scanning low vcal = 140
[11:00:58.051] <TB3> INFO: Expecting 41600 events.
[11:01:02.416] <TB3> INFO: 41600 events read in total (3650ms).
[11:01:02.417] <TB3> INFO: Test took 4770ms.
[11:01:02.420] <TB3> INFO: scanning low vcal = 150
[11:01:02.867] <TB3> INFO: Expecting 41600 events.
[11:01:07.232] <TB3> INFO: 41600 events read in total (3650ms).
[11:01:07.233] <TB3> INFO: Test took 4813ms.
[11:01:07.236] <TB3> INFO: scanning low vcal = 160
[11:01:07.661] <TB3> INFO: Expecting 41600 events.
[11:01:11.974] <TB3> INFO: 41600 events read in total (3598ms).
[11:01:11.974] <TB3> INFO: Test took 4738ms.
[11:01:11.977] <TB3> INFO: scanning low vcal = 170
[11:01:12.419] <TB3> INFO: Expecting 41600 events.
[11:01:16.682] <TB3> INFO: 41600 events read in total (3548ms).
[11:01:16.682] <TB3> INFO: Test took 4705ms.
[11:01:16.687] <TB3> INFO: scanning low vcal = 180
[11:01:17.131] <TB3> INFO: Expecting 41600 events.
[11:01:21.475] <TB3> INFO: 41600 events read in total (3629ms).
[11:01:21.475] <TB3> INFO: Test took 4788ms.
[11:01:21.478] <TB3> INFO: scanning low vcal = 190
[11:01:21.898] <TB3> INFO: Expecting 41600 events.
[11:01:26.200] <TB3> INFO: 41600 events read in total (3587ms).
[11:01:26.201] <TB3> INFO: Test took 4723ms.
[11:01:26.204] <TB3> INFO: scanning low vcal = 200
[11:01:26.645] <TB3> INFO: Expecting 41600 events.
[11:01:30.974] <TB3> INFO: 41600 events read in total (3614ms).
[11:01:30.975] <TB3> INFO: Test took 4771ms.
[11:01:30.978] <TB3> INFO: scanning low vcal = 210
[11:01:31.405] <TB3> INFO: Expecting 41600 events.
[11:01:35.705] <TB3> INFO: 41600 events read in total (3584ms).
[11:01:35.706] <TB3> INFO: Test took 4728ms.
[11:01:35.709] <TB3> INFO: scanning low vcal = 220
[11:01:36.141] <TB3> INFO: Expecting 41600 events.
[11:01:40.479] <TB3> INFO: 41600 events read in total (3623ms).
[11:01:40.480] <TB3> INFO: Test took 4771ms.
[11:01:40.483] <TB3> INFO: scanning low vcal = 230
[11:01:40.927] <TB3> INFO: Expecting 41600 events.
[11:01:45.231] <TB3> INFO: 41600 events read in total (3588ms).
[11:01:45.231] <TB3> INFO: Test took 4748ms.
[11:01:45.234] <TB3> INFO: scanning low vcal = 240
[11:01:45.684] <TB3> INFO: Expecting 41600 events.
[11:01:49.966] <TB3> INFO: 41600 events read in total (3567ms).
[11:01:49.967] <TB3> INFO: Test took 4733ms.
[11:01:49.970] <TB3> INFO: scanning low vcal = 250
[11:01:50.414] <TB3> INFO: Expecting 41600 events.
[11:01:54.679] <TB3> INFO: 41600 events read in total (3550ms).
[11:01:54.680] <TB3> INFO: Test took 4710ms.
[11:01:54.684] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[11:01:55.110] <TB3> INFO: Expecting 41600 events.
[11:01:59.378] <TB3> INFO: 41600 events read in total (3553ms).
[11:01:59.379] <TB3> INFO: Test took 4695ms.
[11:01:59.382] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[11:01:59.793] <TB3> INFO: Expecting 41600 events.
[11:02:03.964] <TB3> INFO: 41600 events read in total (3457ms).
[11:02:03.964] <TB3> INFO: Test took 4582ms.
[11:02:03.967] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[11:02:04.416] <TB3> INFO: Expecting 41600 events.
[11:02:08.592] <TB3> INFO: 41600 events read in total (3461ms).
[11:02:08.593] <TB3> INFO: Test took 4626ms.
[11:02:08.596] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[11:02:09.041] <TB3> INFO: Expecting 41600 events.
[11:02:13.233] <TB3> INFO: 41600 events read in total (3477ms).
[11:02:13.233] <TB3> INFO: Test took 4637ms.
[11:02:13.236] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[11:02:13.680] <TB3> INFO: Expecting 41600 events.
[11:02:17.901] <TB3> INFO: 41600 events read in total (3506ms).
[11:02:17.902] <TB3> INFO: Test took 4666ms.
[11:02:18.385] <TB3> INFO: PixTestGainPedestal::measure() done
[11:02:51.778] <TB3> INFO: PixTestGainPedestal::fit() done
[11:02:51.778] <TB3> INFO: non-linearity mean: 0.954 0.958 0.954 0.953 0.954 0.948 0.951 0.955 0.954 0.959 0.958 0.958 0.946 0.954 0.956 0.951
[11:02:51.778] <TB3> INFO: non-linearity RMS: 0.006 0.008 0.007 0.008 0.008 0.008 0.007 0.008 0.008 0.007 0.006 0.006 0.010 0.006 0.006 0.007
[11:02:51.779] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[11:02:51.809] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[11:02:51.836] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[11:02:51.854] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[11:02:51.880] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[11:02:51.907] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[11:02:51.930] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[11:02:51.959] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[11:02:51.988] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[11:02:52.016] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[11:02:52.044] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[11:02:52.064] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[11:02:52.082] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[11:02:52.100] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[11:02:52.118] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[11:02:52.136] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[11:02:52.157] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 175 seconds
[11:02:52.157] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:02:52.157] <TB3> INFO: Decoding statistics:
[11:02:52.157] <TB3> INFO: General information:
[11:02:52.157] <TB3> INFO: 16bit words read: 2328648
[11:02:52.157] <TB3> INFO: valid events total: 83200
[11:02:52.157] <TB3> INFO: empty events: 0
[11:02:52.157] <TB3> INFO: valid events with pixels: 83200
[11:02:52.157] <TB3> INFO: valid pixel hits: 665124
[11:02:52.157] <TB3> INFO: Event errors: 0
[11:02:52.157] <TB3> INFO: start marker: 0
[11:02:52.157] <TB3> INFO: stop marker: 0
[11:02:52.157] <TB3> INFO: overflow: 0
[11:02:52.157] <TB3> INFO: invalid 5bit words: 0
[11:02:52.157] <TB3> INFO: invalid XOR eye diagram: 0
[11:02:52.157] <TB3> INFO: TBM errors: 0
[11:02:52.157] <TB3> INFO: flawed TBM headers: 0
[11:02:52.157] <TB3> INFO: flawed TBM trailers: 0
[11:02:52.157] <TB3> INFO: event ID mismatches: 0
[11:02:52.157] <TB3> INFO: ROC errors: 0
[11:02:52.157] <TB3> INFO: missing ROC header(s): 0
[11:02:52.157] <TB3> INFO: misplaced readback start: 0
[11:02:52.157] <TB3> INFO: Pixel decoding errors: 0
[11:02:52.157] <TB3> INFO: pixel data incomplete: 0
[11:02:52.157] <TB3> INFO: pixel address: 0
[11:02:52.157] <TB3> INFO: pulse height fill bit: 0
[11:02:52.157] <TB3> INFO: buffer corruption: 0
[11:02:52.163] <TB3> INFO: readReadbackCal: /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C0.dat .. /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C15.dat
[11:02:52.165] <TB3> INFO: ######################################################################
[11:02:52.165] <TB3> INFO: PixTestReadback::doTest()
[11:02:52.165] <TB3> INFO: ######################################################################
[11:02:52.165] <TB3> INFO: PixTestReadback::RES sent once
[11:03:03.408] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C0.dat
[11:03:03.408] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C1.dat
[11:03:03.408] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C2.dat
[11:03:03.409] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C3.dat
[11:03:03.409] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C4.dat
[11:03:03.409] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C5.dat
[11:03:03.409] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C6.dat
[11:03:03.409] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C7.dat
[11:03:03.409] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C8.dat
[11:03:03.409] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C9.dat
[11:03:03.409] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C10.dat
[11:03:03.409] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C11.dat
[11:03:03.409] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C12.dat
[11:03:03.409] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C13.dat
[11:03:03.409] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C14.dat
[11:03:03.409] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C15.dat
[11:03:03.434] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:03:03.434] <TB3> INFO: PixTestReadback::RES sent once
[11:03:14.601] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C0.dat
[11:03:14.601] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C1.dat
[11:03:14.601] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C2.dat
[11:03:14.601] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C3.dat
[11:03:14.601] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C4.dat
[11:03:14.602] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C5.dat
[11:03:14.602] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C6.dat
[11:03:14.602] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C7.dat
[11:03:14.602] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C8.dat
[11:03:14.603] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C9.dat
[11:03:14.603] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C10.dat
[11:03:14.603] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C11.dat
[11:03:14.604] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C12.dat
[11:03:14.604] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C13.dat
[11:03:14.604] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C14.dat
[11:03:14.605] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C15.dat
[11:03:14.640] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:03:14.640] <TB3> INFO: PixTestReadback::RES sent once
[11:03:23.227] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:03:23.227] <TB3> INFO: Vbg will be calibrated using Vd calibration
[11:03:23.227] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 159.1calibrated Vbg = 1.21968 :::*/*/*/*/
[11:03:23.227] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 156.2calibrated Vbg = 1.21887 :::*/*/*/*/
[11:03:23.227] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 162calibrated Vbg = 1.22478 :::*/*/*/*/
[11:03:23.227] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 154.7calibrated Vbg = 1.22879 :::*/*/*/*/
[11:03:23.227] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 154.4calibrated Vbg = 1.23412 :::*/*/*/*/
[11:03:23.227] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 149calibrated Vbg = 1.23145 :::*/*/*/*/
[11:03:23.227] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 149.1calibrated Vbg = 1.23068 :::*/*/*/*/
[11:03:23.227] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 152.7calibrated Vbg = 1.23166 :::*/*/*/*/
[11:03:23.227] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 152.8calibrated Vbg = 1.23112 :::*/*/*/*/
[11:03:23.227] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 150.9calibrated Vbg = 1.23058 :::*/*/*/*/
[11:03:23.227] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 152.8calibrated Vbg = 1.22929 :::*/*/*/*/
[11:03:23.227] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 145.2calibrated Vbg = 1.23101 :::*/*/*/*/
[11:03:23.227] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 165.4calibrated Vbg = 1.21964 :::*/*/*/*/
[11:03:23.227] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 157.3calibrated Vbg = 1.21554 :::*/*/*/*/
[11:03:23.227] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 161calibrated Vbg = 1.22381 :::*/*/*/*/
[11:03:23.227] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 157.4calibrated Vbg = 1.2246 :::*/*/*/*/
[11:03:23.231] <TB3> INFO: PixTestReadback::RES sent once
[11:06:17.249] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C0.dat
[11:06:17.249] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C1.dat
[11:06:17.249] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C2.dat
[11:06:17.249] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C3.dat
[11:06:17.249] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C4.dat
[11:06:17.250] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C5.dat
[11:06:17.250] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C6.dat
[11:06:17.250] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C7.dat
[11:06:17.250] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C8.dat
[11:06:17.250] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C9.dat
[11:06:17.250] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C10.dat
[11:06:17.250] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C11.dat
[11:06:17.250] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C12.dat
[11:06:17.250] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C13.dat
[11:06:17.250] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C14.dat
[11:06:17.250] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//000_FulltestPxar_p17//readbackCal_C15.dat
[11:06:17.284] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[11:06:17.287] <TB3> INFO: PixTestReadback::doTest() done
[11:06:17.287] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:06:17.287] <TB3> INFO: Decoding statistics:
[11:06:17.287] <TB3> INFO: General information:
[11:06:17.287] <TB3> INFO: 16bit words read: 768
[11:06:17.287] <TB3> INFO: valid events total: 64
[11:06:17.287] <TB3> INFO: empty events: 64
[11:06:17.287] <TB3> INFO: valid events with pixels: 0
[11:06:17.287] <TB3> INFO: valid pixel hits: 0
[11:06:17.287] <TB3> INFO: Event errors: 0
[11:06:17.287] <TB3> INFO: start marker: 0
[11:06:17.288] <TB3> INFO: stop marker: 0
[11:06:17.288] <TB3> INFO: overflow: 0
[11:06:17.288] <TB3> INFO: invalid 5bit words: 0
[11:06:17.288] <TB3> INFO: invalid XOR eye diagram: 0
[11:06:17.288] <TB3> INFO: TBM errors: 0
[11:06:17.288] <TB3> INFO: flawed TBM headers: 0
[11:06:17.288] <TB3> INFO: flawed TBM trailers: 0
[11:06:17.288] <TB3> INFO: event ID mismatches: 0
[11:06:17.288] <TB3> INFO: ROC errors: 0
[11:06:17.288] <TB3> INFO: missing ROC header(s): 0
[11:06:17.288] <TB3> INFO: misplaced readback start: 0
[11:06:17.288] <TB3> INFO: Pixel decoding errors: 0
[11:06:17.288] <TB3> INFO: pixel data incomplete: 0
[11:06:17.288] <TB3> INFO: pixel address: 0
[11:06:17.288] <TB3> INFO: pulse height fill bit: 0
[11:06:17.288] <TB3> INFO: buffer corruption: 0
[11:06:17.305] <TB3> INFO: Decoding statistics:
[11:06:17.305] <TB3> INFO: General information:
[11:06:17.305] <TB3> INFO: 16bit words read: 2395864
[11:06:17.305] <TB3> INFO: valid events total: 88384
[11:06:17.305] <TB3> INFO: empty events: 2680
[11:06:17.305] <TB3> INFO: valid events with pixels: 85704
[11:06:17.305] <TB3> INFO: valid pixel hits: 667628
[11:06:17.305] <TB3> INFO: Event errors: 0
[11:06:17.305] <TB3> INFO: start marker: 0
[11:06:17.305] <TB3> INFO: stop marker: 0
[11:06:17.305] <TB3> INFO: overflow: 0
[11:06:17.305] <TB3> INFO: invalid 5bit words: 0
[11:06:17.305] <TB3> INFO: invalid XOR eye diagram: 0
[11:06:17.305] <TB3> INFO: TBM errors: 0
[11:06:17.305] <TB3> INFO: flawed TBM headers: 0
[11:06:17.305] <TB3> INFO: flawed TBM trailers: 0
[11:06:17.305] <TB3> INFO: event ID mismatches: 0
[11:06:17.305] <TB3> INFO: ROC errors: 0
[11:06:17.305] <TB3> INFO: missing ROC header(s): 0
[11:06:17.305] <TB3> INFO: misplaced readback start: 0
[11:06:17.305] <TB3> INFO: Pixel decoding errors: 0
[11:06:17.305] <TB3> INFO: pixel data incomplete: 0
[11:06:17.305] <TB3> INFO: pixel address: 0
[11:06:17.305] <TB3> INFO: pulse height fill bit: 0
[11:06:17.305] <TB3> INFO: buffer corruption: 0
[11:06:17.305] <TB3> INFO: enter test to run
[11:06:17.306] <TB3> INFO: test: exit no parameter change
[11:06:17.536] <TB3> QUIET: Connection to board 170 closed.
[11:06:17.616] <TB3> INFO: pXar: this is the end, my friend