[11:43:21.176] <TB3> INFO: *** Welcome to pxar ***
[11:43:21.176] <TB3> INFO: *** Today: 2015/11/03
[11:43:21.248] <TB3> INFO: *** Version: 9da6
[11:43:21.248] <TB3> INFO: readRocDacs: /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C15.dat
[11:43:21.250] <TB3> INFO: readTbmDacs: /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//tbmParameters_C0b.dat
[11:43:21.251] <TB3> INFO: readMaskFile: /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//defaultMaskFile.dat
[11:43:21.251] <TB3> INFO: readTrimFile: /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters_C15.dat
[11:43:21.325] <TB3> INFO: clk: 4
[11:43:21.325] <TB3> INFO: ctr: 4
[11:43:21.325] <TB3> INFO: sda: 19
[11:43:21.325] <TB3> INFO: tin: 9
[11:43:21.325] <TB3> INFO: level: 15
[11:43:21.325] <TB3> INFO: triggerdelay: 0
[11:43:21.325] <TB3> QUIET: Instanciating API for pxar v2.6.0+26~g89693ff
[11:43:21.325] <TB3> INFO: Log level: INFO
[11:43:21.333] <TB3> INFO: Found DTB DTB_WZ4I6J
[11:43:21.341] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[11:43:21.344] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.2
SW version: 4.5
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[11:43:21.347] <TB3> INFO: RPC call hashes of host and DTB match: 398089610
[11:43:22.901] <TB3> INFO: DUT info:
[11:43:22.901] <TB3> INFO: The DUT currently contains the following objects:
[11:43:22.901] <TB3> INFO: 2 TBM Cores tbm08c (2 ON)
[11:43:22.901] <TB3> INFO: TBM Core alpha (0): 7 registers set
[11:43:22.901] <TB3> INFO: TBM Core beta (1): 7 registers set
[11:43:22.901] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[11:43:22.901] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:22.902] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:22.902] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:22.902] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:22.902] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:22.902] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:22.902] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:22.902] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:22.902] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:22.902] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:22.902] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:22.902] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:22.902] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:22.902] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:22.902] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:22.902] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:43:23.304] <TB3> INFO: enter 'restricted' command line mode
[11:43:23.304] <TB3> INFO: enter test to run
[11:43:23.304] <TB3> INFO: test: pretest no parameter change
[11:43:23.304] <TB3> INFO: running: pretest
[11:43:23.311] <TB3> INFO: ######################################################################
[11:43:23.311] <TB3> INFO: PixTestPretest::doTest()
[11:43:23.311] <TB3> INFO: ######################################################################
[11:43:23.313] <TB3> INFO: ----------------------------------------------------------------------
[11:43:23.313] <TB3> INFO: PixTestPretest::programROC()
[11:43:23.313] <TB3> INFO: ----------------------------------------------------------------------
[11:43:41.331] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:43:41.331] <TB3> INFO: IA differences per ROC: 17.7 16.9 16.9 16.9 17.7 17.7 17.7 16.9 17.7 16.0 17.7 16.9 17.7 17.7 16.9 17.7
[11:43:41.415] <TB3> INFO: ----------------------------------------------------------------------
[11:43:41.415] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:43:41.415] <TB3> INFO: ----------------------------------------------------------------------
[11:43:47.920] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 383.5 mA = 23.9688 mA/ROC
[11:43:47.920] <TB3> INFO: i(loss) [mA/ROC]: 19.3 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1 20.1
[11:43:47.957] <TB3> INFO: ----------------------------------------------------------------------
[11:43:47.957] <TB3> INFO: PixTestPretest::findTiming()
[11:43:47.957] <TB3> INFO: ----------------------------------------------------------------------
[11:43:47.957] <TB3> INFO: PixTestCmd::init()
[11:43:48.552] <TB3> WARNING: Not unmasking DUT, not setting Calibrate bits!
[11:45:23.370] <TB3> INFO: TBM phases: 160MHz: 1, 400MHz: 2, TBM delays: ROC(0/1):4, header/trailer: 1, token: 1
[11:45:23.370] <TB3> INFO: (success/tries = 100/100), width = 5
[11:45:23.373] <TB3> INFO: ----------------------------------------------------------------------
[11:45:23.373] <TB3> INFO: PixTestPretest::findWorkingPixel()
[11:45:23.373] <TB3> INFO: ----------------------------------------------------------------------
[11:45:23.509] <TB3> INFO: Expecting 231680 events.
[11:45:28.118] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L488> Channel 0 Number of ROCs (1) != Token Chain Length (8)
[11:45:28.121] <TB3> ERROR: <datapipe.cc/CheckEventID:L461> Channel 0 Event ID mismatch: local ID (21) != TBM ID (2)
[11:45:31.014] <TB3> INFO: 231680 events read in total (6790ms).
[11:45:31.019] <TB3> INFO: Test took 7643ms.
[11:45:31.418] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:45:31.455] <TB3> INFO: ----------------------------------------------------------------------
[11:45:31.455] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[11:45:31.455] <TB3> INFO: ----------------------------------------------------------------------
[11:45:31.591] <TB3> INFO: Expecting 231680 events.
[11:45:40.044] <TB3> INFO: 231680 events read in total (7738ms).
[11:45:40.049] <TB3> INFO: Test took 8589ms.
[11:45:40.469] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[11:45:40.469] <TB3> INFO: CalDel: 142 110 110 128 118 133 143 139 139 112 130 127 104 129 132 128
[11:45:40.469] <TB3> INFO: VthrComp: 51 51 53 51 51 51 51 52 51 51 51 51 54 55 51 51
[11:45:40.475] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C0.dat
[11:45:40.475] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C1.dat
[11:45:40.475] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C2.dat
[11:45:40.476] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C3.dat
[11:45:40.476] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C4.dat
[11:45:40.476] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C5.dat
[11:45:40.480] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C6.dat
[11:45:40.480] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C7.dat
[11:45:40.480] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C8.dat
[11:45:40.481] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C9.dat
[11:45:40.481] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C10.dat
[11:45:40.481] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C11.dat
[11:45:40.482] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C12.dat
[11:45:40.482] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C13.dat
[11:45:40.482] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C14.dat
[11:45:40.482] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters_C15.dat
[11:45:40.482] <TB3> INFO: write tbm parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//tbmParameters_C0a.dat
[11:45:40.483] <TB3> INFO: write tbm parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//tbmParameters_C0b.dat
[11:45:40.483] <TB3> INFO: PixTestPretest::doTest() done, duration: 137 seconds
[11:45:40.562] <TB3> INFO: enter test to run
[11:45:40.562] <TB3> INFO: test: fulltest no parameter change
[11:45:40.562] <TB3> INFO: running: fulltest
[11:45:40.562] <TB3> INFO: ######################################################################
[11:45:40.562] <TB3> INFO: PixTestFullTest::doTest()
[11:45:40.562] <TB3> INFO: ######################################################################
[11:45:40.564] <TB3> INFO: ######################################################################
[11:45:40.564] <TB3> INFO: PixTestAlive::doTest()
[11:45:40.564] <TB3> INFO: ######################################################################
[11:45:40.566] <TB3> INFO: ----------------------------------------------------------------------
[11:45:40.566] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:45:40.566] <TB3> INFO: ----------------------------------------------------------------------
[11:45:40.902] <TB3> INFO: Expecting 41600 events.
[11:45:45.275] <TB3> INFO: 41600 events read in total (3658ms).
[11:45:45.275] <TB3> INFO: Test took 4708ms.
[11:45:45.281] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:45.661] <TB3> INFO: PixTestAlive::aliveTest() done
[11:45:45.661] <TB3> INFO: number of dead pixels (per ROC): 0 19 4 0 0 1 5 0 1 7 0 0 0 6 3 0
[11:45:45.664] <TB3> INFO: ----------------------------------------------------------------------
[11:45:45.664] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:45:45.664] <TB3> INFO: ----------------------------------------------------------------------
[11:45:45.982] <TB3> INFO: Expecting 41600 events.
[11:45:49.107] <TB3> INFO: 41600 events read in total (2410ms).
[11:45:49.107] <TB3> INFO: Test took 3442ms.
[11:45:49.107] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:49.108] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:45:49.512] <TB3> INFO: PixTestAlive::maskTest() done
[11:45:49.512] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:45:49.514] <TB3> INFO: ----------------------------------------------------------------------
[11:45:49.514] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:45:49.514] <TB3> INFO: ----------------------------------------------------------------------
[11:45:49.834] <TB3> INFO: Expecting 41600 events.
[11:45:54.206] <TB3> INFO: 41600 events read in total (3657ms).
[11:45:54.207] <TB3> INFO: Test took 4692ms.
[11:45:54.218] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:54.603] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[11:45:54.603] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:45:54.603] <TB3> INFO: PixTestAlive::doTest() done, duration: 14 seconds
[11:45:54.603] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:54.603] <TB3> INFO: Decoding statistics:
[11:45:54.603] <TB3> INFO: General information:
[11:45:54.604] <TB3> INFO: 16bit words read: 0
[11:45:54.604] <TB3> INFO: valid events total: 0
[11:45:54.604] <TB3> INFO: empty events: 0
[11:45:54.604] <TB3> INFO: valid events with pixels: 0
[11:45:54.604] <TB3> INFO: valid pixel hits: 0
[11:45:54.604] <TB3> INFO: Event errors: 0
[11:45:54.604] <TB3> INFO: start marker: 0
[11:45:54.604] <TB3> INFO: stop marker: 0
[11:45:54.604] <TB3> INFO: overflow: 0
[11:45:54.604] <TB3> INFO: invalid 5bit words: 0
[11:45:54.604] <TB3> INFO: invalid XOR eye diagram: 0
[11:45:54.604] <TB3> INFO: TBM errors: 0
[11:45:54.604] <TB3> INFO: flawed TBM headers: 0
[11:45:54.604] <TB3> INFO: flawed TBM trailers: 0
[11:45:54.604] <TB3> INFO: event ID mismatches: 0
[11:45:54.604] <TB3> INFO: ROC errors: 0
[11:45:54.604] <TB3> INFO: missing ROC header(s): 0
[11:45:54.604] <TB3> INFO: misplaced readback start: 0
[11:45:54.604] <TB3> INFO: Pixel decoding errors: 0
[11:45:54.604] <TB3> INFO: pixel data incomplete: 0
[11:45:54.604] <TB3> INFO: pixel address: 0
[11:45:54.604] <TB3> INFO: pulse height fill bit: 0
[11:45:54.604] <TB3> INFO: buffer corruption: 0
[11:45:54.617] <TB3> INFO: ######################################################################
[11:45:54.617] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:45:54.617] <TB3> INFO: ######################################################################
[11:45:54.621] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[11:45:54.639] <TB3> INFO: dacScan split into 1 runs with ntrig = 5
[11:45:54.639] <TB3> INFO: run 1 of 1
[11:45:54.975] <TB3> INFO: Expecting 3120000 events.
[11:46:47.748] <TB3> INFO: 1256195 events read in total (52058ms).
[11:47:40.332] <TB3> INFO: 2493610 events read in total (104642ms).
[11:48:04.008] <TB3> INFO: 3120000 events read in total (128318ms).
[11:48:04.046] <TB3> INFO: Test took 129408ms.
[11:48:04.118] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:28.672] <TB3> INFO: PixTestBBMap::doTest() done, duration: 154 seconds
[11:48:28.672] <TB3> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
[11:48:28.672] <TB3> INFO: separation cut (per ROC): 133 152 147 135 144 139 131 136 134 140 149 134 147 139 133 134
[11:48:28.672] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:28.672] <TB3> INFO: Decoding statistics:
[11:48:28.672] <TB3> INFO: General information:
[11:48:28.672] <TB3> INFO: 16bit words read: 0
[11:48:28.672] <TB3> INFO: valid events total: 0
[11:48:28.672] <TB3> INFO: empty events: 0
[11:48:28.672] <TB3> INFO: valid events with pixels: 0
[11:48:28.672] <TB3> INFO: valid pixel hits: 0
[11:48:28.672] <TB3> INFO: Event errors: 0
[11:48:28.672] <TB3> INFO: start marker: 0
[11:48:28.672] <TB3> INFO: stop marker: 0
[11:48:28.672] <TB3> INFO: overflow: 0
[11:48:28.672] <TB3> INFO: invalid 5bit words: 0
[11:48:28.672] <TB3> INFO: invalid XOR eye diagram: 0
[11:48:28.672] <TB3> INFO: TBM errors: 0
[11:48:28.672] <TB3> INFO: flawed TBM headers: 0
[11:48:28.672] <TB3> INFO: flawed TBM trailers: 0
[11:48:28.672] <TB3> INFO: event ID mismatches: 0
[11:48:28.672] <TB3> INFO: ROC errors: 0
[11:48:28.672] <TB3> INFO: missing ROC header(s): 0
[11:48:28.672] <TB3> INFO: misplaced readback start: 0
[11:48:28.672] <TB3> INFO: Pixel decoding errors: 0
[11:48:28.672] <TB3> INFO: pixel data incomplete: 0
[11:48:28.672] <TB3> INFO: pixel address: 0
[11:48:28.672] <TB3> INFO: pulse height fill bit: 0
[11:48:28.672] <TB3> INFO: buffer corruption: 0
[11:48:28.743] <TB3> INFO: ######################################################################
[11:48:28.743] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:48:28.743] <TB3> INFO: ######################################################################
[11:48:28.744] <TB3> INFO: ----------------------------------------------------------------------
[11:48:28.744] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[11:48:28.744] <TB3> INFO: ----------------------------------------------------------------------
[11:48:28.744] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[11:48:28.752] <TB3> INFO: dacScan split into 1 runs with ntrig = 50
[11:48:28.752] <TB3> INFO: run 1 of 1
[11:48:29.057] <TB3> INFO: Expecting 26208000 events.
[11:49:03.765] <TB3> INFO: 1288600 events read in total (33993ms).
[11:49:37.102] <TB3> INFO: 2552750 events read in total (67330ms).
[11:50:10.058] <TB3> INFO: 3812300 events read in total (100286ms).
[11:50:43.173] <TB3> INFO: 5069850 events read in total (133401ms).
[11:51:17.074] <TB3> INFO: 6324450 events read in total (167302ms).
[11:51:50.748] <TB3> INFO: 7580250 events read in total (200976ms).
[11:52:23.496] <TB3> INFO: 8833900 events read in total (233724ms).
[11:52:55.632] <TB3> INFO: 10086550 events read in total (265860ms).
[11:53:27.192] <TB3> INFO: 11336200 events read in total (297420ms).
[11:53:59.545] <TB3> INFO: 12586600 events read in total (329773ms).
[11:54:31.710] <TB3> INFO: 13818600 events read in total (361938ms).
[11:55:03.108] <TB3> INFO: 15043750 events read in total (393336ms).
[11:55:35.052] <TB3> INFO: 16267300 events read in total (425280ms).
[11:56:07.216] <TB3> INFO: 17483000 events read in total (457444ms).
[11:56:38.967] <TB3> INFO: 18705350 events read in total (489195ms).
[11:57:10.503] <TB3> INFO: 19919650 events read in total (520731ms).
[11:57:42.263] <TB3> INFO: 21136150 events read in total (552491ms).
[11:58:14.412] <TB3> INFO: 22353650 events read in total (584640ms).
[11:58:46.420] <TB3> INFO: 23572350 events read in total (616648ms).
[11:59:19.369] <TB3> INFO: 24795750 events read in total (649597ms).
[11:59:52.220] <TB3> INFO: 26037600 events read in total (682448ms).
[11:59:56.768] <TB3> INFO: 26208000 events read in total (686996ms).
[11:59:56.795] <TB3> INFO: Test took 688043ms.
[11:59:56.855] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:59:56.963] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:59:58.471] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[11:59:59.920] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:00:01.443] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:00:03.025] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:00:04.618] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:00:06.207] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:00:07.765] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:00:09.332] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:00:10.925] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:00:12.599] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:00:14.189] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:00:15.719] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:00:17.261] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:00:18.663] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:00:20.281] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[12:00:21.687] <TB3> INFO: PixTestScurves::scurves() done
[12:00:21.687] <TB3> INFO: Vcal mean: 107.21 113.64 117.28 111.44 110.21 108.23 101.47 116.40 101.54 109.29 122.26 107.11 117.48 110.63 103.26 104.58
[12:00:21.687] <TB3> INFO: Vcal RMS: 6.17 9.66 6.95 5.58 5.50 5.64 6.86 5.88 5.83 6.68 6.85 4.92 5.86 7.27 6.61 5.81
[12:00:21.687] <TB3> INFO: PixTestScurves::fullTest() done, duration: 712 seconds
[12:00:21.687] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:21.687] <TB3> INFO: Decoding statistics:
[12:00:21.687] <TB3> INFO: General information:
[12:00:21.687] <TB3> INFO: 16bit words read: 0
[12:00:21.687] <TB3> INFO: valid events total: 0
[12:00:21.687] <TB3> INFO: empty events: 0
[12:00:21.687] <TB3> INFO: valid events with pixels: 0
[12:00:21.687] <TB3> INFO: valid pixel hits: 0
[12:00:21.687] <TB3> INFO: Event errors: 0
[12:00:21.687] <TB3> INFO: start marker: 0
[12:00:21.687] <TB3> INFO: stop marker: 0
[12:00:21.687] <TB3> INFO: overflow: 0
[12:00:21.687] <TB3> INFO: invalid 5bit words: 0
[12:00:21.687] <TB3> INFO: invalid XOR eye diagram: 0
[12:00:21.687] <TB3> INFO: TBM errors: 0
[12:00:21.687] <TB3> INFO: flawed TBM headers: 0
[12:00:21.687] <TB3> INFO: flawed TBM trailers: 0
[12:00:21.687] <TB3> INFO: event ID mismatches: 0
[12:00:21.687] <TB3> INFO: ROC errors: 0
[12:00:21.687] <TB3> INFO: missing ROC header(s): 0
[12:00:21.687] <TB3> INFO: misplaced readback start: 0
[12:00:21.687] <TB3> INFO: Pixel decoding errors: 0
[12:00:21.687] <TB3> INFO: pixel data incomplete: 0
[12:00:21.687] <TB3> INFO: pixel address: 0
[12:00:21.687] <TB3> INFO: pulse height fill bit: 0
[12:00:21.687] <TB3> INFO: buffer corruption: 0
[12:00:21.759] <TB3> INFO: ######################################################################
[12:00:21.759] <TB3> INFO: PixTestTrim::doTest()
[12:00:21.759] <TB3> INFO: ######################################################################
[12:00:21.761] <TB3> INFO: ----------------------------------------------------------------------
[12:00:21.761] <TB3> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[12:00:21.761] <TB3> INFO: ----------------------------------------------------------------------
[12:00:21.844] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[12:00:21.844] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:00:21.853] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[12:00:21.853] <TB3> INFO: run 1 of 1
[12:00:22.159] <TB3> INFO: Expecting 6281600 events.
[12:01:06.714] <TB3> INFO: 1446330 events read in total (43840ms).
[12:01:47.772] <TB3> INFO: 2881210 events read in total (84898ms).
[12:02:33.231] <TB3> INFO: 4307540 events read in total (130357ms).
[12:03:17.558] <TB3> INFO: 5732300 events read in total (174684ms).
[12:03:34.329] <TB3> INFO: 6281600 events read in total (191455ms).
[12:03:34.361] <TB3> INFO: Test took 192509ms.
[12:03:34.419] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:03:57.169] <TB3> INFO: ROC 0 VthrComp = 102
[12:03:57.169] <TB3> INFO: ROC 1 VthrComp = 108
[12:03:57.169] <TB3> INFO: ROC 2 VthrComp = 110
[12:03:57.169] <TB3> INFO: ROC 3 VthrComp = 107
[12:03:57.169] <TB3> INFO: ROC 4 VthrComp = 111
[12:03:57.169] <TB3> INFO: ROC 5 VthrComp = 107
[12:03:57.169] <TB3> INFO: ROC 6 VthrComp = 102
[12:03:57.170] <TB3> INFO: ROC 7 VthrComp = 107
[12:03:57.170] <TB3> INFO: ROC 8 VthrComp = 102
[12:03:57.170] <TB3> INFO: ROC 9 VthrComp = 108
[12:03:57.170] <TB3> INFO: ROC 10 VthrComp = 112
[12:03:57.170] <TB3> INFO: ROC 11 VthrComp = 107
[12:03:57.170] <TB3> INFO: ROC 12 VthrComp = 111
[12:03:57.170] <TB3> INFO: ROC 13 VthrComp = 107
[12:03:57.170] <TB3> INFO: ROC 14 VthrComp = 101
[12:03:57.170] <TB3> INFO: ROC 15 VthrComp = 106
[12:03:57.170] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[12:03:57.170] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[12:03:57.181] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[12:03:57.181] <TB3> INFO: run 1 of 1
[12:03:57.517] <TB3> INFO: Expecting 6281600 events.
[12:04:34.573] <TB3> INFO: 904010 events read in total (36342ms).
[12:05:06.710] <TB3> INFO: 1805350 events read in total (68479ms).
[12:05:39.137] <TB3> INFO: 2708450 events read in total (100906ms).
[12:06:14.024] <TB3> INFO: 3606500 events read in total (135793ms).
[12:06:49.570] <TB3> INFO: 4496930 events read in total (171339ms).
[12:07:25.652] <TB3> INFO: 5383830 events read in total (207421ms).
[12:08:01.940] <TB3> INFO: 6272950 events read in total (243709ms).
[12:08:02.648] <TB3> INFO: 6281600 events read in total (244417ms).
[12:08:02.712] <TB3> INFO: Test took 245531ms.
[12:08:02.856] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:27.472] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 66.7022 for pixel 22/3 mean/min/max = 49.1268/31.498/66.7556
[12:08:27.472] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 68.7009 for pixel 15/6 mean/min/max = 52.0569/34.8933/69.2205
[12:08:27.473] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 71.3138 for pixel 0/37 mean/min/max = 54.989/38.4743/71.5038
[12:08:27.473] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 63.7676 for pixel 23/3 mean/min/max = 48.5174/33.2619/63.7729
[12:08:27.473] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 62.5555 for pixel 3/77 mean/min/max = 48.4269/34.2715/62.5823
[12:08:27.500] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 63.7106 for pixel 15/4 mean/min/max = 48.9141/34.0989/63.7293
[12:08:27.500] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 59.9925 for pixel 27/79 mean/min/max = 46.1456/32.2339/60.0573
[12:08:27.501] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 68.4514 for pixel 9/72 mean/min/max = 52.2172/35.9177/68.5167
[12:08:27.501] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 60.3939 for pixel 19/23 mean/min/max = 46.3322/32.1963/60.4682
[12:08:27.501] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 62.5471 for pixel 10/66 mean/min/max = 48.1566/33.7241/62.589
[12:08:27.502] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 70.6369 for pixel 35/77 mean/min/max = 53.9257/37.0846/70.7667
[12:08:27.502] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 59.517 for pixel 10/13 mean/min/max = 46.8938/34.1379/59.6496
[12:08:27.502] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 71.0154 for pixel 23/61 mean/min/max = 54.5903/38.0276/71.1529
[12:08:27.503] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 67.9167 for pixel 17/0 mean/min/max = 51.0201/34.0424/67.9979
[12:08:27.503] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 61.7962 for pixel 33/74 mean/min/max = 46.9502/32.0108/61.8896
[12:08:27.503] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 60.6986 for pixel 4/15 mean/min/max = 46.9986/33.1341/60.863
[12:08:27.504] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:08:27.635] <TB3> INFO: Expecting 514560 events.
[12:08:36.665] <TB3> INFO: 514560 events read in total (8316ms).
[12:08:36.671] <TB3> INFO: Expecting 514560 events.
[12:08:46.005] <TB3> INFO: 514560 events read in total (8672ms).
[12:08:46.014] <TB3> INFO: Expecting 514560 events.
[12:08:55.715] <TB3> INFO: 514560 events read in total (9050ms).
[12:08:55.726] <TB3> INFO: Expecting 514560 events.
[12:09:05.345] <TB3> INFO: 514560 events read in total (8960ms).
[12:09:05.359] <TB3> INFO: Expecting 514560 events.
[12:09:14.835] <TB3> INFO: 514560 events read in total (8822ms).
[12:09:14.849] <TB3> INFO: Expecting 514560 events.
[12:09:24.270] <TB3> INFO: 514560 events read in total (8763ms).
[12:09:24.286] <TB3> INFO: Expecting 514560 events.
[12:09:33.179] <TB3> INFO: 514560 events read in total (8238ms).
[12:09:33.197] <TB3> INFO: Expecting 514560 events.
[12:09:42.055] <TB3> INFO: 514560 events read in total (8204ms).
[12:09:42.075] <TB3> INFO: Expecting 514560 events.
[12:09:51.018] <TB3> INFO: 514560 events read in total (8291ms).
[12:09:51.040] <TB3> INFO: Expecting 514560 events.
[12:10:00.637] <TB3> INFO: 514560 events read in total (8950ms).
[12:10:00.669] <TB3> INFO: Expecting 514560 events.
[12:10:09.694] <TB3> INFO: 514560 events read in total (8404ms).
[12:10:09.723] <TB3> INFO: Expecting 514560 events.
[12:10:18.636] <TB3> INFO: 514560 events read in total (8271ms).
[12:10:18.667] <TB3> INFO: Expecting 514560 events.
[12:10:27.893] <TB3> INFO: 514560 events read in total (8581ms).
[12:10:27.928] <TB3> INFO: Expecting 514560 events.
[12:10:37.456] <TB3> INFO: 514560 events read in total (8909ms).
[12:10:37.501] <TB3> INFO: Expecting 514560 events.
[12:10:47.108] <TB3> INFO: 514560 events read in total (8985ms).
[12:10:47.148] <TB3> INFO: Expecting 514560 events.
[12:10:56.796] <TB3> INFO: 514560 events read in total (9027ms).
[12:10:56.835] <TB3> INFO: Test took 149331ms.
[12:10:58.022] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[12:10:58.031] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[12:10:58.031] <TB3> INFO: run 1 of 1
[12:10:58.348] <TB3> INFO: Expecting 6281600 events.
[12:11:36.497] <TB3> INFO: 872470 events read in total (37434ms).
[12:12:13.609] <TB3> INFO: 1742980 events read in total (74546ms).
[12:12:49.981] <TB3> INFO: 2615010 events read in total (110918ms).
[12:13:26.778] <TB3> INFO: 3483990 events read in total (147715ms).
[12:14:03.252] <TB3> INFO: 4345020 events read in total (184189ms).
[12:14:39.794] <TB3> INFO: 5202970 events read in total (220731ms).
[12:15:16.155] <TB3> INFO: 6061120 events read in total (257092ms).
[12:15:24.939] <TB3> INFO: 6281600 events read in total (265876ms).
[12:15:25.015] <TB3> INFO: Test took 266984ms.
[12:15:25.193] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:50.225] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.064554 .. 255.000000
[12:15:50.308] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 10 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[12:15:50.316] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[12:15:50.316] <TB3> INFO: run 1 of 1
[12:15:50.625] <TB3> INFO: Expecting 10649600 events.
[12:16:27.411] <TB3> INFO: 826440 events read in total (36070ms).
[12:17:01.836] <TB3> INFO: 1653220 events read in total (70495ms).
[12:17:33.629] <TB3> INFO: 2479940 events read in total (102288ms).
[12:18:06.596] <TB3> INFO: 3306560 events read in total (135255ms).
[12:18:39.769] <TB3> INFO: 4133200 events read in total (168428ms).
[12:19:12.894] <TB3> INFO: 4960220 events read in total (201554ms).
[12:19:47.309] <TB3> INFO: 5787940 events read in total (235968ms).
[12:20:21.850] <TB3> INFO: 6615530 events read in total (270509ms).
[12:20:54.204] <TB3> INFO: 7443180 events read in total (302863ms).
[12:21:29.373] <TB3> INFO: 8270170 events read in total (338032ms).
[12:22:01.057] <TB3> INFO: 9096900 events read in total (369716ms).
[12:22:36.951] <TB3> INFO: 9923920 events read in total (405610ms).
[12:23:06.607] <TB3> INFO: 10649600 events read in total (435266ms).
[12:23:06.759] <TB3> INFO: Test took 436442ms.
[12:23:07.040] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:38.665] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 1.244569 .. 81.728012
[12:23:38.745] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 10 dacrange: 1 .. 91 (-1/-1) hits flags = 528 (plus default)
[12:23:38.753] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[12:23:38.754] <TB3> INFO: run 1 of 1
[12:23:39.057] <TB3> INFO: Expecting 3785600 events.
[12:24:15.957] <TB3> INFO: 974320 events read in total (36171ms).
[12:24:51.864] <TB3> INFO: 1948300 events read in total (72078ms).
[12:25:26.758] <TB3> INFO: 2921800 events read in total (106972ms).
[12:25:56.618] <TB3> INFO: 3785600 events read in total (136832ms).
[12:25:56.656] <TB3> INFO: Test took 137902ms.
[12:25:56.729] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:14.847] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 2.980527 .. 54.715033
[12:26:14.927] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 10 dacrange: 2 .. 64 (-1/-1) hits flags = 528 (plus default)
[12:26:14.935] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[12:26:14.935] <TB3> INFO: run 1 of 1
[12:26:15.319] <TB3> INFO: Expecting 2620800 events.
[12:26:54.936] <TB3> INFO: 1099260 events read in total (38902ms).
[12:27:35.354] <TB3> INFO: 2198020 events read in total (79320ms).
[12:27:50.902] <TB3> INFO: 2620800 events read in total (94868ms).
[12:27:50.923] <TB3> INFO: Test took 95989ms.
[12:27:50.968] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:05.476] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 2.980527 .. 54.715033
[12:28:05.556] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 10 dacrange: 2 .. 64 (-1/-1) hits flags = 528 (plus default)
[12:28:05.564] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[12:28:05.564] <TB3> INFO: run 1 of 1
[12:28:05.867] <TB3> INFO: Expecting 2620800 events.
[12:28:45.440] <TB3> INFO: 1100570 events read in total (38858ms).
[12:29:25.577] <TB3> INFO: 2201540 events read in total (78995ms).
[12:29:40.809] <TB3> INFO: 2620800 events read in total (94227ms).
[12:29:40.830] <TB3> INFO: Test took 95266ms.
[12:29:40.875] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:57.172] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:29:57.172] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[12:29:57.181] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[12:29:57.181] <TB3> INFO: run 1 of 1
[12:29:57.488] <TB3> INFO: Expecting 1705600 events.
[12:30:35.629] <TB3> INFO: 1076030 events read in total (37426ms).
[12:30:58.438] <TB3> INFO: 1705600 events read in total (60235ms).
[12:30:58.449] <TB3> INFO: Test took 61269ms.
[12:30:58.479] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:13.340] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C0.dat
[12:31:13.340] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C1.dat
[12:31:13.340] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C2.dat
[12:31:13.340] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C3.dat
[12:31:13.340] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C4.dat
[12:31:13.340] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C5.dat
[12:31:13.341] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C6.dat
[12:31:13.341] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C7.dat
[12:31:13.341] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C8.dat
[12:31:13.341] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C9.dat
[12:31:13.341] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C10.dat
[12:31:13.342] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C11.dat
[12:31:13.342] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C12.dat
[12:31:13.342] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C13.dat
[12:31:13.342] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C14.dat
[12:31:13.342] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C15.dat
[12:31:13.343] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C0.dat
[12:31:13.352] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C1.dat
[12:31:13.358] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C2.dat
[12:31:13.365] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C3.dat
[12:31:13.371] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C4.dat
[12:31:13.379] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C5.dat
[12:31:13.387] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C6.dat
[12:31:13.393] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C7.dat
[12:31:13.399] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C8.dat
[12:31:13.405] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C9.dat
[12:31:13.411] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C10.dat
[12:31:13.417] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C11.dat
[12:31:13.424] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C12.dat
[12:31:13.432] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C13.dat
[12:31:13.439] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C14.dat
[12:31:13.446] <TB3> INFO: write trim parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//trimParameters35_C15.dat
[12:31:13.452] <TB3> INFO: PixTestTrim::trimTest() done
[12:31:13.452] <TB3> INFO: vtrim: 120 130 138 124 122 122 119 139 124 128 163 115 146 123 102 115
[12:31:13.452] <TB3> INFO: vthrcomp: 102 108 110 107 111 107 102 107 102 108 112 107 111 107 101 106
[12:31:13.452] <TB3> INFO: vcal mean: 34.97 34.78 34.96 35.01 35.01 35.00 34.92 34.96 35.06 34.90 35.00 34.97 34.98 34.96 34.93 34.98
[12:31:13.452] <TB3> INFO: vcal RMS: 0.96 2.47 1.36 0.91 0.89 0.90 1.51 1.00 1.04 1.69 1.05 0.85 1.00 1.74 1.31 1.05
[12:31:13.452] <TB3> INFO: bits mean: 9.09 8.07 7.03 8.59 8.16 8.43 9.47 8.05 9.47 8.72 8.23 9.01 7.58 8.35 9.19 9.40
[12:31:13.452] <TB3> INFO: bits RMS: 2.65 2.50 2.30 2.67 2.68 2.57 2.64 2.30 2.62 2.61 2.12 2.48 2.15 2.51 2.74 2.47
[12:31:13.459] <TB3> INFO: ----------------------------------------------------------------------
[12:31:13.459] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[12:31:13.459] <TB3> INFO: ----------------------------------------------------------------------
[12:31:13.462] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[12:31:13.472] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[12:31:13.472] <TB3> INFO: run 1 of 1
[12:31:13.805] <TB3> INFO: Expecting 8320000 events.
[12:31:53.078] <TB3> INFO: 1289320 events read in total (38558ms).
[12:32:35.005] <TB3> INFO: 2565170 events read in total (80485ms).
[12:33:12.139] <TB3> INFO: 3835710 events read in total (117620ms).
[12:33:52.491] <TB3> INFO: 5090500 events read in total (157971ms).
[12:34:30.328] <TB3> INFO: 6337760 events read in total (195808ms).
[12:35:07.498] <TB3> INFO: 7584030 events read in total (232978ms).
[12:35:32.565] <TB3> INFO: 8320000 events read in total (258045ms).
[12:35:32.616] <TB3> INFO: Test took 259144ms.
[12:35:32.709] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:01.292] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 198 (-1/-1) hits flags = 528 (plus default)
[12:36:01.301] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[12:36:01.301] <TB3> INFO: run 1 of 1
[12:36:01.627] <TB3> INFO: Expecting 8278400 events.
[12:36:43.442] <TB3> INFO: 1229450 events read in total (41100ms).
[12:37:22.408] <TB3> INFO: 2447530 events read in total (80066ms).
[12:37:59.760] <TB3> INFO: 3662000 events read in total (117418ms).
[12:38:38.692] <TB3> INFO: 4863830 events read in total (156350ms).
[12:39:16.839] <TB3> INFO: 6057710 events read in total (194497ms).
[12:39:57.510] <TB3> INFO: 7250780 events read in total (235168ms).
[12:40:32.709] <TB3> INFO: 8278400 events read in total (270367ms).
[12:40:32.748] <TB3> INFO: Test took 271448ms.
[12:40:32.838] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:40:58.944] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 184 (-1/-1) hits flags = 528 (plus default)
[12:40:58.953] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[12:40:58.953] <TB3> INFO: run 1 of 1
[12:40:59.269] <TB3> INFO: Expecting 7696000 events.
[12:41:42.435] <TB3> INFO: 1288060 events read in total (42451ms).
[12:42:21.507] <TB3> INFO: 2563730 events read in total (81523ms).
[12:43:02.577] <TB3> INFO: 3832210 events read in total (122593ms).
[12:43:42.713] <TB3> INFO: 5082060 events read in total (162729ms).
[12:44:23.184] <TB3> INFO: 6328670 events read in total (203200ms).
[12:45:00.251] <TB3> INFO: 7577990 events read in total (240267ms).
[12:45:04.088] <TB3> INFO: 7696000 events read in total (244104ms).
[12:45:04.124] <TB3> INFO: Test took 245171ms.
[12:45:04.199] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:45:27.503] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 185 (-1/-1) hits flags = 528 (plus default)
[12:45:27.511] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[12:45:27.511] <TB3> INFO: run 1 of 1
[12:45:27.815] <TB3> INFO: Expecting 7737600 events.
[12:46:08.952] <TB3> INFO: 1282300 events read in total (40422ms).
[12:46:50.379] <TB3> INFO: 2551800 events read in total (81849ms).
[12:47:32.826] <TB3> INFO: 3815250 events read in total (124296ms).
[12:48:15.004] <TB3> INFO: 5060630 events read in total (166474ms).
[12:48:55.817] <TB3> INFO: 6301890 events read in total (207287ms).
[12:49:36.529] <TB3> INFO: 7544160 events read in total (247999ms).
[12:49:42.912] <TB3> INFO: 7737600 events read in total (254382ms).
[12:49:42.952] <TB3> INFO: Test took 255441ms.
[12:49:43.027] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:08.177] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 193 (-1/-1) hits flags = 528 (plus default)
[12:50:08.186] <TB3> INFO: dacScan split into 1 runs with ntrig = 10
[12:50:08.186] <TB3> INFO: run 1 of 1
[12:50:08.515] <TB3> INFO: Expecting 8070400 events.
[12:50:50.339] <TB3> INFO: 1247190 events read in total (41109ms).
[12:51:31.719] <TB3> INFO: 2482070 events read in total (82489ms).
[12:52:13.323] <TB3> INFO: 3712610 events read in total (124093ms).
[12:52:54.553] <TB3> INFO: 4928530 events read in total (165323ms).
[12:53:35.564] <TB3> INFO: 6137540 events read in total (206334ms).
[12:54:12.791] <TB3> INFO: 7347940 events read in total (243561ms).
[12:54:37.340] <TB3> INFO: 8070400 events read in total (268110ms).
[12:54:37.376] <TB3> INFO: Test took 269191ms.
[12:54:37.481] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:04.663] <TB3> INFO: PixTestTrim::trimBitTest() done
[12:55:04.664] <TB3> INFO: PixTestTrim::doTest() done, duration: 3282 seconds
[12:55:04.664] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:04.664] <TB3> INFO: Decoding statistics:
[12:55:04.664] <TB3> INFO: General information:
[12:55:04.664] <TB3> INFO: 16bit words read: 0
[12:55:04.664] <TB3> INFO: valid events total: 0
[12:55:04.664] <TB3> INFO: empty events: 0
[12:55:04.664] <TB3> INFO: valid events with pixels: 0
[12:55:04.664] <TB3> INFO: valid pixel hits: 0
[12:55:04.664] <TB3> INFO: Event errors: 0
[12:55:04.664] <TB3> INFO: start marker: 0
[12:55:04.664] <TB3> INFO: stop marker: 0
[12:55:04.664] <TB3> INFO: overflow: 0
[12:55:04.664] <TB3> INFO: invalid 5bit words: 0
[12:55:04.664] <TB3> INFO: invalid XOR eye diagram: 0
[12:55:04.664] <TB3> INFO: TBM errors: 0
[12:55:04.664] <TB3> INFO: flawed TBM headers: 0
[12:55:04.664] <TB3> INFO: flawed TBM trailers: 0
[12:55:04.664] <TB3> INFO: event ID mismatches: 0
[12:55:04.664] <TB3> INFO: ROC errors: 0
[12:55:04.664] <TB3> INFO: missing ROC header(s): 0
[12:55:04.664] <TB3> INFO: misplaced readback start: 0
[12:55:04.664] <TB3> INFO: Pixel decoding errors: 0
[12:55:04.665] <TB3> INFO: pixel data incomplete: 0
[12:55:04.665] <TB3> INFO: pixel address: 0
[12:55:04.665] <TB3> INFO: pulse height fill bit: 0
[12:55:04.665] <TB3> INFO: buffer corruption: 0
[12:55:05.408] <TB3> INFO: ######################################################################
[12:55:05.408] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:55:05.408] <TB3> INFO: ######################################################################
[12:55:05.718] <TB3> INFO: Expecting 41600 events.
[12:55:10.030] <TB3> INFO: 41600 events read in total (3597ms).
[12:55:10.030] <TB3> INFO: Test took 4621ms.
[12:55:10.037] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:10.701] <TB3> INFO: Expecting 41600 events.
[12:55:15.084] <TB3> INFO: 41600 events read in total (3668ms).
[12:55:15.085] <TB3> INFO: Test took 4699ms.
[12:55:15.091] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:15.551] <TB3> INFO: Expecting 41600 events.
[12:55:19.686] <TB3> INFO: 41600 events read in total (3420ms).
[12:55:19.687] <TB3> INFO: Test took 4477ms.
[12:55:19.696] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:55:20.127] <TB3> INFO: Expecting 2560 events.
[12:55:21.086] <TB3> INFO: 2560 events read in total (244ms).
[12:55:21.086] <TB3> INFO: Test took 1382ms.
[12:55:21.594] <TB3> INFO: Expecting 2560 events.
[12:55:22.558] <TB3> INFO: 2560 events read in total (249ms).
[12:55:22.558] <TB3> INFO: Test took 1471ms.
[12:55:23.066] <TB3> INFO: Expecting 2560 events.
[12:55:24.028] <TB3> INFO: 2560 events read in total (247ms).
[12:55:24.028] <TB3> INFO: Test took 1469ms.
[12:55:24.536] <TB3> INFO: Expecting 2560 events.
[12:55:25.497] <TB3> INFO: 2560 events read in total (246ms).
[12:55:25.497] <TB3> INFO: Test took 1468ms.
[12:55:26.005] <TB3> INFO: Expecting 2560 events.
[12:55:26.964] <TB3> INFO: 2560 events read in total (244ms).
[12:55:26.965] <TB3> INFO: Test took 1468ms.
[12:55:27.472] <TB3> INFO: Expecting 2560 events.
[12:55:28.431] <TB3> INFO: 2560 events read in total (244ms).
[12:55:28.431] <TB3> INFO: Test took 1464ms.
[12:55:28.939] <TB3> INFO: Expecting 2560 events.
[12:55:29.895] <TB3> INFO: 2560 events read in total (241ms).
[12:55:29.896] <TB3> INFO: Test took 1464ms.
[12:55:30.404] <TB3> INFO: Expecting 2560 events.
[12:55:31.365] <TB3> INFO: 2560 events read in total (246ms).
[12:55:31.366] <TB3> INFO: Test took 1470ms.
[12:55:31.874] <TB3> INFO: Expecting 2560 events.
[12:55:32.837] <TB3> INFO: 2560 events read in total (248ms).
[12:55:32.838] <TB3> INFO: Test took 1472ms.
[12:55:33.345] <TB3> INFO: Expecting 2560 events.
[12:55:34.305] <TB3> INFO: 2560 events read in total (245ms).
[12:55:34.305] <TB3> INFO: Test took 1465ms.
[12:55:34.813] <TB3> INFO: Expecting 2560 events.
[12:55:35.777] <TB3> INFO: 2560 events read in total (249ms).
[12:55:35.777] <TB3> INFO: Test took 1471ms.
[12:55:36.284] <TB3> INFO: Expecting 2560 events.
[12:55:37.243] <TB3> INFO: 2560 events read in total (244ms).
[12:55:37.243] <TB3> INFO: Test took 1461ms.
[12:55:37.751] <TB3> INFO: Expecting 2560 events.
[12:55:38.714] <TB3> INFO: 2560 events read in total (248ms).
[12:55:38.714] <TB3> INFO: Test took 1471ms.
[12:55:39.222] <TB3> INFO: Expecting 2560 events.
[12:55:40.185] <TB3> INFO: 2560 events read in total (248ms).
[12:55:40.185] <TB3> INFO: Test took 1471ms.
[12:55:40.693] <TB3> INFO: Expecting 2560 events.
[12:55:41.651] <TB3> INFO: 2560 events read in total (243ms).
[12:55:41.651] <TB3> INFO: Test took 1465ms.
[12:55:42.159] <TB3> INFO: Expecting 2560 events.
[12:55:43.121] <TB3> INFO: 2560 events read in total (247ms).
[12:55:43.122] <TB3> INFO: Test took 1471ms.
[12:55:43.125] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:55:43.632] <TB3> INFO: Expecting 655360 events.
[12:55:54.966] <TB3> INFO: 655360 events read in total (10619ms).
[12:55:54.976] <TB3> INFO: Expecting 655360 events.
[12:56:06.172] <TB3> INFO: 655360 events read in total (10613ms).
[12:56:06.183] <TB3> INFO: Expecting 655360 events.
[12:56:18.001] <TB3> INFO: 655360 events read in total (11222ms).
[12:56:18.017] <TB3> INFO: Expecting 655360 events.
[12:56:30.231] <TB3> INFO: 655360 events read in total (11620ms).
[12:56:30.254] <TB3> INFO: Expecting 655360 events.
[12:56:42.375] <TB3> INFO: 655360 events read in total (11548ms).
[12:56:42.397] <TB3> INFO: Expecting 655360 events.
[12:56:54.323] <TB3> INFO: 655360 events read in total (11336ms).
[12:56:54.351] <TB3> INFO: Expecting 655360 events.
[12:57:06.482] <TB3> INFO: 655360 events read in total (11570ms).
[12:57:06.510] <TB3> INFO: Expecting 655360 events.
[12:57:18.755] <TB3> INFO: 655360 events read in total (11662ms).
[12:57:18.786] <TB3> INFO: Expecting 655360 events.
[12:57:30.874] <TB3> INFO: 655360 events read in total (11507ms).
[12:57:30.909] <TB3> INFO: Expecting 655360 events.
[12:57:42.618] <TB3> INFO: 655360 events read in total (11172ms).
[12:57:42.664] <TB3> INFO: Expecting 655360 events.
[12:57:53.999] <TB3> INFO: 655360 events read in total (10783ms).
[12:57:54.050] <TB3> INFO: Expecting 655360 events.
[12:58:05.575] <TB3> INFO: 655360 events read in total (10984ms).
[12:58:05.640] <TB3> INFO: Expecting 655360 events.
[12:58:17.189] <TB3> INFO: 655360 events read in total (11022ms).
[12:58:17.237] <TB3> INFO: Expecting 655360 events.
[12:58:29.271] <TB3> INFO: 655360 events read in total (11472ms).
[12:58:29.334] <TB3> INFO: Expecting 655360 events.
[12:58:41.541] <TB3> INFO: 655360 events read in total (11680ms).
[12:58:41.598] <TB3> INFO: Expecting 655360 events.
[12:58:53.341] <TB3> INFO: 655360 events read in total (11198ms).
[12:58:53.439] <TB3> INFO: Test took 190314ms.
[12:58:53.527] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:58:53.835] <TB3> INFO: Expecting 655360 events.
[12:59:05.179] <TB3> INFO: 655360 events read in total (10629ms).
[12:59:05.191] <TB3> INFO: Expecting 655360 events.
[12:59:16.395] <TB3> INFO: 655360 events read in total (10614ms).
[12:59:16.408] <TB3> INFO: Expecting 655360 events.
[12:59:28.602] <TB3> INFO: 655360 events read in total (11593ms).
[12:59:28.621] <TB3> INFO: Expecting 655360 events.
[12:59:40.433] <TB3> INFO: 655360 events read in total (11230ms).
[12:59:40.451] <TB3> INFO: Expecting 655360 events.
[12:59:52.705] <TB3> INFO: 655360 events read in total (11664ms).
[12:59:52.726] <TB3> INFO: Expecting 655360 events.
[13:00:04.872] <TB3> INFO: 655360 events read in total (11573ms).
[13:00:04.902] <TB3> INFO: Expecting 655360 events.
[13:00:16.997] <TB3> INFO: 655360 events read in total (11521ms).
[13:00:17.032] <TB3> INFO: Expecting 655360 events.
[13:00:28.971] <TB3> INFO: 655360 events read in total (11365ms).
[13:00:29.004] <TB3> INFO: Expecting 655360 events.
[13:00:41.369] <TB3> INFO: 655360 events read in total (11793ms).
[13:00:41.411] <TB3> INFO: Expecting 655360 events.
[13:00:53.697] <TB3> INFO: 655360 events read in total (11724ms).
[13:00:53.743] <TB3> INFO: Expecting 655360 events.
[13:01:06.057] <TB3> INFO: 655360 events read in total (11758ms).
[13:01:06.103] <TB3> INFO: Expecting 655360 events.
[13:01:18.116] <TB3> INFO: 655360 events read in total (11449ms).
[13:01:18.167] <TB3> INFO: Expecting 655360 events.
[13:01:30.301] <TB3> INFO: 655360 events read in total (11568ms).
[13:01:30.358] <TB3> INFO: Expecting 655360 events.
[13:01:41.597] <TB3> INFO: 655360 events read in total (10704ms).
[13:01:41.651] <TB3> INFO: Expecting 655360 events.
[13:01:52.632] <TB3> INFO: 655360 events read in total (10454ms).
[13:01:52.688] <TB3> INFO: Expecting 655360 events.
[13:02:04.511] <TB3> INFO: 655360 events read in total (11271ms).
[13:02:04.572] <TB3> INFO: Test took 191045ms.
[13:02:04.791] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:02:04.798] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:02:04.807] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:02:04.814] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:02:04.821] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:02:04.828] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:02:04.835] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:02:04.842] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:02:04.848] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:02:04.855] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:02:04.862] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:02:04.868] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:02:04.875] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:02:04.882] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:02:04.889] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:02:04.896] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:02:04.936] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:02:04.936] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:02:04.936] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:02:04.936] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:02:04.936] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:02:04.936] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:02:04.936] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:02:04.937] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:02:04.937] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:02:04.937] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:02:04.937] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:02:04.937] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:02:04.937] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:02:04.937] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:02:04.938] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:02:04.938] <TB3> INFO: write dac parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:02:05.263] <TB3> INFO: Expecting 41600 events.
[13:02:09.208] <TB3> INFO: 41600 events read in total (3230ms).
[13:02:09.209] <TB3> INFO: Test took 4268ms.
[13:02:09.865] <TB3> INFO: Expecting 41600 events.
[13:02:13.727] <TB3> INFO: 41600 events read in total (3147ms).
[13:02:13.728] <TB3> INFO: Test took 4213ms.
[13:02:14.352] <TB3> INFO: Expecting 41600 events.
[13:02:18.248] <TB3> INFO: 41600 events read in total (3181ms).
[13:02:18.248] <TB3> INFO: Test took 4205ms.
[13:02:18.583] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:18.715] <TB3> INFO: Expecting 2560 events.
[13:02:19.679] <TB3> INFO: 2560 events read in total (249ms).
[13:02:19.679] <TB3> INFO: Test took 1096ms.
[13:02:19.682] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:20.188] <TB3> INFO: Expecting 2560 events.
[13:02:21.152] <TB3> INFO: 2560 events read in total (248ms).
[13:02:21.153] <TB3> INFO: Test took 1471ms.
[13:02:21.155] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:21.662] <TB3> INFO: Expecting 2560 events.
[13:02:22.624] <TB3> INFO: 2560 events read in total (247ms).
[13:02:22.624] <TB3> INFO: Test took 1469ms.
[13:02:22.627] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:23.133] <TB3> INFO: Expecting 2560 events.
[13:02:24.096] <TB3> INFO: 2560 events read in total (247ms).
[13:02:24.096] <TB3> INFO: Test took 1469ms.
[13:02:24.099] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:24.605] <TB3> INFO: Expecting 2560 events.
[13:02:25.566] <TB3> INFO: 2560 events read in total (246ms).
[13:02:25.567] <TB3> INFO: Test took 1468ms.
[13:02:25.570] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:26.076] <TB3> INFO: Expecting 2560 events.
[13:02:27.037] <TB3> INFO: 2560 events read in total (246ms).
[13:02:27.037] <TB3> INFO: Test took 1468ms.
[13:02:27.040] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:27.546] <TB3> INFO: Expecting 2560 events.
[13:02:28.508] <TB3> INFO: 2560 events read in total (247ms).
[13:02:28.509] <TB3> INFO: Test took 1469ms.
[13:02:28.511] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:29.018] <TB3> INFO: Expecting 2560 events.
[13:02:29.979] <TB3> INFO: 2560 events read in total (246ms).
[13:02:29.979] <TB3> INFO: Test took 1468ms.
[13:02:29.982] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:30.488] <TB3> INFO: Expecting 2560 events.
[13:02:31.446] <TB3> INFO: 2560 events read in total (243ms).
[13:02:31.446] <TB3> INFO: Test took 1464ms.
[13:02:31.448] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:31.955] <TB3> INFO: Expecting 2560 events.
[13:02:32.917] <TB3> INFO: 2560 events read in total (247ms).
[13:02:32.917] <TB3> INFO: Test took 1469ms.
[13:02:32.920] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:33.426] <TB3> INFO: Expecting 2560 events.
[13:02:34.388] <TB3> INFO: 2560 events read in total (247ms).
[13:02:34.388] <TB3> INFO: Test took 1468ms.
[13:02:34.393] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:34.897] <TB3> INFO: Expecting 2560 events.
[13:02:35.860] <TB3> INFO: 2560 events read in total (248ms).
[13:02:35.861] <TB3> INFO: Test took 1468ms.
[13:02:35.864] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:36.370] <TB3> INFO: Expecting 2560 events.
[13:02:37.333] <TB3> INFO: 2560 events read in total (248ms).
[13:02:37.333] <TB3> INFO: Test took 1470ms.
[13:02:37.336] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:37.841] <TB3> INFO: Expecting 2560 events.
[13:02:38.804] <TB3> INFO: 2560 events read in total (248ms).
[13:02:38.804] <TB3> INFO: Test took 1468ms.
[13:02:38.807] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:39.313] <TB3> INFO: Expecting 2560 events.
[13:02:40.274] <TB3> INFO: 2560 events read in total (246ms).
[13:02:40.274] <TB3> INFO: Test took 1467ms.
[13:02:40.277] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:40.784] <TB3> INFO: Expecting 2560 events.
[13:02:41.746] <TB3> INFO: 2560 events read in total (247ms).
[13:02:41.746] <TB3> INFO: Test took 1469ms.
[13:02:41.749] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:42.255] <TB3> INFO: Expecting 2560 events.
[13:02:43.217] <TB3> INFO: 2560 events read in total (247ms).
[13:02:43.217] <TB3> INFO: Test took 1468ms.
[13:02:43.220] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:43.726] <TB3> INFO: Expecting 2560 events.
[13:02:44.688] <TB3> INFO: 2560 events read in total (247ms).
[13:02:44.688] <TB3> INFO: Test took 1468ms.
[13:02:44.692] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:45.197] <TB3> INFO: Expecting 2560 events.
[13:02:46.160] <TB3> INFO: 2560 events read in total (248ms).
[13:02:46.160] <TB3> INFO: Test took 1468ms.
[13:02:46.163] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:46.669] <TB3> INFO: Expecting 2560 events.
[13:02:47.631] <TB3> INFO: 2560 events read in total (247ms).
[13:02:47.632] <TB3> INFO: Test took 1469ms.
[13:02:47.635] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:48.141] <TB3> INFO: Expecting 2560 events.
[13:02:49.103] <TB3> INFO: 2560 events read in total (247ms).
[13:02:49.104] <TB3> INFO: Test took 1470ms.
[13:02:49.108] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:49.613] <TB3> INFO: Expecting 2560 events.
[13:02:50.574] <TB3> INFO: 2560 events read in total (246ms).
[13:02:50.574] <TB3> INFO: Test took 1466ms.
[13:02:50.577] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:51.084] <TB3> INFO: Expecting 2560 events.
[13:02:52.045] <TB3> INFO: 2560 events read in total (246ms).
[13:02:52.046] <TB3> INFO: Test took 1469ms.
[13:02:52.049] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:52.554] <TB3> INFO: Expecting 2560 events.
[13:02:53.517] <TB3> INFO: 2560 events read in total (247ms).
[13:02:53.517] <TB3> INFO: Test took 1469ms.
[13:02:53.520] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:54.026] <TB3> INFO: Expecting 2560 events.
[13:02:54.988] <TB3> INFO: 2560 events read in total (246ms).
[13:02:54.989] <TB3> INFO: Test took 1470ms.
[13:02:54.991] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:55.498] <TB3> INFO: Expecting 2560 events.
[13:02:56.460] <TB3> INFO: 2560 events read in total (247ms).
[13:02:56.460] <TB3> INFO: Test took 1469ms.
[13:02:56.463] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:56.970] <TB3> INFO: Expecting 2560 events.
[13:02:57.932] <TB3> INFO: 2560 events read in total (247ms).
[13:02:57.932] <TB3> INFO: Test took 1469ms.
[13:02:57.936] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:58.441] <TB3> INFO: Expecting 2560 events.
[13:02:59.399] <TB3> INFO: 2560 events read in total (243ms).
[13:02:59.399] <TB3> INFO: Test took 1463ms.
[13:02:59.403] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:02:59.908] <TB3> INFO: Expecting 2560 events.
[13:03:00.868] <TB3> INFO: 2560 events read in total (245ms).
[13:03:00.868] <TB3> INFO: Test took 1465ms.
[13:03:00.871] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:03:01.377] <TB3> INFO: Expecting 2560 events.
[13:03:02.340] <TB3> INFO: 2560 events read in total (248ms).
[13:03:02.340] <TB3> INFO: Test took 1469ms.
[13:03:02.343] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:03:02.849] <TB3> INFO: Expecting 2560 events.
[13:03:03.810] <TB3> INFO: 2560 events read in total (246ms).
[13:03:03.810] <TB3> INFO: Test took 1467ms.
[13:03:03.812] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:03:04.319] <TB3> INFO: Expecting 2560 events.
[13:03:05.283] <TB3> INFO: 2560 events read in total (249ms).
[13:03:05.284] <TB3> INFO: Test took 1472ms.
[13:03:06.012] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 480 seconds
[13:03:06.012] <TB3> INFO: PH scale (per ROC): 74 69 78 78 74 76 69 71 85 74 70 81 78 77 80 80
[13:03:06.012] <TB3> INFO: PH offset (per ROC): 171 161 172 176 166 146 169 171 160 144 170 164 185 158 159 165
[13:03:06.018] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:06.018] <TB3> INFO: Decoding statistics:
[13:03:06.018] <TB3> INFO: General information:
[13:03:06.018] <TB3> INFO: 16bit words read: 66446
[13:03:06.018] <TB3> INFO: valid events total: 5120
[13:03:06.018] <TB3> INFO: empty events: 2617
[13:03:06.018] <TB3> INFO: valid events with pixels: 2503
[13:03:06.018] <TB3> INFO: valid pixel hits: 2503
[13:03:06.018] <TB3> INFO: Event errors: 0
[13:03:06.019] <TB3> INFO: start marker: 0
[13:03:06.019] <TB3> INFO: stop marker: 0
[13:03:06.019] <TB3> INFO: overflow: 0
[13:03:06.019] <TB3> INFO: invalid 5bit words: 0
[13:03:06.019] <TB3> INFO: invalid XOR eye diagram: 0
[13:03:06.019] <TB3> INFO: TBM errors: 0
[13:03:06.019] <TB3> INFO: flawed TBM headers: 0
[13:03:06.019] <TB3> INFO: flawed TBM trailers: 0
[13:03:06.019] <TB3> INFO: event ID mismatches: 0
[13:03:06.019] <TB3> INFO: ROC errors: 0
[13:03:06.019] <TB3> INFO: missing ROC header(s): 0
[13:03:06.019] <TB3> INFO: misplaced readback start: 0
[13:03:06.019] <TB3> INFO: Pixel decoding errors: 0
[13:03:06.019] <TB3> INFO: pixel data incomplete: 0
[13:03:06.019] <TB3> INFO: pixel address: 0
[13:03:06.019] <TB3> INFO: pulse height fill bit: 0
[13:03:06.019] <TB3> INFO: buffer corruption: 0
[13:03:06.210] <TB3> INFO: ######################################################################
[13:03:06.210] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:03:06.210] <TB3> INFO: ######################################################################
[13:03:06.221] <TB3> INFO: scanning low vcal = 10
[13:03:06.529] <TB3> INFO: Expecting 41600 events.
[13:03:10.286] <TB3> INFO: 41600 events read in total (3042ms).
[13:03:10.287] <TB3> INFO: Test took 4066ms.
[13:03:10.289] <TB3> INFO: scanning low vcal = 20
[13:03:10.795] <TB3> INFO: Expecting 41600 events.
[13:03:14.533] <TB3> INFO: 41600 events read in total (3024ms).
[13:03:14.534] <TB3> INFO: Test took 4245ms.
[13:03:14.536] <TB3> INFO: scanning low vcal = 30
[13:03:15.041] <TB3> INFO: Expecting 41600 events.
[13:03:18.840] <TB3> INFO: 41600 events read in total (3084ms).
[13:03:18.840] <TB3> INFO: Test took 4304ms.
[13:03:18.843] <TB3> INFO: scanning low vcal = 40
[13:03:19.334] <TB3> INFO: Expecting 41600 events.
[13:03:23.638] <TB3> INFO: 41600 events read in total (3589ms).
[13:03:23.639] <TB3> INFO: Test took 4796ms.
[13:03:23.643] <TB3> INFO: scanning low vcal = 50
[13:03:24.069] <TB3> INFO: Expecting 41600 events.
[13:03:28.314] <TB3> INFO: 41600 events read in total (3530ms).
[13:03:28.316] <TB3> INFO: Test took 4673ms.
[13:03:28.319] <TB3> INFO: scanning low vcal = 60
[13:03:28.740] <TB3> INFO: Expecting 41600 events.
[13:03:32.926] <TB3> INFO: 41600 events read in total (3471ms).
[13:03:32.927] <TB3> INFO: Test took 4608ms.
[13:03:32.930] <TB3> INFO: scanning low vcal = 70
[13:03:33.379] <TB3> INFO: Expecting 41600 events.
[13:03:37.574] <TB3> INFO: 41600 events read in total (3480ms).
[13:03:37.575] <TB3> INFO: Test took 4645ms.
[13:03:37.578] <TB3> INFO: scanning low vcal = 80
[13:03:38.026] <TB3> INFO: Expecting 41600 events.
[13:03:42.243] <TB3> INFO: 41600 events read in total (3502ms).
[13:03:42.244] <TB3> INFO: Test took 4666ms.
[13:03:42.248] <TB3> INFO: scanning low vcal = 90
[13:03:42.696] <TB3> INFO: Expecting 41600 events.
[13:03:46.913] <TB3> INFO: 41600 events read in total (3502ms).
[13:03:46.915] <TB3> INFO: Test took 4667ms.
[13:03:46.920] <TB3> INFO: scanning low vcal = 100
[13:03:47.351] <TB3> INFO: Expecting 41600 events.
[13:03:50.970] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L488> Channel 1 Number of ROCs (6) != Token Chain Length (8)
[13:03:51.833] <TB3> INFO: 41600 events read in total (3767ms).
[13:03:51.835] <TB3> INFO: Test took 4915ms.
[13:03:51.838] <TB3> INFO: scanning low vcal = 110
[13:03:52.279] <TB3> INFO: Expecting 41600 events.
[13:03:56.608] <TB3> INFO: 41600 events read in total (3614ms).
[13:03:56.610] <TB3> INFO: Test took 4772ms.
[13:03:56.613] <TB3> INFO: scanning low vcal = 120
[13:03:57.046] <TB3> INFO: Expecting 41600 events.
[13:04:01.345] <TB3> INFO: 41600 events read in total (3584ms).
[13:04:01.347] <TB3> INFO: Test took 4734ms.
[13:04:01.350] <TB3> INFO: scanning low vcal = 130
[13:04:01.793] <TB3> INFO: Expecting 41600 events.
[13:04:06.099] <TB3> INFO: 41600 events read in total (3591ms).
[13:04:06.101] <TB3> INFO: Test took 4751ms.
[13:04:06.104] <TB3> INFO: scanning low vcal = 140
[13:04:06.552] <TB3> INFO: Expecting 41600 events.
[13:04:10.887] <TB3> INFO: 41600 events read in total (3620ms).
[13:04:10.888] <TB3> INFO: Test took 4785ms.
[13:04:10.905] <TB3> INFO: scanning low vcal = 150
[13:04:11.337] <TB3> INFO: Expecting 41600 events.
[13:04:15.691] <TB3> INFO: 41600 events read in total (3638ms).
[13:04:15.693] <TB3> INFO: Test took 4788ms.
[13:04:15.697] <TB3> INFO: scanning low vcal = 160
[13:04:16.122] <TB3> INFO: Expecting 41600 events.
[13:04:19.609] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L488> Channel 1 Number of ROCs (6) != Token Chain Length (8)
[13:04:20.455] <TB3> INFO: 41600 events read in total (3618ms).
[13:04:20.456] <TB3> INFO: Test took 4759ms.
[13:04:20.460] <TB3> INFO: scanning low vcal = 170
[13:04:20.903] <TB3> INFO: Expecting 41600 events.
[13:04:25.210] <TB3> INFO: 41600 events read in total (3592ms).
[13:04:25.212] <TB3> INFO: Test took 4752ms.
[13:04:25.218] <TB3> INFO: scanning low vcal = 180
[13:04:25.664] <TB3> INFO: Expecting 41600 events.
[13:04:29.982] <TB3> INFO: 41600 events read in total (3604ms).
[13:04:29.984] <TB3> INFO: Test took 4766ms.
[13:04:29.987] <TB3> INFO: scanning low vcal = 190
[13:04:30.434] <TB3> INFO: Expecting 41600 events.
[13:04:34.816] <TB3> INFO: 41600 events read in total (3667ms).
[13:04:34.817] <TB3> INFO: Test took 4830ms.
[13:04:34.820] <TB3> INFO: scanning low vcal = 200
[13:04:35.241] <TB3> INFO: Expecting 41600 events.
[13:04:39.577] <TB3> INFO: 41600 events read in total (3621ms).
[13:04:39.578] <TB3> INFO: Test took 4758ms.
[13:04:39.581] <TB3> INFO: scanning low vcal = 210
[13:04:40.019] <TB3> INFO: Expecting 41600 events.
[13:04:44.353] <TB3> INFO: 41600 events read in total (3619ms).
[13:04:44.354] <TB3> INFO: Test took 4773ms.
[13:04:44.357] <TB3> INFO: scanning low vcal = 220
[13:04:44.776] <TB3> INFO: Expecting 41600 events.
[13:04:48.573] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L488> Channel 0 Number of ROCs (7) != Token Chain Length (8)
[13:04:48.573] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L488> Channel 1 Number of ROCs (7) != Token Chain Length (8)
[13:04:49.112] <TB3> INFO: 41600 events read in total (3621ms).
[13:04:49.113] <TB3> INFO: Test took 4756ms.
[13:04:49.116] <TB3> INFO: scanning low vcal = 230
[13:04:49.561] <TB3> INFO: Expecting 41600 events.
[13:04:53.892] <TB3> INFO: 41600 events read in total (3616ms).
[13:04:53.893] <TB3> INFO: Test took 4777ms.
[13:04:53.896] <TB3> INFO: scanning low vcal = 240
[13:04:54.340] <TB3> INFO: Expecting 41600 events.
[13:04:58.671] <TB3> INFO: 41600 events read in total (3616ms).
[13:04:58.673] <TB3> INFO: Test took 4777ms.
[13:04:58.676] <TB3> INFO: scanning low vcal = 250
[13:04:59.114] <TB3> INFO: Expecting 41600 events.
[13:05:02.473] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L488> Channel 0 Number of ROCs (6) != Token Chain Length (8)
[13:05:02.473] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L488> Channel 1 Number of ROCs (6) != Token Chain Length (8)
[13:05:03.452] <TB3> INFO: 41600 events read in total (3623ms).
[13:05:03.453] <TB3> INFO: Test took 4777ms.
[13:05:03.457] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[13:05:03.903] <TB3> INFO: Expecting 41600 events.
[13:05:08.227] <TB3> INFO: 41600 events read in total (3609ms).
[13:05:08.229] <TB3> INFO: Test took 4771ms.
[13:05:08.232] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[13:05:08.672] <TB3> INFO: Expecting 41600 events.
[13:05:12.996] <TB3> INFO: 41600 events read in total (3609ms).
[13:05:12.998] <TB3> INFO: Test took 4766ms.
[13:05:13.000] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[13:05:13.444] <TB3> INFO: Expecting 41600 events.
[13:05:17.779] <TB3> INFO: 41600 events read in total (3619ms).
[13:05:17.781] <TB3> INFO: Test took 4781ms.
[13:05:17.784] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[13:05:18.224] <TB3> INFO: Expecting 41600 events.
[13:05:22.548] <TB3> INFO: 41600 events read in total (3609ms).
[13:05:22.549] <TB3> INFO: Test took 4765ms.
[13:05:22.552] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:05:22.995] <TB3> INFO: Expecting 41600 events.
[13:05:26.369] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L488> Channel 0 Number of ROCs (6) != Token Chain Length (8)
[13:05:26.369] <TB3> ERROR: <datapipe.cc/CheckEventValidity:L488> Channel 1 Number of ROCs (6) != Token Chain Length (8)
[13:05:27.327] <TB3> INFO: 41600 events read in total (3617ms).
[13:05:27.327] <TB3> INFO: Test took 4775ms.
[13:05:27.775] <TB3> INFO: PixTestGainPedestal::measure() done
[13:06:02.110] <TB3> INFO: PixTestGainPedestal::fit() done
[13:06:02.110] <TB3> INFO: non-linearity mean: 0.955 0.957 0.950 0.956 0.956 0.949 0.950 0.955 0.959 0.957 0.955 0.956 0.951 0.956 0.954 0.950
[13:06:02.110] <TB3> INFO: non-linearity RMS: 0.005 0.007 0.007 0.006 0.005 0.007 0.006 0.007 0.006 0.006 0.006 0.006 0.007 0.006 0.006 0.007
[13:06:02.110] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[13:06:02.128] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[13:06:02.145] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[13:06:02.163] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[13:06:02.180] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[13:06:02.197] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[13:06:02.215] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[13:06:02.232] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[13:06:02.250] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[13:06:02.267] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[13:06:02.285] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[13:06:02.302] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[13:06:02.320] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[13:06:02.337] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[13:06:02.354] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[13:06:02.372] <TB3> INFO: write gain/ped parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[13:06:02.389] <TB3> INFO: PixTestGainPedestal::fullTest() done, duration: 176 seconds
[13:06:02.389] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:02.389] <TB3> INFO: Decoding statistics:
[13:06:02.389] <TB3> INFO: General information:
[13:06:02.389] <TB3> INFO: 16bit words read: 2329356
[13:06:02.389] <TB3> INFO: valid events total: 83198
[13:06:02.389] <TB3> INFO: empty events: 0
[13:06:02.389] <TB3> INFO: valid events with pixels: 83198
[13:06:02.389] <TB3> INFO: valid pixel hits: 665476
[13:06:02.389] <TB3> INFO: Event errors: 0
[13:06:02.389] <TB3> INFO: start marker: 0
[13:06:02.389] <TB3> INFO: stop marker: 0
[13:06:02.389] <TB3> INFO: overflow: 0
[13:06:02.389] <TB3> INFO: invalid 5bit words: 0
[13:06:02.389] <TB3> INFO: invalid XOR eye diagram: 0
[13:06:02.389] <TB3> INFO: TBM errors: 0
[13:06:02.389] <TB3> INFO: flawed TBM headers: 0
[13:06:02.389] <TB3> INFO: flawed TBM trailers: 0
[13:06:02.389] <TB3> INFO: event ID mismatches: 0
[13:06:02.389] <TB3> INFO: ROC errors: 2
[13:06:02.389] <TB3> INFO: missing ROC header(s): 2
[13:06:02.389] <TB3> INFO: misplaced readback start: 0
[13:06:02.389] <TB3> INFO: Pixel decoding errors: 4
[13:06:02.389] <TB3> INFO: pixel data incomplete: 0
[13:06:02.389] <TB3> INFO: pixel address: 2
[13:06:02.389] <TB3> INFO: pulse height fill bit: 2
[13:06:02.389] <TB3> INFO: buffer corruption: 0
[13:06:02.395] <TB3> INFO: readReadbackCal: /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C0.dat .. /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C15.dat
[13:06:02.397] <TB3> INFO: ######################################################################
[13:06:02.397] <TB3> INFO: PixTestReadback::doTest()
[13:06:02.397] <TB3> INFO: ######################################################################
[13:06:02.397] <TB3> INFO: PixTestReadback::RES sent once
[13:06:13.664] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C0.dat
[13:06:13.665] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C1.dat
[13:06:13.665] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C2.dat
[13:06:13.665] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C3.dat
[13:06:13.665] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C4.dat
[13:06:13.665] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C5.dat
[13:06:13.665] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C6.dat
[13:06:13.665] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C7.dat
[13:06:13.665] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C8.dat
[13:06:13.665] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C9.dat
[13:06:13.665] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C10.dat
[13:06:13.665] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C11.dat
[13:06:13.665] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C12.dat
[13:06:13.665] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C13.dat
[13:06:13.665] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C14.dat
[13:06:13.665] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C15.dat
[13:06:13.702] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[13:06:13.702] <TB3> INFO: PixTestReadback::RES sent once
[13:06:24.867] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C0.dat
[13:06:24.867] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C1.dat
[13:06:24.867] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C2.dat
[13:06:24.867] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C3.dat
[13:06:24.867] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C4.dat
[13:06:24.867] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C5.dat
[13:06:24.867] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C6.dat
[13:06:24.867] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C7.dat
[13:06:24.867] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C8.dat
[13:06:24.867] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C9.dat
[13:06:24.868] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C10.dat
[13:06:24.868] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C11.dat
[13:06:24.868] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C12.dat
[13:06:24.868] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C13.dat
[13:06:24.868] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C14.dat
[13:06:24.868] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C15.dat
[13:06:24.899] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[13:06:24.899] <TB3> INFO: PixTestReadback::RES sent once
[13:06:33.486] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[13:06:33.486] <TB3> INFO: Vbg will be calibrated using Vd calibration
[13:06:33.486] <TB3> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 158.3calibrated Vbg = 1.1972 :::*/*/*/*/
[13:06:33.486] <TB3> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 155.4calibrated Vbg = 1.198 :::*/*/*/*/
[13:06:33.486] <TB3> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 161.2calibrated Vbg = 1.2042 :::*/*/*/*/
[13:06:33.486] <TB3> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 154.1calibrated Vbg = 1.20786 :::*/*/*/*/
[13:06:33.486] <TB3> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 152.8calibrated Vbg = 1.20817 :::*/*/*/*/
[13:06:33.486] <TB3> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 148.9calibrated Vbg = 1.21498 :::*/*/*/*/
[13:06:33.486] <TB3> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 148.6calibrated Vbg = 1.21298 :::*/*/*/*/
[13:06:33.486] <TB3> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 151.8calibrated Vbg = 1.2084 :::*/*/*/*/
[13:06:33.486] <TB3> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 151.8calibrated Vbg = 1.20984 :::*/*/*/*/
[13:06:33.487] <TB3> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 149.8calibrated Vbg = 1.21398 :::*/*/*/*/
[13:06:33.487] <TB3> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 151.8calibrated Vbg = 1.20897 :::*/*/*/*/
[13:06:33.487] <TB3> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 144calibrated Vbg = 1.21251 :::*/*/*/*/
[13:06:33.487] <TB3> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 166calibrated Vbg = 1.20376 :::*/*/*/*/
[13:06:33.487] <TB3> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 157.6calibrated Vbg = 1.20419 :::*/*/*/*/
[13:06:33.487] <TB3> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 161.4calibrated Vbg = 1.20316 :::*/*/*/*/
[13:06:33.487] <TB3> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 156.5calibrated Vbg = 1.19991 :::*/*/*/*/
[13:06:33.491] <TB3> INFO: PixTestReadback::RES sent once
[13:09:27.583] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C0.dat
[13:09:27.583] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C1.dat
[13:09:27.583] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C2.dat
[13:09:27.583] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C3.dat
[13:09:27.583] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C4.dat
[13:09:27.583] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C5.dat
[13:09:27.583] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C6.dat
[13:09:27.584] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C7.dat
[13:09:27.584] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C8.dat
[13:09:27.584] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C9.dat
[13:09:27.584] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C10.dat
[13:09:27.584] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C11.dat
[13:09:27.584] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C12.dat
[13:09:27.584] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C13.dat
[13:09:27.584] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C14.dat
[13:09:27.584] <TB3> INFO: write readback calibration parameters into /usr/local/receptionDATA/M3508_ModuleQualificationINFN_2015-11-03_10h35m_1446543354//002_FulltestPxar_m20//readbackCal_C15.dat
[13:09:27.616] <TB3> INFO: PixTestPattern:: pg_setup set to default.
[13:09:27.618] <TB3> INFO: PixTestReadback::doTest() done
[13:09:27.618] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:27.618] <TB3> INFO: Decoding statistics:
[13:09:27.618] <TB3> INFO: General information:
[13:09:27.618] <TB3> INFO: 16bit words read: 768
[13:09:27.618] <TB3> INFO: valid events total: 64
[13:09:27.618] <TB3> INFO: empty events: 64
[13:09:27.618] <TB3> INFO: valid events with pixels: 0
[13:09:27.618] <TB3> INFO: valid pixel hits: 0
[13:09:27.618] <TB3> INFO: Event errors: 0
[13:09:27.618] <TB3> INFO: start marker: 0
[13:09:27.618] <TB3> INFO: stop marker: 0
[13:09:27.618] <TB3> INFO: overflow: 0
[13:09:27.618] <TB3> INFO: invalid 5bit words: 0
[13:09:27.618] <TB3> INFO: invalid XOR eye diagram: 0
[13:09:27.618] <TB3> INFO: TBM errors: 0
[13:09:27.618] <TB3> INFO: flawed TBM headers: 0
[13:09:27.618] <TB3> INFO: flawed TBM trailers: 0
[13:09:27.618] <TB3> INFO: event ID mismatches: 0
[13:09:27.618] <TB3> INFO: ROC errors: 0
[13:09:27.618] <TB3> INFO: missing ROC header(s): 0
[13:09:27.618] <TB3> INFO: misplaced readback start: 0
[13:09:27.618] <TB3> INFO: Pixel decoding errors: 0
[13:09:27.618] <TB3> INFO: pixel data incomplete: 0
[13:09:27.618] <TB3> INFO: pixel address: 0
[13:09:27.618] <TB3> INFO: pulse height fill bit: 0
[13:09:27.618] <TB3> INFO: buffer corruption: 0
[13:09:27.633] <TB3> INFO: Decoding statistics:
[13:09:27.633] <TB3> INFO: General information:
[13:09:27.633] <TB3> INFO: 16bit words read: 2396570
[13:09:27.633] <TB3> INFO: valid events total: 88382
[13:09:27.633] <TB3> INFO: empty events: 2681
[13:09:27.633] <TB3> INFO: valid events with pixels: 85701
[13:09:27.633] <TB3> INFO: valid pixel hits: 667979
[13:09:27.633] <TB3> INFO: Event errors: 0
[13:09:27.633] <TB3> INFO: start marker: 0
[13:09:27.633] <TB3> INFO: stop marker: 0
[13:09:27.633] <TB3> INFO: overflow: 0
[13:09:27.633] <TB3> INFO: invalid 5bit words: 0
[13:09:27.633] <TB3> INFO: invalid XOR eye diagram: 0
[13:09:27.633] <TB3> INFO: TBM errors: 0
[13:09:27.633] <TB3> INFO: flawed TBM headers: 0
[13:09:27.633] <TB3> INFO: flawed TBM trailers: 0
[13:09:27.633] <TB3> INFO: event ID mismatches: 0
[13:09:27.633] <TB3> INFO: ROC errors: 2
[13:09:27.633] <TB3> INFO: missing ROC header(s): 2
[13:09:27.633] <TB3> INFO: misplaced readback start: 0
[13:09:27.633] <TB3> INFO: Pixel decoding errors: 4
[13:09:27.633] <TB3> INFO: pixel data incomplete: 0
[13:09:27.633] <TB3> INFO: pixel address: 2
[13:09:27.633] <TB3> INFO: pulse height fill bit: 2
[13:09:27.633] <TB3> INFO: buffer corruption: 0
[13:09:27.634] <TB3> INFO: enter test to run
[13:09:27.634] <TB3> INFO: test: exit no parameter change
[13:09:27.901] <TB3> QUIET: Connection to board 170 closed.
[13:09:27.980] <TB3> INFO: pXar: this is the end, my friend