[16:25:25.662] <TB2> INFO: *** Welcome to pxar ***
[16:25:25.662] <TB2> INFO: *** Today: 2015/12/08
[16:25:25.829] <TB2> INFO: *** Version: 3197
[16:25:25.829] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C15.dat
[16:25:25.831] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//tbmParameters_C0b.dat
[16:25:25.831] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//defaultMaskFile.dat
[16:25:25.831] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters_C15.dat
[16:25:25.905] <TB2> INFO: clk: 4
[16:25:25.905] <TB2> INFO: ctr: 4
[16:25:25.905] <TB2> INFO: sda: 19
[16:25:25.905] <TB2> INFO: tin: 9
[16:25:25.905] <TB2> INFO: level: 15
[16:25:25.905] <TB2> INFO: triggerdelay: 0
[16:25:25.905] <TB2> QUIET: Instanciating API for pxar prod-12
[16:25:25.905] <TB2> INFO: Log level: INFO
[16:25:25.912] <TB2> INFO: Found DTB DTB_WXC55Z
[16:25:25.922] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[16:25:25.925] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.2
SW version: 4.5
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
------------------------------------------------------
[16:25:25.927] <TB2> INFO: RPC call hashes of host and DTB match: 398089610
[16:25:27.454] <TB2> INFO: DUT info:
[16:25:27.454] <TB2> INFO: The DUT currently contains the following objects:
[16:25:27.454] <TB2> INFO: 2 TBM Cores tbm08c (2 ON)
[16:25:27.454] <TB2> INFO: TBM Core alpha (0): 7 registers set
[16:25:27.454] <TB2> INFO: TBM Core beta (1): 7 registers set
[16:25:27.454] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[16:25:27.454] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[16:25:27.454] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[16:25:27.454] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[16:25:27.454] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[16:25:27.454] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[16:25:27.454] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[16:25:27.454] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[16:25:27.454] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[16:25:27.454] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[16:25:27.454] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[16:25:27.454] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[16:25:27.454] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[16:25:27.454] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[16:25:27.454] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[16:25:27.454] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[16:25:27.454] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[16:25:27.855] <TB2> INFO: enter 'restricted' command line mode
[16:25:27.855] <TB2> INFO: enter test to run
[16:25:27.855] <TB2> INFO: test: pretest no parameter change
[16:25:27.855] <TB2> INFO: running: pretest
[16:25:27.863] <TB2> INFO: ######################################################################
[16:25:27.863] <TB2> INFO: PixTestPretest::doTest()
[16:25:27.863] <TB2> INFO: ######################################################################
[16:25:27.864] <TB2> INFO: ----------------------------------------------------------------------
[16:25:27.864] <TB2> INFO: PixTestPretest::programROC()
[16:25:27.864] <TB2> INFO: ----------------------------------------------------------------------
[16:25:45.881] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[16:25:45.881] <TB2> INFO: IA differences per ROC: 19.3 17.7 19.3 20.1 20.1 20.1 18.5 20.1 20.1 19.3 19.3 17.7 18.5 19.3 20.9 20.1
[16:25:45.959] <TB2> INFO: ----------------------------------------------------------------------
[16:25:45.959] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[16:25:45.959] <TB2> INFO: ----------------------------------------------------------------------
[16:25:53.568] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 388.3 mA = 24.2687 mA/ROC
[16:25:53.568] <TB2> INFO: i(loss) [mA/ROC]: 20.1 19.3 18.5 18.5 18.5 18.5 19.3 18.5 18.5 20.1 18.5 18.5 18.5 19.3 18.5 18.5
[16:25:53.602] <TB2> INFO: ----------------------------------------------------------------------
[16:25:53.602] <TB2> INFO: PixTestPretest::findTiming()
[16:25:53.602] <TB2> INFO: ----------------------------------------------------------------------
[16:25:53.603] <TB2> INFO: PixTestCmd::init()

[16:27:29.179] <TB2> INFO: TBM phases: 160MHz: 0, 400MHz: 2, TBM delays: ROC(0/1):3, header/trailer: 1, token: 1
[16:27:29.179] <TB2> INFO: (success/tries = 100/100), width = 3
[16:27:29.181] <TB2> INFO: ----------------------------------------------------------------------
[16:27:29.181] <TB2> INFO: PixTestPretest::findWorkingPixel()
[16:27:29.181] <TB2> INFO: ----------------------------------------------------------------------
[16:27:29.320] <TB2> INFO: Expecting 231680 events.


[16:27:37.162] <TB2> INFO: 231680 events read in total (7128ms).
[16:27:37.167] <TB2> INFO: Test took 7981ms.
[16:27:37.567] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[16:27:37.605] <TB2> INFO: ----------------------------------------------------------------------
[16:27:37.605] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[16:27:37.605] <TB2> INFO: ----------------------------------------------------------------------
[16:27:37.741] <TB2> INFO: Expecting 231680 events.
[16:27:46.379] <TB2> INFO: 231680 events read in total (7923ms).
[16:27:46.383] <TB2> INFO: Test took 8773ms.
[16:27:46.803] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[16:27:46.803] <TB2> INFO: CalDel: 160 158 133 121 130 121 124 143 138 139 124 142 125 130 124 130
[16:27:46.803] <TB2> INFO: VthrComp: 51 51 52 51 51 51 51 51 51 51 51 51 51 51 51 51
[16:27:46.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C0.dat
[16:27:46.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C1.dat
[16:27:46.806] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C2.dat
[16:27:46.807] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C3.dat
[16:27:46.807] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C4.dat
[16:27:46.807] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C5.dat
[16:27:46.807] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C6.dat
[16:27:46.808] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C7.dat
[16:27:46.808] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C8.dat
[16:27:46.808] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C9.dat
[16:27:46.808] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C10.dat
[16:27:46.808] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C11.dat
[16:27:46.808] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C12.dat
[16:27:46.808] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C13.dat
[16:27:46.808] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C14.dat
[16:27:46.809] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters_C15.dat
[16:27:46.809] <TB2> INFO: write tbm parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//tbmParameters_C0a.dat
[16:27:46.809] <TB2> INFO: write tbm parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//tbmParameters_C0b.dat
[16:27:46.809] <TB2> INFO: PixTestPretest::doTest() done, duration: 138 seconds
[16:27:46.877] <TB2> INFO: enter test to run
[16:27:46.877] <TB2> INFO: test: fulltest no parameter change
[16:27:46.877] <TB2> INFO: running: fulltest
[16:27:46.877] <TB2> INFO: ######################################################################
[16:27:46.877] <TB2> INFO: PixTestFullTest::doTest()
[16:27:46.877] <TB2> INFO: ######################################################################
[16:27:46.878] <TB2> INFO: ######################################################################
[16:27:46.878] <TB2> INFO: PixTestAlive::doTest()
[16:27:46.878] <TB2> INFO: ######################################################################
[16:27:46.880] <TB2> INFO: ----------------------------------------------------------------------
[16:27:46.880] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:27:46.880] <TB2> INFO: ----------------------------------------------------------------------
[16:27:47.193] <TB2> INFO: Expecting 41600 events.
[16:27:51.434] <TB2> INFO: 41600 events read in total (3526ms).
[16:27:51.434] <TB2> INFO: Test took 4553ms.
[16:27:51.443] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:27:51.815] <TB2> INFO: PixTestAlive::aliveTest() done
[16:27:51.815] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:27:51.817] <TB2> INFO: ----------------------------------------------------------------------
[16:27:51.817] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:27:51.817] <TB2> INFO: ----------------------------------------------------------------------
[16:27:52.161] <TB2> INFO: Expecting 41600 events.
[16:27:55.253] <TB2> INFO: 41600 events read in total (2376ms).
[16:27:55.254] <TB2> INFO: Test took 3435ms.
[16:27:55.254] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:27:55.254] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[16:27:55.664] <TB2> INFO: PixTestAlive::maskTest() done
[16:27:55.664] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:27:55.666] <TB2> INFO: ----------------------------------------------------------------------
[16:27:55.666] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[16:27:55.666] <TB2> INFO: ----------------------------------------------------------------------
[16:27:56.007] <TB2> INFO: Expecting 41600 events.
[16:28:00.302] <TB2> INFO: 41600 events read in total (3580ms).
[16:28:00.302] <TB2> INFO: Test took 4635ms.
[16:28:00.309] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:28:00.688] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[16:28:00.688] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[16:28:00.688] <TB2> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[16:28:00.688] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:28:00.688] <TB2> INFO: Decoding statistics:
[16:28:00.688] <TB2> INFO: General information:
[16:28:00.688] <TB2> INFO: 16bit words read: 0
[16:28:00.688] <TB2> INFO: valid events total: 0
[16:28:00.688] <TB2> INFO: empty events: 0
[16:28:00.688] <TB2> INFO: valid events with pixels: 0
[16:28:00.688] <TB2> INFO: valid pixel hits: 0
[16:28:00.688] <TB2> INFO: Event errors: 0
[16:28:00.689] <TB2> INFO: start marker: 0
[16:28:00.689] <TB2> INFO: stop marker: 0
[16:28:00.689] <TB2> INFO: overflow: 0
[16:28:00.689] <TB2> INFO: invalid 5bit words: 0
[16:28:00.689] <TB2> INFO: invalid XOR eye diagram: 0
[16:28:00.689] <TB2> INFO: TBM errors: 0
[16:28:00.689] <TB2> INFO: flawed TBM headers: 0
[16:28:00.689] <TB2> INFO: flawed TBM trailers: 0
[16:28:00.689] <TB2> INFO: event ID mismatches: 0
[16:28:00.689] <TB2> INFO: ROC errors: 0
[16:28:00.689] <TB2> INFO: missing ROC header(s): 0
[16:28:00.689] <TB2> INFO: misplaced readback start: 0
[16:28:00.689] <TB2> INFO: Pixel decoding errors: 0
[16:28:00.689] <TB2> INFO: pixel data incomplete: 0
[16:28:00.689] <TB2> INFO: pixel address: 0
[16:28:00.689] <TB2> INFO: pulse height fill bit: 0
[16:28:00.689] <TB2> INFO: buffer corruption: 0
[16:28:00.699] <TB2> INFO: ######################################################################
[16:28:00.699] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[16:28:00.699] <TB2> INFO: ######################################################################
[16:28:00.702] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[16:28:00.713] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[16:28:00.713] <TB2> INFO: run 1 of 1
[16:28:01.023] <TB2> INFO: Expecting 3120000 events.
[16:28:53.686] <TB2> INFO: 1210995 events read in total (51948ms).
[16:29:46.643] <TB2> INFO: 2407080 events read in total (104906ms).
[16:30:16.099] <TB2> INFO: 3120000 events read in total (134361ms).
[16:30:16.150] <TB2> INFO: Test took 135438ms.
[16:30:16.226] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:30:42.069] <TB2> INFO: PixTestBBMap::doTest() done, duration: 161 seconds
[16:30:42.069] <TB2> INFO: number of dead bumps (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
[16:30:42.069] <TB2> INFO: separation cut (per ROC): 114 115 135 112 112 125 110 124 118 113 115 101 121 139 110 117
[16:30:42.069] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:30:42.069] <TB2> INFO: Decoding statistics:
[16:30:42.069] <TB2> INFO: General information:
[16:30:42.069] <TB2> INFO: 16bit words read: 0
[16:30:42.069] <TB2> INFO: valid events total: 0
[16:30:42.069] <TB2> INFO: empty events: 0
[16:30:42.069] <TB2> INFO: valid events with pixels: 0
[16:30:42.069] <TB2> INFO: valid pixel hits: 0
[16:30:42.069] <TB2> INFO: Event errors: 0
[16:30:42.069] <TB2> INFO: start marker: 0
[16:30:42.069] <TB2> INFO: stop marker: 0
[16:30:42.069] <TB2> INFO: overflow: 0
[16:30:42.069] <TB2> INFO: invalid 5bit words: 0
[16:30:42.069] <TB2> INFO: invalid XOR eye diagram: 0
[16:30:42.069] <TB2> INFO: TBM errors: 0
[16:30:42.069] <TB2> INFO: flawed TBM headers: 0
[16:30:42.069] <TB2> INFO: flawed TBM trailers: 0
[16:30:42.069] <TB2> INFO: event ID mismatches: 0
[16:30:42.069] <TB2> INFO: ROC errors: 0
[16:30:42.069] <TB2> INFO: missing ROC header(s): 0
[16:30:42.069] <TB2> INFO: misplaced readback start: 0
[16:30:42.069] <TB2> INFO: Pixel decoding errors: 0
[16:30:42.069] <TB2> INFO: pixel data incomplete: 0
[16:30:42.069] <TB2> INFO: pixel address: 0
[16:30:42.069] <TB2> INFO: pulse height fill bit: 0
[16:30:42.069] <TB2> INFO: buffer corruption: 0
[16:30:42.159] <TB2> INFO: ######################################################################
[16:30:42.159] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:30:42.159] <TB2> INFO: ######################################################################
[16:30:42.159] <TB2> INFO: ----------------------------------------------------------------------
[16:30:42.159] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[16:30:42.159] <TB2> INFO: ----------------------------------------------------------------------
[16:30:42.159] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[16:30:42.169] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[16:30:42.169] <TB2> INFO: run 1 of 1
[16:30:42.485] <TB2> INFO: Expecting 26208000 events.
[16:31:17.885] <TB2> INFO: 1202200 events read in total (34686ms).
[16:31:53.293] <TB2> INFO: 2378450 events read in total (70094ms).
[16:32:28.353] <TB2> INFO: 3558050 events read in total (105154ms).
[16:33:03.297] <TB2> INFO: 4729600 events read in total (140098ms).
[16:33:38.402] <TB2> INFO: 5902600 events read in total (175203ms).
[16:34:13.857] <TB2> INFO: 7075000 events read in total (210658ms).
[16:34:48.851] <TB2> INFO: 8248800 events read in total (245652ms).
[16:35:23.970] <TB2> INFO: 9418150 events read in total (280771ms).
[16:35:59.386] <TB2> INFO: 10588250 events read in total (316187ms).
[16:36:34.410] <TB2> INFO: 11751250 events read in total (351211ms).
[16:37:10.306] <TB2> INFO: 12913600 events read in total (387108ms).
[16:37:45.604] <TB2> INFO: 14061050 events read in total (422405ms).
[16:38:19.881] <TB2> INFO: 15203350 events read in total (456682ms).
[16:38:54.297] <TB2> INFO: 16336550 events read in total (491098ms).
[16:39:29.245] <TB2> INFO: 17468150 events read in total (526046ms).
[16:40:03.569] <TB2> INFO: 18601250 events read in total (560370ms).
[16:40:37.985] <TB2> INFO: 19729700 events read in total (594786ms).
[16:41:12.160] <TB2> INFO: 20856600 events read in total (628961ms).
[16:41:47.234] <TB2> INFO: 21980200 events read in total (664035ms).
[16:42:22.086] <TB2> INFO: 23102000 events read in total (698887ms).
[16:42:57.032] <TB2> INFO: 24229250 events read in total (733833ms).
[16:43:29.347] <TB2> INFO: 25355500 events read in total (766148ms).
[16:43:54.927] <TB2> INFO: 26208000 events read in total (791728ms).
[16:43:54.967] <TB2> INFO: Test took 792798ms.
[16:43:55.045] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:43:55.186] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:43:56.611] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:43:57.986] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:43:59.351] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:44:00.854] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:44:02.679] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:44:04.376] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:44:06.104] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:44:07.794] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:44:09.484] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:44:11.091] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:44:12.559] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:44:14.010] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:44:15.443] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:44:16.822] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:44:18.273] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[16:44:19.720] <TB2> INFO: PixTestScurves::scurves() done
[16:44:19.720] <TB2> INFO: Vcal mean: 90.16 102.94 114.21 101.59 90.91 108.80 94.02 104.23 99.67 90.20 99.73 93.66 99.48 116.70 93.53 106.06
[16:44:19.720] <TB2> INFO: Vcal RMS: 4.68 5.68 5.45 4.93 4.85 4.77 5.63 5.54 5.57 5.75 5.55 6.74 5.68 5.99 6.87 6.68
[16:44:19.720] <TB2> INFO: PixTestScurves::fullTest() done, duration: 817 seconds
[16:44:19.720] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:44:19.720] <TB2> INFO: Decoding statistics:
[16:44:19.720] <TB2> INFO: General information:
[16:44:19.720] <TB2> INFO: 16bit words read: 0
[16:44:19.720] <TB2> INFO: valid events total: 0
[16:44:19.720] <TB2> INFO: empty events: 0
[16:44:19.720] <TB2> INFO: valid events with pixels: 0
[16:44:19.720] <TB2> INFO: valid pixel hits: 0
[16:44:19.720] <TB2> INFO: Event errors: 0
[16:44:19.720] <TB2> INFO: start marker: 0
[16:44:19.720] <TB2> INFO: stop marker: 0
[16:44:19.720] <TB2> INFO: overflow: 0
[16:44:19.720] <TB2> INFO: invalid 5bit words: 0
[16:44:19.720] <TB2> INFO: invalid XOR eye diagram: 0
[16:44:19.720] <TB2> INFO: TBM errors: 0
[16:44:19.720] <TB2> INFO: flawed TBM headers: 0
[16:44:19.720] <TB2> INFO: flawed TBM trailers: 0
[16:44:19.720] <TB2> INFO: event ID mismatches: 0
[16:44:19.720] <TB2> INFO: ROC errors: 0
[16:44:19.720] <TB2> INFO: missing ROC header(s): 0
[16:44:19.720] <TB2> INFO: misplaced readback start: 0
[16:44:19.720] <TB2> INFO: Pixel decoding errors: 0
[16:44:19.720] <TB2> INFO: pixel data incomplete: 0
[16:44:19.721] <TB2> INFO: pixel address: 0
[16:44:19.721] <TB2> INFO: pulse height fill bit: 0
[16:44:19.721] <TB2> INFO: buffer corruption: 0
[16:44:19.804] <TB2> INFO: ######################################################################
[16:44:19.804] <TB2> INFO: PixTestTrim::doTest()
[16:44:19.804] <TB2> INFO: ######################################################################
[16:44:19.806] <TB2> INFO: ----------------------------------------------------------------------
[16:44:19.806] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[16:44:19.806] <TB2> INFO: ----------------------------------------------------------------------
[16:44:19.888] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[16:44:19.888] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:44:19.896] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[16:44:19.896] <TB2> INFO: run 1 of 1
[16:44:20.208] <TB2> INFO: Expecting 6281600 events.
[16:45:08.165] <TB2> INFO: 1445110 events read in total (47238ms).
[16:45:55.637] <TB2> INFO: 2874010 events read in total (94710ms).
[16:46:41.701] <TB2> INFO: 4303700 events read in total (140775ms).
[16:47:29.766] <TB2> INFO: 5740560 events read in total (188839ms).
[16:47:46.156] <TB2> INFO: 6281600 events read in total (205229ms).
[16:47:46.196] <TB2> INFO: Test took 206301ms.
[16:47:46.258] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:48:05.710] <TB2> INFO: ROC 0 VthrComp = 90
[16:48:05.711] <TB2> INFO: ROC 1 VthrComp = 98
[16:48:05.711] <TB2> INFO: ROC 2 VthrComp = 109
[16:48:05.713] <TB2> INFO: ROC 3 VthrComp = 102
[16:48:05.713] <TB2> INFO: ROC 4 VthrComp = 94
[16:48:05.713] <TB2> INFO: ROC 5 VthrComp = 104
[16:48:05.714] <TB2> INFO: ROC 6 VthrComp = 93
[16:48:05.714] <TB2> INFO: ROC 7 VthrComp = 102
[16:48:05.715] <TB2> INFO: ROC 8 VthrComp = 98
[16:48:05.715] <TB2> INFO: ROC 9 VthrComp = 92
[16:48:05.715] <TB2> INFO: ROC 10 VthrComp = 99
[16:48:05.715] <TB2> INFO: ROC 11 VthrComp = 89
[16:48:05.715] <TB2> INFO: ROC 12 VthrComp = 101
[16:48:05.715] <TB2> INFO: ROC 13 VthrComp = 110
[16:48:05.715] <TB2> INFO: ROC 14 VthrComp = 92
[16:48:05.715] <TB2> INFO: ROC 15 VthrComp = 100
[16:48:05.715] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[16:48:05.715] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[16:48:05.725] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[16:48:05.725] <TB2> INFO: run 1 of 1
[16:48:06.054] <TB2> INFO: Expecting 6281600 events.
[16:48:44.645] <TB2> INFO: 890260 events read in total (37876ms).
[16:49:23.137] <TB2> INFO: 1777900 events read in total (76368ms).
[16:50:01.705] <TB2> INFO: 2667210 events read in total (114936ms).
[16:50:40.307] <TB2> INFO: 3553300 events read in total (153538ms).
[16:51:18.105] <TB2> INFO: 4431200 events read in total (191336ms).
[16:51:55.002] <TB2> INFO: 5305280 events read in total (228233ms).
[16:52:34.977] <TB2> INFO: 6177960 events read in total (268208ms).
[16:52:39.781] <TB2> INFO: 6281600 events read in total (273012ms).
[16:52:39.836] <TB2> INFO: Test took 274110ms.
[16:52:39.979] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[16:53:05.419] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 56.8795 for pixel 21/10 mean/min/max = 45.8866/34.6849/57.0884
[16:53:05.419] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 58.3263 for pixel 11/9 mean/min/max = 45.097/31.676/58.518
[16:53:05.419] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 64.2264 for pixel 7/0 mean/min/max = 49.4095/34.3167/64.5024
[16:53:05.420] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 56.3652 for pixel 1/36 mean/min/max = 44.4733/32.376/56.5706
[16:53:05.420] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 57.0411 for pixel 18/17 mean/min/max = 45.1904/33.3017/57.0792
[16:53:05.420] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 60.8759 for pixel 19/13 mean/min/max = 48.0149/34.9318/61.098
[16:53:05.420] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 59.9427 for pixel 0/7 mean/min/max = 46.3766/32.5637/60.1895
[16:53:05.421] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 60.0812 for pixel 11/1 mean/min/max = 45.9958/31.8493/60.1423
[16:53:05.421] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 58 for pixel 23/72 mean/min/max = 45.0121/31.837/58.1872
[16:53:05.421] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 58.2869 for pixel 15/78 mean/min/max = 46.0626/33.6033/58.522
[16:53:05.421] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 57.588 for pixel 0/28 mean/min/max = 44.6548/31.682/57.6276
[16:53:05.422] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 61.8241 for pixel 2/45 mean/min/max = 47.5219/33.201/61.8428
[16:53:05.422] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 57.5759 for pixel 23/75 mean/min/max = 44.9743/32.2953/57.6532
[16:53:05.422] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 63.8343 for pixel 16/44 mean/min/max = 49.3178/34.5589/64.0767
[16:53:05.422] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 63.2831 for pixel 0/76 mean/min/max = 47.5652/31.7665/63.364
[16:53:05.423] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 64.1566 for pixel 0/78 mean/min/max = 47.8778/31.5914/64.1642
[16:53:05.423] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[16:53:05.553] <TB2> INFO: Expecting 514560 events.
[16:53:16.257] <TB2> INFO: 514560 events read in total (9988ms).
[16:53:16.263] <TB2> INFO: Expecting 514560 events.
[16:53:26.290] <TB2> INFO: 514560 events read in total (9365ms).
[16:53:26.297] <TB2> INFO: Expecting 514560 events.
[16:53:36.733] <TB2> INFO: 514560 events read in total (9766ms).
[16:53:36.742] <TB2> INFO: Expecting 514560 events.
[16:53:47.129] <TB2> INFO: 514560 events read in total (9729ms).
[16:53:47.141] <TB2> INFO: Expecting 514560 events.
[16:53:57.288] <TB2> INFO: 514560 events read in total (9491ms).
[16:53:57.300] <TB2> INFO: Expecting 514560 events.
[16:54:07.596] <TB2> INFO: 514560 events read in total (9631ms).
[16:54:07.609] <TB2> INFO: Expecting 514560 events.
[16:54:17.963] <TB2> INFO: 514560 events read in total (9688ms).
[16:54:17.979] <TB2> INFO: Expecting 514560 events.
[16:54:28.391] <TB2> INFO: 514560 events read in total (9756ms).
[16:54:28.408] <TB2> INFO: Expecting 514560 events.
[16:54:39.004] <TB2> INFO: 514560 events read in total (9935ms).
[16:54:39.026] <TB2> INFO: Expecting 514560 events.
[16:54:49.827] <TB2> INFO: 514560 events read in total (10149ms).
[16:54:49.856] <TB2> INFO: Expecting 514560 events.
[16:55:00.114] <TB2> INFO: 514560 events read in total (9610ms).
[16:55:00.135] <TB2> INFO: Expecting 514560 events.
[16:55:10.651] <TB2> INFO: 514560 events read in total (9855ms).
[16:55:10.675] <TB2> INFO: Expecting 514560 events.
[16:55:21.161] <TB2> INFO: 514560 events read in total (9829ms).
[16:55:21.198] <TB2> INFO: Expecting 514560 events.
[16:55:31.617] <TB2> INFO: 514560 events read in total (9789ms).
[16:55:31.653] <TB2> INFO: Expecting 514560 events.
[16:55:41.869] <TB2> INFO: 514560 events read in total (9580ms).
[16:55:41.902] <TB2> INFO: Expecting 514560 events.
[16:55:52.333] <TB2> INFO: 514560 events read in total (9785ms).
[16:55:52.370] <TB2> INFO: Test took 166947ms.
[16:55:53.500] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[16:55:53.515] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[16:55:53.515] <TB2> INFO: run 1 of 1
[16:55:53.849] <TB2> INFO: Expecting 6281600 events.
[16:56:33.000] <TB2> INFO: 870140 events read in total (38437ms).
[16:57:11.406] <TB2> INFO: 1738470 events read in total (76844ms).
[16:57:48.475] <TB2> INFO: 2607790 events read in total (113912ms).
[16:58:25.581] <TB2> INFO: 3474490 events read in total (151018ms).
[16:59:01.846] <TB2> INFO: 4332700 events read in total (187283ms).
[16:59:38.288] <TB2> INFO: 5187430 events read in total (223725ms).
[17:00:15.355] <TB2> INFO: 6039820 events read in total (260792ms).
[17:00:25.608] <TB2> INFO: 6281600 events read in total (271045ms).
[17:00:25.669] <TB2> INFO: Test took 272154ms.
[17:00:25.817] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:00:51.756] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.011137 .. 52.292361
[17:00:51.852] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 10 dacrange: 0 .. 62 (-1/-1) hits flags = 528 (plus default)
[17:00:51.862] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[17:00:51.862] <TB2> INFO: run 1 of 1
[17:00:52.174] <TB2> INFO: Expecting 2620800 events.
[17:01:34.188] <TB2> INFO: 1142690 events read in total (41295ms).
[17:02:13.864] <TB2> INFO: 2276220 events read in total (80971ms).
[17:02:27.230] <TB2> INFO: 2620800 events read in total (94337ms).
[17:02:27.252] <TB2> INFO: Test took 95390ms.
[17:02:27.293] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:02:41.523] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 16.241440 .. 47.018577
[17:02:41.597] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 10 dacrange: 6 .. 57 (-1/-1) hits flags = 528 (plus default)
[17:02:41.606] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[17:02:41.606] <TB2> INFO: run 1 of 1
[17:02:41.908] <TB2> INFO: Expecting 2163200 events.
[17:03:22.175] <TB2> INFO: 1135670 events read in total (39549ms).
[17:03:58.794] <TB2> INFO: 2163200 events read in total (76168ms).
[17:03:58.826] <TB2> INFO: Test took 77221ms.
[17:03:58.868] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:04:12.168] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 20.680065 .. 43.355759
[17:04:12.242] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 10 dacrange: 10 .. 53 (-1/-1) hits flags = 528 (plus default)
[17:04:12.251] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[17:04:12.251] <TB2> INFO: run 1 of 1
[17:04:12.556] <TB2> INFO: Expecting 1830400 events.
[17:04:55.682] <TB2> INFO: 1149630 events read in total (42412ms).
[17:05:21.761] <TB2> INFO: 1830400 events read in total (68491ms).
[17:05:21.780] <TB2> INFO: Test took 69529ms.
[17:05:21.813] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:05:35.294] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 21.788204 .. 43.355759
[17:05:35.386] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 10 dacrange: 11 .. 53 (-1/-1) hits flags = 528 (plus default)
[17:05:35.395] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[17:05:35.395] <TB2> INFO: run 1 of 1
[17:05:35.727] <TB2> INFO: Expecting 1788800 events.
[17:06:17.277] <TB2> INFO: 1143120 events read in total (40836ms).
[17:06:40.618] <TB2> INFO: 1788800 events read in total (64176ms).
[17:06:40.635] <TB2> INFO: Test took 65241ms.
[17:06:40.665] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:06:54.065] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[17:06:54.065] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[17:06:54.073] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[17:06:54.073] <TB2> INFO: run 1 of 1
[17:06:54.378] <TB2> INFO: Expecting 1705600 events.
[17:07:35.055] <TB2> INFO: 1076500 events read in total (39962ms).
[17:07:57.231] <TB2> INFO: 1705600 events read in total (62138ms).
[17:07:57.250] <TB2> INFO: Test took 63177ms.
[17:07:57.285] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:08:11.855] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C0.dat
[17:08:11.855] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C1.dat
[17:08:11.856] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C2.dat
[17:08:11.856] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C3.dat
[17:08:11.856] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C4.dat
[17:08:11.856] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C5.dat
[17:08:11.856] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C6.dat
[17:08:11.856] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C7.dat
[17:08:11.856] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C8.dat
[17:08:11.856] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C9.dat
[17:08:11.857] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C10.dat
[17:08:11.857] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C11.dat
[17:08:11.857] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C12.dat
[17:08:11.857] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C13.dat
[17:08:11.857] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C14.dat
[17:08:11.857] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C15.dat
[17:08:11.877] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters35_C0.dat
[17:08:11.887] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters35_C1.dat
[17:08:11.897] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters35_C2.dat
[17:08:11.907] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters35_C3.dat
[17:08:11.919] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters35_C4.dat
[17:08:11.932] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters35_C5.dat
[17:08:11.945] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters35_C6.dat
[17:08:11.954] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters35_C7.dat
[17:08:11.968] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters35_C8.dat
[17:08:11.982] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters35_C9.dat
[17:08:11.992] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters35_C10.dat
[17:08:12.002] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters35_C11.dat
[17:08:12.012] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters35_C12.dat
[17:08:12.022] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters35_C13.dat
[17:08:12.032] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters35_C14.dat
[17:08:12.042] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//trimParameters35_C15.dat
[17:08:12.053] <TB2> INFO: PixTestTrim::trimTest() done
[17:08:12.053] <TB2> INFO: vtrim: 98 87 123 90 96 100 93 95 92 95 86 94 100 122 99 100
[17:08:12.053] <TB2> INFO: vthrcomp: 90 98 109 102 94 104 93 102 98 92 99 89 101 110 92 100
[17:08:12.053] <TB2> INFO: vcal mean: 34.98 34.95 34.96 35.06 35.01 34.97 34.97 34.96 34.93 34.98 34.96 34.98 34.98 34.98 35.00 35.02
[17:08:12.053] <TB2> INFO: vcal RMS: 0.84 0.93 0.93 0.92 0.84 0.88 0.87 0.90 0.84 0.83 0.90 0.89 0.86 0.98 0.89 0.95
[17:08:12.053] <TB2> INFO: bits mean: 9.21 9.79 8.81 9.75 9.90 8.61 9.06 9.41 9.84 8.78 9.71 8.63 9.69 8.92 8.91 9.10
[17:08:12.053] <TB2> INFO: bits RMS: 2.43 2.58 2.41 2.64 2.36 2.48 2.79 2.73 2.59 2.77 2.76 2.79 2.61 2.34 2.82 2.74
[17:08:12.116] <TB2> INFO: ----------------------------------------------------------------------
[17:08:12.116] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 5, vtrims = 254 126 63 32
[17:08:12.116] <TB2> INFO: ----------------------------------------------------------------------
[17:08:12.120] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 5 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[17:08:12.131] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[17:08:12.131] <TB2> INFO: run 1 of 1
[17:08:12.513] <TB2> INFO: Expecting 4160000 events.
[17:09:01.351] <TB2> INFO: 1221950 events read in total (48124ms).
[17:09:48.723] <TB2> INFO: 2426965 events read in total (95496ms).
[17:10:37.111] <TB2> INFO: 3609235 events read in total (143884ms).
[17:11:00.371] <TB2> INFO: 4160000 events read in total (167144ms).
[17:11:00.438] <TB2> INFO: Test took 168307ms.
[17:11:00.537] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:11:31.179] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 5 dacrange: 0 .. 191 (-1/-1) hits flags = 528 (plus default)
[17:11:31.188] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[17:11:31.188] <TB2> INFO: run 1 of 1
[17:11:31.508] <TB2> INFO: Expecting 3993600 events.
[17:12:21.451] <TB2> INFO: 1187480 events read in total (49228ms).
[17:13:09.898] <TB2> INFO: 2359765 events read in total (97675ms).
[17:13:59.961] <TB2> INFO: 3511335 events read in total (147739ms).
[17:14:21.396] <TB2> INFO: 3993600 events read in total (169173ms).
[17:14:21.447] <TB2> INFO: Test took 170259ms.
[17:14:21.546] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:14:54.217] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 5 dacrange: 0 .. 176 (-1/-1) hits flags = 528 (plus default)
[17:14:54.226] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[17:14:54.226] <TB2> INFO: run 1 of 1
[17:14:54.528] <TB2> INFO: Expecting 3681600 events.
[17:15:42.887] <TB2> INFO: 1246565 events read in total (47644ms).
[17:16:34.364] <TB2> INFO: 2468080 events read in total (99121ms).
[17:17:25.345] <TB2> INFO: 3673595 events read in total (150103ms).
[17:17:26.047] <TB2> INFO: 3681600 events read in total (150804ms).
[17:17:26.098] <TB2> INFO: Test took 151873ms.
[17:17:26.189] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:17:53.061] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 5 dacrange: 0 .. 177 (-1/-1) hits flags = 528 (plus default)
[17:17:53.070] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[17:17:53.070] <TB2> INFO: run 1 of 1
[17:17:53.406] <TB2> INFO: Expecting 3702400 events.
[17:18:44.613] <TB2> INFO: 1240510 events read in total (50492ms).
[17:19:36.462] <TB2> INFO: 2457015 events read in total (102341ms).
[17:20:28.508] <TB2> INFO: 3655915 events read in total (154387ms).
[17:20:30.859] <TB2> INFO: 3702400 events read in total (156738ms).
[17:20:30.899] <TB2> INFO: Test took 157830ms.
[17:20:30.984] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:20:57.729] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 5 dacrange: 0 .. 175 (-1/-1) hits flags = 528 (plus default)
[17:20:57.737] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[17:20:57.737] <TB2> INFO: run 1 of 1
[17:20:58.039] <TB2> INFO: Expecting 3660800 events.
[17:21:47.914] <TB2> INFO: 1248505 events read in total (49160ms).
[17:22:39.503] <TB2> INFO: 2471425 events read in total (100749ms).
[17:23:30.186] <TB2> INFO: 3660800 events read in total (151432ms).
[17:23:30.240] <TB2> INFO: Test took 152503ms.
[17:23:30.330] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:23:56.935] <TB2> INFO: PixTestTrim::trimBitTest() done
[17:23:56.937] <TB2> INFO: PixTestTrim::doTest() done, duration: 2377 seconds
[17:23:56.937] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:23:56.937] <TB2> INFO: Decoding statistics:
[17:23:56.937] <TB2> INFO: General information:
[17:23:56.937] <TB2> INFO: 16bit words read: 0
[17:23:56.937] <TB2> INFO: valid events total: 0
[17:23:56.937] <TB2> INFO: empty events: 0
[17:23:56.937] <TB2> INFO: valid events with pixels: 0
[17:23:56.937] <TB2> INFO: valid pixel hits: 0
[17:23:56.937] <TB2> INFO: Event errors: 0
[17:23:56.937] <TB2> INFO: start marker: 0
[17:23:56.937] <TB2> INFO: stop marker: 0
[17:23:56.937] <TB2> INFO: overflow: 0
[17:23:56.937] <TB2> INFO: invalid 5bit words: 0
[17:23:56.937] <TB2> INFO: invalid XOR eye diagram: 0
[17:23:56.937] <TB2> INFO: TBM errors: 0
[17:23:56.937] <TB2> INFO: flawed TBM headers: 0
[17:23:56.937] <TB2> INFO: flawed TBM trailers: 0
[17:23:56.937] <TB2> INFO: event ID mismatches: 0
[17:23:56.937] <TB2> INFO: ROC errors: 0
[17:23:56.937] <TB2> INFO: missing ROC header(s): 0
[17:23:56.937] <TB2> INFO: misplaced readback start: 0
[17:23:56.937] <TB2> INFO: Pixel decoding errors: 0
[17:23:56.937] <TB2> INFO: pixel data incomplete: 0
[17:23:56.937] <TB2> INFO: pixel address: 0
[17:23:56.937] <TB2> INFO: pulse height fill bit: 0
[17:23:56.937] <TB2> INFO: buffer corruption: 0
[17:23:57.826] <TB2> INFO: ######################################################################
[17:23:57.826] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[17:23:57.826] <TB2> INFO: ######################################################################
[17:23:58.138] <TB2> INFO: Expecting 41600 events.
[17:24:02.445] <TB2> INFO: 41600 events read in total (3592ms).
[17:24:02.445] <TB2> INFO: Test took 4617ms.
[17:24:02.452] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:24:03.147] <TB2> INFO: Expecting 41600 events.
[17:24:07.326] <TB2> INFO: 41600 events read in total (3464ms).
[17:24:07.327] <TB2> INFO: Test took 4525ms.
[17:24:07.333] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:24:07.779] <TB2> INFO: Expecting 41600 events.
[17:24:11.845] <TB2> INFO: 41600 events read in total (3351ms).
[17:24:11.845] <TB2> INFO: Test took 4390ms.
[17:24:11.852] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:24:12.290] <TB2> INFO: Expecting 2560 events.
[17:24:13.299] <TB2> INFO: 2560 events read in total (294ms).
[17:24:13.300] <TB2> INFO: Test took 1441ms.
[17:24:13.807] <TB2> INFO: Expecting 2560 events.
[17:24:14.763] <TB2> INFO: 2560 events read in total (241ms).
[17:24:14.763] <TB2> INFO: Test took 1462ms.
[17:24:15.271] <TB2> INFO: Expecting 2560 events.
[17:24:16.227] <TB2> INFO: 2560 events read in total (242ms).
[17:24:16.227] <TB2> INFO: Test took 1464ms.
[17:24:16.735] <TB2> INFO: Expecting 2560 events.
[17:24:17.691] <TB2> INFO: 2560 events read in total (242ms).
[17:24:17.691] <TB2> INFO: Test took 1463ms.
[17:24:18.198] <TB2> INFO: Expecting 2560 events.
[17:24:19.154] <TB2> INFO: 2560 events read in total (241ms).
[17:24:19.154] <TB2> INFO: Test took 1462ms.
[17:24:19.662] <TB2> INFO: Expecting 2560 events.
[17:24:20.618] <TB2> INFO: 2560 events read in total (241ms).
[17:24:20.618] <TB2> INFO: Test took 1463ms.
[17:24:21.126] <TB2> INFO: Expecting 2560 events.
[17:24:22.083] <TB2> INFO: 2560 events read in total (242ms).
[17:24:22.084] <TB2> INFO: Test took 1466ms.
[17:24:22.591] <TB2> INFO: Expecting 2560 events.
[17:24:23.548] <TB2> INFO: 2560 events read in total (242ms).
[17:24:23.548] <TB2> INFO: Test took 1464ms.
[17:24:24.055] <TB2> INFO: Expecting 2560 events.
[17:24:25.012] <TB2> INFO: 2560 events read in total (242ms).
[17:24:25.012] <TB2> INFO: Test took 1464ms.
[17:24:25.519] <TB2> INFO: Expecting 2560 events.
[17:24:26.490] <TB2> INFO: 2560 events read in total (256ms).
[17:24:26.490] <TB2> INFO: Test took 1478ms.
[17:24:26.997] <TB2> INFO: Expecting 2560 events.
[17:24:27.967] <TB2> INFO: 2560 events read in total (255ms).
[17:24:27.967] <TB2> INFO: Test took 1477ms.
[17:24:28.475] <TB2> INFO: Expecting 2560 events.
[17:24:29.447] <TB2> INFO: 2560 events read in total (258ms).
[17:24:29.447] <TB2> INFO: Test took 1479ms.
[17:24:29.954] <TB2> INFO: Expecting 2560 events.
[17:24:30.914] <TB2> INFO: 2560 events read in total (245ms).
[17:24:30.914] <TB2> INFO: Test took 1466ms.
[17:24:31.422] <TB2> INFO: Expecting 2560 events.
[17:24:32.379] <TB2> INFO: 2560 events read in total (242ms).
[17:24:32.379] <TB2> INFO: Test took 1465ms.
[17:24:32.886] <TB2> INFO: Expecting 2560 events.
[17:24:33.843] <TB2> INFO: 2560 events read in total (242ms).
[17:24:33.843] <TB2> INFO: Test took 1463ms.
[17:24:34.351] <TB2> INFO: Expecting 2560 events.
[17:24:35.335] <TB2> INFO: 2560 events read in total (269ms).
[17:24:35.335] <TB2> INFO: Test took 1492ms.
[17:24:35.338] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:24:35.844] <TB2> INFO: Expecting 655360 events.
[17:24:48.728] <TB2> INFO: 655360 events read in total (12169ms).
[17:24:48.738] <TB2> INFO: Expecting 655360 events.
[17:25:00.139] <TB2> INFO: 655360 events read in total (10809ms).
[17:25:00.152] <TB2> INFO: Expecting 655360 events.
[17:25:12.415] <TB2> INFO: 655360 events read in total (11671ms).
[17:25:12.431] <TB2> INFO: Expecting 655360 events.
[17:25:26.180] <TB2> INFO: 655360 events read in total (13155ms).
[17:25:26.205] <TB2> INFO: Expecting 655360 events.
[17:25:39.964] <TB2> INFO: 655360 events read in total (13206ms).
[17:25:39.992] <TB2> INFO: Expecting 655360 events.
[17:25:52.260] <TB2> INFO: 655360 events read in total (11712ms).
[17:25:52.288] <TB2> INFO: Expecting 655360 events.
[17:26:04.896] <TB2> INFO: 655360 events read in total (12037ms).
[17:26:04.928] <TB2> INFO: Expecting 655360 events.
[17:26:18.894] <TB2> INFO: 655360 events read in total (13391ms).
[17:26:18.928] <TB2> INFO: Expecting 655360 events.
[17:26:30.500] <TB2> INFO: 655360 events read in total (11000ms).
[17:26:30.549] <TB2> INFO: Expecting 655360 events.
[17:26:41.830] <TB2> INFO: 655360 events read in total (10755ms).
[17:26:41.874] <TB2> INFO: Expecting 655360 events.
[17:26:53.636] <TB2> INFO: 655360 events read in total (11199ms).
[17:26:53.686] <TB2> INFO: Expecting 655360 events.
[17:27:06.181] <TB2> INFO: 655360 events read in total (11943ms).
[17:27:06.239] <TB2> INFO: Expecting 655360 events.
[17:27:17.662] <TB2> INFO: 655360 events read in total (10896ms).
[17:27:17.713] <TB2> INFO: Expecting 655360 events.
[17:27:30.784] <TB2> INFO: 655360 events read in total (12508ms).
[17:27:30.860] <TB2> INFO: Expecting 655360 events.
[17:27:43.153] <TB2> INFO: 655360 events read in total (11767ms).
[17:27:43.232] <TB2> INFO: Expecting 655360 events.
[17:27:54.485] <TB2> INFO: 655360 events read in total (10726ms).
[17:27:54.570] <TB2> INFO: Test took 199232ms.
[17:27:54.661] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:27:54.966] <TB2> INFO: Expecting 655360 events.
[17:28:07.494] <TB2> INFO: 655360 events read in total (11813ms).
[17:28:07.507] <TB2> INFO: Expecting 655360 events.
[17:28:20.870] <TB2> INFO: 655360 events read in total (12801ms).
[17:28:20.884] <TB2> INFO: Expecting 655360 events.
[17:28:34.436] <TB2> INFO: 655360 events read in total (12953ms).
[17:28:34.452] <TB2> INFO: Expecting 655360 events.
[17:28:46.887] <TB2> INFO: 655360 events read in total (11846ms).
[17:28:46.909] <TB2> INFO: Expecting 655360 events.
[17:28:59.166] <TB2> INFO: 655360 events read in total (11680ms).
[17:28:59.190] <TB2> INFO: Expecting 655360 events.
[17:29:12.703] <TB2> INFO: 655360 events read in total (12935ms).
[17:29:12.732] <TB2> INFO: Expecting 655360 events.
[17:29:24.777] <TB2> INFO: 655360 events read in total (11465ms).
[17:29:24.807] <TB2> INFO: Expecting 655360 events.
[17:29:35.962] <TB2> INFO: 655360 events read in total (10570ms).
[17:29:36.000] <TB2> INFO: Expecting 655360 events.
[17:29:47.398] <TB2> INFO: 655360 events read in total (10828ms).
[17:29:47.453] <TB2> INFO: Expecting 655360 events.
[17:29:59.960] <TB2> INFO: 655360 events read in total (11981ms).
[17:30:00.011] <TB2> INFO: Expecting 655360 events.
[17:30:12.079] <TB2> INFO: 655360 events read in total (11528ms).
[17:30:12.125] <TB2> INFO: Expecting 655360 events.
[17:30:24.382] <TB2> INFO: 655360 events read in total (11713ms).
[17:30:24.446] <TB2> INFO: Expecting 655360 events.
[17:30:37.396] <TB2> INFO: 655360 events read in total (12400ms).
[17:30:37.448] <TB2> INFO: Expecting 655360 events.
[17:30:50.619] <TB2> INFO: 655360 events read in total (12613ms).
[17:30:50.685] <TB2> INFO: Expecting 655360 events.
[17:31:04.024] <TB2> INFO: 655360 events read in total (12791ms).
[17:31:04.089] <TB2> INFO: Expecting 655360 events.
[17:31:17.273] <TB2> INFO: 655360 events read in total (12640ms).
[17:31:17.350] <TB2> INFO: Test took 202689ms.
[17:31:17.552] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:31:17.560] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:31:17.567] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:31:17.574] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:31:17.582] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:31:17.589] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:31:17.596] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:31:17.604] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:31:17.611] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:31:17.618] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:31:17.626] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:31:17.633] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:31:17.640] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:31:17.648] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:31:17.655] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:31:17.662] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[17:31:17.706] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C0.dat
[17:31:17.706] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C1.dat
[17:31:17.707] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C2.dat
[17:31:17.710] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C3.dat
[17:31:17.711] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C4.dat
[17:31:17.711] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C5.dat
[17:31:17.713] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C6.dat
[17:31:17.713] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C7.dat
[17:31:17.715] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C8.dat
[17:31:17.715] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C9.dat
[17:31:17.715] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C10.dat
[17:31:17.716] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C11.dat
[17:31:17.717] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C12.dat
[17:31:17.746] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C13.dat
[17:31:17.747] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C14.dat
[17:31:17.747] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//dacParameters35_C15.dat
[17:31:18.060] <TB2> INFO: Expecting 41600 events.
[17:31:21.979] <TB2> INFO: 41600 events read in total (3203ms).
[17:31:21.980] <TB2> INFO: Test took 4230ms.
[17:31:22.635] <TB2> INFO: Expecting 41600 events.
[17:31:26.746] <TB2> INFO: 41600 events read in total (3396ms).
[17:31:26.747] <TB2> INFO: Test took 4455ms.
[17:31:27.392] <TB2> INFO: Expecting 41600 events.
[17:31:31.463] <TB2> INFO: 41600 events read in total (3356ms).
[17:31:31.463] <TB2> INFO: Test took 4385ms.
[17:31:31.784] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:31.916] <TB2> INFO: Expecting 2560 events.
[17:31:32.878] <TB2> INFO: 2560 events read in total (247ms).
[17:31:32.879] <TB2> INFO: Test took 1095ms.
[17:31:32.881] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:33.387] <TB2> INFO: Expecting 2560 events.
[17:31:34.347] <TB2> INFO: 2560 events read in total (245ms).
[17:31:34.348] <TB2> INFO: Test took 1467ms.
[17:31:34.350] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:34.856] <TB2> INFO: Expecting 2560 events.
[17:31:35.819] <TB2> INFO: 2560 events read in total (248ms).
[17:31:35.820] <TB2> INFO: Test took 1470ms.
[17:31:35.823] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:36.328] <TB2> INFO: Expecting 2560 events.
[17:31:37.291] <TB2> INFO: 2560 events read in total (248ms).
[17:31:37.291] <TB2> INFO: Test took 1468ms.
[17:31:37.294] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:37.800] <TB2> INFO: Expecting 2560 events.
[17:31:38.794] <TB2> INFO: 2560 events read in total (279ms).
[17:31:38.794] <TB2> INFO: Test took 1500ms.
[17:31:38.796] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:39.304] <TB2> INFO: Expecting 2560 events.
[17:31:40.278] <TB2> INFO: 2560 events read in total (259ms).
[17:31:40.279] <TB2> INFO: Test took 1483ms.
[17:31:40.281] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:40.788] <TB2> INFO: Expecting 2560 events.
[17:31:41.763] <TB2> INFO: 2560 events read in total (260ms).
[17:31:41.763] <TB2> INFO: Test took 1482ms.
[17:31:41.766] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:42.272] <TB2> INFO: Expecting 2560 events.
[17:31:43.263] <TB2> INFO: 2560 events read in total (276ms).
[17:31:43.263] <TB2> INFO: Test took 1497ms.
[17:31:43.266] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:43.772] <TB2> INFO: Expecting 2560 events.
[17:31:44.735] <TB2> INFO: 2560 events read in total (248ms).
[17:31:44.735] <TB2> INFO: Test took 1470ms.
[17:31:44.738] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:45.244] <TB2> INFO: Expecting 2560 events.
[17:31:46.206] <TB2> INFO: 2560 events read in total (247ms).
[17:31:46.206] <TB2> INFO: Test took 1468ms.
[17:31:46.209] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:46.715] <TB2> INFO: Expecting 2560 events.
[17:31:47.677] <TB2> INFO: 2560 events read in total (247ms).
[17:31:47.678] <TB2> INFO: Test took 1469ms.
[17:31:47.680] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:48.186] <TB2> INFO: Expecting 2560 events.
[17:31:49.148] <TB2> INFO: 2560 events read in total (247ms).
[17:31:49.148] <TB2> INFO: Test took 1468ms.
[17:31:49.151] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:49.657] <TB2> INFO: Expecting 2560 events.
[17:31:50.663] <TB2> INFO: 2560 events read in total (291ms).
[17:31:50.663] <TB2> INFO: Test took 1512ms.
[17:31:50.666] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:51.171] <TB2> INFO: Expecting 2560 events.
[17:31:52.135] <TB2> INFO: 2560 events read in total (249ms).
[17:31:52.135] <TB2> INFO: Test took 1469ms.
[17:31:52.138] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:52.643] <TB2> INFO: Expecting 2560 events.
[17:31:53.646] <TB2> INFO: 2560 events read in total (288ms).
[17:31:53.646] <TB2> INFO: Test took 1509ms.
[17:31:53.649] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:54.155] <TB2> INFO: Expecting 2560 events.
[17:31:55.118] <TB2> INFO: 2560 events read in total (248ms).
[17:31:55.118] <TB2> INFO: Test took 1469ms.
[17:31:55.121] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:55.627] <TB2> INFO: Expecting 2560 events.
[17:31:56.589] <TB2> INFO: 2560 events read in total (247ms).
[17:31:56.590] <TB2> INFO: Test took 1469ms.
[17:31:56.593] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:57.098] <TB2> INFO: Expecting 2560 events.
[17:31:58.062] <TB2> INFO: 2560 events read in total (249ms).
[17:31:58.062] <TB2> INFO: Test took 1470ms.
[17:31:58.065] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:31:58.571] <TB2> INFO: Expecting 2560 events.
[17:31:59.534] <TB2> INFO: 2560 events read in total (248ms).
[17:31:59.534] <TB2> INFO: Test took 1469ms.
[17:31:59.537] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:32:00.043] <TB2> INFO: Expecting 2560 events.
[17:32:01.006] <TB2> INFO: 2560 events read in total (248ms).
[17:32:01.006] <TB2> INFO: Test took 1469ms.
[17:32:01.009] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:32:01.514] <TB2> INFO: Expecting 2560 events.
[17:32:02.489] <TB2> INFO: 2560 events read in total (259ms).
[17:32:02.490] <TB2> INFO: Test took 1482ms.
[17:32:02.493] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:32:02.998] <TB2> INFO: Expecting 2560 events.
[17:32:03.957] <TB2> INFO: 2560 events read in total (244ms).
[17:32:03.958] <TB2> INFO: Test took 1466ms.
[17:32:03.960] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:32:04.466] <TB2> INFO: Expecting 2560 events.
[17:32:05.428] <TB2> INFO: 2560 events read in total (247ms).
[17:32:05.428] <TB2> INFO: Test took 1468ms.
[17:32:05.430] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:32:05.937] <TB2> INFO: Expecting 2560 events.
[17:32:06.899] <TB2> INFO: 2560 events read in total (247ms).
[17:32:06.899] <TB2> INFO: Test took 1469ms.
[17:32:06.902] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:32:07.408] <TB2> INFO: Expecting 2560 events.
[17:32:08.370] <TB2> INFO: 2560 events read in total (247ms).
[17:32:08.370] <TB2> INFO: Test took 1468ms.
[17:32:08.373] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:32:08.879] <TB2> INFO: Expecting 2560 events.
[17:32:09.842] <TB2> INFO: 2560 events read in total (248ms).
[17:32:09.842] <TB2> INFO: Test took 1469ms.
[17:32:09.846] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:32:10.351] <TB2> INFO: Expecting 2560 events.
[17:32:11.315] <TB2> INFO: 2560 events read in total (249ms).
[17:32:11.316] <TB2> INFO: Test took 1471ms.
[17:32:11.319] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:32:11.824] <TB2> INFO: Expecting 2560 events.
[17:32:12.786] <TB2> INFO: 2560 events read in total (247ms).
[17:32:12.786] <TB2> INFO: Test took 1467ms.
[17:32:12.788] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:32:13.296] <TB2> INFO: Expecting 2560 events.
[17:32:14.258] <TB2> INFO: 2560 events read in total (247ms).
[17:32:14.258] <TB2> INFO: Test took 1470ms.
[17:32:14.262] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:32:14.767] <TB2> INFO: Expecting 2560 events.
[17:32:15.729] <TB2> INFO: 2560 events read in total (247ms).
[17:32:15.730] <TB2> INFO: Test took 1469ms.
[17:32:15.733] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:32:16.238] <TB2> INFO: Expecting 2560 events.
[17:32:17.201] <TB2> INFO: 2560 events read in total (248ms).
[17:32:17.201] <TB2> INFO: Test took 1468ms.
[17:32:17.204] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[17:32:17.710] <TB2> INFO: Expecting 2560 events.
[17:32:18.672] <TB2> INFO: 2560 events read in total (247ms).
[17:32:18.672] <TB2> INFO: Test took 1468ms.
[17:32:19.387] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 501 seconds
[17:32:19.387] <TB2> INFO: PH scale (per ROC): 69 68 75 67 73 67 74 62 74 77 76 68 75 72 78 68
[17:32:19.387] <TB2> INFO: PH offset (per ROC): 167 184 178 176 157 170 175 170 178 176 176 163 165 192 186 182
[17:32:19.395] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:32:19.395] <TB2> INFO: Decoding statistics:
[17:32:19.395] <TB2> INFO: General information:
[17:32:19.395] <TB2> INFO: 16bit words read: 66446
[17:32:19.395] <TB2> INFO: valid events total: 5120
[17:32:19.395] <TB2> INFO: empty events: 2617
[17:32:19.395] <TB2> INFO: valid events with pixels: 2503
[17:32:19.395] <TB2> INFO: valid pixel hits: 2503
[17:32:19.395] <TB2> INFO: Event errors: 0
[17:32:19.395] <TB2> INFO: start marker: 0
[17:32:19.395] <TB2> INFO: stop marker: 0
[17:32:19.395] <TB2> INFO: overflow: 0
[17:32:19.395] <TB2> INFO: invalid 5bit words: 0
[17:32:19.395] <TB2> INFO: invalid XOR eye diagram: 0
[17:32:19.395] <TB2> INFO: TBM errors: 0
[17:32:19.395] <TB2> INFO: flawed TBM headers: 0
[17:32:19.395] <TB2> INFO: flawed TBM trailers: 0
[17:32:19.395] <TB2> INFO: event ID mismatches: 0
[17:32:19.395] <TB2> INFO: ROC errors: 0
[17:32:19.395] <TB2> INFO: missing ROC header(s): 0
[17:32:19.395] <TB2> INFO: misplaced readback start: 0
[17:32:19.395] <TB2> INFO: Pixel decoding errors: 0
[17:32:19.395] <TB2> INFO: pixel data incomplete: 0
[17:32:19.395] <TB2> INFO: pixel address: 0
[17:32:19.396] <TB2> INFO: pulse height fill bit: 0
[17:32:19.396] <TB2> INFO: buffer corruption: 0
[17:32:19.582] <TB2> INFO: ######################################################################
[17:32:19.582] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[17:32:19.582] <TB2> INFO: ######################################################################
[17:32:19.594] <TB2> INFO: scanning low vcal = 10
[17:32:19.901] <TB2> INFO: Expecting 41600 events.
[17:32:23.688] <TB2> INFO: 41600 events read in total (3072ms).
[17:32:23.689] <TB2> INFO: Test took 4095ms.
[17:32:23.691] <TB2> INFO: scanning low vcal = 20
[17:32:24.197] <TB2> INFO: Expecting 41600 events.
[17:32:28.082] <TB2> INFO: 41600 events read in total (3170ms).
[17:32:28.082] <TB2> INFO: Test took 4391ms.
[17:32:28.084] <TB2> INFO: scanning low vcal = 30
[17:32:28.590] <TB2> INFO: Expecting 41600 events.
[17:32:32.440] <TB2> INFO: 41600 events read in total (3135ms).
[17:32:32.441] <TB2> INFO: Test took 4357ms.
[17:32:32.442] <TB2> INFO: scanning low vcal = 40
[17:32:32.942] <TB2> INFO: Expecting 41600 events.
[17:32:37.261] <TB2> INFO: 41600 events read in total (3605ms).
[17:32:37.261] <TB2> INFO: Test took 4819ms.
[17:32:37.265] <TB2> INFO: scanning low vcal = 50
[17:32:37.691] <TB2> INFO: Expecting 41600 events.
[17:32:42.263] <TB2> INFO: 41600 events read in total (3858ms).
[17:32:42.263] <TB2> INFO: Test took 4998ms.
[17:32:42.267] <TB2> INFO: scanning low vcal = 60
[17:32:42.698] <TB2> INFO: Expecting 41600 events.
[17:32:47.070] <TB2> INFO: 41600 events read in total (3657ms).
[17:32:47.070] <TB2> INFO: Test took 4803ms.
[17:32:47.073] <TB2> INFO: scanning low vcal = 70
[17:32:47.515] <TB2> INFO: Expecting 41600 events.
[17:32:51.907] <TB2> INFO: 41600 events read in total (3677ms).
[17:32:51.908] <TB2> INFO: Test took 4835ms.
[17:32:51.911] <TB2> INFO: scanning low vcal = 80
[17:32:52.338] <TB2> INFO: Expecting 41600 events.
[17:32:56.839] <TB2> INFO: 41600 events read in total (3786ms).
[17:32:56.839] <TB2> INFO: Test took 4928ms.
[17:32:56.842] <TB2> INFO: scanning low vcal = 90
[17:32:57.285] <TB2> INFO: Expecting 41600 events.
[17:33:01.617] <TB2> INFO: 41600 events read in total (3617ms).
[17:33:01.618] <TB2> INFO: Test took 4776ms.
[17:33:01.621] <TB2> INFO: scanning low vcal = 100
[17:33:02.043] <TB2> INFO: Expecting 41600 events.
[17:33:06.790] <TB2> INFO: 41600 events read in total (4033ms).
[17:33:06.790] <TB2> INFO: Test took 5169ms.
[17:33:06.798] <TB2> INFO: scanning low vcal = 110
[17:33:07.239] <TB2> INFO: Expecting 41600 events.
[17:33:11.748] <TB2> INFO: 41600 events read in total (3795ms).
[17:33:11.749] <TB2> INFO: Test took 4951ms.
[17:33:11.752] <TB2> INFO: scanning low vcal = 120
[17:33:12.193] <TB2> INFO: Expecting 41600 events.
[17:33:16.602] <TB2> INFO: 41600 events read in total (3694ms).
[17:33:16.603] <TB2> INFO: Test took 4851ms.
[17:33:16.606] <TB2> INFO: scanning low vcal = 130
[17:33:17.030] <TB2> INFO: Expecting 41600 events.
[17:33:21.423] <TB2> INFO: 41600 events read in total (3679ms).
[17:33:21.424] <TB2> INFO: Test took 4818ms.
[17:33:21.427] <TB2> INFO: scanning low vcal = 140
[17:33:21.869] <TB2> INFO: Expecting 41600 events.
[17:33:26.206] <TB2> INFO: 41600 events read in total (3622ms).
[17:33:26.206] <TB2> INFO: Test took 4779ms.
[17:33:26.209] <TB2> INFO: scanning low vcal = 150
[17:33:26.647] <TB2> INFO: Expecting 41600 events.
[17:33:31.191] <TB2> INFO: 41600 events read in total (3829ms).
[17:33:31.192] <TB2> INFO: Test took 4983ms.
[17:33:31.195] <TB2> INFO: scanning low vcal = 160
[17:33:31.622] <TB2> INFO: Expecting 41600 events.
[17:33:36.206] <TB2> INFO: 41600 events read in total (3869ms).
[17:33:36.207] <TB2> INFO: Test took 5012ms.
[17:33:36.209] <TB2> INFO: scanning low vcal = 170
[17:33:36.642] <TB2> INFO: Expecting 41600 events.
[17:33:40.946] <TB2> INFO: 41600 events read in total (3589ms).
[17:33:40.947] <TB2> INFO: Test took 4738ms.
[17:33:40.951] <TB2> INFO: scanning low vcal = 180
[17:33:41.374] <TB2> INFO: Expecting 41600 events.
[17:33:45.775] <TB2> INFO: 41600 events read in total (3686ms).
[17:33:45.775] <TB2> INFO: Test took 4824ms.
[17:33:45.778] <TB2> INFO: scanning low vcal = 190
[17:33:46.211] <TB2> INFO: Expecting 41600 events.
[17:33:50.546] <TB2> INFO: 41600 events read in total (3620ms).
[17:33:50.547] <TB2> INFO: Test took 4769ms.
[17:33:50.550] <TB2> INFO: scanning low vcal = 200
[17:33:50.990] <TB2> INFO: Expecting 41600 events.
[17:33:55.304] <TB2> INFO: 41600 events read in total (3599ms).
[17:33:55.305] <TB2> INFO: Test took 4755ms.
[17:33:55.308] <TB2> INFO: scanning low vcal = 210
[17:33:55.748] <TB2> INFO: Expecting 41600 events.
[17:34:00.127] <TB2> INFO: 41600 events read in total (3664ms).
[17:34:00.128] <TB2> INFO: Test took 4820ms.
[17:34:00.131] <TB2> INFO: scanning low vcal = 220
[17:34:00.573] <TB2> INFO: Expecting 41600 events.
[17:34:04.914] <TB2> INFO: 41600 events read in total (3626ms).
[17:34:04.915] <TB2> INFO: Test took 4784ms.
[17:34:04.918] <TB2> INFO: scanning low vcal = 230
[17:34:05.339] <TB2> INFO: Expecting 41600 events.
[17:34:09.884] <TB2> INFO: 41600 events read in total (3830ms).
[17:34:09.885] <TB2> INFO: Test took 4967ms.
[17:34:09.887] <TB2> INFO: scanning low vcal = 240
[17:34:10.323] <TB2> INFO: Expecting 41600 events.
[17:34:14.759] <TB2> INFO: 41600 events read in total (3721ms).
[17:34:14.760] <TB2> INFO: Test took 4872ms.
[17:34:14.762] <TB2> INFO: scanning low vcal = 250
[17:34:15.209] <TB2> INFO: Expecting 41600 events.
[17:34:19.500] <TB2> INFO: 41600 events read in total (3576ms).
[17:34:19.501] <TB2> INFO: Test took 4739ms.
[17:34:19.505] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[17:34:19.947] <TB2> INFO: Expecting 41600 events.
[17:34:24.373] <TB2> INFO: 41600 events read in total (3711ms).
[17:34:24.373] <TB2> INFO: Test took 4868ms.
[17:34:24.375] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[17:34:24.819] <TB2> INFO: Expecting 41600 events.
[17:34:29.122] <TB2> INFO: 41600 events read in total (3588ms).
[17:34:29.123] <TB2> INFO: Test took 4748ms.
[17:34:29.126] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[17:34:29.567] <TB2> INFO: Expecting 41600 events.
[17:34:33.999] <TB2> INFO: 41600 events read in total (3717ms).
[17:34:34.000] <TB2> INFO: Test took 4874ms.
[17:34:34.004] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[17:34:34.434] <TB2> INFO: Expecting 41600 events.
[17:34:38.870] <TB2> INFO: 41600 events read in total (3721ms).
[17:34:38.871] <TB2> INFO: Test took 4867ms.
[17:34:38.874] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[17:34:39.316] <TB2> INFO: Expecting 41600 events.
[17:34:43.702] <TB2> INFO: 41600 events read in total (3671ms).
[17:34:43.703] <TB2> INFO: Test took 4829ms.
[17:34:44.259] <TB2> INFO: PixTestGainPedestal::measure() done
[17:35:17.452] <TB2> INFO: PixTestGainPedestal::fit() done
[17:35:17.452] <TB2> INFO: non-linearity mean: 0.958 0.956 0.954 0.951 0.952 0.954 0.955 0.953 0.952 0.949 0.958 0.956 0.956 0.963 0.951 0.955
[17:35:17.452] <TB2> INFO: non-linearity RMS: 0.006 0.009 0.007 0.007 0.008 0.006 0.007 0.008 0.007 0.007 0.006 0.007 0.006 0.005 0.007 0.007
[17:35:17.468] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[17:35:17.492] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[17:35:17.514] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[17:35:17.536] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[17:35:17.558] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[17:35:17.580] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[17:35:17.602] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[17:35:17.629] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[17:35:17.656] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[17:35:17.683] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[17:35:17.710] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[17:35:17.738] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[17:35:17.767] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[17:35:17.796] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[17:35:17.824] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[17:35:17.853] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[17:35:17.882] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 178 seconds
[17:35:17.882] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:35:17.882] <TB2> INFO: Decoding statistics:
[17:35:17.882] <TB2> INFO: General information:
[17:35:17.882] <TB2> INFO: 16bit words read: 2329566
[17:35:17.882] <TB2> INFO: valid events total: 83200
[17:35:17.882] <TB2> INFO: empty events: 0
[17:35:17.882] <TB2> INFO: valid events with pixels: 83200
[17:35:17.882] <TB2> INFO: valid pixel hits: 665583
[17:35:17.882] <TB2> INFO: Event errors: 0
[17:35:17.882] <TB2> INFO: start marker: 0
[17:35:17.882] <TB2> INFO: stop marker: 0
[17:35:17.882] <TB2> INFO: overflow: 0
[17:35:17.882] <TB2> INFO: invalid 5bit words: 0
[17:35:17.882] <TB2> INFO: invalid XOR eye diagram: 0
[17:35:17.882] <TB2> INFO: TBM errors: 0
[17:35:17.882] <TB2> INFO: flawed TBM headers: 0
[17:35:17.882] <TB2> INFO: flawed TBM trailers: 0
[17:35:17.882] <TB2> INFO: event ID mismatches: 0
[17:35:17.882] <TB2> INFO: ROC errors: 0
[17:35:17.882] <TB2> INFO: missing ROC header(s): 0
[17:35:17.882] <TB2> INFO: misplaced readback start: 0
[17:35:17.882] <TB2> INFO: Pixel decoding errors: 0
[17:35:17.882] <TB2> INFO: pixel data incomplete: 0
[17:35:17.882] <TB2> INFO: pixel address: 0
[17:35:17.882] <TB2> INFO: pulse height fill bit: 0
[17:35:17.882] <TB2> INFO: buffer corruption: 0
[17:35:17.891] <TB2> INFO: readReadbackCal: /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C0.dat .. /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C15.dat
[17:35:17.905] <TB2> INFO: ######################################################################
[17:35:17.905] <TB2> INFO: PixTestReadback::doTest()
[17:35:17.905] <TB2> INFO: ######################################################################
[17:35:17.906] <TB2> INFO: PixTestReadback::RES sent once
[17:35:30.253] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C0.dat
[17:35:30.253] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C1.dat
[17:35:30.253] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C2.dat
[17:35:30.253] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C3.dat
[17:35:30.253] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C4.dat
[17:35:30.253] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C5.dat
[17:35:30.253] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C6.dat
[17:35:30.253] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C7.dat
[17:35:30.254] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C8.dat
[17:35:30.254] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C9.dat
[17:35:30.254] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C10.dat
[17:35:30.254] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C11.dat
[17:35:30.254] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C12.dat
[17:35:30.254] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C13.dat
[17:35:30.254] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C14.dat
[17:35:30.254] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C15.dat
[17:35:30.283] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[17:35:30.283] <TB2> INFO: PixTestReadback::RES sent once
[17:35:41.454] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C0.dat
[17:35:41.454] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C1.dat
[17:35:41.454] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C2.dat
[17:35:41.454] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C3.dat
[17:35:41.455] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C4.dat
[17:35:41.455] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C5.dat
[17:35:41.455] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C6.dat
[17:35:41.455] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C7.dat
[17:35:41.455] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C8.dat
[17:35:41.455] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C9.dat
[17:35:41.455] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C10.dat
[17:35:41.455] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C11.dat
[17:35:41.456] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C12.dat
[17:35:41.456] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C13.dat
[17:35:41.456] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C14.dat
[17:35:41.456] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C15.dat
[17:35:41.479] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[17:35:41.479] <TB2> INFO: PixTestReadback::RES sent once
[17:35:50.059] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[17:35:50.059] <TB2> INFO: Vbg will be calibrated using Vd calibration
[17:35:50.059] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 146.8calibrated Vbg = 1.21834 :::*/*/*/*/
[17:35:50.059] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 149.3calibrated Vbg = 1.22049 :::*/*/*/*/
[17:35:50.059] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 157.2calibrated Vbg = 1.21623 :::*/*/*/*/
[17:35:50.059] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 151.5calibrated Vbg = 1.22679 :::*/*/*/*/
[17:35:50.059] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 138.7calibrated Vbg = 1.23028 :::*/*/*/*/
[17:35:50.059] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 156.4calibrated Vbg = 1.22993 :::*/*/*/*/
[17:35:50.059] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 157calibrated Vbg = 1.23995 :::*/*/*/*/
[17:35:50.059] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 149calibrated Vbg = 1.23723 :::*/*/*/*/
[17:35:50.059] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 145.1calibrated Vbg = 1.23248 :::*/*/*/*/
[17:35:50.059] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 156.2calibrated Vbg = 1.23212 :::*/*/*/*/
[17:35:50.059] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 151.4calibrated Vbg = 1.2222 :::*/*/*/*/
[17:35:50.059] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 157.1calibrated Vbg = 1.22515 :::*/*/*/*/
[17:35:50.059] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 148.8calibrated Vbg = 1.21897 :::*/*/*/*/
[17:35:50.060] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 155.3calibrated Vbg = 1.22579 :::*/*/*/*/
[17:35:50.060] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 159.9calibrated Vbg = 1.22469 :::*/*/*/*/
[17:35:50.060] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 1.97626e-323calibrated Vbg = inf :::*/*/*/*/
[17:35:50.064] <TB2> INFO: PixTestReadback::RES sent once
[17:38:43.912] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C0.dat
[17:38:43.912] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C1.dat
[17:38:43.912] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C2.dat
[17:38:43.912] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C3.dat
[17:38:43.912] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C4.dat
[17:38:43.913] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C5.dat
[17:38:43.913] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C6.dat
[17:38:43.913] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C7.dat
[17:38:43.913] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C8.dat
[17:38:43.913] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C9.dat
[17:38:43.913] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C10.dat
[17:38:43.913] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C11.dat
[17:38:43.913] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C12.dat
[17:38:43.913] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C13.dat
[17:38:43.913] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C14.dat
[17:38:43.913] <TB2> INFO: write readback calibration parameters into /usr/local/coldboxDATA/M4078_FullQualification_2015-12-08_13h26m_1449577585//004_FulltestPxar_p17//readbackCal_C15.dat
[17:38:43.945] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[17:38:43.946] <TB2> INFO: PixTestReadback::doTest() done
[17:38:43.946] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[17:38:43.946] <TB2> INFO: Decoding statistics:
[17:38:43.946] <TB2> INFO: General information:
[17:38:43.946] <TB2> INFO: 16bit words read: 768
[17:38:43.946] <TB2> INFO: valid events total: 64
[17:38:43.946] <TB2> INFO: empty events: 64
[17:38:43.946] <TB2> INFO: valid events with pixels: 0
[17:38:43.946] <TB2> INFO: valid pixel hits: 0
[17:38:43.946] <TB2> INFO: Event errors: 0
[17:38:43.946] <TB2> INFO: start marker: 0
[17:38:43.946] <TB2> INFO: stop marker: 0
[17:38:43.946] <TB2> INFO: overflow: 0
[17:38:43.946] <TB2> INFO: invalid 5bit words: 0
[17:38:43.946] <TB2> INFO: invalid XOR eye diagram: 0
[17:38:43.946] <TB2> INFO: TBM errors: 0
[17:38:43.946] <TB2> INFO: flawed TBM headers: 0
[17:38:43.946] <TB2> INFO: flawed TBM trailers: 0
[17:38:43.946] <TB2> INFO: event ID mismatches: 0
[17:38:43.946] <TB2> INFO: ROC errors: 0
[17:38:43.946] <TB2> INFO: missing ROC header(s): 0
[17:38:43.946] <TB2> INFO: misplaced readback start: 0
[17:38:43.946] <TB2> INFO: Pixel decoding errors: 0
[17:38:43.946] <TB2> INFO: pixel data incomplete: 0
[17:38:43.946] <TB2> INFO: pixel address: 0
[17:38:43.946] <TB2> INFO: pulse height fill bit: 0
[17:38:43.946] <TB2> INFO: buffer corruption: 0
[17:38:43.959] <TB2> INFO: Decoding statistics:
[17:38:43.959] <TB2> INFO: General information:
[17:38:43.959] <TB2> INFO: 16bit words read: 2396780
[17:38:43.959] <TB2> INFO: valid events total: 88384
[17:38:43.959] <TB2> INFO: empty events: 2681
[17:38:43.959] <TB2> INFO: valid events with pixels: 85703
[17:38:43.959] <TB2> INFO: valid pixel hits: 668086
[17:38:43.959] <TB2> INFO: Event errors: 0
[17:38:43.959] <TB2> INFO: start marker: 0
[17:38:43.959] <TB2> INFO: stop marker: 0
[17:38:43.959] <TB2> INFO: overflow: 0
[17:38:43.959] <TB2> INFO: invalid 5bit words: 0
[17:38:43.959] <TB2> INFO: invalid XOR eye diagram: 0
[17:38:43.959] <TB2> INFO: TBM errors: 0
[17:38:43.959] <TB2> INFO: flawed TBM headers: 0
[17:38:43.959] <TB2> INFO: flawed TBM trailers: 0
[17:38:43.959] <TB2> INFO: event ID mismatches: 0
[17:38:43.959] <TB2> INFO: ROC errors: 0
[17:38:43.959] <TB2> INFO: missing ROC header(s): 0
[17:38:43.959] <TB2> INFO: misplaced readback start: 0
[17:38:43.959] <TB2> INFO: Pixel decoding errors: 0
[17:38:43.959] <TB2> INFO: pixel data incomplete: 0
[17:38:43.959] <TB2> INFO: pixel address: 0
[17:38:43.959] <TB2> INFO: pulse height fill bit: 0
[17:38:43.959] <TB2> INFO: buffer corruption: 0
[17:38:43.959] <TB2> INFO: enter test to run
[17:38:43.959] <TB2> INFO: test: exit no parameter change
[17:38:44.154] <TB2> QUIET: Connection to board 156 closed.
[17:38:44.234] <TB2> INFO: pXar: this is the end, my friend