---------- psi46expert ----------
Wed Sep 20 15:30:36 2006
Reading Config-Parameters from ../data/3Aold-10//configParameters.dat
Reading TB-Parameters from ../data/3Aold-10//tbParameters.dat
Reading Test-Parameters from ../data/3Aold-10//testParameters.dat
Reading TBM-Parameters from ../data/3Aold-10//tbmParameters.dat
Reading DAC-Parameters from ../data/3Aold-10//dacParameters_C0.dat
Reading Trim configuration from ../data/3Aold-10//trimParameters_C0.dat
adc
count: 19
 -517 -513 -516   20 -112 -111 -117   23 -587    0 1281 -470 -515   25   15   15  161 -114  151
FullTestAndCalib
==>sv> Start Pretest 
timestamp: Wed Sep 20 15:30:44 2006
timestamp: Wed Sep 20 15:30:44 2006
Writing TBM-Parameters to ../data/3Aold-10//tbmParameters.dat
Setting data trigger level to -655
Reading Config-Parameters from ../data/3Aold-10//configParameters.dat
Writing Config-Parameters to ../data/3Aold-10//configParameters.dat
Test if the ROC DACs are programmable
ZeroCurrent 1.100000e-03
Vana set to 137 current: 2.400000e-02
TotalCurrent 2.460000e-02
Writing TB-Parameters to ../data/3Aold-10//tbParameters.dat
Adjusting ultrablack levels
Ibias_DAC set to 97 ubLevel: -715
chip 0
CalDel set to 85
VthrComp set to 71
Adjusting VOffsetOp
timestamp: Wed Sep 20 15:30:59 2006
timestamp: Wed Sep 20 15:31:07 2006
Writing DAC-Parameters to ../data/3Aold-10//dacParameters_C0.dat
Calibrate Decoder (AddressLevels test)
timestamp: Wed Sep 20 15:31:07 2006
Address levels
Writing decoder levels to ../data/3Aold-10//addressParameters.dat
==>sv> End Pretest 
Starting FullTest
==>sv> Start FullTest
==>sv> Start Test
timestamp: Wed Sep 20 15:31:07 2006
timestamp: Wed Sep 20 15:31:07 2006
Temperature TestTemperature test
timestamp: Wed Sep 20 15:31:09 2006
SCurve test
timestamp: Wed Sep 20 15:35:20 2006
TBM test
Test failed: TBM 0: no valid analog readout
Test failed: TBM 0: no valid dual analog readout
Test failed: TBM 1: no valid analog readout
Test failed: Does your testboard have 2 ADCs?timestamp: Wed Sep 20 15:35:22 2006
Starting FullTest for chip 0
timestamp: Wed Sep 20 15:35:22 2006
Pixel Alive
Pixel Alive chip 0
timestamp: Wed Sep 20 15:35:24 2006
Bump bonding
Setting VthrComp to 54
timestamp: Wed Sep 20 15:36:24 2006
TrimBits
timestamp: Wed Sep 20 15:36:50 2006
Temperature test
timestamp: Wed Sep 20 15:36:51 2006
Address decoding
FullTest done for chip 0
timestamp: Wed Sep 20 15:36:54 2006
Temperature TestTemperature test
FullTest done
==>sv> End Test
==>sv> End FullTest
==>sv> Start PhCalibration 
Starting PhCalibration for chip 0
timestamp: Wed Sep 20 15:36:55 2006
timestamp: Wed Sep 20 15:37:27 2006
==>sv> End PhCalibration 
==>sv> Start Trim 
Starting trim algorithm chip 0
timestamp: Wed Sep 20 15:37:27 2006
Setting Vcal to 50
Pixels with threshold 255: 0
Threshold min 75.0, max 101.0 
VthrComp set to 75
Pixels with Vcal 255: 0
Vcal min 49.0, max 84.0 
Vtrim set to 120
Writing DAC-Parameters to ../data/3Aold-10//dacParameters_C0.dat50.dat
ROC 0, Writing trim configuration to ../data/3Aold-10//trimParameters_C0.dat50.dat
timestamp: Wed Sep 20 15:39:55 2006
==>sv> End Trim 
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