---------- psi46expert ----------
Thu Sep 21 17:34:04 2006
Reading Config-Parameters from ../data/1Bold-10//configParameters.dat
Reading TB-Parameters from ../data/1Bold-10//tbParameters.dat
Reading Test-Parameters from ../data/1Bold-10//testParameters.dat
Reading TBM-Parameters from ../data/1Bold-10//tbmParameters.dat
Reading DAC-Parameters from ../data/1Bold-10//dacParameters_C0.dat
Reading Trim configuration from ../data/1Bold-10//trimParameters_C0.dat
adc
count: 19
 -708 -705 -692   12 -169 -170 -173   14 -752  -19 1349 -684 -697   20   12   18  203 -166  200
FullTestAndCalib
==>sv> Start Pretest 
timestamp: Thu Sep 21 17:34:12 2006
timestamp: Thu Sep 21 17:34:12 2006
Writing TBM-Parameters to ../data/1Bold-10//tbmParameters.dat
Setting data trigger level to -656
Reading Config-Parameters from ../data/1Bold-10//configParameters.dat
Writing Config-Parameters to ../data/1Bold-10//configParameters.dat
Test if the ROC DACs are programmable
ZeroCurrent 1.100000e-03
Vana set to 156 current: 2.400000e-02
TotalCurrent 2.580000e-02
Writing TB-Parameters to ../data/1Bold-10//tbParameters.dat
Adjusting ultrablack levels
Ibias_DAC set to 105 ubLevel: -702
chip 0
CalDel set to 85
VthrComp set to 82
Adjusting VOffsetOp
timestamp: Thu Sep 21 17:34:28 2006
timestamp: Thu Sep 21 17:34:35 2006
Writing DAC-Parameters to ../data/1Bold-10//dacParameters_C0.dat
Calibrate Decoder (AddressLevels test)
timestamp: Thu Sep 21 17:34:35 2006
Address levels
Writing decoder levels to ../data/1Bold-10//addressParameters.dat
==>sv> End Pretest 
Starting FullTest
==>sv> Start FullTest
==>sv> Start Test
timestamp: Thu Sep 21 17:34:36 2006
timestamp: Thu Sep 21 17:34:36 2006
Temperature TestTemperature test
timestamp: Thu Sep 21 17:34:37 2006
SCurve test
timestamp: Thu Sep 21 17:38:50 2006
TBM test
Test failed: TBM 0: no valid analog readout
Test failed: TBM 1: no valid analog readout
Test failed: Does your testboard have 2 ADCs?timestamp: Thu Sep 21 17:38:52 2006
Starting FullTest for chip 0
timestamp: Thu Sep 21 17:38:52 2006
Pixel Alive
Pixel Alive chip 0
timestamp: Thu Sep 21 17:38:54 2006
Bump bonding
Setting VthrComp to 69
timestamp: Thu Sep 21 17:39:52 2006
TrimBits
timestamp: Thu Sep 21 17:40:27 2006
Temperature test
timestamp: Thu Sep 21 17:40:28 2006
Address decoding
FullTest done for chip 0
timestamp: Thu Sep 21 17:40:31 2006
Temperature TestTemperature test
FullTest done
==>sv> End Test
==>sv> End FullTest
==>sv> Start PhCalibration 
Starting PhCalibration for chip 0
timestamp: Thu Sep 21 17:40:31 2006
timestamp: Thu Sep 21 17:41:04 2006
==>sv> End PhCalibration 
==>sv> Start Trim 
Starting trim algorithm chip 0
timestamp: Thu Sep 21 17:41:04 2006
Setting Vcal to 50
Pixels with threshold 255: 0
Threshold min 85.0, max 111.0 
VthrComp set to 85
Pixels with Vcal 255: 0
Vcal min 50.0, max 80.0 
Vtrim set to 134
Writing DAC-Parameters to ../data/1Bold-10//dacParameters50_C0.dat
ROC 0, Writing trim configuration to ../data/1Bold-10//trimParameters50_C0.dat
timestamp: Thu Sep 21 17:43:26 2006
==>sv> End Trim 
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