---------- psi46expert ---------- Wed Sep 20 12:15:13 2006 Reading Config-Parameters from ../data/0Aold//configParameters.dat Reading TB-Parameters from ../data/0Aold//tbParameters.dat Reading Test-Parameters from ../data/0Aold//testParameters.dat Reading TBM-Parameters from ../data/0Aold//tbmParameters.dat Reading DAC-Parameters from ../data/0Aold//dacParameters_C0.dat Reading Trim configuration from ../data/0Aold//trimParameters_C0.dat adc count: 19 -516 -519 -513 18 -117 -112 -109 15 -515 10 514 -510 -510 16 18 26 153 -110 164 FullTestAndCalib ==>sv> Start Pretest timestamp: Wed Sep 20 12:15:34 2006 timestamp: Wed Sep 20 12:15:34 2006 Writing TBM-Parameters to ../data/0Aold//tbmParameters.dat Setting data trigger level to -651 Reading Config-Parameters from ../data/0Aold//configParameters.dat Writing Config-Parameters to ../data/0Aold//configParameters.dat Test if the ROC DACs are programmable ZeroCurrent 1.300000e-03 Vana set to 127 current: 2.380000e-02 TotalCurrent 2.440000e-02 Writing TB-Parameters to ../data/0Aold//tbParameters.dat Adjusting ultrablack levels Ibias_DAC set to 113 ubLevel: -713 chip 0 CalDel set to 84 VthrComp set to 86 Adjusting VOffsetOp timestamp: Wed Sep 20 12:15:50 2006 timestamp: Wed Sep 20 12:15:58 2006 Writing DAC-Parameters to ../data/0Aold//dacParameters_C0.dat Calibrate Decoder (AddressLevels test) timestamp: Wed Sep 20 12:15:58 2006 Address levels Writing decoder levels to ../data/0Aold//addressParameters.dat ==>sv> End Pretest Starting FullTest ==>sv> Start FullTest ==>sv> Start Test timestamp: Wed Sep 20 12:15:58 2006 timestamp: Wed Sep 20 12:15:58 2006 Temperature TestTemperature test timestamp: Wed Sep 20 12:15:59 2006 SCurve test timestamp: Wed Sep 20 12:20:11 2006 TBM test Test failed: TBM 0: no valid dual analog readout Test failed: TBM 1: no valid analog readout Test failed: Does your testboard have 2 ADCs?timestamp: Wed Sep 20 12:20:13 2006 Starting FullTest for chip 0 timestamp: Wed Sep 20 12:20:13 2006 Pixel Alive Pixel Alive chip 0 timestamp: Wed Sep 20 12:20:15 2006 Bump bonding Setting VthrComp to 61 timestamp: Wed Sep 20 12:21:19 2006 TrimBits timestamp: Wed Sep 20 12:21:50 2006 Temperature test timestamp: Wed Sep 20 12:21:51 2006 Address decoding FullTest done for chip 0 timestamp: Wed Sep 20 12:21:54 2006 Temperature TestTemperature test FullTest done ==>sv> End Test ==>sv> End FullTest ==>sv> Start PhCalibration Starting PhCalibration for chip 0 timestamp: Wed Sep 20 12:21:55 2006 timestamp: Wed Sep 20 12:22:27 2006 ==>sv> End PhCalibration ==>sv> Start Trim Starting trim algorithm chip 0 timestamp: Wed Sep 20 12:22:27 2006 Setting Vcal to 50 Pixels with threshold 255: 6 Threshold min 95.0, max 120.0 VthrComp set to 95 Pixels with Vcal 255: 0 Vcal min 50.0, max 89.0 Vtrim set to 124 Writing DAC-Parameters to ../data/0Aold//dacParameters_C0.dat50.dat ROC 0, Writing trim configuration to ../data/0Aold//trimParameters_C0.dat50.dat timestamp: Wed Sep 20 12:24:24 2006 ==>sv> End Trim q