\documentclass{article}

\newcommand{\um}{\ensuremath{\mu\rm{m}}}
\begin{document}
\twocolumn

\section{parser instructions}
\begin{tabular}{|l|l|}
\hline
\verb_exit_ & terminate \\
\verb_exec_ {\it file} & read commands from {\it file} \\
\verb_verbose_ & set the verbose flag\\
\verb_quiet_ & unset the verbose flag \\ \hline
\end{tabular}

\section{target definitions}
\begin{tabular}{|l|l|}
\hline
\verb_tb_  & testboard\\
\verb_[module _{\it ID}\verb_] tbm_& TBM \\
\verb_[module _{\it ID}\verb_] roc _{\it rocID}& ROC \\
\hline
\end{tabular}
\begin{itemize}
\item a target definition without executable command
sets a new default target
\item a target defnition followed by an executable
command in same line does not change the default
\item {\it ID} and {\it rocID} can be lists
and will be iterated.
\item the \verb_module _{\it ID} part can be omitted
in which case the default value is used
\end{itemize}

\section{executable commands}
Anything that is neither a parser command
nor a target definition is treated as an
executable command and sent to the 
target(s) specified.
Executable commands usually have the format\\
{\it keyword}  {\it argument1}   {\it argument2} $\ldots$ \\
Arguments can be strings or numerical values.

Numerical arguments can be comma separated lists of 
values or ranges. A range has the format {\it first}:{\it last}.
Hexadecimal values start with \verb_$_ or \verb_0x_.
%$
Lists in arguments are normally not iterated by the parser:\\
\verb_roc 1:3,5 cole 0:4_\\
enables columns 0:4 in roc 1,2,3 and 5.
To iterate an argument list, enclose it in brackets:\\
\verb_roc 1:3,5 cole (0:4)_\\
enables column 0 in roc 1, col 1 in roc 2 etc.
Intended for setting Dacs on a module, e.g.:\\
\verb_roc 0:3 Vana (110 115 120 117)_



\newpage

\onecolumn


\section{Testboard}
\begin{tabular}{|l|l|}
\hline
%\multicolumn{2}{c}{TBDigitalInterface}\\
\verb_pon_ & switch testboard power on\\
\verb_poff_ & switch testboard power off\\
\verb_hvon_ & switch testboard high voltage on\\
\verb_hvoff_ & switch testboard high voltage off\\
\verb_loop_ & turns loop mode on\\
\verb_stop_ & turns loop mode off\\
\verb_single_ &s ends a single signal sequence (determined by seq)\\
\verb_res_ & sends a reset \\
\verb_seq_ {\it value} & determines the signal sequence for \it single  and \it loop\\
\verb_ia_ & measures the analog current\\
\verb_id_ & measures the digital current\\
\verb_getva_ & measures the analog voltage\\
\verb_getvd_ & measures the digital voltage\\
\verb_av_ {\it value} & sets the analog voltage in mV\\
\verb_dv_ {\it value} & sets the digital voltage in mV\\
\verb_dtl_ {\it value} & sets the data trigger level\\
\verb_clk_ {\it value} & sets the clock phase\\
\verb_sda_ {\it value} & sets sda phase\\
\verb_ctr_ {\it value} & sets the ctr phase\\
\verb_tin_ {\it value} & sets the token phase\\
\verb_trc_ {\it value} & sets the delay between reset and cal\\
\verb_tcc_ {\it value} & sets the delay between two cal signals (burst mode)\\
\verb_tct_ {\it value} & sets the delay between cal and token\\
\verb_ttk_ {\it value} & sets ??\\
\verb_trep_ {\it value} & sets the repetition time of the internal seq. generator\\
\verb_cc_ {\it value} & sets ??\\
\verb_spd_ {\it value} & sets the clock frequency\\



\hline
\end{tabular}

\section{TBM}
\begin{tabular}{|l|l|}
\hline
\verb_dual_ & dual TBM mode\\
\verb_single_ &single TBM mode\\
\verb_fullspeed_ & 40MHz readout\\
\verb_halfspeed_ & 20MHz readout\\
\verb_inputgain_ {\it value}& TBM DAC\\
\verb_outputgain_ {\it value}& TBM DAC\\
\verb_outputbias_ {\it value}& TBM DAC\\
\verb_mode cal_   & cal = cal\\
\verb_mode clear_ & cal = clear\\
\verb_mode sync_  & cal = sync\\
\verb_ignore triggers_ & TBM ignores trig\\
\verb_accept triggers_ & TBM reacts to trig\\
\verb_disable triggers_ & no trig to ROC\\
\verb_enable triggers_ & \\
\verb_set _{\it address} {\it value}& write to TBM address\\
\verb_setA _{\it register} {\it value}& set a TBM A register\\
\verb_setB_ {\it register} {\it value}& set a TBM B register\\
\hline
\end{tabular}

\section{ROC / MODULE}
\begin{tabular}{|l|l|}
\hline
\verb_pixe_ {\it col} {\it row} & enable pixels\\
\verb_pixd_ {\it col} {\it row} & disable pixels\\
\verb_trim_ {\it col} {\it row} & set pixel trim bits\\
\verb_cole_ {\it col}  & enable column\\
\verb_cold_ {\it col}  & disable column\\
\verb_cal_ {\it col} {\it row} & enable calinject\\
\verb_cals_ {\it col} {\it row} & enable sensor calinject\\
\verb_cald_ & clear cal\\
\verb_arm_ {\it col} {\it row} & enable+cal\\
\verb_mask_ & disable all pixels\\
\verb_adc_ & reads the adc output once\\
\verb_Test_ & runs the full module test\\
\verb_adjust_ & adjusts Vana, VthrComp and CalDel\\
\verb_Trim_ & runs the trim algorithm\\
\verb_PhCalibration_ & runs the pulse height calibration\\
\verb_SamplingTest_ & runs the adc sampling point test\\
\verb_DumpParameters_ & dumps the current DAC and TB settings\\

{\it dacname} {\it value} & set a DAC (see DACParameters.cc for DAC names)\\
\hline
\end{tabular}



\end{document}
