Test Date: 2015-10-26 13:47
Analysis date: 2015-10-26 20:02
Logfile
LogfileView
[12:47:59.181] <TB2> INFO: *** Welcome to pxar ***
[12:47:59.181] <TB2> INFO: *** Today: 2015/10/26
[12:47:59.257] <TB2> INFO: *** Version: 7db0-dirty
[12:47:59.257] <TB2> INFO: readRocDacs: /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C15.dat
[12:47:59.258] <TB2> INFO: readTbmDacs: /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//tbmParameters_C0b.dat
[12:47:59.258] <TB2> INFO: readMaskFile: /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//defaultMaskFile.dat
[12:47:59.258] <TB2> INFO: readTrimFile: /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters_C15.dat
[12:47:59.329] <TB2> INFO: clk: 4
[12:47:59.329] <TB2> INFO: ctr: 4
[12:47:59.329] <TB2> INFO: sda: 19
[12:47:59.329] <TB2> INFO: tin: 9
[12:47:59.329] <TB2> INFO: level: 15
[12:47:59.329] <TB2> INFO: triggerdelay: 0
[12:47:59.329] <TB2> QUIET: Instanciating API for pxar v2.6.0+26~g89693ff
[12:47:59.329] <TB2> INFO: Log level: INFO
[12:47:59.341] <TB2> INFO: Found DTB DTB_WXENWR
[12:47:59.353] <TB2> QUIET: Connection to board DTB_WXENWR opened.
[12:47:59.356] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 162
HW version: DTB1.2
FW version: 4.2
SW version: 4.5
USB id: DTB_WXENWR
MAC address: 40D8551180A2
Hostname: pixelDTB162
Comment:
------------------------------------------------------
[12:47:59.359] <TB2> INFO: RPC call hashes of host and DTB match: 398089610
[12:48:00.916] <TB2> INFO: DUT info:
[12:48:00.916] <TB2> INFO: The DUT currently contains the following objects:
[12:48:00.916] <TB2> INFO: 2 TBM Cores tbm08c (2 ON)
[12:48:00.916] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:48:00.916] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:48:00.916] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:48:00.916] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:48:00.916] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:48:00.916] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:48:00.916] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:48:00.916] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:48:00.916] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:48:00.916] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:48:00.916] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:48:00.916] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:48:00.917] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:48:00.917] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:48:00.917] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:48:00.917] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:48:00.917] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:48:00.917] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:48:00.917] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:48:01.318] <TB2> INFO: enter 'restricted' command line mode
[12:48:01.318] <TB2> INFO: enter test to run
[12:48:01.318] <TB2> INFO: test: pretest no parameter change
[12:48:01.318] <TB2> INFO: running: pretest
[12:48:01.325] <TB2> INFO: ######################################################################
[12:48:01.325] <TB2> INFO: PixTestPretest::doTest()
[12:48:01.325] <TB2> INFO: ######################################################################
[12:48:01.327] <TB2> INFO: ----------------------------------------------------------------------
[12:48:01.327] <TB2> INFO: PixTestPretest::programROC()
[12:48:01.327] <TB2> INFO: ----------------------------------------------------------------------
[12:48:19.349] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:48:19.350] <TB2> INFO: IA differences per ROC: 17.7 16.1 18.5 16.9 15.3 19.3 19.3 17.7 17.7 19.3 17.7 20.1 16.9 18.5 19.3 18.5
[12:48:19.440] <TB2> INFO: ----------------------------------------------------------------------
[12:48:19.440] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:48:19.440] <TB2> INFO: ----------------------------------------------------------------------
[12:48:25.861] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 387.5 mA = 24.2188 mA/ROC
[12:48:25.861] <TB2> INFO: i(loss) [mA/ROC]: 19.3 19.3 19.3 19.3 19.3 18.5 18.5 18.5 19.3 18.5 18.5 18.5 18.5 18.5 18.5 18.5
[12:48:25.907] <TB2> INFO: ----------------------------------------------------------------------
[12:48:25.907] <TB2> INFO: PixTestPretest::findTiming()
[12:48:25.907] <TB2> INFO: ----------------------------------------------------------------------
[12:48:25.907] <TB2> INFO: PixTestCmd::init()
[12:48:26.568] <TB2> WARNING: Not unmasking DUT, not setting Calibrate bits!

[12:50:02.866] <TB2> INFO: TBM phases: 160MHz: 7, 400MHz: 2, TBM delays: ROC(0/1):4, header/trailer: 1, token: 1
[12:50:02.866] <TB2> INFO: (success/tries = 100/100), width = 3
[12:50:02.868] <TB2> INFO: ----------------------------------------------------------------------
[12:50:02.868] <TB2> INFO: PixTestPretest::findWorkingPixel()
[12:50:02.868] <TB2> INFO: ----------------------------------------------------------------------
[12:50:03.007] <TB2> INFO: Expecting 231680 events.
[12:50:07.617] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L488> Channel 0 Number of ROCs (1) != Token Chain Length (8)

[12:50:07.620] <TB2> ERROR: <datapipe.cc/CheckEventID:L461> Channel 0 Event ID mismatch: local ID (21) != TBM ID (2)

[12:50:10.596] <TB2> INFO: 231680 events read in total (6874ms).
[12:50:10.600] <TB2> INFO: Test took 7730ms.
[12:50:11.015] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:50:11.063] <TB2> INFO: ----------------------------------------------------------------------
[12:50:11.063] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[12:50:11.063] <TB2> INFO: ----------------------------------------------------------------------
[12:50:11.203] <TB2> INFO: Expecting 231680 events.
[12:50:19.625] <TB2> INFO: 231680 events read in total (7707ms).
[12:50:19.630] <TB2> INFO: Test took 8561ms.
[12:50:20.067] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[12:50:20.067] <TB2> INFO: CalDel: 126 128 132 126 94 130 132 122 139 109 111 113 105 104 117 122
[12:50:20.067] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 53 51 51 51 51 51
[12:50:20.069] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C0.dat
[12:50:20.070] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C1.dat
[12:50:20.070] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C2.dat
[12:50:20.070] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C3.dat
[12:50:20.070] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C4.dat
[12:50:20.071] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C5.dat
[12:50:20.071] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C6.dat
[12:50:20.071] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C7.dat
[12:50:20.071] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C8.dat
[12:50:20.071] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C9.dat
[12:50:20.071] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C10.dat
[12:50:20.071] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C11.dat
[12:50:20.071] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C12.dat
[12:50:20.071] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C13.dat
[12:50:20.072] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C14.dat
[12:50:20.072] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters_C15.dat
[12:50:20.072] <TB2> INFO: write tbm parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//tbmParameters_C0a.dat
[12:50:20.072] <TB2> INFO: write tbm parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//tbmParameters_C0b.dat
[12:50:20.072] <TB2> INFO: PixTestPretest::doTest() done, duration: 138 seconds
[12:50:20.192] <TB2> INFO: enter test to run
[12:50:20.192] <TB2> INFO: test: fulltest no parameter change
[12:50:20.192] <TB2> INFO: running: fulltest
[12:50:20.193] <TB2> INFO: ######################################################################
[12:50:20.193] <TB2> INFO: PixTestFullTest::doTest()
[12:50:20.193] <TB2> INFO: ######################################################################
[12:50:20.194] <TB2> INFO: ######################################################################
[12:50:20.194] <TB2> INFO: PixTestAlive::doTest()
[12:50:20.194] <TB2> INFO: ######################################################################
[12:50:20.196] <TB2> INFO: ----------------------------------------------------------------------
[12:50:20.196] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:50:20.196] <TB2> INFO: ----------------------------------------------------------------------
[12:50:20.502] <TB2> INFO: Expecting 41600 events.
[12:50:24.606] <TB2> INFO: 41600 events read in total (3389ms).
[12:50:24.607] <TB2> INFO: Test took 4409ms.
[12:50:24.612] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:25.014] <TB2> INFO: PixTestAlive::aliveTest() done
[12:50:25.014] <TB2> INFO: number of dead pixels (per ROC): 0 0 1 0 0 0 4 4 3 1 1 0 0 0 0 0
[12:50:25.015] <TB2> INFO: ----------------------------------------------------------------------
[12:50:25.015] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:50:25.015] <TB2> INFO: ----------------------------------------------------------------------
[12:50:25.325] <TB2> INFO: Expecting 41600 events.
[12:50:28.420] <TB2> INFO: 41600 events read in total (2379ms).
[12:50:28.420] <TB2> INFO: Test took 3402ms.
[12:50:28.420] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:28.421] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:50:28.845] <TB2> INFO: PixTestAlive::maskTest() done
[12:50:28.845] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:50:28.847] <TB2> INFO: ----------------------------------------------------------------------
[12:50:28.847] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:50:28.847] <TB2> INFO: ----------------------------------------------------------------------
[12:50:29.165] <TB2> INFO: Expecting 41600 events.
[12:50:33.436] <TB2> INFO: 41600 events read in total (3556ms).
[12:50:33.437] <TB2> INFO: Test took 4588ms.
[12:50:33.443] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:33.843] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[12:50:33.843] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:50:33.844] <TB2> INFO: PixTestAlive::doTest() done, duration: 13 seconds
[12:50:33.844] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:50:33.844] <TB2> INFO: Decoding statistics:
[12:50:33.844] <TB2> INFO: General information:
[12:50:33.844] <TB2> INFO: 16bit words read: 0
[12:50:33.844] <TB2> INFO: valid events total: 0
[12:50:33.844] <TB2> INFO: empty events: 0
[12:50:33.844] <TB2> INFO: valid events with pixels: 0
[12:50:33.844] <TB2> INFO: valid pixel hits: 0
[12:50:33.844] <TB2> INFO: Event errors: 0
[12:50:33.844] <TB2> INFO: start marker: 0
[12:50:33.844] <TB2> INFO: stop marker: 0
[12:50:33.844] <TB2> INFO: overflow: 0
[12:50:33.844] <TB2> INFO: invalid 5bit words: 0
[12:50:33.844] <TB2> INFO: invalid XOR eye diagram: 0
[12:50:33.844] <TB2> INFO: TBM errors: 0
[12:50:33.844] <TB2> INFO: flawed TBM headers: 0
[12:50:33.844] <TB2> INFO: flawed TBM trailers: 0
[12:50:33.844] <TB2> INFO: event ID mismatches: 0
[12:50:33.844] <TB2> INFO: ROC errors: 0
[12:50:33.844] <TB2> INFO: missing ROC header(s): 0
[12:50:33.844] <TB2> INFO: misplaced readback start: 0
[12:50:33.844] <TB2> INFO: Pixel decoding errors: 0
[12:50:33.844] <TB2> INFO: pixel data incomplete: 0
[12:50:33.844] <TB2> INFO: pixel address: 0
[12:50:33.844] <TB2> INFO: pulse height fill bit: 0
[12:50:33.844] <TB2> INFO: buffer corruption: 0
[12:50:33.853] <TB2> INFO: ######################################################################
[12:50:33.853] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:50:33.853] <TB2> INFO: ######################################################################
[12:50:33.858] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (-1/-1) hits flags = 514 (plus default)
[12:50:33.872] <TB2> INFO: dacScan split into 1 runs with ntrig = 5
[12:50:33.872] <TB2> INFO: run 1 of 1
[12:50:34.222] <TB2> INFO: Expecting 3120000 events.
[12:51:20.884] <TB2> INFO: 1003415 events read in total (45947ms).
[12:52:06.046] <TB2> INFO: 1986665 events read in total (91110ms).
[12:52:52.454] <TB2> INFO: 2996335 events read in total (137518ms).
[12:52:58.489] <TB2> INFO: 3120000 events read in total (143552ms).
[12:52:58.540] <TB2> INFO: Test took 144668ms.
[12:52:58.652] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:21.168] <TB2> INFO: PixTestBBMap::doTest() done, duration: 167 seconds
[12:53:21.168] <TB2> INFO: number of dead bumps (per ROC): 1 0 0 1 0 3 1 2 2 1 0 0 0 2 0 2
[12:53:21.168] <TB2> INFO: separation cut (per ROC): 78 82 90 77 74 71 76 77 77 92 102 92 82 77 86 86
[12:53:21.168] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:53:21.168] <TB2> INFO: Decoding statistics:
[12:53:21.168] <TB2> INFO: General information:
[12:53:21.168] <TB2> INFO: 16bit words read: 0
[12:53:21.168] <TB2> INFO: valid events total: 0
[12:53:21.168] <TB2> INFO: empty events: 0
[12:53:21.168] <TB2> INFO: valid events with pixels: 0
[12:53:21.168] <TB2> INFO: valid pixel hits: 0
[12:53:21.168] <TB2> INFO: Event errors: 0
[12:53:21.168] <TB2> INFO: start marker: 0
[12:53:21.168] <TB2> INFO: stop marker: 0
[12:53:21.168] <TB2> INFO: overflow: 0
[12:53:21.168] <TB2> INFO: invalid 5bit words: 0
[12:53:21.168] <TB2> INFO: invalid XOR eye diagram: 0
[12:53:21.169] <TB2> INFO: TBM errors: 0
[12:53:21.169] <TB2> INFO: flawed TBM headers: 0
[12:53:21.169] <TB2> INFO: flawed TBM trailers: 0
[12:53:21.169] <TB2> INFO: event ID mismatches: 0
[12:53:21.169] <TB2> INFO: ROC errors: 0
[12:53:21.169] <TB2> INFO: missing ROC header(s): 0
[12:53:21.169] <TB2> INFO: misplaced readback start: 0
[12:53:21.169] <TB2> INFO: Pixel decoding errors: 0
[12:53:21.169] <TB2> INFO: pixel data incomplete: 0
[12:53:21.169] <TB2> INFO: pixel address: 0
[12:53:21.169] <TB2> INFO: pulse height fill bit: 0
[12:53:21.169] <TB2> INFO: buffer corruption: 0
[12:53:21.266] <TB2> INFO: ######################################################################
[12:53:21.266] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:53:21.266] <TB2> INFO: ######################################################################
[12:53:21.266] <TB2> INFO: ----------------------------------------------------------------------
[12:53:21.266] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50, dacs/step = -1, ntrig/step = -1
[12:53:21.266] <TB2> INFO: ----------------------------------------------------------------------
[12:53:21.266] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 25 .. 150 (-1/-1) hits flags = 528 (plus default)
[12:53:21.274] <TB2> INFO: dacScan split into 1 runs with ntrig = 50
[12:53:21.274] <TB2> INFO: run 1 of 1
[12:53:21.575] <TB2> INFO: Expecting 26208000 events.
[12:53:55.260] <TB2> INFO: 1198900 events read in total (32965ms).
[12:54:28.617] <TB2> INFO: 2374900 events read in total (66322ms).
[12:55:01.674] <TB2> INFO: 3552600 events read in total (99379ms).
[12:55:34.277] <TB2> INFO: 4720950 events read in total (131982ms).
[12:56:07.771] <TB2> INFO: 5889800 events read in total (165476ms).
[12:56:39.753] <TB2> INFO: 7060100 events read in total (197458ms).
[12:57:13.052] <TB2> INFO: 8225750 events read in total (230757ms).
[12:57:46.389] <TB2> INFO: 9392000 events read in total (264094ms).
[12:58:19.453] <TB2> INFO: 10555050 events read in total (297158ms).
[12:58:51.617] <TB2> INFO: 11717300 events read in total (329322ms).
[12:59:23.843] <TB2> INFO: 12875350 events read in total (361548ms).
[12:59:56.816] <TB2> INFO: 14018600 events read in total (394521ms).
[13:00:29.778] <TB2> INFO: 15159950 events read in total (427483ms).
[13:01:02.218] <TB2> INFO: 16295500 events read in total (459923ms).
[13:01:34.637] <TB2> INFO: 17427550 events read in total (492342ms).
[13:02:07.420] <TB2> INFO: 18559600 events read in total (525125ms).
[13:02:40.371] <TB2> INFO: 19688250 events read in total (558076ms).
[13:03:13.355] <TB2> INFO: 20818550 events read in total (591060ms).
[13:03:46.001] <TB2> INFO: 21942700 events read in total (623706ms).
[13:04:18.890] <TB2> INFO: 23070300 events read in total (656595ms).
[13:04:51.652] <TB2> INFO: 24202000 events read in total (689357ms).
[13:05:24.293] <TB2> INFO: 25334850 events read in total (721998ms).
[13:05:49.015] <TB2> INFO: 26208000 events read in total (746720ms).
[13:05:49.044] <TB2> INFO: Test took 747770ms.
[13:05:49.109] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:49.239] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:05:50.600] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:05:52.009] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:05:53.430] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:05:54.795] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:05:56.225] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:05:57.578] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:05:58.912] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:06:00.258] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:06:01.609] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:06:02.941] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:06:04.234] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:06:05.576] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:06:06.910] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:06:08.233] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:06:09.568] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[13:06:10.956] <TB2> INFO: PixTestScurves::scurves() done
[13:06:10.956] <TB2> INFO: Vcal mean: 90.70 103.97 110.11 98.82 95.88 98.41 102.81 92.67 97.12 104.25 114.72 102.99 103.81 102.65 103.06 101.65
[13:06:10.956] <TB2> INFO: Vcal RMS: 5.19 5.11 5.34 6.09 5.18 5.72 5.97 6.56 6.48 6.02 5.82 5.76 5.58 5.32 5.52 6.42
[13:06:10.956] <TB2> INFO: PixTestScurves::fullTest() done, duration: 769 seconds
[13:06:10.956] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:10.956] <TB2> INFO: Decoding statistics:
[13:06:10.956] <TB2> INFO: General information:
[13:06:10.956] <TB2> INFO: 16bit words read: 0
[13:06:10.956] <TB2> INFO: valid events total: 0
[13:06:10.956] <TB2> INFO: empty events: 0
[13:06:10.956] <TB2> INFO: valid events with pixels: 0
[13:06:10.956] <TB2> INFO: valid pixel hits: 0
[13:06:10.956] <TB2> INFO: Event errors: 0
[13:06:10.956] <TB2> INFO: start marker: 0
[13:06:10.956] <TB2> INFO: stop marker: 0
[13:06:10.956] <TB2> INFO: overflow: 0
[13:06:10.956] <TB2> INFO: invalid 5bit words: 0
[13:06:10.956] <TB2> INFO: invalid XOR eye diagram: 0
[13:06:10.956] <TB2> INFO: TBM errors: 0
[13:06:10.956] <TB2> INFO: flawed TBM headers: 0
[13:06:10.956] <TB2> INFO: flawed TBM trailers: 0
[13:06:10.956] <TB2> INFO: event ID mismatches: 0
[13:06:10.956] <TB2> INFO: ROC errors: 0
[13:06:10.956] <TB2> INFO: missing ROC header(s): 0
[13:06:10.956] <TB2> INFO: misplaced readback start: 0
[13:06:10.956] <TB2> INFO: Pixel decoding errors: 0
[13:06:10.956] <TB2> INFO: pixel data incomplete: 0
[13:06:10.956] <TB2> INFO: pixel address: 0
[13:06:10.956] <TB2> INFO: pulse height fill bit: 0
[13:06:10.956] <TB2> INFO: buffer corruption: 0
[13:06:11.025] <TB2> INFO: ######################################################################
[13:06:11.025] <TB2> INFO: PixTestTrim::doTest()
[13:06:11.025] <TB2> INFO: ######################################################################
[13:06:11.026] <TB2> INFO: ----------------------------------------------------------------------
[13:06:11.026] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:06:11.026] <TB2> INFO: ----------------------------------------------------------------------
[13:06:11.113] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:06:11.113] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:06:11.121] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:06:11.121] <TB2> INFO: run 1 of 1
[13:06:11.426] <TB2> INFO: Expecting 6281600 events.
[13:06:55.695] <TB2> INFO: 1441320 events read in total (43553ms).
[13:07:39.859] <TB2> INFO: 2869460 events read in total (87717ms).
[13:08:24.879] <TB2> INFO: 4300430 events read in total (132737ms).
[13:09:10.266] <TB2> INFO: 5741730 events read in total (178125ms).
[13:09:26.522] <TB2> INFO: 6281600 events read in total (194380ms).
[13:09:26.551] <TB2> INFO: Test took 195430ms.
[13:09:26.597] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:44.933] <TB2> INFO: ROC 0 VthrComp = 91
[13:09:44.934] <TB2> INFO: ROC 1 VthrComp = 100
[13:09:44.934] <TB2> INFO: ROC 2 VthrComp = 104
[13:09:44.934] <TB2> INFO: ROC 3 VthrComp = 95
[13:09:44.934] <TB2> INFO: ROC 4 VthrComp = 92
[13:09:44.934] <TB2> INFO: ROC 5 VthrComp = 95
[13:09:44.934] <TB2> INFO: ROC 6 VthrComp = 102
[13:09:44.935] <TB2> INFO: ROC 7 VthrComp = 94
[13:09:44.935] <TB2> INFO: ROC 8 VthrComp = 93
[13:09:44.935] <TB2> INFO: ROC 9 VthrComp = 102
[13:09:44.935] <TB2> INFO: ROC 10 VthrComp = 107
[13:09:44.935] <TB2> INFO: ROC 11 VthrComp = 101
[13:09:44.936] <TB2> INFO: ROC 12 VthrComp = 101
[13:09:44.936] <TB2> INFO: ROC 13 VthrComp = 100
[13:09:44.936] <TB2> INFO: ROC 14 VthrComp = 102
[13:09:44.936] <TB2> INFO: ROC 15 VthrComp = 99
[13:09:44.936] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:09:44.936] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 10 dacrange: 10 .. 160 (-1/-1) hits flags = 528 (plus default)
[13:09:44.944] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:09:44.945] <TB2> INFO: run 1 of 1
[13:09:45.250] <TB2> INFO: Expecting 6281600 events.
[13:10:22.889] <TB2> INFO: 894970 events read in total (36924ms).
[13:10:59.189] <TB2> INFO: 1786880 events read in total (73224ms).
[13:11:36.128] <TB2> INFO: 2679650 events read in total (110163ms).
[13:12:13.045] <TB2> INFO: 3567510 events read in total (147081ms).
[13:12:49.045] <TB2> INFO: 4447230 events read in total (183080ms).
[13:13:25.569] <TB2> INFO: 5322630 events read in total (219604ms).
[13:14:01.786] <TB2> INFO: 6198060 events read in total (255821ms).
[13:14:05.206] <TB2> INFO: 6281600 events read in total (259241ms).
[13:14:05.256] <TB2> INFO: Test took 260312ms.
[13:14:05.397] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:28.304] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 58.4171 for pixel 8/22 mean/min/max = 45.9205/33.3762/58.4647
[13:14:28.304] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 58.839 for pixel 23/26 mean/min/max = 45.9636/33.088/58.8392
[13:14:28.304] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 62.941 for pixel 25/79 mean/min/max = 48.9872/34.9025/63.0718
[13:14:28.304] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 61.8022 for pixel 0/23 mean/min/max = 47.2061/32.457/61.9553
[13:14:28.305] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 59.7305 for pixel 0/79 mean/min/max = 46.8365/33.7085/59.9646
[13:14:28.305] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 61.3209 for pixel 0/27 mean/min/max = 47.0113/32.6559/61.3666
[13:14:28.305] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 57.8694 for pixel 12/11 mean/min/max = 45.6126/33.353/57.8722
[13:14:28.306] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 59.3816 for pixel 0/78 mean/min/max = 46.0826/32.7381/59.4271
[13:14:28.306] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 62.1948 for pixel 20/0 mean/min/max = 48.0222/33.788/62.2564
[13:14:28.306] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 60.3638 for pixel 1/10 mean/min/max = 46.2109/32.0457/60.3761
[13:14:28.306] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 66.1932 for pixel 0/26 mean/min/max = 50.7254/35.0303/66.4204
[13:14:28.307] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 60.732 for pixel 5/68 mean/min/max = 46.6667/32.5282/60.8053
[13:14:28.307] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 60.6015 for pixel 0/10 mean/min/max = 46.7602/32.866/60.6545
[13:14:28.307] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 59.4538 for pixel 0/72 mean/min/max = 46.2446/33.0105/59.4787
[13:14:28.308] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 59.4376 for pixel 42/69 mean/min/max = 45.8959/32.3332/59.4586
[13:14:28.308] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 58.9971 for pixel 22/2 mean/min/max = 44.8925/30.761/59.0239
[13:14:28.308] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:14:28.442] <TB2> INFO: Expecting 514560 events.
[13:14:38.254] <TB2> INFO: 514560 events read in total (9097ms).
[13:14:38.259] <TB2> INFO: Expecting 514560 events.
[13:14:47.974] <TB2> INFO: 514560 events read in total (9047ms).
[13:14:47.980] <TB2> INFO: Expecting 514560 events.
[13:14:57.884] <TB2> INFO: 514560 events read in total (9227ms).
[13:14:57.895] <TB2> INFO: Expecting 514560 events.
[13:15:07.674] <TB2> INFO: 514560 events read in total (9120ms).
[13:15:07.684] <TB2> INFO: Expecting 514560 events.
[13:15:17.477] <TB2> INFO: 514560 events read in total (9121ms).
[13:15:17.488] <TB2> INFO: Expecting 514560 events.
[13:15:27.161] <TB2> INFO: 514560 events read in total (9002ms).
[13:15:27.179] <TB2> INFO: Expecting 514560 events.
[13:15:36.833] <TB2> INFO: 514560 events read in total (9004ms).
[13:15:36.848] <TB2> INFO: Expecting 514560 events.
[13:15:46.727] <TB2> INFO: 514560 events read in total (9216ms).
[13:15:46.744] <TB2> INFO: Expecting 514560 events.
[13:15:56.578] <TB2> INFO: 514560 events read in total (9185ms).
[13:15:56.597] <TB2> INFO: Expecting 514560 events.
[13:16:06.462] <TB2> INFO: 514560 events read in total (9206ms).
[13:16:06.489] <TB2> INFO: Expecting 514560 events.
[13:16:16.187] <TB2> INFO: 514560 events read in total (9057ms).
[13:16:16.213] <TB2> INFO: Expecting 514560 events.
[13:16:25.949] <TB2> INFO: 514560 events read in total (9088ms).
[13:16:25.972] <TB2> INFO: Expecting 514560 events.
[13:16:35.656] <TB2> INFO: 514560 events read in total (9029ms).
[13:16:35.691] <TB2> INFO: Expecting 514560 events.
[13:16:45.498] <TB2> INFO: 514560 events read in total (9178ms).
[13:16:45.524] <TB2> INFO: Expecting 514560 events.
[13:16:55.557] <TB2> INFO: 514560 events read in total (9374ms).
[13:16:55.595] <TB2> INFO: Expecting 514560 events.
[13:17:05.193] <TB2> INFO: 514560 events read in total (8957ms).
[13:17:05.225] <TB2> INFO: Test took 156917ms.
[13:17:06.294] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 150 (-1/-1) hits flags = 528 (plus default)
[13:17:06.302] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:17:06.302] <TB2> INFO: run 1 of 1
[13:17:06.627] <TB2> INFO: Expecting 6281600 events.
[13:17:43.278] <TB2> INFO: 874690 events read in total (35935ms).
[13:18:19.624] <TB2> INFO: 1745910 events read in total (72281ms).
[13:18:55.902] <TB2> INFO: 2617590 events read in total (108560ms).
[13:19:32.432] <TB2> INFO: 3484740 events read in total (145089ms).
[13:20:09.099] <TB2> INFO: 4342540 events read in total (181756ms).
[13:20:45.475] <TB2> INFO: 5197280 events read in total (218132ms).
[13:21:21.511] <TB2> INFO: 6049760 events read in total (254168ms).
[13:21:31.198] <TB2> INFO: 6281600 events read in total (263855ms).
[13:21:31.251] <TB2> INFO: Test took 264949ms.
[13:21:31.392] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:21:54.800] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.020747 .. 255.000000
[13:21:54.879] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 10 dacrange: 0 .. 255 (-1/-1) hits flags = 528 (plus default)
[13:21:54.887] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:21:54.887] <TB2> INFO: run 1 of 1
[13:21:55.188] <TB2> INFO: Expecting 10649600 events.
[13:22:31.022] <TB2> INFO: 826790 events read in total (35112ms).
[13:23:05.952] <TB2> INFO: 1654190 events read in total (70042ms).
[13:23:42.286] <TB2> INFO: 2481410 events read in total (106376ms).
[13:24:18.326] <TB2> INFO: 3308870 events read in total (142416ms).
[13:24:54.462] <TB2> INFO: 4136050 events read in total (178552ms).
[13:25:29.369] <TB2> INFO: 4962970 events read in total (213459ms).
[13:26:04.469] <TB2> INFO: 5790380 events read in total (248559ms).
[13:26:40.079] <TB2> INFO: 6617260 events read in total (284169ms).
[13:27:15.919] <TB2> INFO: 7443670 events read in total (320009ms).
[13:27:51.735] <TB2> INFO: 8269010 events read in total (355825ms).
[13:28:27.626] <TB2> INFO: 9093510 events read in total (391717ms).
[13:29:03.424] <TB2> INFO: 9918010 events read in total (427514ms).
[13:29:34.736] <TB2> INFO: 10649600 events read in total (458826ms).
[13:29:34.836] <TB2> INFO: Test took 459949ms.
[13:29:35.096] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:02.941] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 0.203960 .. 54.842955
[13:30:03.020] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 10 dacrange: 0 .. 64 (-1/-1) hits flags = 528 (plus default)
[13:30:03.028] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:30:03.028] <TB2> INFO: run 1 of 1
[13:30:03.342] <TB2> INFO: Expecting 2704000 events.
[13:30:44.585] <TB2> INFO: 1113820 events read in total (40528ms).
[13:31:24.988] <TB2> INFO: 2225680 events read in total (80932ms).
[13:31:43.124] <TB2> INFO: 2704000 events read in total (99067ms).
[13:31:43.147] <TB2> INFO: Test took 100119ms.
[13:31:43.199] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:58.182] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 1.174387 .. 48.846557
[13:31:58.262] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 10 dacrange: 1 .. 58 (-1/-1) hits flags = 528 (plus default)
[13:31:58.270] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:31:58.270] <TB2> INFO: run 1 of 1
[13:31:58.577] <TB2> INFO: Expecting 2412800 events.
[13:32:39.229] <TB2> INFO: 1161930 events read in total (39937ms).
[13:33:20.266] <TB2> INFO: 2322640 events read in total (80974ms).
[13:33:23.839] <TB2> INFO: 2412800 events read in total (84547ms).
[13:33:23.854] <TB2> INFO: Test took 85584ms.
[13:33:23.889] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:37.636] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 1.174387 .. 48.846557
[13:33:37.716] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 10 dacrange: 1 .. 58 (-1/-1) hits flags = 528 (plus default)
[13:33:37.724] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:33:37.724] <TB2> INFO: run 1 of 1
[13:33:38.028] <TB2> INFO: Expecting 2412800 events.
[13:34:15.753] <TB2> INFO: 1163320 events read in total (37009ms).
[13:34:57.921] <TB2> INFO: 2326450 events read in total (79177ms).
[13:35:01.490] <TB2> INFO: 2412800 events read in total (82747ms).
[13:35:01.507] <TB2> INFO: Test took 83783ms.
[13:35:01.550] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:15.650] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:35:15.650] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (-1/-1) hits flags = 528 (plus default)
[13:35:15.659] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:35:15.659] <TB2> INFO: run 1 of 1
[13:35:15.961] <TB2> INFO: Expecting 1705600 events.
[13:35:55.856] <TB2> INFO: 1076370 events read in total (39180ms).
[13:36:20.438] <TB2> INFO: 1705600 events read in total (63763ms).
[13:36:20.457] <TB2> INFO: Test took 64798ms.
[13:36:20.491] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:33.911] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C0.dat
[13:36:33.911] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C1.dat
[13:36:33.911] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C2.dat
[13:36:33.912] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C3.dat
[13:36:33.912] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C4.dat
[13:36:33.912] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C5.dat
[13:36:33.913] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C6.dat
[13:36:33.913] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C7.dat
[13:36:33.913] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C8.dat
[13:36:33.913] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C9.dat
[13:36:33.913] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C10.dat
[13:36:33.914] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C11.dat
[13:36:33.914] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C12.dat
[13:36:33.914] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C13.dat
[13:36:33.914] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C14.dat
[13:36:33.914] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C15.dat
[13:36:33.914] <TB2> INFO: write trim parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters35_C0.dat
[13:36:33.922] <TB2> INFO: write trim parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters35_C1.dat
[13:36:33.928] <TB2> INFO: write trim parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters35_C2.dat
[13:36:33.934] <TB2> INFO: write trim parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters35_C3.dat
[13:36:33.942] <TB2> INFO: write trim parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters35_C4.dat
[13:36:33.951] <TB2> INFO: write trim parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters35_C5.dat
[13:36:33.958] <TB2> INFO: write trim parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters35_C6.dat
[13:36:33.969] <TB2> INFO: write trim parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters35_C7.dat
[13:36:33.982] <TB2> INFO: write trim parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters35_C8.dat
[13:36:33.994] <TB2> INFO: write trim parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters35_C9.dat
[13:36:34.005] <TB2> INFO: write trim parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters35_C10.dat
[13:36:34.012] <TB2> INFO: write trim parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters35_C11.dat
[13:36:34.020] <TB2> INFO: write trim parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters35_C12.dat
[13:36:34.026] <TB2> INFO: write trim parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters35_C13.dat
[13:36:34.032] <TB2> INFO: write trim parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters35_C14.dat
[13:36:34.039] <TB2> INFO: write trim parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//trimParameters35_C15.dat
[13:36:34.050] <TB2> INFO: PixTestTrim::trimTest() done
[13:36:34.050] <TB2> INFO: vtrim: 103 97 95 104 91 94 94 84 103 99 115 92 114 85 102 100
[13:36:34.050] <TB2> INFO: vthrcomp: 91 100 104 95 92 95 102 94 93 102 107 101 101 100 102 99
[13:36:34.050] <TB2> INFO: vcal mean: 35.06 34.99 34.99 34.94 34.98 34.99 34.93 34.96 34.93 34.94 34.99 34.99 34.96 34.95 34.95 34.81
[13:36:34.050] <TB2> INFO: vcal RMS: 0.86 0.94 1.14 1.11 0.86 0.91 1.52 1.42 1.43 0.94 1.11 0.91 1.10 0.87 0.89 0.92
[13:36:34.050] <TB2> INFO: bits mean: 9.46 9.45 7.94 9.09 8.43 9.14 9.59 8.92 8.99 9.34 8.09 9.07 9.43 9.00 9.63 10.13
[13:36:34.050] <TB2> INFO: bits RMS: 2.55 2.58 2.67 2.78 2.83 2.68 2.50 2.84 2.53 2.73 2.48 2.82 2.51 2.74 2.60 2.63
[13:36:34.058] <TB2> INFO: ----------------------------------------------------------------------
[13:36:34.058] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[13:36:34.058] <TB2> INFO: ----------------------------------------------------------------------
[13:36:34.063] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (-1/-1) hits flags = 528 (plus default)
[13:36:34.074] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:36:34.074] <TB2> INFO: run 1 of 1
[13:36:34.398] <TB2> INFO: Expecting 8320000 events.
[13:37:13.566] <TB2> INFO: 1226450 events read in total (38453ms).
[13:37:54.830] <TB2> INFO: 2441480 events read in total (79717ms).
[13:38:36.098] <TB2> INFO: 3650510 events read in total (120985ms).
[13:39:17.508] <TB2> INFO: 4847380 events read in total (162395ms).
[13:39:58.093] <TB2> INFO: 6034220 events read in total (202980ms).
[13:40:38.536] <TB2> INFO: 7218610 events read in total (243423ms).
[13:41:16.362] <TB2> INFO: 8320000 events read in total (281249ms).
[13:41:16.396] <TB2> INFO: Test took 282323ms.
[13:41:16.485] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:41.119] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 186 (-1/-1) hits flags = 528 (plus default)
[13:41:41.128] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:41:41.128] <TB2> INFO: run 1 of 1
[13:41:41.471] <TB2> INFO: Expecting 7779200 events.
[13:42:18.371] <TB2> INFO: 1209790 events read in total (36185ms).
[13:42:58.944] <TB2> INFO: 2408340 events read in total (76758ms).
[13:43:39.445] <TB2> INFO: 3601750 events read in total (117259ms).
[13:44:20.098] <TB2> INFO: 4781030 events read in total (157912ms).
[13:45:00.585] <TB2> INFO: 5952820 events read in total (198399ms).
[13:45:41.224] <TB2> INFO: 7123940 events read in total (239038ms).
[13:46:03.542] <TB2> INFO: 7779200 events read in total (261356ms).
[13:46:03.585] <TB2> INFO: Test took 262457ms.
[13:46:03.672] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:27.434] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 176 (-1/-1) hits flags = 528 (plus default)
[13:46:27.442] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:46:27.442] <TB2> INFO: run 1 of 1
[13:46:27.746] <TB2> INFO: Expecting 7363200 events.
[13:47:09.225] <TB2> INFO: 1250560 events read in total (40763ms).
[13:47:51.304] <TB2> INFO: 2488260 events read in total (82842ms).
[13:48:33.679] <TB2> INFO: 3718670 events read in total (125218ms).
[13:49:15.713] <TB2> INFO: 4931050 events read in total (167251ms).
[13:49:58.320] <TB2> INFO: 6138880 events read in total (209858ms).
[13:50:40.652] <TB2> INFO: 7354320 events read in total (252190ms).
[13:50:41.301] <TB2> INFO: 7363200 events read in total (252839ms).
[13:50:41.335] <TB2> INFO: Test took 253893ms.
[13:50:41.411] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:51:05.138] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 170 (-1/-1) hits flags = 528 (plus default)
[13:51:05.145] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:51:05.145] <TB2> INFO: run 1 of 1
[13:51:05.452] <TB2> INFO: Expecting 7113600 events.
[13:51:48.173] <TB2> INFO: 1277510 events read in total (42005ms).
[13:52:25.957] <TB2> INFO: 2542120 events read in total (79789ms).
[13:53:07.193] <TB2> INFO: 3794460 events read in total (121025ms).
[13:53:49.101] <TB2> INFO: 5030910 events read in total (162933ms).
[13:54:30.307] <TB2> INFO: 6263100 events read in total (204140ms).
[13:54:59.021] <TB2> INFO: 7113600 events read in total (232853ms).
[13:54:59.051] <TB2> INFO: Test took 233906ms.
[13:54:59.117] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:55:21.422] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 170 (-1/-1) hits flags = 528 (plus default)
[13:55:21.430] <TB2> INFO: dacScan split into 1 runs with ntrig = 10
[13:55:21.430] <TB2> INFO: run 1 of 1
[13:55:21.738] <TB2> INFO: Expecting 7113600 events.
[13:56:05.700] <TB2> INFO: 1276070 events read in total (43247ms).
[13:56:45.557] <TB2> INFO: 2538810 events read in total (83104ms).
[13:57:27.447] <TB2> INFO: 3789950 events read in total (124995ms).
[13:58:09.832] <TB2> INFO: 5025190 events read in total (167379ms).
[13:58:52.244] <TB2> INFO: 6255450 events read in total (209791ms).
[13:59:21.967] <TB2> INFO: 7113600 events read in total (239514ms).
[13:59:22.017] <TB2> INFO: Test took 240587ms.
[13:59:22.097] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:44.922] <TB2> INFO: PixTestTrim::trimBitTest() done
[13:59:44.923] <TB2> INFO: PixTestTrim::doTest() done, duration: 3213 seconds
[13:59:44.923] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:44.923] <TB2> INFO: Decoding statistics:
[13:59:44.923] <TB2> INFO: General information:
[13:59:44.923] <TB2> INFO: 16bit words read: 0
[13:59:44.923] <TB2> INFO: valid events total: 0
[13:59:44.923] <TB2> INFO: empty events: 0
[13:59:44.923] <TB2> INFO: valid events with pixels: 0
[13:59:44.923] <TB2> INFO: valid pixel hits: 0
[13:59:44.923] <TB2> INFO: Event errors: 0
[13:59:44.923] <TB2> INFO: start marker: 0
[13:59:44.923] <TB2> INFO: stop marker: 0
[13:59:44.923] <TB2> INFO: overflow: 0
[13:59:44.923] <TB2> INFO: invalid 5bit words: 0
[13:59:44.923] <TB2> INFO: invalid XOR eye diagram: 0
[13:59:44.923] <TB2> INFO: TBM errors: 0
[13:59:44.923] <TB2> INFO: flawed TBM headers: 0
[13:59:44.923] <TB2> INFO: flawed TBM trailers: 0
[13:59:44.924] <TB2> INFO: event ID mismatches: 0
[13:59:44.924] <TB2> INFO: ROC errors: 0
[13:59:44.924] <TB2> INFO: missing ROC header(s): 0
[13:59:44.924] <TB2> INFO: misplaced readback start: 0
[13:59:44.924] <TB2> INFO: Pixel decoding errors: 0
[13:59:44.924] <TB2> INFO: pixel data incomplete: 0
[13:59:44.924] <TB2> INFO: pixel address: 0
[13:59:44.924] <TB2> INFO: pulse height fill bit: 0
[13:59:44.924] <TB2> INFO: buffer corruption: 0
[13:59:45.623] <TB2> INFO: ######################################################################
[13:59:45.623] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:59:45.623] <TB2> INFO: ######################################################################
[13:59:45.956] <TB2> INFO: Expecting 41600 events.
[13:59:50.253] <TB2> INFO: 41600 events read in total (3582ms).
[13:59:50.254] <TB2> INFO: Test took 4629ms.
[13:59:50.260] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:50.937] <TB2> INFO: Expecting 41600 events.
[13:59:55.293] <TB2> INFO: 41600 events read in total (3641ms).
[13:59:55.294] <TB2> INFO: Test took 4674ms.
[13:59:55.299] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:59:55.719] <TB2> INFO: Expecting 41600 events.
[14:00:00.116] <TB2> INFO: 41600 events read in total (3682ms).
[14:00:00.116] <TB2> INFO: Test took 4728ms.
[14:00:00.122] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:00:00.550] <TB2> INFO: Expecting 2560 events.
[14:00:01.517] <TB2> INFO: 2560 events read in total (252ms).
[14:00:01.517] <TB2> INFO: Test took 1385ms.
[14:00:02.026] <TB2> INFO: Expecting 2560 events.
[14:00:02.988] <TB2> INFO: 2560 events read in total (247ms).
[14:00:02.989] <TB2> INFO: Test took 1471ms.
[14:00:03.498] <TB2> INFO: Expecting 2560 events.
[14:00:04.461] <TB2> INFO: 2560 events read in total (248ms).
[14:00:04.461] <TB2> INFO: Test took 1472ms.
[14:00:04.970] <TB2> INFO: Expecting 2560 events.
[14:00:05.933] <TB2> INFO: 2560 events read in total (247ms).
[14:00:05.933] <TB2> INFO: Test took 1471ms.
[14:00:06.442] <TB2> INFO: Expecting 2560 events.
[14:00:07.408] <TB2> INFO: 2560 events read in total (250ms).
[14:00:07.408] <TB2> INFO: Test took 1475ms.
[14:00:07.917] <TB2> INFO: Expecting 2560 events.
[14:00:08.880] <TB2> INFO: 2560 events read in total (247ms).
[14:00:08.881] <TB2> INFO: Test took 1472ms.
[14:00:09.390] <TB2> INFO: Expecting 2560 events.
[14:00:10.352] <TB2> INFO: 2560 events read in total (246ms).
[14:00:10.353] <TB2> INFO: Test took 1472ms.
[14:00:10.862] <TB2> INFO: Expecting 2560 events.
[14:00:11.824] <TB2> INFO: 2560 events read in total (246ms).
[14:00:11.824] <TB2> INFO: Test took 1471ms.
[14:00:12.333] <TB2> INFO: Expecting 2560 events.
[14:00:13.293] <TB2> INFO: 2560 events read in total (244ms).
[14:00:13.294] <TB2> INFO: Test took 1469ms.
[14:00:13.803] <TB2> INFO: Expecting 2560 events.
[14:00:14.765] <TB2> INFO: 2560 events read in total (247ms).
[14:00:14.765] <TB2> INFO: Test took 1471ms.
[14:00:15.274] <TB2> INFO: Expecting 2560 events.
[14:00:16.233] <TB2> INFO: 2560 events read in total (243ms).
[14:00:16.233] <TB2> INFO: Test took 1467ms.
[14:00:16.743] <TB2> INFO: Expecting 2560 events.
[14:00:17.702] <TB2> INFO: 2560 events read in total (244ms).
[14:00:17.702] <TB2> INFO: Test took 1468ms.
[14:00:18.211] <TB2> INFO: Expecting 2560 events.
[14:00:19.174] <TB2> INFO: 2560 events read in total (247ms).
[14:00:19.174] <TB2> INFO: Test took 1472ms.
[14:00:19.683] <TB2> INFO: Expecting 2560 events.
[14:00:20.649] <TB2> INFO: 2560 events read in total (251ms).
[14:00:20.649] <TB2> INFO: Test took 1475ms.
[14:00:21.158] <TB2> INFO: Expecting 2560 events.
[14:00:22.119] <TB2> INFO: 2560 events read in total (245ms).
[14:00:22.120] <TB2> INFO: Test took 1471ms.
[14:00:22.629] <TB2> INFO: Expecting 2560 events.
[14:00:23.592] <TB2> INFO: 2560 events read in total (248ms).
[14:00:23.592] <TB2> INFO: Test took 1472ms.
[14:00:23.598] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:00:24.103] <TB2> INFO: Expecting 655360 events.
[14:00:36.464] <TB2> INFO: 655360 events read in total (11646ms).
[14:00:36.472] <TB2> INFO: Expecting 655360 events.
[14:00:49.155] <TB2> INFO: 655360 events read in total (12076ms).
[14:00:49.169] <TB2> INFO: Expecting 655360 events.
[14:01:01.405] <TB2> INFO: 655360 events read in total (11653ms).
[14:01:01.420] <TB2> INFO: Expecting 655360 events.
[14:01:13.476] <TB2> INFO: 655360 events read in total (11453ms).
[14:01:13.495] <TB2> INFO: Expecting 655360 events.
[14:01:24.885] <TB2> INFO: 655360 events read in total (10798ms).
[14:01:24.906] <TB2> INFO: Expecting 655360 events.
[14:01:36.410] <TB2> INFO: 655360 events read in total (10906ms).
[14:01:36.435] <TB2> INFO: Expecting 655360 events.
[14:01:48.683] <TB2> INFO: 655360 events read in total (11656ms).
[14:01:48.716] <TB2> INFO: Expecting 655360 events.
[14:02:01.145] <TB2> INFO: 655360 events read in total (11864ms).
[14:02:01.178] <TB2> INFO: Expecting 655360 events.
[14:02:13.877] <TB2> INFO: 655360 events read in total (12119ms).
[14:02:13.910] <TB2> INFO: Expecting 655360 events.
[14:02:26.495] <TB2> INFO: 655360 events read in total (12027ms).
[14:02:26.533] <TB2> INFO: Expecting 655360 events.
[14:02:39.033] <TB2> INFO: 655360 events read in total (11946ms).
[14:02:39.076] <TB2> INFO: Expecting 655360 events.
[14:02:51.676] <TB2> INFO: 655360 events read in total (12039ms).
[14:02:51.738] <TB2> INFO: Expecting 655360 events.
[14:03:04.155] <TB2> INFO: 655360 events read in total (11878ms).
[14:03:04.213] <TB2> INFO: Expecting 655360 events.
[14:03:16.832] <TB2> INFO: 655360 events read in total (12092ms).
[14:03:16.887] <TB2> INFO: Expecting 655360 events.
[14:03:29.359] <TB2> INFO: 655360 events read in total (11945ms).
[14:03:29.423] <TB2> INFO: Expecting 655360 events.
[14:03:41.926] <TB2> INFO: 655360 events read in total (11969ms).
[14:03:41.982] <TB2> INFO: Test took 198385ms.
[14:03:42.063] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:03:42.368] <TB2> INFO: Expecting 655360 events.
[14:03:54.863] <TB2> INFO: 655360 events read in total (11779ms).
[14:03:54.871] <TB2> INFO: Expecting 655360 events.
[14:04:07.493] <TB2> INFO: 655360 events read in total (12015ms).
[14:04:07.504] <TB2> INFO: Expecting 655360 events.
[14:04:19.980] <TB2> INFO: 655360 events read in total (11869ms).
[14:04:19.995] <TB2> INFO: Expecting 655360 events.
[14:04:32.596] <TB2> INFO: 655360 events read in total (12000ms).
[14:04:32.615] <TB2> INFO: Expecting 655360 events.
[14:04:45.049] <TB2> INFO: 655360 events read in total (11832ms).
[14:04:45.072] <TB2> INFO: Expecting 655360 events.
[14:04:57.494] <TB2> INFO: 655360 events read in total (11828ms).
[14:04:57.520] <TB2> INFO: Expecting 655360 events.
[14:05:10.013] <TB2> INFO: 655360 events read in total (11902ms).
[14:05:10.042] <TB2> INFO: Expecting 655360 events.
[14:05:22.655] <TB2> INFO: 655360 events read in total (12034ms).
[14:05:22.687] <TB2> INFO: Expecting 655360 events.
[14:05:35.148] <TB2> INFO: 655360 events read in total (11934ms).
[14:05:35.190] <TB2> INFO: Expecting 655360 events.
[14:05:47.787] <TB2> INFO: 655360 events read in total (12029ms).
[14:05:47.829] <TB2> INFO: Expecting 655360 events.
[14:06:00.084] <TB2> INFO: 655360 events read in total (11704ms).
[14:06:00.127] <TB2> INFO: Expecting 655360 events.
[14:06:12.821] <TB2> INFO: 655360 events read in total (12124ms).
[14:06:12.872] <TB2> INFO: Expecting 655360 events.
[14:06:25.536] <TB2> INFO: 655360 events read in total (12118ms).
[14:06:25.606] <TB2> INFO: Expecting 655360 events.
[14:06:38.070] <TB2> INFO: 655360 events read in total (11937ms).
[14:06:38.120] <TB2> INFO: Expecting 655360 events.
[14:06:50.665] <TB2> INFO: 655360 events read in total (11978ms).
[14:06:50.721] <TB2> INFO: Expecting 655360 events.
[14:07:03.136] <TB2> INFO: 655360 events read in total (11850ms).
[14:07:03.211] <TB2> INFO: Test took 201148ms.
[14:07:03.461] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:07:03.468] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:07:03.474] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:07:03.481] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:07:03.487] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:07:03.494] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:07:03.500] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:07:03.507] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:07:03.513] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:07:03.522] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:07:03.529] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:07:03.539] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:07:03.549] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:07:03.557] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:07:03.563] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:07:03.570] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:07:03.576] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:07:03.583] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[14:07:03.589] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:07:03.596] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:07:03.602] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[14:07:03.609] <TB2> INFO: safety margin for low PH: adding 2, margin is now 22
[14:07:03.615] <TB2> INFO: safety margin for low PH: adding 3, margin is now 23
[14:07:03.622] <TB2> INFO: safety margin for low PH: adding 4, margin is now 24
[14:07:03.628] <TB2> INFO: safety margin for low PH: adding 5, margin is now 25
[14:07:03.635] <TB2> INFO: safety margin for low PH: adding 6, margin is now 26
[14:07:03.642] <TB2> INFO: safety margin for low PH: adding 7, margin is now 27
[14:07:03.648] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:07:03.655] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[14:07:03.710] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C0.dat
[14:07:03.710] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C1.dat
[14:07:03.710] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C2.dat
[14:07:03.710] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C3.dat
[14:07:03.710] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C4.dat
[14:07:03.711] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C5.dat
[14:07:03.711] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C6.dat
[14:07:03.711] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C7.dat
[14:07:03.711] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C8.dat
[14:07:03.711] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C9.dat
[14:07:03.712] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C10.dat
[14:07:03.712] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C11.dat
[14:07:03.712] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C12.dat
[14:07:03.712] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C13.dat
[14:07:03.712] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C14.dat
[14:07:03.713] <TB2> INFO: write dac parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//dacParameters35_C15.dat
[14:07:04.031] <TB2> INFO: Expecting 41600 events.
[14:07:08.006] <TB2> INFO: 41600 events read in total (3259ms).
[14:07:08.007] <TB2> INFO: Test took 4289ms.
[14:07:08.630] <TB2> INFO: Expecting 41600 events.
[14:07:12.567] <TB2> INFO: 41600 events read in total (3221ms).
[14:07:12.568] <TB2> INFO: Test took 4248ms.
[14:07:13.221] <TB2> INFO: Expecting 41600 events.
[14:07:17.131] <TB2> INFO: 41600 events read in total (3195ms).
[14:07:17.132] <TB2> INFO: Test took 4221ms.
[14:07:17.462] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:17.595] <TB2> INFO: Expecting 2560 events.
[14:07:18.557] <TB2> INFO: 2560 events read in total (246ms).
[14:07:18.557] <TB2> INFO: Test took 1095ms.
[14:07:18.568] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:19.067] <TB2> INFO: Expecting 2560 events.
[14:07:20.031] <TB2> INFO: 2560 events read in total (248ms).
[14:07:20.031] <TB2> INFO: Test took 1463ms.
[14:07:20.035] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:20.542] <TB2> INFO: Expecting 2560 events.
[14:07:21.509] <TB2> INFO: 2560 events read in total (252ms).
[14:07:21.509] <TB2> INFO: Test took 1475ms.
[14:07:21.512] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:22.019] <TB2> INFO: Expecting 2560 events.
[14:07:22.982] <TB2> INFO: 2560 events read in total (247ms).
[14:07:22.983] <TB2> INFO: Test took 1471ms.
[14:07:22.986] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:23.493] <TB2> INFO: Expecting 2560 events.
[14:07:24.458] <TB2> INFO: 2560 events read in total (250ms).
[14:07:24.459] <TB2> INFO: Test took 1473ms.
[14:07:24.462] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:24.969] <TB2> INFO: Expecting 2560 events.
[14:07:25.933] <TB2> INFO: 2560 events read in total (249ms).
[14:07:25.934] <TB2> INFO: Test took 1472ms.
[14:07:25.937] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:26.443] <TB2> INFO: Expecting 2560 events.
[14:07:27.404] <TB2> INFO: 2560 events read in total (245ms).
[14:07:27.405] <TB2> INFO: Test took 1468ms.
[14:07:27.409] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:27.916] <TB2> INFO: Expecting 2560 events.
[14:07:28.878] <TB2> INFO: 2560 events read in total (246ms).
[14:07:28.879] <TB2> INFO: Test took 1470ms.
[14:07:28.883] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:29.389] <TB2> INFO: Expecting 2560 events.
[14:07:30.351] <TB2> INFO: 2560 events read in total (247ms).
[14:07:30.351] <TB2> INFO: Test took 1468ms.
[14:07:30.354] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:30.861] <TB2> INFO: Expecting 2560 events.
[14:07:31.828] <TB2> INFO: 2560 events read in total (251ms).
[14:07:31.829] <TB2> INFO: Test took 1475ms.
[14:07:31.831] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:32.339] <TB2> INFO: Expecting 2560 events.
[14:07:33.306] <TB2> INFO: 2560 events read in total (252ms).
[14:07:33.306] <TB2> INFO: Test took 1475ms.
[14:07:33.309] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:33.816] <TB2> INFO: Expecting 2560 events.
[14:07:34.781] <TB2> INFO: 2560 events read in total (250ms).
[14:07:34.782] <TB2> INFO: Test took 1473ms.
[14:07:34.785] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:35.291] <TB2> INFO: Expecting 2560 events.
[14:07:36.255] <TB2> INFO: 2560 events read in total (248ms).
[14:07:36.255] <TB2> INFO: Test took 1470ms.
[14:07:36.258] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:36.765] <TB2> INFO: Expecting 2560 events.
[14:07:37.731] <TB2> INFO: 2560 events read in total (250ms).
[14:07:37.732] <TB2> INFO: Test took 1474ms.
[14:07:37.735] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:38.242] <TB2> INFO: Expecting 2560 events.
[14:07:39.205] <TB2> INFO: 2560 events read in total (247ms).
[14:07:39.206] <TB2> INFO: Test took 1471ms.
[14:07:39.209] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:39.716] <TB2> INFO: Expecting 2560 events.
[14:07:40.675] <TB2> INFO: 2560 events read in total (244ms).
[14:07:40.676] <TB2> INFO: Test took 1467ms.
[14:07:40.679] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:41.186] <TB2> INFO: Expecting 2560 events.
[14:07:42.153] <TB2> INFO: 2560 events read in total (251ms).
[14:07:42.154] <TB2> INFO: Test took 1475ms.
[14:07:42.157] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:42.664] <TB2> INFO: Expecting 2560 events.
[14:07:43.631] <TB2> INFO: 2560 events read in total (252ms).
[14:07:43.631] <TB2> INFO: Test took 1474ms.
[14:07:43.634] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:44.142] <TB2> INFO: Expecting 2560 events.
[14:07:45.107] <TB2> INFO: 2560 events read in total (250ms).
[14:07:45.107] <TB2> INFO: Test took 1473ms.
[14:07:45.110] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:45.618] <TB2> INFO: Expecting 2560 events.
[14:07:46.582] <TB2> INFO: 2560 events read in total (248ms).
[14:07:46.582] <TB2> INFO: Test took 1472ms.
[14:07:46.593] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:47.092] <TB2> INFO: Expecting 2560 events.
[14:07:48.054] <TB2> INFO: 2560 events read in total (246ms).
[14:07:48.054] <TB2> INFO: Test took 1461ms.
[14:07:48.058] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:48.564] <TB2> INFO: Expecting 2560 events.
[14:07:49.531] <TB2> INFO: 2560 events read in total (251ms).
[14:07:49.532] <TB2> INFO: Test took 1474ms.
[14:07:49.535] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:50.042] <TB2> INFO: Expecting 2560 events.
[14:07:51.005] <TB2> INFO: 2560 events read in total (248ms).
[14:07:51.005] <TB2> INFO: Test took 1470ms.
[14:07:51.009] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:51.515] <TB2> INFO: Expecting 2560 events.
[14:07:52.479] <TB2> INFO: 2560 events read in total (248ms).
[14:07:52.479] <TB2> INFO: Test took 1470ms.
[14:07:52.483] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:52.989] <TB2> INFO: Expecting 2560 events.
[14:07:53.954] <TB2> INFO: 2560 events read in total (249ms).
[14:07:53.954] <TB2> INFO: Test took 1471ms.
[14:07:53.958] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:54.464] <TB2> INFO: Expecting 2560 events.
[14:07:55.428] <TB2> INFO: 2560 events read in total (249ms).
[14:07:55.428] <TB2> INFO: Test took 1470ms.
[14:07:55.431] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:55.938] <TB2> INFO: Expecting 2560 events.
[14:07:56.906] <TB2> INFO: 2560 events read in total (253ms).
[14:07:56.907] <TB2> INFO: Test took 1476ms.
[14:07:56.910] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:57.417] <TB2> INFO: Expecting 2560 events.
[14:07:58.383] <TB2> INFO: 2560 events read in total (251ms).
[14:07:58.383] <TB2> INFO: Test took 1473ms.
[14:07:58.385] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:07:58.893] <TB2> INFO: Expecting 2560 events.
[14:07:59.856] <TB2> INFO: 2560 events read in total (248ms).
[14:07:59.856] <TB2> INFO: Test took 1471ms.
[14:07:59.860] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:08:00.366] <TB2> INFO: Expecting 2560 events.
[14:08:01.327] <TB2> INFO: 2560 events read in total (246ms).
[14:08:01.328] <TB2> INFO: Test took 1469ms.
[14:08:01.331] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:08:01.838] <TB2> INFO: Expecting 2560 events.
[14:08:02.803] <TB2> INFO: 2560 events read in total (250ms).
[14:08:02.803] <TB2> INFO: Test took 1472ms.
[14:08:02.806] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:08:03.313] <TB2> INFO: Expecting 2560 events.
[14:08:04.276] <TB2> INFO: 2560 events read in total (248ms).
[14:08:04.276] <TB2> INFO: Test took 1470ms.
[14:08:05.052] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 499 seconds
[14:08:05.052] <TB2> INFO: PH scale (per ROC): 67 79 69 67 69 70 71 70 64 69 67 64 69 69 72 75
[14:08:05.052] <TB2> INFO: PH offset (per ROC): 187 180 176 174 191 175 162 175 176 177 184 179 181 176 165 184
[14:08:05.057] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:08:05.057] <TB2> INFO: Decoding statistics:
[14:08:05.057] <TB2> INFO: General information:
[14:08:05.057] <TB2> INFO: 16bit words read: 66440
[14:08:05.057] <TB2> INFO: valid events total: 5120
[14:08:05.057] <TB2> INFO: empty events: 2620
[14:08:05.057] <TB2> INFO: valid events with pixels: 2500
[14:08:05.057] <TB2> INFO: valid pixel hits: 2500
[14:08:05.057] <TB2> INFO: Event errors: 0
[14:08:05.057] <TB2> INFO: start marker: 0
[14:08:05.057] <TB2> INFO: stop marker: 0
[14:08:05.057] <TB2> INFO: overflow: 0
[14:08:05.057] <TB2> INFO: invalid 5bit words: 0
[14:08:05.057] <TB2> INFO: invalid XOR eye diagram: 0
[14:08:05.057] <TB2> INFO: TBM errors: 0
[14:08:05.057] <TB2> INFO: flawed TBM headers: 0
[14:08:05.057] <TB2> INFO: flawed TBM trailers: 0
[14:08:05.057] <TB2> INFO: event ID mismatches: 0
[14:08:05.057] <TB2> INFO: ROC errors: 0
[14:08:05.057] <TB2> INFO: missing ROC header(s): 0
[14:08:05.057] <TB2> INFO: misplaced readback start: 0
[14:08:05.057] <TB2> INFO: Pixel decoding errors: 0
[14:08:05.057] <TB2> INFO: pixel data incomplete: 0
[14:08:05.057] <TB2> INFO: pixel address: 0
[14:08:05.057] <TB2> INFO: pulse height fill bit: 0
[14:08:05.057] <TB2> INFO: buffer corruption: 0
[14:08:05.221] <TB2> INFO: ######################################################################
[14:08:05.221] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[14:08:05.221] <TB2> INFO: ######################################################################
[14:08:05.236] <TB2> INFO: scanning low vcal = 10
[14:08:05.546] <TB2> INFO: Expecting 41600 events.
[14:08:09.327] <TB2> INFO: 41600 events read in total (3065ms).
[14:08:09.328] <TB2> INFO: Test took 4092ms.
[14:08:09.331] <TB2> INFO: scanning low vcal = 20
[14:08:09.837] <TB2> INFO: Expecting 41600 events.
[14:08:13.610] <TB2> INFO: 41600 events read in total (3058ms).
[14:08:13.610] <TB2> INFO: Test took 4279ms.
[14:08:13.614] <TB2> INFO: scanning low vcal = 30
[14:08:14.120] <TB2> INFO: Expecting 41600 events.
[14:08:17.897] <TB2> INFO: 41600 events read in total (3062ms).
[14:08:17.898] <TB2> INFO: Test took 4284ms.
[14:08:17.901] <TB2> INFO: scanning low vcal = 40
[14:08:18.395] <TB2> INFO: Expecting 41600 events.
[14:08:22.673] <TB2> INFO: 41600 events read in total (3563ms).
[14:08:22.673] <TB2> INFO: Test took 4772ms.
[14:08:22.676] <TB2> INFO: scanning low vcal = 50
[14:08:23.119] <TB2> INFO: Expecting 41600 events.
[14:08:27.465] <TB2> INFO: 41600 events read in total (3631ms).
[14:08:27.466] <TB2> INFO: Test took 4790ms.
[14:08:27.469] <TB2> INFO: scanning low vcal = 60
[14:08:27.915] <TB2> INFO: Expecting 41600 events.
[14:08:32.328] <TB2> INFO: 41600 events read in total (3697ms).
[14:08:32.329] <TB2> INFO: Test took 4860ms.
[14:08:32.332] <TB2> INFO: scanning low vcal = 70
[14:08:32.767] <TB2> INFO: Expecting 41600 events.
[14:08:37.143] <TB2> INFO: 41600 events read in total (3661ms).
[14:08:37.144] <TB2> INFO: Test took 4812ms.
[14:08:37.148] <TB2> INFO: scanning low vcal = 80
[14:08:37.594] <TB2> INFO: Expecting 41600 events.
[14:08:41.894] <TB2> INFO: 41600 events read in total (3584ms).
[14:08:41.895] <TB2> INFO: Test took 4747ms.
[14:08:41.899] <TB2> INFO: scanning low vcal = 90
[14:08:42.349] <TB2> INFO: Expecting 41600 events.
[14:08:46.728] <TB2> INFO: 41600 events read in total (3663ms).
[14:08:46.729] <TB2> INFO: Test took 4830ms.
[14:08:46.733] <TB2> INFO: scanning low vcal = 100
[14:08:47.159] <TB2> INFO: Expecting 41600 events.
[14:08:51.617] <TB2> INFO: 41600 events read in total (3743ms).
[14:08:51.617] <TB2> INFO: Test took 4884ms.
[14:08:51.621] <TB2> INFO: scanning low vcal = 110
[14:08:52.069] <TB2> INFO: Expecting 41600 events.
[14:08:56.496] <TB2> INFO: 41600 events read in total (3711ms).
[14:08:56.497] <TB2> INFO: Test took 4876ms.
[14:08:56.501] <TB2> INFO: scanning low vcal = 120
[14:08:56.951] <TB2> INFO: Expecting 41600 events.
[14:09:01.274] <TB2> INFO: 41600 events read in total (3608ms).
[14:09:01.274] <TB2> INFO: Test took 4773ms.
[14:09:01.278] <TB2> INFO: scanning low vcal = 130
[14:09:01.727] <TB2> INFO: Expecting 41600 events.
[14:09:06.034] <TB2> INFO: 41600 events read in total (3592ms).
[14:09:06.035] <TB2> INFO: Test took 4757ms.
[14:09:06.038] <TB2> INFO: scanning low vcal = 140
[14:09:06.485] <TB2> INFO: Expecting 41600 events.
[14:09:10.795] <TB2> INFO: 41600 events read in total (3595ms).
[14:09:10.796] <TB2> INFO: Test took 4758ms.
[14:09:10.800] <TB2> INFO: scanning low vcal = 150
[14:09:11.249] <TB2> INFO: Expecting 41600 events.
[14:09:15.594] <TB2> INFO: 41600 events read in total (3630ms).
[14:09:15.595] <TB2> INFO: Test took 4795ms.
[14:09:15.599] <TB2> INFO: scanning low vcal = 160
[14:09:16.006] <TB2> INFO: Expecting 41600 events.
[14:09:20.387] <TB2> INFO: 41600 events read in total (3665ms).
[14:09:20.388] <TB2> INFO: Test took 4789ms.
[14:09:20.391] <TB2> INFO: scanning low vcal = 170
[14:09:20.828] <TB2> INFO: Expecting 41600 events.
[14:09:25.187] <TB2> INFO: 41600 events read in total (3643ms).
[14:09:25.187] <TB2> INFO: Test took 4796ms.
[14:09:25.192] <TB2> INFO: scanning low vcal = 180
[14:09:25.643] <TB2> INFO: Expecting 41600 events.
[14:09:29.974] <TB2> INFO: 41600 events read in total (3616ms).
[14:09:29.975] <TB2> INFO: Test took 4783ms.
[14:09:29.979] <TB2> INFO: scanning low vcal = 190
[14:09:30.429] <TB2> INFO: Expecting 41600 events.
[14:09:34.742] <TB2> INFO: 41600 events read in total (3597ms).
[14:09:34.743] <TB2> INFO: Test took 4764ms.
[14:09:34.746] <TB2> INFO: scanning low vcal = 200
[14:09:35.194] <TB2> INFO: Expecting 41600 events.
[14:09:39.515] <TB2> INFO: 41600 events read in total (3606ms).
[14:09:39.515] <TB2> INFO: Test took 4769ms.
[14:09:39.529] <TB2> INFO: scanning low vcal = 210
[14:09:39.967] <TB2> INFO: Expecting 41600 events.
[14:09:44.306] <TB2> INFO: 41600 events read in total (3623ms).
[14:09:44.307] <TB2> INFO: Test took 4778ms.
[14:09:44.311] <TB2> INFO: scanning low vcal = 220
[14:09:44.755] <TB2> INFO: Expecting 41600 events.
[14:09:49.091] <TB2> INFO: 41600 events read in total (3621ms).
[14:09:49.092] <TB2> INFO: Test took 4781ms.
[14:09:49.095] <TB2> INFO: scanning low vcal = 230
[14:09:49.521] <TB2> INFO: Expecting 41600 events.
[14:09:53.928] <TB2> INFO: 41600 events read in total (3692ms).
[14:09:53.928] <TB2> INFO: Test took 4833ms.
[14:09:53.932] <TB2> INFO: scanning low vcal = 240
[14:09:54.364] <TB2> INFO: Expecting 41600 events.
[14:09:58.705] <TB2> INFO: 41600 events read in total (3626ms).
[14:09:58.706] <TB2> INFO: Test took 4774ms.
[14:09:58.710] <TB2> INFO: scanning low vcal = 250
[14:09:59.134] <TB2> INFO: Expecting 41600 events.
[14:10:03.498] <TB2> INFO: 41600 events read in total (3649ms).
[14:10:03.498] <TB2> INFO: Test took 4788ms.
[14:10:03.504] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[14:10:03.947] <TB2> INFO: Expecting 41600 events.
[14:10:08.428] <TB2> INFO: 41600 events read in total (3765ms).
[14:10:08.429] <TB2> INFO: Test took 4925ms.
[14:10:08.432] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[14:10:08.849] <TB2> INFO: Expecting 41600 events.
[14:10:13.190] <TB2> INFO: 41600 events read in total (3626ms).
[14:10:13.190] <TB2> INFO: Test took 4758ms.
[14:10:13.194] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[14:10:13.642] <TB2> INFO: Expecting 41600 events.
[14:10:18.027] <TB2> INFO: 41600 events read in total (3670ms).
[14:10:18.028] <TB2> INFO: Test took 4834ms.
[14:10:18.032] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[14:10:18.457] <TB2> INFO: Expecting 41600 events.
[14:10:22.891] <TB2> INFO: 41600 events read in total (3719ms).
[14:10:22.892] <TB2> INFO: Test took 4860ms.
[14:10:22.895] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[14:10:23.334] <TB2> INFO: Expecting 41600 events.
[14:10:27.655] <TB2> INFO: 41600 events read in total (3606ms).
[14:10:27.655] <TB2> INFO: Test took 4760ms.
[14:10:28.127] <TB2> INFO: PixTestGainPedestal::measure() done
[14:11:02.383] <TB2> INFO: PixTestGainPedestal::fit() done
[14:11:02.383] <TB2> INFO: non-linearity mean: 0.956 0.955 0.962 0.964 0.956 0.965 0.965 0.956 0.951 0.959 0.958 0.954 0.955 0.971 0.953 0.953
[14:11:02.383] <TB2> INFO: non-linearity RMS: 0.007 0.009 0.006 0.006 0.007 0.006 0.007 0.006 0.008 0.006 0.007 0.007 0.006 0.004 0.006 0.007
[14:11:02.383] <TB2> INFO: write gain/ped parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[14:11:02.402] <TB2> INFO: write gain/ped parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[14:11:02.420] <TB2> INFO: write gain/ped parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[14:11:02.438] <TB2> INFO: write gain/ped parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[14:11:02.456] <TB2> INFO: write gain/ped parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[14:11:02.474] <TB2> INFO: write gain/ped parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[14:11:02.492] <TB2> INFO: write gain/ped parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[14:11:02.510] <TB2> INFO: write gain/ped parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[14:11:02.528] <TB2> INFO: write gain/ped parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[14:11:02.545] <TB2> INFO: write gain/ped parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[14:11:02.563] <TB2> INFO: write gain/ped parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[14:11:02.581] <TB2> INFO: write gain/ped parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[14:11:02.599] <TB2> INFO: write gain/ped parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[14:11:02.617] <TB2> INFO: write gain/ped parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[14:11:02.635] <TB2> INFO: write gain/ped parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[14:11:02.653] <TB2> INFO: write gain/ped parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[14:11:02.672] <TB2> INFO: PixTestGainPedestal::fullTest() done, duration: 177 seconds
[14:11:02.672] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:11:02.672] <TB2> INFO: Decoding statistics:
[14:11:02.672] <TB2> INFO: General information:
[14:11:02.672] <TB2> INFO: 16bit words read: 2329224
[14:11:02.672] <TB2> INFO: valid events total: 83200
[14:11:02.672] <TB2> INFO: empty events: 0
[14:11:02.672] <TB2> INFO: valid events with pixels: 83200
[14:11:02.672] <TB2> INFO: valid pixel hits: 665412
[14:11:02.672] <TB2> INFO: Event errors: 0
[14:11:02.672] <TB2> INFO: start marker: 0
[14:11:02.672] <TB2> INFO: stop marker: 0
[14:11:02.672] <TB2> INFO: overflow: 0
[14:11:02.672] <TB2> INFO: invalid 5bit words: 0
[14:11:02.672] <TB2> INFO: invalid XOR eye diagram: 0
[14:11:02.672] <TB2> INFO: TBM errors: 0
[14:11:02.672] <TB2> INFO: flawed TBM headers: 0
[14:11:02.672] <TB2> INFO: flawed TBM trailers: 0
[14:11:02.672] <TB2> INFO: event ID mismatches: 0
[14:11:02.672] <TB2> INFO: ROC errors: 0
[14:11:02.672] <TB2> INFO: missing ROC header(s): 0
[14:11:02.672] <TB2> INFO: misplaced readback start: 0
[14:11:02.672] <TB2> INFO: Pixel decoding errors: 0
[14:11:02.672] <TB2> INFO: pixel data incomplete: 0
[14:11:02.672] <TB2> INFO: pixel address: 0
[14:11:02.672] <TB2> INFO: pulse height fill bit: 0
[14:11:02.672] <TB2> INFO: buffer corruption: 0
[14:11:02.678] <TB2> INFO: readReadbackCal: /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C0.dat .. /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C15.dat
[14:11:02.679] <TB2> INFO: ######################################################################
[14:11:02.679] <TB2> INFO: PixTestReadback::doTest()
[14:11:02.679] <TB2> INFO: ######################################################################
[14:11:02.680] <TB2> INFO: PixTestReadback::RES sent once
[14:11:14.024] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C0.dat
[14:11:14.024] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C1.dat
[14:11:14.024] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C2.dat
[14:11:14.024] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C3.dat
[14:11:14.024] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C4.dat
[14:11:14.025] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C5.dat
[14:11:14.025] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C6.dat
[14:11:14.025] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C7.dat
[14:11:14.025] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C8.dat
[14:11:14.025] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C9.dat
[14:11:14.025] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C10.dat
[14:11:14.025] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C11.dat
[14:11:14.025] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C12.dat
[14:11:14.025] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C13.dat
[14:11:14.025] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C14.dat
[14:11:14.025] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C15.dat
[14:11:14.073] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[14:11:14.074] <TB2> INFO: PixTestReadback::RES sent once
[14:11:25.326] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C0.dat
[14:11:25.327] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C1.dat
[14:11:25.327] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C2.dat
[14:11:25.327] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C3.dat
[14:11:25.327] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C4.dat
[14:11:25.327] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C5.dat
[14:11:25.327] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C6.dat
[14:11:25.327] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C7.dat
[14:11:25.327] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C8.dat
[14:11:25.327] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C9.dat
[14:11:25.327] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C10.dat
[14:11:25.327] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C11.dat
[14:11:25.328] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C12.dat
[14:11:25.328] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C13.dat
[14:11:25.328] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C14.dat
[14:11:25.328] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C15.dat
[14:11:25.374] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[14:11:25.375] <TB2> INFO: PixTestReadback::RES sent once
[14:11:34.017] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[14:11:34.017] <TB2> INFO: Vbg will be calibrated using Vd calibration
[14:11:34.017] <TB2> INFO: /*/*/*/*::: ROC 0: uncalibrated Vbg = 146.7calibrated Vbg = 1.21293 :::*/*/*/*/
[14:11:34.017] <TB2> INFO: /*/*/*/*::: ROC 1: uncalibrated Vbg = 156calibrated Vbg = 1.20807 :::*/*/*/*/
[14:11:34.017] <TB2> INFO: /*/*/*/*::: ROC 2: uncalibrated Vbg = 157.1calibrated Vbg = 1.21379 :::*/*/*/*/
[14:11:34.017] <TB2> INFO: /*/*/*/*::: ROC 3: uncalibrated Vbg = 160.8calibrated Vbg = 1.22333 :::*/*/*/*/
[14:11:34.018] <TB2> INFO: /*/*/*/*::: ROC 4: uncalibrated Vbg = 161.2calibrated Vbg = 1.22829 :::*/*/*/*/
[14:11:34.018] <TB2> INFO: /*/*/*/*::: ROC 5: uncalibrated Vbg = 152.4calibrated Vbg = 1.23114 :::*/*/*/*/
[14:11:34.018] <TB2> INFO: /*/*/*/*::: ROC 6: uncalibrated Vbg = 146.3calibrated Vbg = 1.23361 :::*/*/*/*/
[14:11:34.018] <TB2> INFO: /*/*/*/*::: ROC 7: uncalibrated Vbg = 158.3calibrated Vbg = 1.23407 :::*/*/*/*/
[14:11:34.018] <TB2> INFO: /*/*/*/*::: ROC 8: uncalibrated Vbg = 152.2calibrated Vbg = 1.22808 :::*/*/*/*/
[14:11:34.018] <TB2> INFO: /*/*/*/*::: ROC 9: uncalibrated Vbg = 158.6calibrated Vbg = 1.22631 :::*/*/*/*/
[14:11:34.018] <TB2> INFO: /*/*/*/*::: ROC 10: uncalibrated Vbg = 154.9calibrated Vbg = 1.222 :::*/*/*/*/
[14:11:34.018] <TB2> INFO: /*/*/*/*::: ROC 11: uncalibrated Vbg = 159.7calibrated Vbg = 1.21716 :::*/*/*/*/
[14:11:34.018] <TB2> INFO: /*/*/*/*::: ROC 12: uncalibrated Vbg = 162.8calibrated Vbg = 1.21583 :::*/*/*/*/
[14:11:34.018] <TB2> INFO: /*/*/*/*::: ROC 13: uncalibrated Vbg = 160.8calibrated Vbg = 1.2108 :::*/*/*/*/
[14:11:34.018] <TB2> INFO: /*/*/*/*::: ROC 14: uncalibrated Vbg = 156.5calibrated Vbg = 1.21404 :::*/*/*/*/
[14:11:34.018] <TB2> INFO: /*/*/*/*::: ROC 15: uncalibrated Vbg = 161.1calibrated Vbg = 1.21562 :::*/*/*/*/
[14:11:34.021] <TB2> INFO: PixTestReadback::RES sent once
[14:14:28.841] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C0.dat
[14:14:28.841] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C1.dat
[14:14:28.841] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C2.dat
[14:14:28.842] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C3.dat
[14:14:28.842] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C4.dat
[14:14:28.842] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C5.dat
[14:14:28.842] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C6.dat
[14:14:28.842] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C7.dat
[14:14:28.842] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C8.dat
[14:14:28.842] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C9.dat
[14:14:28.842] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C10.dat
[14:14:28.842] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C11.dat
[14:14:28.843] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C12.dat
[14:14:28.843] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C13.dat
[14:14:28.843] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C14.dat
[14:14:28.843] <TB2> INFO: write readback calibration parameters into /usr/local/data/M3022_Fulltest17_2015-10-26_13h47m_1445863656//000_FulltestPxar_p17//readbackCal_C15.dat
[14:14:28.888] <TB2> INFO: PixTestPattern:: pg_setup set to default.
[14:14:28.889] <TB2> INFO: PixTestReadback::doTest() done
[14:14:28.889] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:28.889] <TB2> INFO: Decoding statistics:
[14:14:28.889] <TB2> INFO: General information:
[14:14:28.889] <TB2> INFO: 16bit words read: 768
[14:14:28.889] <TB2> INFO: valid events total: 64
[14:14:28.889] <TB2> INFO: empty events: 64
[14:14:28.890] <TB2> INFO: valid events with pixels: 0
[14:14:28.890] <TB2> INFO: valid pixel hits: 0
[14:14:28.890] <TB2> INFO: Event errors: 0
[14:14:28.890] <TB2> INFO: start marker: 0
[14:14:28.890] <TB2> INFO: stop marker: 0
[14:14:28.890] <TB2> INFO: overflow: 0
[14:14:28.890] <TB2> INFO: invalid 5bit words: 0
[14:14:28.890] <TB2> INFO: invalid XOR eye diagram: 0
[14:14:28.890] <TB2> INFO: TBM errors: 0
[14:14:28.890] <TB2> INFO: flawed TBM headers: 0
[14:14:28.890] <TB2> INFO: flawed TBM trailers: 0
[14:14:28.890] <TB2> INFO: event ID mismatches: 0
[14:14:28.890] <TB2> INFO: ROC errors: 0
[14:14:28.890] <TB2> INFO: missing ROC header(s): 0
[14:14:28.890] <TB2> INFO: misplaced readback start: 0
[14:14:28.890] <TB2> INFO: Pixel decoding errors: 0
[14:14:28.890] <TB2> INFO: pixel data incomplete: 0
[14:14:28.890] <TB2> INFO: pixel address: 0
[14:14:28.890] <TB2> INFO: pulse height fill bit: 0
[14:14:28.890] <TB2> INFO: buffer corruption: 0
[14:14:28.910] <TB2> INFO: Decoding statistics:
[14:14:28.910] <TB2> INFO: General information:
[14:14:28.910] <TB2> INFO: 16bit words read: 2396432
[14:14:28.910] <TB2> INFO: valid events total: 88384
[14:14:28.910] <TB2> INFO: empty events: 2684
[14:14:28.910] <TB2> INFO: valid events with pixels: 85700
[14:14:28.910] <TB2> INFO: valid pixel hits: 667912
[14:14:28.910] <TB2> INFO: Event errors: 0
[14:14:28.910] <TB2> INFO: start marker: 0
[14:14:28.910] <TB2> INFO: stop marker: 0
[14:14:28.910] <TB2> INFO: overflow: 0
[14:14:28.910] <TB2> INFO: invalid 5bit words: 0
[14:14:28.910] <TB2> INFO: invalid XOR eye diagram: 0
[14:14:28.910] <TB2> INFO: TBM errors: 0
[14:14:28.910] <TB2> INFO: flawed TBM headers: 0
[14:14:28.910] <TB2> INFO: flawed TBM trailers: 0
[14:14:28.910] <TB2> INFO: event ID mismatches: 0
[14:14:28.910] <TB2> INFO: ROC errors: 0
[14:14:28.910] <TB2> INFO: missing ROC header(s): 0
[14:14:28.910] <TB2> INFO: misplaced readback start: 0
[14:14:28.910] <TB2> INFO: Pixel decoding errors: 0
[14:14:28.910] <TB2> INFO: pixel data incomplete: 0
[14:14:28.910] <TB2> INFO: pixel address: 0
[14:14:28.910] <TB2> INFO: pulse height fill bit: 0
[14:14:28.910] <TB2> INFO: buffer corruption: 0
[14:14:28.910] <TB2> INFO: enter test to run
[14:14:28.910] <TB2> INFO: test: exit no parameter change
[14:14:29.119] <TB2> QUIET: Connection to board 162 closed.
[14:14:29.199] <TB2> INFO: pXar: this is the end, my friend
MoReWeb-v0.6.7-11-ga66536c on branch psi46master