Module | Module | M2104 | |
Grade | Grade | A | |
ElectricalGrade | Electrical Grade | A | |
IVGrade | IV Grade | None | |
ManualGrade | Manual Grade | None | |
PixelDefects | Pixel Defects - A/B/C | 15 - 16/0/0 | |
DeadPixels | Dead Pixels | 0 | |
AddressProblems | Address Problems | 0 | |
ThresholdDefects | Threshold Defects | 0 | |
MaskDefects | Mask Defects | 0 | |
DeadBumps | Dead Bumps | 14 | |
NoisyPixels | Noise Defects | 1 | |
TrimProblems | Trim Problems | 0 | |
PHGainDefects | PH Gain Defects | 0 | |
PHPar1Defects | PH Parameter1 Defects | 0 |
TestCenter | Test Center | ETH | |
TestDate | Test Date | 2015-09-10 | |
TestTime | Test Time | 11:04 | |
TestDuration | Duration | 1:25:38 | |
TempC | Temparature | -20 | °C |
TBM1 | TBM1 | ok, 0x00 0xed | |
TBM2 | TBM2 | ok, 0x00 0xed | |
PxarVersion | pXar | prod-10+24 g09f6d2c | |
DTB_FW | DTB FW | 4.5 | |
ModuleIa | Module Ia | 388.3 | mA |
Noise | Noise | 114.67 | e |
NoiseROCs | Noise grades | 16/0/0 | |
VcalThrWidth | Vcal Thr. Width | 42.28 | e |
VcalThrWidthROCs | Vcal Thr. W. grades | 16/0/0 | |
RelGainWidth | Rel. Gain Width | 0.03 | % |
RelGainWidthROCs | Rel. Gain W. grades | 16/0/0 | |
PedestalSpread | Pedestal Spread | 1019.38 | e |
PedestalSpreadROCs | Ped. Spread grades | 16/0/0 | |
Parameter1 | Parameter1 | 0.71 | |
Parameter1ROCs | Par1 grades | 16/0/0 |
Duration | Duration | 1:25:38 | |
MinCurrent | min. Current | 0.375 | A |
MaxCurrent | max. Current | 0.532 | A |
Duration | Duration | 1:25:38 | |
MinCurrent | min. Current | 0.068 | A |
MaxCurrent | max. Current | 0.392 | A |
ModuleIa | Module Ia | 388.3 | mA |
Temperature | Temp. while test | -20.00 +/- 0.01 | °C |
Duration | Duration of test | 1:54:41 |
ROC | Grade | Total | Dead | Mask | Bumps | Trim(Bits) | Address | Noise | Thresh | Gain | Ped | Par1 | Mean noise | Thr [e-] | Thr width | Rel gain width | Ped spread |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Chip 0 |
A
|
2
|
0
|
0
|
1
|
0
|
0
|
1
|
0
|
0
|
0
|
0
|
115.60
|
1752 |
46
|
0.040
|
901
|
Chip 1 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
117.80
|
1751 |
42
|
0.032
|
1094
|
Chip 2 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
115.86
|
1750 |
41
|
0.040
|
1114
|
Chip 3 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
114.60
|
1748 |
42
|
0.028
|
1069
|
Chip 4 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
121.06
|
1750 |
42
|
0.029
|
1142
|
Chip 5 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
105.22
|
1746 |
42
|
0.035
|
1075
|
Chip 6 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
99.74
|
1748 |
42
|
0.028
|
934
|
Chip 7 |
A
|
1
|
0
|
0
|
1
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
114.78
|
1748 |
41
|
0.031
|
1263
|
Chip 8 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
117.13
|
1746 |
41
|
0.035
|
933
|
Chip 9 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
100.19
|
1750 |
42
|
0.037
|
1066
|
Chip 10 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
123.53
|
1750 |
42
|
0.030
|
976
|
Chip 11 |
A
|
1
|
0
|
0
|
1
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
126.19
|
1750 |
44
|
0.040
|
926
|
Chip 12 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
96.98
|
1749 |
42
|
0.032
|
1050
|
Chip 13 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
106.46
|
1748 |
40
|
0.029
|
789
|
Chip 14 |
A
|
4
|
0
|
0
|
4
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
132.29
|
1749 |
44
|
0.031
|
1076
|
Chip 15 |
A
|
7
|
0
|
0
|
7
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
127.33
|
1746 |
42
|
0.034
|
901
|
ModifiedGrading | Modified Grading | True | |
GradingParameters_leakageCurrentRatioB | leakageCurrentRatioB | 20 => -111 |
nTBMs | n | 1 | |
TBMType | Type | tbm09c | |
Core0a_basea | Core 0a base a | 0xed | |
Core0a_basee | Core 0a base e | 0x00 | |
Core0b_basea | Core 0b base a | 0xed | |
Core0b_basee | Core 0b base e | 0x00 | |
RocDelay_Ch0 | Roc Delay Ch0 | 5 | |
RocDelay_Ch1 | Roc Delay Ch1 | 5 | |
RocDelay_Ch2 | Roc Delay Ch2 | 5 | |
RocDelay_Ch3 | Roc Delay Ch3 | 5 | |
Phase400 | Phase 400 | 0 | |
Phase160 | Phase 160 | 0 |
nCriticals | # Criticals | 0 | |
nErrors | # Errors | 0 | |
nWarnings | # Warnings | 0 | |
channel_0_count | Channel 0 | 0 | |
channel_1_count | Channel 1 | 0 | |
channel_2_count | Channel 2 | 0 | |
channel_3_count | Channel 3 | 0 |