Module | Module | M2101 | |
Grade | Grade | A | |
ElectricalGrade | Electrical Grade | A | |
IVGrade | IV Grade | None | |
ManualGrade | Manual Grade | None | |
PixelDefects | Pixel Defects - A/B/C | 31 - 16/0/0 | |
DeadPixels | Dead Pixels | 2 | |
AddressProblems | Address Problems | 0 | |
ThresholdDefects | Threshold Defects | 0 | |
MaskDefects | Mask Defects | 0 | |
DeadBumps | Dead Bumps | 29 | |
NoisyPixels | Noise Defects | 0 | |
TrimProblems | Trim Problems | 0 | |
PHGainDefects | PH Gain Defects | 0 | |
PHPar1Defects | PH Parameter1 Defects | 0 |
TestCenter | Test Center | ETH | |
TestDate | Test Date | 2015-09-02 | |
TestTime | Test Time | 10:55 | |
TestDuration | Duration | 1:43:44 | |
TempC | Temparature | -20 | °C |
TBM1 | TBM1 | ok, 0x34 0x64 | |
TBM2 | TBM2 | ok, 0x00 0x64 | |
PxarVersion | pXar | prod-10 | |
DTB_FW | DTB FW | 4.4 | |
ModuleIa | Module Ia | 383.5 | mA |
Noise | Noise | 112.84 | e |
NoiseROCs | Noise grades | 16/0/0 | |
VcalThrWidth | Vcal Thr. Width | 35.84 | e |
VcalThrWidthROCs | Vcal Thr. W. grades | 16/0/0 | |
RelGainWidth | Rel. Gain Width | 0.03 | % |
RelGainWidthROCs | Rel. Gain W. grades | 16/0/0 | |
PedestalSpread | Pedestal Spread | 1097.72 | e |
PedestalSpreadROCs | Ped. Spread grades | 16/0/0 | |
Parameter1 | Parameter1 | 0.68 | |
Parameter1ROCs | Par1 grades | 16/0/0 |
Duration | Duration | 1:43:44 | |
MinCurrent | min. Current | 0.379 | A |
MaxCurrent | max. Current | 0.486 | A |
Duration | Duration | 1:43:44 | |
MinCurrent | min. Current | 0.072 | A |
MaxCurrent | max. Current | 0.387 | A |
ModuleIa | Module Ia | 383.5 | mA |
Temperature | Temp. while test | -20.00 +/- 0.02 | °C |
Duration | Duration of test | 2:00:13 |
ROC | Grade | Total | Dead | Mask | Bumps | Trim(Bits) | Address | Noise | Thresh | Gain | Ped | Par1 | Mean noise | Thr [e-] | Thr width | Rel gain width | Ped spread |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Chip 0 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
119.88
|
1752 |
40
|
0.030
|
1297
|
Chip 1 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
106.43
|
1750 |
35
|
0.034
|
1108
|
Chip 2 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
105.52
|
1748 |
37
|
0.032
|
1007
|
Chip 3 |
A
|
6
|
2
|
0
|
4
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
101.76
|
1748 |
34
|
0.033
|
1116
|
Chip 4 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
102.13
|
1749 |
35
|
0.033
|
1240
|
Chip 5 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
108.01
|
1748 |
34
|
0.030
|
994
|
Chip 6 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
132.81
|
1750 |
38
|
0.036
|
1239
|
Chip 7 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
136.02
|
1748 |
40
|
0.032
|
1002
|
Chip 8 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
117.57
|
1750 |
36
|
0.033
|
1084
|
Chip 9 |
A
|
1
|
0
|
0
|
1
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
116.72
|
1750 |
37
|
0.042
|
1030
|
Chip 10 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
105.21
|
1749 |
36
|
0.033
|
1185
|
Chip 11 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
112.58
|
1748 |
36
|
0.031
|
1080
|
Chip 12 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
114.30
|
1749 |
34
|
0.034
|
992
|
Chip 13 |
A
|
2
|
0
|
0
|
2
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
101.67
|
1750 |
34
|
0.030
|
1080
|
Chip 14 |
A
|
1
|
0
|
0
|
1
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
102.96
|
1750 |
34
|
0.031
|
1170
|
Chip 15 |
A
|
21
|
0
|
0
|
21
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
121.83
|
1748 |
34
|
0.029
|
938
|
ModifiedGrading | Modified Grading | True | |
GradingParameters_leakageCurrentRatioB | leakageCurrentRatioB | 20 => -111 |
nTBMs | n | 1 | |
TBMType | Type | tbm09c | |
Core0a_basea | Core 0a base a | 0x64 | |
Core0a_basee | Core 0a base e | 0x34 | |
Core0b_basea | Core 0b base a | 0x64 | |
Core0b_basee | Core 0b base e | 0x00 | |
RocDelay_Ch0 | Roc Delay Ch0 | 4 | |
RocDelay_Ch1 | Roc Delay Ch1 | 4 | |
RocDelay_Ch2 | Roc Delay Ch2 | 4 | |
RocDelay_Ch3 | Roc Delay Ch3 | 4 | |
Phase400 | Phase 400 | 5 | |
Phase160 | Phase 160 | 1 |
nCriticals | # Criticals | 0 | |
nErrors | # Errors | 0 | |
nWarnings | # Warnings | 0 | |
channel_0_count | Channel 0 | 0 | |
channel_1_count | Channel 1 | 0 | |
channel_2_count | Channel 2 | 0 | |
channel_3_count | Channel 3 | 0 |