Module | Module | M2069 | |
Grade | Grade | A | |
ElectricalGrade | Electrical Grade | A | |
IVGrade | IV Grade | None | |
ManualGrade | Manual Grade | None | |
PixelDefects | Pixel Defects - A/B/C | 10 - 16/0/0 | |
DeadPixels | Dead Pixels | 2 | |
AddressProblems | Address Problems | 0 | |
ThresholdDefects | Threshold Defects | 6 | |
MaskDefects | Mask Defects | 0 | |
DeadBumps | Dead Bumps | 0 | |
NoisyPixels | Noise Defects | 2 | |
TrimProblems | Trim Problems | 0 | |
PHGainDefects | PH Gain Defects | 0 | |
PHPar1Defects | PH Parameter1 Defects | 0 |
TestCenter | Test Center | ETH | |
TestDate | Test Date | 2015-09-21 | |
TestTime | Test Time | 09:54 | |
TestDuration | Duration | 1:21:31 | |
TempC | Temparature | -20 | °C |
TBM1 | TBM1 | ok, 0xf0 0xe4 | |
TBM2 | TBM2 | ok, 0x00 0xe4 | |
PxarVersion | pXar | prod-11 | |
DTB_FW | DTB FW | 4.4 | |
ModuleIa | Module Ia | 384.3 | mA |
Noise | Noise | 118.19 | e |
NoiseROCs | Noise grades | 16/0/0 | |
VcalThrWidth | Vcal Thr. Width | 45.81 | e |
VcalThrWidthROCs | Vcal Thr. W. grades | 16/0/0 | |
RelGainWidth | Rel. Gain Width | 0.03 | % |
RelGainWidthROCs | Rel. Gain W. grades | 16/0/0 | |
PedestalSpread | Pedestal Spread | 1100.47 | e |
PedestalSpreadROCs | Ped. Spread grades | 16/0/0 | |
Parameter1 | Parameter1 | 0.66 | |
Parameter1ROCs | Par1 grades | 16/0/0 |
Duration | Duration | 1:21:31 | |
MinCurrent | min. Current | 0.376 | A |
MaxCurrent | max. Current | 0.541 | A |
Duration | Duration | 1:21:31 | |
MinCurrent | min. Current | 0.078 | A |
MaxCurrent | max. Current | 0.388 | A |
ModuleIa | Module Ia | 384.3 | mA |
Temperature | Temp. while test | 0.00 +/- 0.00 | °C |
Duration | Duration of test | 0:00:00 |
ROC | Grade | Total | Dead | Mask | Bumps | Trim(Bits) | Address | Noise | Thresh | Gain | Ped | Par1 | Mean noise | Thr [e-] | Thr width | Rel gain width | Ped spread |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Chip 0 |
A
|
1
|
0
|
0
|
0
|
0
|
0
|
1
|
0
|
0
|
0
|
0
|
108.70
|
1750 |
44
|
0.028
|
1144
|
Chip 1 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
125.74
|
1750 |
46
|
0.033
|
1081
|
Chip 2 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
125.19
|
1750 |
49
|
0.036
|
1084
|
Chip 3 |
A
|
1
|
1
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
131.46
|
1749 |
48
|
0.035
|
1080
|
Chip 4 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
117.51
|
1750 |
46
|
0.048
|
1229
|
Chip 5 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
130.20
|
1748 |
48
|
0.038
|
1193
|
Chip 6 |
A
|
4
|
0
|
0
|
0
|
0
|
0
|
0
|
4
|
0
|
0
|
0
|
125.99
|
1755 |
57
|
0.032
|
1171
|
Chip 7 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
95.61
|
1750 |
44
|
0.026
|
891
|
Chip 8 |
A
|
1
|
1
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
117.67
|
1751 |
44
|
0.042
|
1159
|
Chip 9 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
125.09
|
1748 |
41
|
0.034
|
1090
|
Chip 10 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
120.95
|
1749 |
46
|
0.033
|
1122
|
Chip 11 |
A
|
1
|
0
|
0
|
0
|
0
|
0
|
1
|
0
|
0
|
0
|
0
|
103.36
|
1752 |
42
|
0.035
|
1156
|
Chip 12 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
125.74
|
1750 |
44
|
0.029
|
1024
|
Chip 13 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
113.60
|
1748 |
43
|
0.032
|
1038
|
Chip 14 |
A
|
2
|
0
|
0
|
0
|
0
|
0
|
0
|
2
|
0
|
0
|
0
|
120.25
|
1748 |
46
|
0.032
|
1054
|
Chip 15 |
A
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
0
|
103.92
|
1749 |
44
|
0.034
|
1090
|
ModifiedGrading | Modified Grading | True | |
GradingParameters_leakageCurrentRatioB | leakageCurrentRatioB | 20 => -111 |
nTBMs | n | 1 | |
TBMType | Type | tbm09c | |
Core0a_basea | Core 0a base a | 0xe4 | |
Core0a_basee | Core 0a base e | 0xf0 | |
Core0b_basea | Core 0b base a | 0xe4 | |
Core0b_basee | Core 0b base e | 0x00 | |
RocDelay_Ch0 | Roc Delay Ch0 | 4 | |
RocDelay_Ch1 | Roc Delay Ch1 | 4 | |
RocDelay_Ch2 | Roc Delay Ch2 | 4 | |
RocDelay_Ch3 | Roc Delay Ch3 | 4 | |
Phase400 | Phase 400 | 4 | |
Phase160 | Phase 160 | 7 |
nCriticals | # Criticals | 0 | |
nErrors | # Errors | 0 | |
nWarnings | # Warnings | 0 | |
channel_0_count | Channel 0 | 0 | |
channel_1_count | Channel 1 | 0 | |
channel_2_count | Channel 2 | 0 | |
channel_3_count | Channel 3 | 0 |