Test Date: 2015-07-28 10:11
Analysis date: 2016-05-25 23:32
Logfile
LogfileView
[11:31:23.950] <TB2> INFO: *** Welcome to pxar ***
[11:31:23.950] <TB2> INFO: *** Today: 2015/07/28
[11:31:23.950] <TB2> INFO: readRocDacs: /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C15.dat
[11:31:23.951] <TB2> INFO: readTbmDacs: /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//tbmParameters_C0b.dat
[11:31:23.951] <TB2> INFO: readMaskFile: /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//defaultMaskFile.dat
[11:31:23.951] <TB2> INFO: readTrimFile: /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters_C15.dat
[11:31:24.052] <TB2> INFO: clk: 4
[11:31:24.052] <TB2> INFO: ctr: 4
[11:31:24.052] <TB2> INFO: sda: 19
[11:31:24.052] <TB2> INFO: tin: 9
[11:31:24.052] <TB2> INFO: level: 15
[11:31:24.052] <TB2> INFO: triggerdelay: 0
[11:31:24.052] <TB2> QUIET: Instanciating API for pxar v2.2.5+46~gdbe75a1
[11:31:24.052] <TB2> INFO: Log level: INFO
[11:31:24.060] <TB2> INFO: Found DTB DTB_WXC55Z
[11:31:24.072] <TB2> QUIET: Connection to board DTB_WXC55Z opened.
[11:31:24.075] <TB2> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 156
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXC55Z
MAC address: 40D85511809C
Hostname: pixelDTB156
Comment:
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[11:31:24.078] <TB2> INFO: RPC call hashes of host and DTB match: 447413373
[11:31:25.636] <TB2> INFO: DUT info:
[11:31:25.636] <TB2> INFO: The DUT currently contains the following objects:
[11:31:25.636] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[11:31:25.636] <TB2> INFO: TBM Core alpha (0): 7 registers set
[11:31:25.636] <TB2> INFO: TBM Core beta (1): 7 registers set
[11:31:25.636] <TB2> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[11:31:25.636] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:25.636] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:25.636] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:25.636] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:25.636] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:25.636] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:25.636] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:25.636] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:25.636] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:25.636] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:25.637] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:25.637] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:25.637] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:25.637] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:25.637] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:25.637] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:31:26.038] <TB2> INFO: enter 'restricted' command line mode
[11:31:26.038] <TB2> INFO: enter test to run
[11:31:26.038] <TB2> INFO: test: pretest no parameter change
[11:31:26.038] <TB2> INFO: running: pretest
[11:31:26.044] <TB2> INFO: ######################################################################
[11:31:26.044] <TB2> INFO: PixTestPretest::doTest()
[11:31:26.044] <TB2> INFO: ######################################################################
[11:31:26.046] <TB2> INFO: ----------------------------------------------------------------------
[11:31:26.046] <TB2> INFO: PixTestPretest::programROC()
[11:31:26.046] <TB2> INFO: ----------------------------------------------------------------------
[11:31:44.063] <TB2> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:31:44.063] <TB2> INFO: IA differences per ROC: 19.3 20.1 19.3 19.3 19.3 18.5 20.1 18.5 20.9 19.3 19.3 17.7 20.9 18.5 20.1 19.3
[11:31:44.139] <TB2> INFO: ----------------------------------------------------------------------
[11:31:44.139] <TB2> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:31:44.139] <TB2> INFO: ----------------------------------------------------------------------
[11:31:48.408] <TB2> INFO: PixTestPretest::setVana() done, Module Ia 392.3 mA = 24.5187 mA/ROC
[11:31:48.411] <TB2> INFO: ----------------------------------------------------------------------
[11:31:48.411] <TB2> INFO: PixTestPretest::findWorkingPixel()
[11:31:48.412] <TB2> INFO: ----------------------------------------------------------------------
[11:31:57.239] <TB2> INFO: Test took 8822ms.
[11:31:57.522] <TB2> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:31:57.552] <TB2> INFO: ----------------------------------------------------------------------
[11:31:57.554] <TB2> INFO: PixTestPretest::setVthrCompCalDel()
[11:31:57.554] <TB2> INFO: ----------------------------------------------------------------------
[11:32:06.770] <TB2> INFO: Test took 9213ms.
[11:32:07.069] <TB2> INFO: PixTestPretest::setVthrCompCalDel() done
[11:32:07.069] <TB2> INFO: CalDel: 133 157 144 145 136 143 150 148 156 143 143 135 115 162 130 140
[11:32:07.069] <TB2> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[11:32:07.072] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C0.dat
[11:32:07.072] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C1.dat
[11:32:07.072] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C2.dat
[11:32:07.073] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C3.dat
[11:32:07.073] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C4.dat
[11:32:07.073] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C5.dat
[11:32:07.073] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C6.dat
[11:32:07.073] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C7.dat
[11:32:07.073] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C8.dat
[11:32:07.073] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C9.dat
[11:32:07.073] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C10.dat
[11:32:07.073] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C11.dat
[11:32:07.073] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C12.dat
[11:32:07.074] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C13.dat
[11:32:07.074] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C14.dat
[11:32:07.074] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters_C15.dat
[11:32:07.074] <TB2> INFO: PixTestPretest::doTest() done, duration: 41 seconds
[11:32:07.172] <TB2> INFO: enter test to run
[11:32:07.172] <TB2> INFO: test: fulltest no parameter change
[11:32:07.172] <TB2> INFO: running: fulltest
[11:32:07.173] <TB2> INFO: ######################################################################
[11:32:07.173] <TB2> INFO: PixTestFullTest::doTest()
[11:32:07.173] <TB2> INFO: ######################################################################
[11:32:07.174] <TB2> INFO: ######################################################################
[11:32:07.174] <TB2> INFO: PixTestAlive::doTest()
[11:32:07.174] <TB2> INFO: ######################################################################
[11:32:07.175] <TB2> INFO: ----------------------------------------------------------------------
[11:32:07.176] <TB2> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:32:07.176] <TB2> INFO: ----------------------------------------------------------------------
[11:32:10.997] <TB2> INFO: Test took 3820ms.
[11:32:11.017] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:11.243] <TB2> INFO: PixTestAlive::aliveTest() done
[11:32:11.243] <TB2> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
[11:32:11.245] <TB2> INFO: ----------------------------------------------------------------------
[11:32:11.245] <TB2> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:32:11.245] <TB2> INFO: ----------------------------------------------------------------------
[11:32:14.005] <TB2> INFO: Test took 2759ms.
[11:32:14.007] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:14.010] <TB2> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:32:14.223] <TB2> INFO: PixTestAlive::maskTest() done
[11:32:14.223] <TB2> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:32:14.225] <TB2> INFO: ----------------------------------------------------------------------
[11:32:14.225] <TB2> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:32:14.225] <TB2> INFO: ----------------------------------------------------------------------
[11:32:17.736] <TB2> INFO: Test took 3510ms.
[11:32:17.760] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:17.984] <TB2> INFO: PixTestAlive::addressDecodingTest() done
[11:32:17.984] <TB2> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:32:17.984] <TB2> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[11:32:17.993] <TB2> INFO: ######################################################################
[11:32:17.993] <TB2> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:32:17.993] <TB2> INFO: ######################################################################
[11:32:17.996] <TB2> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[11:32:18.009] <TB2> INFO: dacScan step from 0 .. 29
[11:32:40.684] <TB2> INFO: Test took 22675ms.
[11:32:40.717] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:40.717] <TB2> INFO: dacScan step from 30 .. 59
[11:33:07.268] <TB2> INFO: Test took 26551ms.
[11:33:07.410] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:33:07.430] <TB2> INFO: dacScan step from 60 .. 89
[11:33:39.267] <TB2> INFO: Test took 31837ms.
[11:33:39.572] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:33:39.663] <TB2> INFO: dacScan step from 90 .. 119
[11:34:11.256] <TB2> INFO: Test took 31593ms.
[11:34:11.513] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:11.599] <TB2> INFO: dacScan step from 120 .. 149
[11:34:39.962] <TB2> INFO: Test took 28363ms.
[11:34:40.252] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:04.317] <TB2> INFO: PixTestBBMap::doTest() done, duration: 166 seconds
[11:35:04.317] <TB2> INFO: number of dead bumps (per ROC): 2 0 0 0 0 0 0 4 0 0 0 1 0 0 0 0
[11:35:04.317] <TB2> INFO: separation cut (per ROC): 91 78 80 87 76 69 79 86 76 91 75 77 85 77 96 78
[11:35:04.389] <TB2> INFO: ######################################################################
[11:35:04.389] <TB2> INFO: PixTestScurves::fullTest() ntrig = 50
[11:35:04.389] <TB2> INFO: ######################################################################
[11:35:04.390] <TB2> INFO: ----------------------------------------------------------------------
[11:35:04.390] <TB2> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[11:35:04.390] <TB2> INFO: ----------------------------------------------------------------------
[11:35:04.390] <TB2> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[11:35:04.398] <TB2> INFO: dacScan step from 0 .. 3
[11:35:25.197] <TB2> INFO: Test took 20799ms.
[11:35:25.224] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:25.224] <TB2> INFO: dacScan step from 4 .. 7
[11:35:46.147] <TB2> INFO: Test took 20923ms.
[11:35:46.177] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:46.177] <TB2> INFO: dacScan step from 8 .. 11
[11:36:07.375] <TB2> INFO: Test took 21198ms.
[11:36:07.409] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:36:07.409] <TB2> INFO: dacScan step from 12 .. 15
[11:36:28.677] <TB2> INFO: Test took 21268ms.
[11:36:28.705] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:36:28.705] <TB2> INFO: dacScan step from 16 .. 19
[11:36:50.012] <TB2> INFO: Test took 21307ms.
[11:36:50.039] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:36:50.039] <TB2> INFO: dacScan step from 20 .. 23
[11:37:11.309] <TB2> INFO: Test took 21269ms.
[11:37:11.334] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:11.334] <TB2> INFO: dacScan step from 24 .. 27
[11:37:31.912] <TB2> INFO: Test took 20578ms.
[11:37:31.939] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:31.939] <TB2> INFO: dacScan step from 28 .. 31
[11:37:52.547] <TB2> INFO: Test took 20607ms.
[11:37:52.575] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:52.575] <TB2> INFO: dacScan step from 32 .. 35
[11:38:13.309] <TB2> INFO: Test took 20734ms.
[11:38:13.336] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:13.336] <TB2> INFO: dacScan step from 36 .. 39
[11:38:34.616] <TB2> INFO: Test took 21280ms.
[11:38:34.643] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:34.643] <TB2> INFO: dacScan step from 40 .. 43
[11:38:56.005] <TB2> INFO: Test took 21362ms.
[11:38:56.037] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:56.037] <TB2> INFO: dacScan step from 44 .. 47
[11:39:17.204] <TB2> INFO: Test took 21166ms.
[11:39:17.231] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:17.231] <TB2> INFO: dacScan step from 48 .. 51
[11:39:38.224] <TB2> INFO: Test took 20993ms.
[11:39:38.249] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:38.249] <TB2> INFO: dacScan step from 52 .. 55
[11:39:58.709] <TB2> INFO: Test took 20459ms.
[11:39:58.735] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:58.735] <TB2> INFO: dacScan step from 56 .. 59
[11:40:19.239] <TB2> INFO: Test took 20504ms.
[11:40:19.265] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:19.265] <TB2> INFO: dacScan step from 60 .. 63
[11:40:40.488] <TB2> INFO: Test took 21223ms.
[11:40:40.517] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:40.517] <TB2> INFO: dacScan step from 64 .. 67
[11:41:01.710] <TB2> INFO: Test took 21192ms.
[11:41:01.738] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:01.739] <TB2> INFO: dacScan step from 68 .. 71
[11:41:23.487] <TB2> INFO: Test took 21748ms.
[11:41:23.526] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:23.526] <TB2> INFO: dacScan step from 72 .. 75
[11:41:44.955] <TB2> INFO: Test took 21429ms.
[11:41:45.007] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:45.009] <TB2> INFO: dacScan step from 76 .. 79
[11:42:09.891] <TB2> INFO: Test took 24882ms.
[11:42:09.977] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:09.981] <TB2> INFO: dacScan step from 80 .. 83
[11:42:37.385] <TB2> INFO: Test took 27404ms.
[11:42:37.529] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:37.535] <TB2> INFO: dacScan step from 84 .. 87
[11:43:08.635] <TB2> INFO: Test took 31100ms.
[11:43:08.816] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:08.823] <TB2> INFO: dacScan step from 88 .. 91
[11:43:40.743] <TB2> INFO: Test took 31919ms.
[11:43:40.941] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:40.951] <TB2> INFO: dacScan step from 92 .. 95
[11:44:13.916] <TB2> INFO: Test took 32965ms.
[11:44:14.179] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:14.188] <TB2> INFO: dacScan step from 96 .. 99
[11:44:48.127] <TB2> INFO: Test took 33939ms.
[11:44:48.378] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:48.389] <TB2> INFO: dacScan step from 100 .. 103
[11:45:20.647] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[11:45:21.872] <TB2> INFO: Test took 33483ms.
[11:45:22.092] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:22.104] <TB2> INFO: dacScan step from 104 .. 107
[11:45:56.250] <TB2> INFO: Test took 34146ms.
[11:45:56.485] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:56.497] <TB2> INFO: dacScan step from 108 .. 111
[11:46:28.651] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[11:46:28.651] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[11:46:30.118] <TB2> INFO: Test took 33621ms.
[11:46:30.364] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:46:30.376] <TB2> INFO: dacScan step from 112 .. 115
[11:47:02.218] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[11:47:02.218] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[11:47:03.638] <TB2> INFO: Test took 33262ms.
[11:47:03.855] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:03.866] <TB2> INFO: dacScan step from 116 .. 119
[11:47:35.687] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[11:47:35.687] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[11:47:37.194] <TB2> INFO: Test took 33328ms.
[11:47:37.408] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:37.418] <TB2> INFO: dacScan step from 120 .. 123
[11:48:10.877] <TB2> INFO: Test took 33459ms.
[11:48:11.109] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:11.120] <TB2> INFO: dacScan step from 124 .. 127
[11:48:44.633] <TB2> INFO: Test took 33513ms.
[11:48:44.906] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:44.915] <TB2> INFO: dacScan step from 128 .. 131
[11:49:18.848] <TB2> INFO: Test took 33933ms.
[11:49:19.119] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:19.134] <TB2> INFO: dacScan step from 132 .. 135
[11:49:50.525] <TB2> INFO: Test took 31391ms.
[11:49:50.792] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:50.805] <TB2> INFO: dacScan step from 136 .. 139
[11:50:24.179] <TB2> INFO: Test took 33374ms.
[11:50:24.424] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:24.437] <TB2> INFO: dacScan step from 140 .. 143
[11:50:56.452] <TB2> INFO: Test took 32015ms.
[11:50:56.678] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:56.687] <TB2> INFO: dacScan step from 144 .. 147
[11:51:30.848] <TB2> INFO: Test took 34161ms.
[11:51:31.081] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:31.095] <TB2> INFO: dacScan step from 148 .. 149
[11:51:49.257] <TB2> INFO: Test took 18162ms.
[11:51:49.367] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:49.375] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:51:50.794] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:51:52.507] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:51:54.284] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:51:56.077] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:51:57.692] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:51:59.425] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:52:01.199] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:52:02.671] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:52:04.401] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:52:06.515] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:52:08.436] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:52:09.888] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:52:11.283] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:52:12.853] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:52:14.374] <TB2> INFO: dumping ASCII scurve output file: SCurveData
[11:52:16.176] <TB2> INFO: PixTestScurves::scurves() done
[11:52:16.176] <TB2> INFO: Vcal mean: 91.77 83.82 84.11 98.97 83.25 79.70 75.55 85.53 82.12 92.15 89.41 83.73 84.11 81.84 99.19 88.30
[11:52:16.176] <TB2> INFO: Vcal RMS: 5.53 4.85 4.50 6.36 4.66 3.94 5.06 5.31 4.34 5.56 5.22 5.51 5.02 4.84 5.28 5.00
[11:52:16.176] <TB2> INFO: PixTestScurves::fullTest() done, duration: 1031 seconds
[11:52:16.245] <TB2> INFO: ######################################################################
[11:52:16.245] <TB2> INFO: PixTestTrim::doTest()
[11:52:16.245] <TB2> INFO: ######################################################################
[11:52:16.246] <TB2> INFO: ----------------------------------------------------------------------
[11:52:16.246] <TB2> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[11:52:16.246] <TB2> INFO: ----------------------------------------------------------------------
[11:52:16.323] <TB2> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:52:16.323] <TB2> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:52:16.331] <TB2> INFO: dacScan step from 0 .. 19
[11:52:32.826] <TB2> INFO: Test took 16495ms.
[11:52:32.849] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:32.849] <TB2> INFO: dacScan step from 20 .. 39
[11:52:49.302] <TB2> INFO: Test took 16453ms.
[11:52:49.327] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:49.327] <TB2> INFO: dacScan step from 40 .. 59
[11:53:05.341] <TB2> INFO: Test took 16014ms.
[11:53:05.361] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:05.361] <TB2> INFO: dacScan step from 60 .. 79
[11:53:20.952] <TB2> INFO: Test took 15591ms.
[11:53:20.973] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:20.973] <TB2> INFO: dacScan step from 80 .. 99
[11:53:38.405] <TB2> INFO: Test took 17432ms.
[11:53:38.469] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:38.476] <TB2> INFO: dacScan step from 100 .. 119
[11:54:00.916] <TB2> INFO: Test took 22440ms.
[11:54:01.087] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:01.120] <TB2> INFO: dacScan step from 120 .. 139
[11:54:23.267] <TB2> INFO: Test took 22147ms.
[11:54:23.425] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:23.454] <TB2> INFO: dacScan step from 140 .. 159
[11:54:41.722] <TB2> INFO: Test took 18268ms.
[11:54:41.803] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:55:04.257] <TB2> INFO: ROC 0 VthrComp = 97
[11:55:04.257] <TB2> INFO: ROC 1 VthrComp = 90
[11:55:04.257] <TB2> INFO: ROC 2 VthrComp = 90
[11:55:04.257] <TB2> INFO: ROC 3 VthrComp = 101
[11:55:04.257] <TB2> INFO: ROC 4 VthrComp = 88
[11:55:04.257] <TB2> INFO: ROC 5 VthrComp = 84
[11:55:04.257] <TB2> INFO: ROC 6 VthrComp = 83
[11:55:04.257] <TB2> INFO: ROC 7 VthrComp = 92
[11:55:04.258] <TB2> INFO: ROC 8 VthrComp = 88
[11:55:04.258] <TB2> INFO: ROC 9 VthrComp = 96
[11:55:04.258] <TB2> INFO: ROC 10 VthrComp = 91
[11:55:04.258] <TB2> INFO: ROC 11 VthrComp = 86
[11:55:04.258] <TB2> INFO: ROC 12 VthrComp = 90
[11:55:04.258] <TB2> INFO: ROC 13 VthrComp = 86
[11:55:04.258] <TB2> INFO: ROC 14 VthrComp = 104
[11:55:04.258] <TB2> INFO: ROC 15 VthrComp = 93
[11:55:04.258] <TB2> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:55:04.258] <TB2> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:55:04.270] <TB2> INFO: dacScan step from 0 .. 19
[11:55:20.545] <TB2> INFO: Test took 16275ms.
[11:55:20.570] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:55:20.570] <TB2> INFO: dacScan step from 20 .. 39
[11:55:36.898] <TB2> INFO: Test took 16328ms.
[11:55:36.936] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:55:36.939] <TB2> INFO: dacScan step from 40 .. 59
[11:55:58.131] <TB2> INFO: Test took 21192ms.
[11:55:58.284] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:55:58.325] <TB2> INFO: dacScan step from 60 .. 79
[11:56:20.196] <TB2> INFO: Test took 21871ms.
[11:56:20.357] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:56:20.422] <TB2> INFO: dacScan step from 80 .. 99
[11:56:43.232] <TB2> INFO: Test took 22810ms.
[11:56:43.413] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:56:43.472] <TB2> INFO: dacScan step from 100 .. 119
[11:57:05.976] <TB2> INFO: Test took 22505ms.
[11:57:06.145] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:06.199] <TB2> INFO: dacScan step from 120 .. 139
[11:57:29.031] <TB2> INFO: Test took 22832ms.
[11:57:29.243] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:29.306] <TB2> INFO: dacScan step from 140 .. 159
[11:57:51.871] <TB2> INFO: Test took 22565ms.
[11:57:52.076] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:58:19.175] <TB2> INFO: roc 0 with ID = 0 has maximal Vcal 59.0281 for pixel 14/79 mean/min/max = 45.3183/31.5828/59.0539
[11:58:19.175] <TB2> INFO: roc 1 with ID = 1 has maximal Vcal 57.97 for pixel 2/77 mean/min/max = 45.4409/32.8183/58.0635
[11:58:19.176] <TB2> INFO: roc 2 with ID = 2 has maximal Vcal 56.1677 for pixel 20/0 mean/min/max = 44.96/33.3542/56.5658
[11:58:19.176] <TB2> INFO: roc 3 with ID = 3 has maximal Vcal 59.1639 for pixel 0/64 mean/min/max = 45.3671/31.5501/59.1841
[11:58:19.176] <TB2> INFO: roc 4 with ID = 4 has maximal Vcal 57.7574 for pixel 25/4 mean/min/max = 45.4641/33.0245/57.9037
[11:58:19.176] <TB2> INFO: roc 5 with ID = 5 has maximal Vcal 56.2962 for pixel 16/1 mean/min/max = 44.7111/32.7826/56.6396
[11:58:19.177] <TB2> INFO: roc 6 with ID = 6 has maximal Vcal 57.6772 for pixel 18/78 mean/min/max = 44.8048/31.831/57.7786
[11:58:19.177] <TB2> INFO: roc 7 with ID = 7 has maximal Vcal 59.286 for pixel 5/79 mean/min/max = 45.7087/31.9364/59.481
[11:58:19.177] <TB2> INFO: roc 8 with ID = 8 has maximal Vcal 57.1704 for pixel 39/0 mean/min/max = 45.2058/33.2267/57.1849
[11:58:19.177] <TB2> INFO: roc 9 with ID = 9 has maximal Vcal 59.3137 for pixel 39/79 mean/min/max = 45.6741/31.9798/59.3684
[11:58:19.178] <TB2> INFO: roc 10 with ID = 10 has maximal Vcal 60.481 for pixel 4/0 mean/min/max = 46.6644/32.8327/60.4962
[11:58:19.178] <TB2> INFO: roc 11 with ID = 11 has maximal Vcal 61.9148 for pixel 5/1 mean/min/max = 46.6665/31.398/61.9351
[11:58:19.178] <TB2> INFO: roc 12 with ID = 12 has maximal Vcal 59.0506 for pixel 3/7 mean/min/max = 45.8983/32.7176/59.0789
[11:58:19.178] <TB2> INFO: roc 13 with ID = 13 has maximal Vcal 59.8444 for pixel 4/0 mean/min/max = 45.8842/31.8961/59.8724
[11:58:19.179] <TB2> INFO: roc 14 with ID = 14 has maximal Vcal 58.9172 for pixel 14/65 mean/min/max = 46.198/33.1047/59.2913
[11:58:19.179] <TB2> INFO: roc 15 with ID = 15 has maximal Vcal 57.6312 for pixel 20/10 mean/min/max = 45.1008/32.5486/57.6531
[11:58:19.179] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:00:09.911] <TB2> INFO: Test took 110732ms.
[12:00:11.452] <TB2> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:00:11.461] <TB2> INFO: dacScan step from 0 .. 19
[12:00:36.600] <TB2> INFO: Test took 25139ms.
[12:00:36.653] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:36.654] <TB2> INFO: dacScan step from 20 .. 39
[12:01:10.304] <TB2> INFO: Test took 33650ms.
[12:01:10.572] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:01:10.604] <TB2> INFO: dacScan step from 40 .. 59
[12:01:46.896] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[12:01:46.897] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[12:01:48.437] <TB2> INFO: Test took 37833ms.
[12:01:48.751] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:01:48.812] <TB2> INFO: dacScan step from 60 .. 79
[12:02:23.713] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[12:02:23.713] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[12:02:25.034] <TB2> INFO: Test took 36222ms.
[12:02:25.487] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:02:25.558] <TB2> INFO: dacScan step from 80 .. 99
[12:03:01.297] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[12:03:01.297] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[12:03:02.692] <TB2> INFO: Test took 37133ms.
[12:03:02.975] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:03:03.035] <TB2> INFO: dacScan step from 100 .. 119
[12:03:39.533] <TB2> INFO: Test took 36498ms.
[12:03:39.821] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:03:39.878] <TB2> INFO: dacScan step from 120 .. 139
[12:04:17.568] <TB2> INFO: Test took 37690ms.
[12:04:17.854] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:04:17.918] <TB2> INFO: dacScan step from 140 .. 159
[12:04:54.266] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[12:04:55.522] <TB2> INFO: Test took 37604ms.
[12:04:55.793] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:04:55.842] <TB2> INFO: dacScan step from 160 .. 179
[12:05:32.040] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (205) != TBM ID (0)

[12:05:32.040] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[12:05:32.040] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (206)

[12:05:33.436] <TB2> INFO: Test took 37594ms.
[12:05:33.699] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:33.748] <TB2> INFO: dacScan step from 180 .. 199
[12:06:11.058] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[12:06:11.058] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[12:06:12.614] <TB2> INFO: Test took 38866ms.
[12:06:12.891] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:06:40.010] <TB2> INFO: ---> TrimStepCorr4 extremal thresholds: 0.020319 .. 255.000000
[12:06:40.097] <TB2> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[12:06:40.106] <TB2> INFO: dacScan step from 0 .. 19
[12:06:54.147] <TB2> INFO: Test took 14041ms.
[12:06:54.167] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:06:54.167] <TB2> INFO: dacScan step from 20 .. 39
[12:07:10.691] <TB2> INFO: Test took 16524ms.
[12:07:10.796] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:10.815] <TB2> INFO: dacScan step from 40 .. 59
[12:07:30.355] <TB2> INFO: Test took 19540ms.
[12:07:30.499] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:30.558] <TB2> INFO: dacScan step from 60 .. 79
[12:07:49.239] <TB2> INFO: Test took 18681ms.
[12:07:49.465] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:49.554] <TB2> INFO: dacScan step from 80 .. 99
[12:08:08.209] <TB2> INFO: Test took 18655ms.
[12:08:08.351] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:08.408] <TB2> INFO: dacScan step from 100 .. 119
[12:08:27.157] <TB2> INFO: Test took 18749ms.
[12:08:27.306] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:27.362] <TB2> INFO: dacScan step from 120 .. 139
[12:08:46.268] <TB2> INFO: Test took 18906ms.
[12:08:46.446] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:46.506] <TB2> INFO: dacScan step from 140 .. 159
[12:09:06.165] <TB2> INFO: Test took 19659ms.
[12:09:06.303] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:09:06.355] <TB2> INFO: dacScan step from 160 .. 179
[12:09:25.415] <TB2> INFO: Test took 19060ms.
[12:09:25.574] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:09:25.636] <TB2> INFO: dacScan step from 180 .. 199
[12:09:46.054] <TB2> INFO: Test took 20418ms.
[12:09:46.226] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:09:46.293] <TB2> INFO: dacScan step from 200 .. 219
[12:10:06.188] <TB2> INFO: Test took 19894ms.
[12:10:06.346] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:06.408] <TB2> INFO: dacScan step from 220 .. 239
[12:10:26.250] <TB2> INFO: Test took 19842ms.
[12:10:26.393] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:26.449] <TB2> INFO: dacScan step from 240 .. 255
[12:10:42.080] <TB2> INFO: Test took 15631ms.
[12:10:42.222] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:11.973] <TB2> INFO: ---> TrimStepCorr2 extremal thresholds: 16.429319 .. 59.769812
[12:11:12.049] <TB2> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 6 .. 69 (20) hits flags = 16 (plus default)
[12:11:12.057] <TB2> INFO: dacScan step from 6 .. 25
[12:11:26.351] <TB2> INFO: Test took 14294ms.
[12:11:26.377] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:26.377] <TB2> INFO: dacScan step from 26 .. 45
[12:11:44.271] <TB2> INFO: Test took 17894ms.
[12:11:44.395] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:44.427] <TB2> INFO: dacScan step from 46 .. 65
[12:12:03.757] <TB2> INFO: Test took 19330ms.
[12:12:03.899] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:03.957] <TB2> INFO: dacScan step from 66 .. 69
[12:12:09.856] <TB2> INFO: Test took 5899ms.
[12:12:09.892] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:28.576] <TB2> INFO: ---> TrimStepCorr1a extremal thresholds: 1.988816 .. 45.633307
[12:12:28.655] <TB2> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 1 .. 55 (20) hits flags = 16 (plus default)
[12:12:28.663] <TB2> INFO: dacScan step from 1 .. 20
[12:12:43.088] <TB2> INFO: Test took 14425ms.
[12:12:43.114] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:43.114] <TB2> INFO: dacScan step from 21 .. 40
[12:12:59.585] <TB2> INFO: Test took 16471ms.
[12:12:59.677] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:59.700] <TB2> INFO: dacScan step from 41 .. 55
[12:13:15.353] <TB2> INFO: Test took 15653ms.
[12:13:15.465] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:32.059] <TB2> INFO: ---> TrimStepCorr1b extremal thresholds: 13.341236 .. 45.633307
[12:13:32.144] <TB2> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 3 .. 55 (20) hits flags = 16 (plus default)
[12:13:32.153] <TB2> INFO: dacScan step from 3 .. 22
[12:13:46.813] <TB2> INFO: Test took 14660ms.
[12:13:46.837] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:46.837] <TB2> INFO: dacScan step from 23 .. 42
[12:14:03.688] <TB2> INFO: Test took 16851ms.
[12:14:03.790] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:14:03.816] <TB2> INFO: dacScan step from 43 .. 55
[12:14:17.558] <TB2> INFO: Test took 13742ms.
[12:14:17.648] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:14:33.788] <TB2> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:14:33.788] <TB2> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[12:14:33.796] <TB2> INFO: dacScan step from 15 .. 34
[12:15:00.371] <TB2> INFO: Test took 26575ms.
[12:15:00.441] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:00.450] <TB2> INFO: dacScan step from 35 .. 54
[12:15:35.086] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (8) != Token Chain Length (4)

[12:15:35.086] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (234) != TBM ID (235)

[12:15:35.086] <TB2> WARNING: Channel 3 ROC 1: Readback start marker after 15 readouts!

[12:15:35.086] <TB2> WARNING: Channel 3 ROC 2: Readback start marker after 15 readouts!

[12:15:35.086] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[12:15:35.906] <TB2> INFO: Test took 35456ms.
[12:15:36.194] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:36.250] <TB2> INFO: dacScan step from 55 .. 55
[12:15:40.716] <TB2> INFO: Test took 4466ms.
[12:15:40.740] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:54.516] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C0.dat
[12:15:54.516] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C1.dat
[12:15:54.517] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C2.dat
[12:15:54.517] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C3.dat
[12:15:54.517] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C4.dat
[12:15:54.517] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C5.dat
[12:15:54.518] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C6.dat
[12:15:54.518] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C7.dat
[12:15:54.518] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C8.dat
[12:15:54.518] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C9.dat
[12:15:54.519] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C10.dat
[12:15:54.519] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C11.dat
[12:15:54.519] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C12.dat
[12:15:54.519] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C13.dat
[12:15:54.520] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C14.dat
[12:15:54.520] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C15.dat
[12:15:54.520] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C0.dat
[12:15:54.534] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C1.dat
[12:15:54.544] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C2.dat
[12:15:54.552] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C3.dat
[12:15:54.561] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C4.dat
[12:15:54.570] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C5.dat
[12:15:54.579] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C6.dat
[12:15:54.588] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C7.dat
[12:15:54.596] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C8.dat
[12:15:54.603] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C9.dat
[12:15:54.610] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C10.dat
[12:15:54.617] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C11.dat
[12:15:54.625] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C12.dat
[12:15:54.631] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C13.dat
[12:15:54.639] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C14.dat
[12:15:54.646] <TB2> INFO: write trim parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//trimParameters35_C15.dat
[12:15:54.653] <TB2> INFO: PixTestTrim::trimTest() done
[12:15:54.653] <TB2> INFO: vtrim: 107 115 105 104 104 108 96 104 114 111 128 110 113 108 111 108
[12:15:54.653] <TB2> INFO: vthrcomp: 97 90 90 101 88 84 83 92 88 96 91 86 90 86 104 93
[12:15:54.653] <TB2> INFO: vcal mean: 35.01 35.06 35.06 35.07 35.06 35.06 35.02 35.09 35.03 35.05 35.08 35.06 35.00 35.02 35.05 35.05
[12:15:54.653] <TB2> INFO: vcal RMS: 1.07 1.01 0.99 1.09 1.01 0.99 0.96 1.02 0.96 1.11 1.15 1.16 0.96 1.15 1.01 1.02
[12:15:54.653] <TB2> INFO: bits mean: 9.83 9.78 9.71 9.87 9.81 10.08 9.78 9.54 9.80 9.43 10.02 9.76 9.84 10.09 9.45 9.96
[12:15:54.653] <TB2> INFO: bits RMS: 2.60 2.47 2.48 2.56 2.43 2.37 2.59 2.74 2.41 2.71 2.36 2.52 2.41 2.45 2.55 2.45
[12:15:54.662] <TB2> INFO: ----------------------------------------------------------------------
[12:15:54.662] <TB2> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[12:15:54.662] <TB2> INFO: ----------------------------------------------------------------------
[12:15:54.665] <TB2> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:15:54.678] <TB2> INFO: dacScan step from 0 .. 19
[12:16:19.792] <TB2> INFO: Test took 25114ms.
[12:16:19.830] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:19.830] <TB2> INFO: dacScan step from 20 .. 39
[12:16:43.489] <TB2> INFO: Test took 23659ms.
[12:16:43.529] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:43.529] <TB2> INFO: dacScan step from 40 .. 59
[12:17:08.096] <TB2> INFO: Test took 24567ms.
[12:17:08.133] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:08.133] <TB2> INFO: dacScan step from 60 .. 79
[12:17:33.335] <TB2> INFO: Test took 25202ms.
[12:17:33.380] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:33.380] <TB2> INFO: dacScan step from 80 .. 99
[12:17:59.286] <TB2> INFO: Test took 25906ms.
[12:17:59.343] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:59.345] <TB2> INFO: dacScan step from 100 .. 119
[12:18:33.798] <TB2> INFO: Test took 34454ms.
[12:18:34.015] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:34.038] <TB2> INFO: dacScan step from 120 .. 139
[12:19:10.645] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (102) != TBM ID (0)

[12:19:10.645] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[12:19:10.645] <TB2> ERROR: <datapipe.cc/CheckEventID:L420> Channel 3 Event ID mismatch: local ID (1) != TBM ID (103)

[12:19:11.788] <TB2> INFO: Test took 37750ms.
[12:19:12.109] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:12.168] <TB2> INFO: dacScan step from 140 .. 159
[12:19:46.290] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[12:19:46.290] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[12:19:47.499] <TB2> INFO: Test took 35331ms.
[12:19:47.952] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:48.037] <TB2> INFO: dacScan step from 160 .. 179
[12:20:25.952] <TB2> INFO: Test took 37915ms.
[12:20:26.254] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:26.306] <TB2> INFO: dacScan step from 180 .. 199
[12:21:03.821] <TB2> INFO: Test took 37515ms.
[12:21:04.092] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:30.772] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 165 (20) hits flags = 16 (plus default)
[12:21:30.781] <TB2> INFO: dacScan step from 0 .. 19
[12:21:55.922] <TB2> INFO: Test took 25141ms.
[12:21:55.958] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:55.958] <TB2> INFO: dacScan step from 20 .. 39
[12:22:21.562] <TB2> INFO: Test took 25604ms.
[12:22:21.598] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:21.598] <TB2> INFO: dacScan step from 40 .. 59
[12:22:45.374] <TB2> INFO: Test took 23776ms.
[12:22:45.407] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:45.407] <TB2> INFO: dacScan step from 60 .. 79
[12:23:10.798] <TB2> INFO: Test took 25391ms.
[12:23:10.834] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:10.834] <TB2> INFO: dacScan step from 80 .. 99
[12:23:39.039] <TB2> INFO: Test took 28205ms.
[12:23:39.150] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:23:39.161] <TB2> INFO: dacScan step from 100 .. 119
[12:24:15.793] <TB2> INFO: Test took 36632ms.
[12:24:16.058] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:16.090] <TB2> INFO: dacScan step from 120 .. 139
[12:24:53.174] <TB2> INFO: Test took 37084ms.
[12:24:53.448] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:24:53.497] <TB2> INFO: dacScan step from 140 .. 159
[12:25:31.281] <TB2> INFO: Test took 37784ms.
[12:25:31.585] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:25:31.643] <TB2> INFO: dacScan step from 160 .. 165
[12:25:44.992] <TB2> INFO: Test took 13348ms.
[12:25:45.078] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:10.714] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[12:26:10.723] <TB2> INFO: dacScan step from 0 .. 19
[12:26:35.953] <TB2> INFO: Test took 25230ms.
[12:26:35.993] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:26:35.993] <TB2> INFO: dacScan step from 20 .. 39
[12:27:00.131] <TB2> INFO: Test took 24138ms.
[12:27:00.166] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:00.166] <TB2> INFO: dacScan step from 40 .. 59
[12:27:25.022] <TB2> INFO: Test took 24856ms.
[12:27:25.056] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:25.056] <TB2> INFO: dacScan step from 60 .. 79
[12:27:49.127] <TB2> INFO: Test took 24071ms.
[12:27:49.167] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:27:49.167] <TB2> INFO: dacScan step from 80 .. 99
[12:28:16.870] <TB2> INFO: Test took 27703ms.
[12:28:16.982] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:16.992] <TB2> INFO: dacScan step from 100 .. 119
[12:28:54.015] <TB2> INFO: Test took 37023ms.
[12:28:54.284] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:28:54.321] <TB2> INFO: dacScan step from 120 .. 139
[12:29:31.532] <TB2> INFO: Test took 37211ms.
[12:29:31.962] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:29:32.020] <TB2> INFO: dacScan step from 140 .. 153
[12:29:58.063] <TB2> INFO: Test took 26043ms.
[12:29:58.274] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:21.620] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 153 (20) hits flags = 16 (plus default)
[12:30:21.628] <TB2> INFO: dacScan step from 0 .. 19
[12:30:45.834] <TB2> INFO: Test took 24206ms.
[12:30:45.867] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:30:45.867] <TB2> INFO: dacScan step from 20 .. 39
[12:31:10.856] <TB2> INFO: Test took 24988ms.
[12:31:10.891] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:10.891] <TB2> INFO: dacScan step from 40 .. 59
[12:31:36.243] <TB2> INFO: Test took 25352ms.
[12:31:36.281] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:31:36.281] <TB2> INFO: dacScan step from 60 .. 79
[12:32:01.481] <TB2> INFO: Test took 25200ms.
[12:32:01.518] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:01.518] <TB2> INFO: dacScan step from 80 .. 99
[12:32:29.153] <TB2> INFO: Test took 27635ms.
[12:32:29.272] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:32:29.282] <TB2> INFO: dacScan step from 100 .. 119
[12:33:06.388] <TB2> INFO: Test took 37106ms.
[12:33:06.652] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:06.687] <TB2> INFO: dacScan step from 120 .. 139
[12:33:43.071] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (2) != Token Chain Length (4)

[12:33:43.071] <TB2> WARNING: Channel 3 ROC 3: Readback start marker after 15 readouts!

[12:33:44.533] <TB2> INFO: Test took 37846ms.
[12:33:44.830] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:33:44.878] <TB2> INFO: dacScan step from 140 .. 153
[12:34:11.635] <TB2> INFO: Test took 26757ms.
[12:34:11.845] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:34:36.435] <TB2> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 152 (20) hits flags = 16 (plus default)
[12:34:36.443] <TB2> INFO: dacScan step from 0 .. 19
[12:35:01.545] <TB2> INFO: Test took 25102ms.
[12:35:01.585] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:01.585] <TB2> INFO: dacScan step from 20 .. 39
[12:35:25.718] <TB2> INFO: Test took 24133ms.
[12:35:25.763] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:25.763] <TB2> INFO: dacScan step from 40 .. 59
[12:35:51.509] <TB2> INFO: Test took 25745ms.
[12:35:51.545] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:35:51.545] <TB2> INFO: dacScan step from 60 .. 79
[12:36:16.587] <TB2> INFO: Test took 25042ms.
[12:36:16.628] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:16.628] <TB2> INFO: dacScan step from 80 .. 99
[12:36:45.548] <TB2> INFO: Test took 28920ms.
[12:36:45.661] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:36:45.672] <TB2> INFO: dacScan step from 100 .. 119
[12:37:23.122] <TB2> INFO: Test took 37450ms.
[12:37:23.416] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:37:23.457] <TB2> INFO: dacScan step from 120 .. 139
[12:37:59.366] <TB2> ERROR: <datapipe.cc/CheckEventValidity:L437> Channel 3 Number of ROCs (3) != Token Chain Length (4)

[12:38:00.812] <TB2> INFO: Test took 37355ms.
[12:38:01.113] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:01.165] <TB2> INFO: dacScan step from 140 .. 152
[12:38:26.811] <TB2> INFO: Test took 25646ms.
[12:38:26.990] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:50.332] <TB2> INFO: PixTestTrim::trimBitTest() done
[12:38:50.333] <TB2> INFO: PixTestTrim::doTest() done, duration: 2794 seconds
[12:38:51.116] <TB2> INFO: ######################################################################
[12:38:51.116] <TB2> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:38:51.116] <TB2> INFO: ######################################################################
[12:38:54.783] <TB2> INFO: Test took 3666ms.
[12:38:54.806] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:38:58.609] <TB2> INFO: Test took 3606ms.
[12:38:58.673] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:02.363] <TB2> INFO: Test took 3679ms.
[12:39:02.426] <TB2> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:39:02.433] <TB2> INFO: The DUT currently contains the following objects:
[12:39:02.433] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:39:02.433] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:39:02.433] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:39:02.433] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:39:02.433] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:02.433] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:02.433] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:02.433] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:02.433] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:02.433] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:02.433] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:02.433] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:02.433] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:02.433] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:02.433] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:02.433] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:02.433] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:02.433] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:02.433] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:02.433] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:03.555] <TB2> INFO: Test took 1122ms.
[12:39:03.556] <TB2> INFO: The DUT currently contains the following objects:
[12:39:03.556] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:39:03.556] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:39:03.557] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:39:03.557] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:39:03.557] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:03.557] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:03.557] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:03.557] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:03.557] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:03.557] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:03.557] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:03.557] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:03.557] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:03.557] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:03.557] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:03.557] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:03.557] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:03.557] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:03.557] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:03.557] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:04.693] <TB2> INFO: Test took 1136ms.
[12:39:04.693] <TB2> INFO: The DUT currently contains the following objects:
[12:39:04.693] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:39:04.693] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:39:04.693] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:39:04.693] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:39:04.693] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:04.693] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:04.693] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:04.693] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:04.693] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:04.693] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:04.693] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:04.693] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:04.693] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:04.693] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:04.693] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:04.693] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:04.693] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:04.693] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:04.693] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:04.693] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:05.813] <TB2> INFO: Test took 1119ms.
[12:39:05.814] <TB2> INFO: The DUT currently contains the following objects:
[12:39:05.814] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:39:05.814] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:39:05.814] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:39:05.814] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:39:05.814] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:05.814] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:05.814] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:05.814] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:05.814] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:05.814] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:05.814] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:05.815] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:05.815] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:05.815] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:05.815] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:05.815] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:05.815] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:05.815] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:05.815] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:05.815] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:06.923] <TB2> INFO: Test took 1108ms.
[12:39:06.925] <TB2> INFO: The DUT currently contains the following objects:
[12:39:06.925] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:39:06.925] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:39:06.925] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:39:06.925] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:39:06.925] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:06.925] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:06.925] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:06.925] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:06.926] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:06.926] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:06.926] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:06.926] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:06.926] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:06.926] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:06.926] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:06.926] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:06.926] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:06.926] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:06.926] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:06.926] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:08.034] <TB2> INFO: Test took 1108ms.
[12:39:08.035] <TB2> INFO: The DUT currently contains the following objects:
[12:39:08.035] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:39:08.035] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:39:08.035] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:39:08.035] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:39:08.035] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:08.036] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:08.036] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:08.036] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:08.036] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:08.036] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:08.036] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:08.036] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:08.036] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:08.036] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:08.036] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:08.036] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:08.036] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:08.036] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:08.036] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:08.036] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:09.169] <TB2> INFO: Test took 1133ms.
[12:39:09.170] <TB2> INFO: The DUT currently contains the following objects:
[12:39:09.170] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:39:09.170] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:39:09.170] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:39:09.170] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:39:09.170] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:09.170] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:09.170] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:09.171] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:09.171] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:09.171] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:09.171] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:09.171] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:09.171] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:09.171] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:09.171] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:09.171] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:09.171] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:09.171] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:09.171] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:09.171] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:10.280] <TB2> INFO: Test took 1109ms.
[12:39:10.282] <TB2> INFO: The DUT currently contains the following objects:
[12:39:10.282] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:39:10.282] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:39:10.282] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:39:10.282] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:39:10.282] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:10.282] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:10.282] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:10.282] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:10.282] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:10.282] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:10.282] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:10.282] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:10.282] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:10.282] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:10.282] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:10.282] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:10.283] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:10.283] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:10.283] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:10.283] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:11.418] <TB2> INFO: Test took 1135ms.
[12:39:11.420] <TB2> INFO: The DUT currently contains the following objects:
[12:39:11.420] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:39:11.420] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:39:11.420] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:39:11.420] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:39:11.420] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:11.420] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:11.420] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:11.420] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:11.420] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:11.420] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:11.420] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:11.420] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:11.420] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:11.420] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:11.420] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:11.421] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:11.421] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:11.421] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:11.421] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:11.421] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:12.527] <TB2> INFO: Test took 1106ms.
[12:39:12.529] <TB2> INFO: The DUT currently contains the following objects:
[12:39:12.529] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:39:12.529] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:39:12.529] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:39:12.529] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:39:12.529] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:12.529] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:12.529] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:12.529] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:12.529] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:12.529] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:12.529] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:12.529] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:12.529] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:12.529] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:12.529] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:12.529] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:12.529] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:12.529] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:12.529] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:12.529] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:13.651] <TB2> INFO: Test took 1121ms.
[12:39:13.652] <TB2> INFO: The DUT currently contains the following objects:
[12:39:13.652] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:39:13.652] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:39:13.652] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:39:13.652] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:39:13.652] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:13.652] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:13.652] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:13.652] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:13.652] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:13.652] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:13.652] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:13.652] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:13.652] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:13.652] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:13.652] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:13.652] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:13.652] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:13.652] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:13.652] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:13.652] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:14.774] <TB2> INFO: Test took 1122ms.
[12:39:14.776] <TB2> INFO: The DUT currently contains the following objects:
[12:39:14.776] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:39:14.776] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:39:14.776] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:39:14.776] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:39:14.776] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:14.776] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:14.776] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:14.776] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:14.776] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:14.776] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:14.776] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:14.776] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:14.776] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:14.776] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:14.776] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:14.776] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:14.776] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:14.776] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:14.776] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:14.776] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:15.895] <TB2> INFO: Test took 1119ms.
[12:39:15.896] <TB2> INFO: The DUT currently contains the following objects:
[12:39:15.896] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:39:15.896] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:39:15.896] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:39:15.896] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:39:15.896] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:15.896] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:15.896] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:15.896] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:15.896] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:15.896] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:15.896] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:15.896] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:15.896] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:15.896] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:15.896] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:15.896] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:15.896] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:15.896] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:15.896] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:15.896] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:17.044] <TB2> INFO: Test took 1148ms.
[12:39:17.045] <TB2> INFO: The DUT currently contains the following objects:
[12:39:17.045] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:39:17.045] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:39:17.045] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:39:17.045] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:39:17.045] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:17.045] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:17.045] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:17.045] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:17.045] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:17.045] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:17.045] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:17.045] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:17.045] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:17.045] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:17.045] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:17.045] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:17.045] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:17.045] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:17.045] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:17.045] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:18.167] <TB2> INFO: Test took 1122ms.
[12:39:18.168] <TB2> INFO: The DUT currently contains the following objects:
[12:39:18.168] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:39:18.168] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:39:18.168] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:39:18.168] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:39:18.168] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:18.169] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:18.169] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:18.169] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:18.169] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:18.169] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:18.169] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:18.169] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:18.169] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:18.169] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:18.169] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:18.169] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:18.169] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:18.169] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:18.169] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:18.169] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:19.291] <TB2> INFO: Test took 1122ms.
[12:39:19.292] <TB2> INFO: The DUT currently contains the following objects:
[12:39:19.292] <TB2> INFO: 2 TBM Cores tbm09c (2 ON)
[12:39:19.292] <TB2> INFO: TBM Core alpha (0): 7 registers set
[12:39:19.292] <TB2> INFO: TBM Core beta (1): 7 registers set
[12:39:19.292] <TB2> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:39:19.292] <TB2> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:19.292] <TB2> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:19.292] <TB2> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:19.292] <TB2> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:19.292] <TB2> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:19.292] <TB2> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:19.292] <TB2> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:19.292] <TB2> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:19.292] <TB2> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:19.292] <TB2> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:19.292] <TB2> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:19.292] <TB2> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:19.292] <TB2> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:19.292] <TB2> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:19.292] <TB2> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:19.292] <TB2> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:39:20.413] <TB2> INFO: Test took 1121ms.
[12:39:20.418] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:43:39.657] <TB2> INFO: Test took 259239ms.
[12:43:41.286] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:06.386] <TB2> INFO: Test took 265100ms.
[12:48:08.230] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:48:08.236] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:48:08.243] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:48:08.249] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:48:08.256] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:48:08.262] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:48:08.269] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:48:08.278] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:48:08.284] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:48:08.291] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:48:08.297] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:48:08.304] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:48:08.312] <TB2> INFO: safety margin for low PH: adding 1, margin is now 21
[12:48:08.320] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:48:08.326] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:48:08.333] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:48:08.343] <TB2> INFO: safety margin for low PH: adding 0, margin is now 20
[12:48:08.382] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C0.dat
[12:48:08.383] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C1.dat
[12:48:08.383] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C2.dat
[12:48:08.383] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C3.dat
[12:48:08.383] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C4.dat
[12:48:08.383] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C5.dat
[12:48:08.383] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C6.dat
[12:48:08.383] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C7.dat
[12:48:08.383] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C8.dat
[12:48:08.383] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C9.dat
[12:48:08.383] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C10.dat
[12:48:08.383] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C11.dat
[12:48:08.384] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C12.dat
[12:48:08.384] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C13.dat
[12:48:08.384] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C14.dat
[12:48:08.384] <TB2> INFO: write dac parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//dacParameters35_C15.dat
[12:48:11.987] <TB2> INFO: Test took 3599ms.
[12:48:15.824] <TB2> INFO: Test took 3552ms.
[12:48:19.688] <TB2> INFO: Test took 3596ms.
[12:48:19.964] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:20.896] <TB2> INFO: Test took 932ms.
[12:48:20.898] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:22.033] <TB2> INFO: Test took 1135ms.
[12:48:22.036] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:23.155] <TB2> INFO: Test took 1119ms.
[12:48:23.157] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:24.278] <TB2> INFO: Test took 1121ms.
[12:48:24.281] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:25.404] <TB2> INFO: Test took 1123ms.
[12:48:25.408] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:26.515] <TB2> INFO: Test took 1107ms.
[12:48:26.518] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:27.626] <TB2> INFO: Test took 1108ms.
[12:48:27.629] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:28.763] <TB2> INFO: Test took 1134ms.
[12:48:28.765] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:29.914] <TB2> INFO: Test took 1149ms.
[12:48:29.917] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:31.036] <TB2> INFO: Test took 1119ms.
[12:48:31.038] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:32.158] <TB2> INFO: Test took 1120ms.
[12:48:32.161] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:33.282] <TB2> INFO: Test took 1121ms.
[12:48:33.285] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:34.408] <TB2> INFO: Test took 1123ms.
[12:48:34.412] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:35.549] <TB2> INFO: Test took 1138ms.
[12:48:35.553] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:36.665] <TB2> INFO: Test took 1112ms.
[12:48:36.669] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:37.809] <TB2> INFO: Test took 1140ms.
[12:48:37.812] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:38.933] <TB2> INFO: Test took 1121ms.
[12:48:38.936] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:40.045] <TB2> INFO: Test took 1109ms.
[12:48:40.050] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:41.164] <TB2> INFO: Test took 1114ms.
[12:48:41.166] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:42.277] <TB2> INFO: Test took 1111ms.
[12:48:42.281] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:43.404] <TB2> INFO: Test took 1124ms.
[12:48:43.408] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:44.517] <TB2> INFO: Test took 1110ms.
[12:48:44.520] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:45.632] <TB2> INFO: Test took 1112ms.
[12:48:45.636] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:46.772] <TB2> INFO: Test took 1136ms.
[12:48:46.775] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:47.911] <TB2> INFO: Test took 1137ms.
[12:48:47.915] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:49.023] <TB2> INFO: Test took 1108ms.
[12:48:49.026] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:50.147] <TB2> INFO: Test took 1121ms.
[12:48:50.150] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:51.277] <TB2> INFO: Test took 1127ms.
[12:48:51.282] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:52.403] <TB2> INFO: Test took 1122ms.
[12:48:52.407] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:53.516] <TB2> INFO: Test took 1109ms.
[12:48:53.520] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:54.637] <TB2> INFO: Test took 1117ms.
[12:48:54.639] <TB2> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:48:55.744] <TB2> INFO: Test took 1105ms.
[12:48:56.267] <TB2> INFO: PixTestPhOptimization::doTest() done, duration: 605 seconds
[12:48:56.267] <TB2> INFO: PH scale (per ROC): 75 90 89 80 79 85 83 81 82 79 85 83 91 86 78 80
[12:48:56.267] <TB2> INFO: PH offset (per ROC): 163 148 147 156 150 140 160 161 156 172 156 144 165 175 161 146
[12:48:56.441] <TB2> INFO: ######################################################################
[12:48:56.441] <TB2> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:48:56.441] <TB2> INFO: ######################################################################
[12:48:56.450] <TB2> INFO: scanning low vcal = 10
[12:49:00.300] <TB2> INFO: Test took 3850ms.
[12:49:00.303] <TB2> INFO: scanning low vcal = 20
[12:49:04.192] <TB2> INFO: Test took 3889ms.
[12:49:04.198] <TB2> INFO: scanning low vcal = 30
[12:49:08.320] <TB2> INFO: Test took 4122ms.
[12:49:08.327] <TB2> INFO: scanning low vcal = 40
[12:49:12.984] <TB2> INFO: Test took 4657ms.
[12:49:13.079] <TB2> INFO: scanning low vcal = 50
[12:49:17.712] <TB2> INFO: Test took 4633ms.
[12:49:17.769] <TB2> INFO: scanning low vcal = 60
[12:49:22.410] <TB2> INFO: Test took 4641ms.
[12:49:22.471] <TB2> INFO: scanning low vcal = 70
[12:49:27.084] <TB2> INFO: Test took 4613ms.
[12:49:27.141] <TB2> INFO: scanning low vcal = 80
[12:49:31.681] <TB2> INFO: Test took 4540ms.
[12:49:31.744] <TB2> INFO: scanning low vcal = 90
[12:49:36.316] <TB2> INFO: Test took 4572ms.
[12:49:36.418] <TB2> INFO: scanning low vcal = 100
[12:49:41.061] <TB2> INFO: Test took 4643ms.
[12:49:41.123] <TB2> INFO: scanning low vcal = 110
[12:49:45.683] <TB2> INFO: Test took 4560ms.
[12:49:45.763] <TB2> INFO: scanning low vcal = 120
[12:49:50.380] <TB2> INFO: Test took 4617ms.
[12:49:50.471] <TB2> INFO: scanning low vcal = 130
[12:49:55.014] <TB2> INFO: Test took 4543ms.
[12:49:55.081] <TB2> INFO: scanning low vcal = 140
[12:49:59.642] <TB2> INFO: Test took 4561ms.
[12:49:59.705] <TB2> INFO: scanning low vcal = 150
[12:50:04.090] <TB2> INFO: Test took 4385ms.
[12:50:04.144] <TB2> INFO: scanning low vcal = 160
[12:50:08.665] <TB2> INFO: Test took 4521ms.
[12:50:08.720] <TB2> INFO: scanning low vcal = 170
[12:50:13.204] <TB2> INFO: Test took 4484ms.
[12:50:13.259] <TB2> INFO: scanning low vcal = 180
[12:50:18.020] <TB2> INFO: Test took 4761ms.
[12:50:18.079] <TB2> INFO: scanning low vcal = 190
[12:50:22.870] <TB2> INFO: Test took 4791ms.
[12:50:22.933] <TB2> INFO: scanning low vcal = 200
[12:50:27.475] <TB2> INFO: Test took 4542ms.
[12:50:27.539] <TB2> INFO: scanning low vcal = 210
[12:50:32.173] <TB2> INFO: Test took 4634ms.
[12:50:32.234] <TB2> INFO: scanning low vcal = 220
[12:50:36.734] <TB2> INFO: Test took 4500ms.
[12:50:36.837] <TB2> INFO: scanning low vcal = 230
[12:50:41.546] <TB2> INFO: Test took 4709ms.
[12:50:41.634] <TB2> INFO: scanning low vcal = 240
[12:50:46.144] <TB2> INFO: Test took 4510ms.
[12:50:46.203] <TB2> INFO: scanning low vcal = 250
[12:50:50.832] <TB2> INFO: Test took 4629ms.
[12:50:50.890] <TB2> INFO: scanning high vcal = 30 (= 210 in low range)
[12:50:55.439] <TB2> INFO: Test took 4549ms.
[12:50:55.495] <TB2> INFO: scanning high vcal = 50 (= 350 in low range)
[12:51:00.169] <TB2> INFO: Test took 4674ms.
[12:51:00.233] <TB2> INFO: scanning high vcal = 70 (= 490 in low range)
[12:51:04.828] <TB2> INFO: Test took 4595ms.
[12:51:04.910] <TB2> INFO: scanning high vcal = 90 (= 630 in low range)
[12:51:09.486] <TB2> INFO: Test took 4576ms.
[12:51:09.568] <TB2> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:51:14.182] <TB2> INFO: Test took 4614ms.
[12:51:14.671] <TB2> INFO: PixTestGainPedestal::measure() done
[12:51:45.915] <TB2> INFO: PixTestGainPedestal::fit() done
[12:51:45.915] <TB2> INFO: non-linearity mean: 0.946 0.950 0.957 0.959 0.948 0.952 0.954 0.954 0.956 0.949 0.962 0.959 0.954 0.957 0.954 0.962
[12:51:45.915] <TB2> INFO: non-linearity RMS: 0.006 0.007 0.006 0.006 0.007 0.007 0.006 0.006 0.007 0.008 0.005 0.005 0.007 0.007 0.006 0.005
[12:51:45.915] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[12:51:45.933] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[12:51:45.951] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[12:51:45.968] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[12:51:45.986] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[12:51:46.004] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[12:51:46.024] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[12:51:46.041] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[12:51:46.059] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[12:51:46.078] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[12:51:46.096] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[12:51:46.114] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[12:51:46.131] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[12:51:46.149] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[12:51:46.167] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[12:51:46.184] <TB2> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2051_FullQualification_2015-07-28_10h11m_1438071093//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[12:51:46.202] <TB2> INFO: PixTestGainPedestal::doTest() done, duration: 169 seconds
[12:51:46.208] <TB2> INFO: enter test to run
[12:51:46.208] <TB2> INFO: test: exit no parameter change
[12:51:46.574] <TB2> QUIET: Connection to board 156 closed.
[12:51:46.653] <TB2> INFO: pXar: this is the end, my friend
MoReWeb-v1.0.0-5-g82d9ff6 on branch psi46master