[11:19:21.216] <TB0> INFO: *** Welcome to pxar ***
[11:19:21.216] <TB0> INFO: *** Today: 2015/08/19
[11:19:21.216] <TB0> INFO: readRocDacs: /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C15.dat
[11:19:21.217] <TB0> INFO: readTbmDacs: /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//tbmParameters_C0b.dat
[11:19:21.217] <TB0> INFO: readMaskFile: /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//defaultMaskFile.dat
[11:19:21.217] <TB0> INFO: readTrimFile: /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters_C15.dat
[11:19:21.281] <TB0> INFO: clk: 4
[11:19:21.281] <TB0> INFO: ctr: 4
[11:19:21.281] <TB0> INFO: sda: 19
[11:19:21.281] <TB0> INFO: tin: 9
[11:19:21.281] <TB0> INFO: level: 15
[11:19:21.281] <TB0> INFO: triggerdelay: 0
[11:19:21.281] <TB0> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[11:19:21.281] <TB0> INFO: Log level: INFO
[11:19:21.292] <TB0> INFO: Found DTB DTB_WWVASW
[11:19:21.302] <TB0> QUIET: Connection to board DTB_WWVASW opened.
[11:19:21.305] <TB0> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 126
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WWVASW
MAC address: 40D85511807E
Hostname: pixelDTB126
Comment:
------------------------------------------------------
[11:19:21.307] <TB0> INFO: RPC call hashes of host and DTB match: 447413373
[11:19:22.818] <TB0> INFO: DUT info:
[11:19:22.818] <TB0> INFO: The DUT currently contains the following objects:
[11:19:22.818] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[11:19:22.818] <TB0> INFO: TBM Core alpha (0): 7 registers set
[11:19:22.818] <TB0> INFO: TBM Core beta (1): 7 registers set
[11:19:22.818] <TB0> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[11:19:22.818] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:22.818] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:22.818] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:22.818] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:22.818] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:22.818] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:22.818] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:22.818] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:22.818] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:22.818] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:22.818] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:22.818] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:22.818] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:22.818] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:22.818] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:22.818] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[11:19:23.219] <TB0> INFO: enter 'restricted' command line mode
[11:19:23.219] <TB0> INFO: enter test to run
[11:19:23.219] <TB0> INFO: test: pretest no parameter change
[11:19:23.219] <TB0> INFO: running: pretest
[11:19:23.223] <TB0> INFO: ######################################################################
[11:19:23.223] <TB0> INFO: PixTestPretest::doTest()
[11:19:23.223] <TB0> INFO: ######################################################################
[11:19:23.224] <TB0> INFO: ----------------------------------------------------------------------
[11:19:23.224] <TB0> INFO: PixTestPretest::programROC()
[11:19:23.224] <TB0> INFO: ----------------------------------------------------------------------
[11:19:41.241] <TB0> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[11:19:41.241] <TB0> INFO: IA differences per ROC: 17.7 18.5 19.3 16.9 16.1 18.5 18.5 19.3 20.1 20.9 18.5 18.5 18.5 20.9 20.1 19.3
[11:19:41.397] <TB0> INFO: ----------------------------------------------------------------------
[11:19:41.397] <TB0> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[11:19:41.397] <TB0> INFO: ----------------------------------------------------------------------
[11:19:46.477] <TB0> INFO: PixTestPretest::setVana() done, Module Ia 387.5 mA = 24.2188 mA/ROC
[11:19:46.481] <TB0> INFO: ----------------------------------------------------------------------
[11:19:46.481] <TB0> INFO: PixTestPretest::findWorkingPixel()
[11:19:46.481] <TB0> INFO: ----------------------------------------------------------------------
[11:19:54.921] <TB0> INFO: Test took 8435ms.
[11:19:55.218] <TB0> INFO: Found working pixel in all ROCs: col/row = 12/22
[11:19:55.258] <TB0> INFO: ----------------------------------------------------------------------
[11:19:55.258] <TB0> INFO: PixTestPretest::setVthrCompCalDel()
[11:19:55.258] <TB0> INFO: ----------------------------------------------------------------------
[11:20:03.625] <TB0> INFO: Test took 8357ms.
[11:20:03.933] <TB0> INFO: PixTestPretest::setVthrCompCalDel() done
[11:20:03.933] <TB0> INFO: CalDel: 142 143 119 142 138 131 132 132 131 151 137 155 132 154 143 148
[11:20:03.933] <TB0> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[11:20:03.936] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C0.dat
[11:20:03.936] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C1.dat
[11:20:03.936] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C2.dat
[11:20:03.937] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C3.dat
[11:20:03.937] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C4.dat
[11:20:03.937] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C5.dat
[11:20:03.937] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C6.dat
[11:20:03.938] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C7.dat
[11:20:03.938] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C8.dat
[11:20:03.938] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C9.dat
[11:20:03.938] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C10.dat
[11:20:03.939] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C11.dat
[11:20:03.939] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C12.dat
[11:20:03.939] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C13.dat
[11:20:03.939] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C14.dat
[11:20:03.939] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters_C15.dat
[11:20:03.940] <TB0> INFO: PixTestPretest::doTest() done, duration: 40 seconds
[11:20:04.039] <TB0> INFO: enter test to run
[11:20:04.039] <TB0> INFO: test: fulltest no parameter change
[11:20:04.039] <TB0> INFO: running: fulltest
[11:20:04.039] <TB0> INFO: ######################################################################
[11:20:04.039] <TB0> INFO: PixTestFullTest::doTest()
[11:20:04.039] <TB0> INFO: ######################################################################
[11:20:04.040] <TB0> INFO: ######################################################################
[11:20:04.040] <TB0> INFO: PixTestAlive::doTest()
[11:20:04.040] <TB0> INFO: ######################################################################
[11:20:04.042] <TB0> INFO: ----------------------------------------------------------------------
[11:20:04.042] <TB0> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:20:04.042] <TB0> INFO: ----------------------------------------------------------------------
[11:20:07.534] <TB0> INFO: Test took 3491ms.
[11:20:07.560] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:07.782] <TB0> INFO: PixTestAlive::aliveTest() done
[11:20:07.782] <TB0> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:20:07.784] <TB0> INFO: ----------------------------------------------------------------------
[11:20:07.784] <TB0> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:20:07.784] <TB0> INFO: ----------------------------------------------------------------------
[11:20:10.673] <TB0> INFO: Test took 2886ms.
[11:20:10.677] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:10.678] <TB0> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[11:20:10.908] <TB0> INFO: PixTestAlive::maskTest() done
[11:20:10.908] <TB0> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:20:10.910] <TB0> INFO: ----------------------------------------------------------------------
[11:20:10.910] <TB0> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[11:20:10.910] <TB0> INFO: ----------------------------------------------------------------------
[11:20:14.383] <TB0> INFO: Test took 3471ms.
[11:20:14.408] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:14.638] <TB0> INFO: PixTestAlive::addressDecodingTest() done
[11:20:14.638] <TB0> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[11:20:14.638] <TB0> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[11:20:14.650] <TB0> INFO: ######################################################################
[11:20:14.650] <TB0> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[11:20:14.650] <TB0> INFO: ######################################################################
[11:20:14.653] <TB0> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[11:20:14.667] <TB0> INFO: dacScan step from 0 .. 29
[11:20:36.284] <TB0> INFO: Test took 21617ms.
[11:20:36.317] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:20:36.317] <TB0> INFO: dacScan step from 30 .. 59
[11:21:01.415] <TB0> INFO: Test took 25098ms.
[11:21:01.565] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:01.591] <TB0> INFO: dacScan step from 60 .. 89
[11:21:31.313] <TB0> INFO: Test took 29722ms.
[11:21:31.632] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:21:31.728] <TB0> INFO: dacScan step from 90 .. 119
[11:22:01.383] <TB0> INFO: Test took 29654ms.
[11:22:01.694] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:01.778] <TB0> INFO: dacScan step from 120 .. 149
[11:22:28.109] <TB0> INFO: Test took 26331ms.
[11:22:28.301] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:22:51.591] <TB0> INFO: PixTestBBMap::doTest() done, duration: 156 seconds
[11:22:51.591] <TB0> INFO: number of dead bumps (per ROC): 0 1 0 0 0 0 0 7 0 0 0 0 2 0 0 0
[11:22:51.591] <TB0> INFO: separation cut (per ROC): 75 73 90 76 86 85 74 78 87 68 78 70 68 95 72 71
[11:22:51.677] <TB0> INFO: ######################################################################
[11:22:51.677] <TB0> INFO: PixTestScurves::fullTest() ntrig = 50
[11:22:51.677] <TB0> INFO: ######################################################################
[11:22:51.678] <TB0> INFO: ----------------------------------------------------------------------
[11:22:51.678] <TB0> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[11:22:51.678] <TB0> INFO: ----------------------------------------------------------------------
[11:22:51.678] <TB0> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[11:22:51.687] <TB0> INFO: dacScan step from 0 .. 3
[11:23:09.825] <TB0> INFO: Test took 18138ms.
[11:23:09.854] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:09.854] <TB0> INFO: dacScan step from 4 .. 7
[11:23:29.245] <TB0> INFO: Test took 19391ms.
[11:23:29.270] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:29.271] <TB0> INFO: dacScan step from 8 .. 11
[11:23:49.320] <TB0> INFO: Test took 20049ms.
[11:23:49.351] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:23:49.351] <TB0> INFO: dacScan step from 12 .. 15
[11:24:09.706] <TB0> INFO: Test took 20355ms.
[11:24:09.737] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:09.737] <TB0> INFO: dacScan step from 16 .. 19
[11:24:30.023] <TB0> INFO: Test took 20286ms.
[11:24:30.051] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:30.051] <TB0> INFO: dacScan step from 20 .. 23
[11:24:50.195] <TB0> INFO: Test took 20143ms.
[11:24:50.221] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:24:50.222] <TB0> INFO: dacScan step from 24 .. 27
[11:25:10.553] <TB0> INFO: Test took 20331ms.
[11:25:10.584] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:10.584] <TB0> INFO: dacScan step from 28 .. 31
[11:25:30.745] <TB0> INFO: Test took 20161ms.
[11:25:30.783] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:30.783] <TB0> INFO: dacScan step from 32 .. 35
[11:25:50.940] <TB0> INFO: Test took 20157ms.
[11:25:50.971] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:25:50.971] <TB0> INFO: dacScan step from 36 .. 39
[11:26:11.406] <TB0> INFO: Test took 20435ms.
[11:26:11.435] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:11.435] <TB0> INFO: dacScan step from 40 .. 43
[11:26:31.679] <TB0> INFO: Test took 20244ms.
[11:26:31.708] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:31.708] <TB0> INFO: dacScan step from 44 .. 47
[11:26:52.170] <TB0> INFO: Test took 20462ms.
[11:26:52.203] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:26:52.203] <TB0> INFO: dacScan step from 48 .. 51
[11:27:12.505] <TB0> INFO: Test took 20302ms.
[11:27:12.533] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:12.533] <TB0> INFO: dacScan step from 52 .. 55
[11:27:32.898] <TB0> INFO: Test took 20365ms.
[11:27:32.928] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:32.928] <TB0> INFO: dacScan step from 56 .. 59
[11:27:53.625] <TB0> INFO: Test took 20697ms.
[11:27:53.651] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:27:53.651] <TB0> INFO: dacScan step from 60 .. 63
[11:28:14.610] <TB0> INFO: Test took 20960ms.
[11:28:14.644] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:14.644] <TB0> INFO: dacScan step from 64 .. 67
[11:28:35.427] <TB0> INFO: Test took 20782ms.
[11:28:35.465] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:35.466] <TB0> INFO: dacScan step from 68 .. 71
[11:28:57.400] <TB0> INFO: Test took 21934ms.
[11:28:57.455] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:28:57.458] <TB0> INFO: dacScan step from 72 .. 75
[11:29:20.517] <TB0> INFO: Test took 23059ms.
[11:29:20.603] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:29:20.606] <TB0> INFO: dacScan step from 76 .. 79
[11:29:45.577] <TB0> INFO: Test took 24971ms.
[11:29:45.681] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:29:45.687] <TB0> INFO: dacScan step from 80 .. 83
[11:30:14.241] <TB0> INFO: Test took 28554ms.
[11:30:14.397] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:30:14.406] <TB0> INFO: dacScan step from 84 .. 87
[11:30:43.791] <TB0> INFO: Test took 29385ms.
[11:30:43.977] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:30:43.988] <TB0> INFO: dacScan step from 88 .. 91
[11:31:14.587] <TB0> INFO: Test took 30599ms.
[11:31:14.809] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:31:14.824] <TB0> INFO: dacScan step from 92 .. 95
[11:31:47.356] <TB0> INFO: Test took 32532ms.
[11:31:47.595] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:31:47.608] <TB0> INFO: dacScan step from 96 .. 99

[11:32:20.406] <TB0> INFO: Test took 32798ms.
[11:32:20.680] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:20.694] <TB0> INFO: dacScan step from 100 .. 103


[11:32:52.856] <TB0> INFO: Test took 32162ms.
[11:32:53.103] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:32:53.117] <TB0> INFO: dacScan step from 104 .. 107



[11:33:26.596] <TB0> INFO: Test took 33478ms.
[11:33:26.859] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:33:26.873] <TB0> INFO: dacScan step from 108 .. 111


[11:33:59.452] <TB0> INFO: Test took 32579ms.
[11:33:59.713] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:33:59.727] <TB0> INFO: dacScan step from 112 .. 115



[11:34:32.665] <TB0> INFO: Test took 32938ms.
[11:34:32.898] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:34:32.912] <TB0> INFO: dacScan step from 116 .. 119





[11:35:04.989] <TB0> INFO: Test took 32077ms.
[11:35:05.214] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:05.228] <TB0> INFO: dacScan step from 120 .. 123
[11:35:38.182] <TB0> INFO: Test took 32954ms.
[11:35:38.477] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:35:38.494] <TB0> INFO: dacScan step from 124 .. 127





[11:36:10.885] <TB0> INFO: Test took 32391ms.
[11:36:11.122] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:36:11.135] <TB0> INFO: dacScan step from 128 .. 131
[11:36:43.736] <TB0> INFO: Test took 32600ms.
[11:36:44.022] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:36:44.037] <TB0> INFO: dacScan step from 132 .. 135
[11:37:16.523] <TB0> INFO: Test took 32485ms.
[11:37:16.750] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:16.762] <TB0> INFO: dacScan step from 136 .. 139
[11:37:49.297] <TB0> INFO: Test took 32534ms.
[11:37:49.535] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:37:49.547] <TB0> INFO: dacScan step from 140 .. 143
[11:38:21.715] <TB0> INFO: Test took 32168ms.
[11:38:21.969] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:21.982] <TB0> INFO: dacScan step from 144 .. 147
[11:38:52.550] <TB0> INFO: Test took 30568ms.
[11:38:52.775] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:38:52.788] <TB0> INFO: dacScan step from 148 .. 149
[11:39:08.910] <TB0> INFO: Test took 16122ms.
[11:39:09.031] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:09.038] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:39:10.612] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:39:12.136] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:39:13.558] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:39:14.940] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:39:16.310] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:39:17.676] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:39:19.058] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:39:20.495] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:39:21.881] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:39:23.631] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:39:25.345] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:39:26.956] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:39:28.493] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:39:29.900] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:39:31.369] <TB0> INFO: dumping ASCII scurve output file: SCurveData
[11:39:33.018] <TB0> INFO: PixTestScurves::scurves() done
[11:39:33.018] <TB0> INFO: Vcal mean: 77.14 84.66 94.76 84.64 93.56 94.93 84.67 76.50 95.25 73.75 86.01 80.99 76.52 94.06 79.29 76.61
[11:39:33.018] <TB0> INFO: Vcal RMS: 4.97 5.09 5.58 4.87 6.45 6.06 5.31 4.61 5.66 4.23 5.57 4.19 4.59 6.06 4.46 4.68
[11:39:33.018] <TB0> INFO: PixTestScurves::fullTest() done, duration: 1001 seconds
[11:39:33.095] <TB0> INFO: ######################################################################
[11:39:33.095] <TB0> INFO: PixTestTrim::doTest()
[11:39:33.095] <TB0> INFO: ######################################################################
[11:39:33.096] <TB0> INFO: ----------------------------------------------------------------------
[11:39:33.096] <TB0> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[11:39:33.096] <TB0> INFO: ----------------------------------------------------------------------
[11:39:33.178] <TB0> INFO: ---> VthrComp thr map (minimal VthrComp)
[11:39:33.178] <TB0> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:39:33.187] <TB0> INFO: dacScan step from 0 .. 19
[11:39:47.489] <TB0> INFO: Test took 14302ms.
[11:39:47.510] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:39:47.510] <TB0> INFO: dacScan step from 20 .. 39
[11:40:01.837] <TB0> INFO: Test took 14327ms.
[11:40:01.860] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:01.860] <TB0> INFO: dacScan step from 40 .. 59
[11:40:16.896] <TB0> INFO: Test took 15036ms.
[11:40:16.917] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:16.917] <TB0> INFO: dacScan step from 60 .. 79
[11:40:32.059] <TB0> INFO: Test took 15142ms.
[11:40:32.083] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:32.083] <TB0> INFO: dacScan step from 80 .. 99
[11:40:48.337] <TB0> INFO: Test took 16253ms.
[11:40:48.415] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:40:48.429] <TB0> INFO: dacScan step from 100 .. 119
[11:41:06.930] <TB0> INFO: Test took 18501ms.
[11:41:07.107] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:07.140] <TB0> INFO: dacScan step from 120 .. 139
[11:41:25.603] <TB0> INFO: Test took 18462ms.
[11:41:25.740] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:41:25.769] <TB0> INFO: dacScan step from 140 .. 159
[11:41:43.046] <TB0> INFO: Test took 17277ms.
[11:41:43.108] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:07.856] <TB0> INFO: ROC 0 VthrComp = 82
[11:42:07.856] <TB0> INFO: ROC 1 VthrComp = 89
[11:42:07.856] <TB0> INFO: ROC 2 VthrComp = 100
[11:42:07.856] <TB0> INFO: ROC 3 VthrComp = 89
[11:42:07.856] <TB0> INFO: ROC 4 VthrComp = 95
[11:42:07.856] <TB0> INFO: ROC 5 VthrComp = 97
[11:42:07.857] <TB0> INFO: ROC 6 VthrComp = 89
[11:42:07.858] <TB0> INFO: ROC 7 VthrComp = 81
[11:42:07.858] <TB0> INFO: ROC 8 VthrComp = 99
[11:42:07.858] <TB0> INFO: ROC 9 VthrComp = 82
[11:42:07.859] <TB0> INFO: ROC 10 VthrComp = 91
[11:42:07.859] <TB0> INFO: ROC 11 VthrComp = 87
[11:42:07.859] <TB0> INFO: ROC 12 VthrComp = 82
[11:42:07.859] <TB0> INFO: ROC 13 VthrComp = 99
[11:42:07.859] <TB0> INFO: ROC 14 VthrComp = 85
[11:42:07.859] <TB0> INFO: ROC 15 VthrComp = 82
[11:42:07.859] <TB0> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[11:42:07.859] <TB0> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[11:42:07.869] <TB0> INFO: dacScan step from 0 .. 19
[11:42:23.201] <TB0> INFO: Test took 15331ms.
[11:42:23.221] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:23.221] <TB0> INFO: dacScan step from 20 .. 39
[11:42:37.848] <TB0> INFO: Test took 14627ms.
[11:42:37.882] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:37.887] <TB0> INFO: dacScan step from 40 .. 59
[11:42:57.101] <TB0> INFO: Test took 19214ms.
[11:42:57.320] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:42:57.361] <TB0> INFO: dacScan step from 60 .. 79
[11:43:18.883] <TB0> INFO: Test took 21522ms.
[11:43:19.069] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:19.119] <TB0> INFO: dacScan step from 80 .. 99
[11:43:41.162] <TB0> INFO: Test took 22042ms.
[11:43:41.343] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:43:41.389] <TB0> INFO: dacScan step from 100 .. 119
[11:44:02.077] <TB0> INFO: Test took 20688ms.
[11:44:02.233] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:02.286] <TB0> INFO: dacScan step from 120 .. 139
[11:44:23.081] <TB0> INFO: Test took 20795ms.
[11:44:23.241] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:44:23.288] <TB0> INFO: dacScan step from 140 .. 159
[11:44:45.647] <TB0> INFO: Test took 22359ms.
[11:44:45.844] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:45:14.718] <TB0> INFO: roc 0 with ID = 0 has maximal Vcal 58.7623 for pixel 0/79 mean/min/max = 45.569/32.3405/58.7976
[11:45:14.718] <TB0> INFO: roc 1 with ID = 1 has maximal Vcal 58.0656 for pixel 45/72 mean/min/max = 45.4434/32.8093/58.0774
[11:45:14.723] <TB0> INFO: roc 2 with ID = 2 has maximal Vcal 59.102 for pixel 0/62 mean/min/max = 45.4386/31.674/59.2033
[11:45:14.723] <TB0> INFO: roc 3 with ID = 3 has maximal Vcal 59.1162 for pixel 0/8 mean/min/max = 46.2864/33.3814/59.1914
[11:45:14.724] <TB0> INFO: roc 4 with ID = 4 has maximal Vcal 62.2154 for pixel 16/0 mean/min/max = 46.8742/31.3491/62.3994
[11:45:14.724] <TB0> INFO: roc 5 with ID = 5 has maximal Vcal 60.8618 for pixel 26/7 mean/min/max = 45.9344/30.979/60.8897
[11:45:14.724] <TB0> INFO: roc 6 with ID = 6 has maximal Vcal 60.4165 for pixel 1/71 mean/min/max = 46.5479/32.6199/60.4759
[11:45:14.724] <TB0> INFO: roc 7 with ID = 7 has maximal Vcal 58.3355 for pixel 8/3 mean/min/max = 45.3567/32.2615/58.4519
[11:45:14.725] <TB0> INFO: roc 8 with ID = 8 has maximal Vcal 60.2516 for pixel 16/5 mean/min/max = 46.1695/31.9838/60.3552
[11:45:14.725] <TB0> INFO: roc 9 with ID = 9 has maximal Vcal 54.9574 for pixel 29/1 mean/min/max = 43.9217/32.2812/55.5621
[11:45:14.725] <TB0> INFO: roc 10 with ID = 10 has maximal Vcal 59.5582 for pixel 11/12 mean/min/max = 45.9116/32.201/59.6221
[11:45:14.725] <TB0> INFO: roc 11 with ID = 11 has maximal Vcal 56.7105 for pixel 25/79 mean/min/max = 44.8406/32.8633/56.818
[11:45:14.726] <TB0> INFO: roc 12 with ID = 12 has maximal Vcal 57.4833 for pixel 12/77 mean/min/max = 44.8422/32.1803/57.5041
[11:45:14.726] <TB0> INFO: roc 13 with ID = 13 has maximal Vcal 60.0256 for pixel 19/79 mean/min/max = 45.4191/30.7768/60.0615
[11:45:14.726] <TB0> INFO: roc 14 with ID = 14 has maximal Vcal 57.6906 for pixel 3/38 mean/min/max = 44.7018/31.5728/57.8308
[11:45:14.727] <TB0> INFO: roc 15 with ID = 15 has maximal Vcal 57.79 for pixel 2/9 mean/min/max = 44.86/31.8197/57.9002
[11:45:14.727] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[11:46:51.898] <TB0> INFO: Test took 97171ms.
[11:46:53.316] <TB0> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[11:46:53.325] <TB0> INFO: dacScan step from 0 .. 19
[11:47:17.376] <TB0> INFO: Test took 24051ms.
[11:47:17.425] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:17.428] <TB0> INFO: dacScan step from 20 .. 39
[11:47:46.373] <TB0> INFO: Test took 28945ms.
[11:47:46.599] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:47:46.628] <TB0> INFO: dacScan step from 40 .. 59





[11:48:20.268] <TB0> INFO: Test took 33640ms.
[11:48:20.548] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:20.613] <TB0> INFO: dacScan step from 60 .. 79



[11:48:54.300] <TB0> INFO: Test took 33687ms.
[11:48:54.578] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:48:54.636] <TB0> INFO: dacScan step from 80 .. 99
[11:49:29.083] <TB0> INFO: Test took 34446ms.
[11:49:29.364] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:49:29.419] <TB0> INFO: dacScan step from 100 .. 119


[11:50:06.006] <TB0> INFO: Test took 36575ms.
[11:50:06.282] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:06.328] <TB0> INFO: dacScan step from 120 .. 139


[11:50:42.311] <TB0> INFO: Test took 35982ms.
[11:50:42.615] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:50:42.660] <TB0> INFO: dacScan step from 140 .. 159

[11:51:17.908] <TB0> INFO: Test took 35248ms.
[11:51:18.198] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:18.246] <TB0> INFO: dacScan step from 160 .. 179


[11:51:53.616] <TB0> INFO: Test took 35369ms.
[11:51:53.898] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:51:53.945] <TB0> INFO: dacScan step from 180 .. 199





[11:52:30.859] <TB0> INFO: Test took 36914ms.
[11:52:31.141] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:52:58.910] <TB0> INFO: ---> TrimStepCorr4 extremal thresholds: 0.176363 .. 255.000000
[11:52:58.991] <TB0> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[11:52:59.000] <TB0> INFO: dacScan step from 0 .. 19
[11:53:12.005] <TB0> INFO: Test took 13005ms.
[11:53:12.025] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:12.025] <TB0> INFO: dacScan step from 20 .. 39
[11:53:26.066] <TB0> INFO: Test took 14041ms.
[11:53:26.143] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:26.159] <TB0> INFO: dacScan step from 40 .. 59
[11:53:43.739] <TB0> INFO: Test took 17580ms.
[11:53:43.889] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:53:43.936] <TB0> INFO: dacScan step from 60 .. 79
[11:54:02.258] <TB0> INFO: Test took 18322ms.
[11:54:02.413] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:02.460] <TB0> INFO: dacScan step from 80 .. 99
[11:54:21.400] <TB0> INFO: Test took 18939ms.
[11:54:21.545] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:21.611] <TB0> INFO: dacScan step from 100 .. 119
[11:54:40.169] <TB0> INFO: Test took 18558ms.
[11:54:40.314] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:40.361] <TB0> INFO: dacScan step from 120 .. 139
[11:54:59.630] <TB0> INFO: Test took 19269ms.
[11:54:59.786] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:54:59.841] <TB0> INFO: dacScan step from 140 .. 159
[11:55:17.710] <TB0> INFO: Test took 17869ms.
[11:55:17.915] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:55:17.968] <TB0> INFO: dacScan step from 160 .. 179
[11:55:36.133] <TB0> INFO: Test took 18165ms.
[11:55:36.283] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:55:36.333] <TB0> INFO: dacScan step from 180 .. 199
[11:55:56.347] <TB0> INFO: Test took 20014ms.
[11:55:56.525] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:55:56.575] <TB0> INFO: dacScan step from 200 .. 219
[11:56:15.720] <TB0> INFO: Test took 19145ms.
[11:56:15.864] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:56:15.911] <TB0> INFO: dacScan step from 220 .. 239
[11:56:34.170] <TB0> INFO: Test took 18259ms.
[11:56:34.306] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:56:34.358] <TB0> INFO: dacScan step from 240 .. 255
[11:56:49.586] <TB0> INFO: Test took 15228ms.
[11:56:49.704] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:22.141] <TB0> INFO: ---> TrimStepCorr2 extremal thresholds: 14.868603 .. 45.026419
[11:57:22.218] <TB0> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 4 .. 55 (20) hits flags = 16 (plus default)
[11:57:22.227] <TB0> INFO: dacScan step from 4 .. 23
[11:57:35.339] <TB0> INFO: Test took 13112ms.
[11:57:35.364] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:35.364] <TB0> INFO: dacScan step from 24 .. 43
[11:57:50.357] <TB0> INFO: Test took 14993ms.
[11:57:50.506] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:57:50.543] <TB0> INFO: dacScan step from 44 .. 55
[11:58:01.785] <TB0> INFO: Test took 11241ms.
[11:58:01.912] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:58:17.724] <TB0> INFO: ---> TrimStepCorr1a extremal thresholds: 18.678698 .. 42.128864
[11:58:17.799] <TB0> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 8 .. 52 (20) hits flags = 16 (plus default)
[11:58:17.807] <TB0> INFO: dacScan step from 8 .. 27
[11:58:31.448] <TB0> INFO: Test took 13641ms.
[11:58:31.471] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:58:31.471] <TB0> INFO: dacScan step from 28 .. 47
[11:58:46.869] <TB0> INFO: Test took 15397ms.
[11:58:47.054] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:58:47.104] <TB0> INFO: dacScan step from 48 .. 52
[11:58:53.526] <TB0> INFO: Test took 6422ms.
[11:58:53.560] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:59:09.651] <TB0> INFO: ---> TrimStepCorr1b extremal thresholds: 1.988376 .. 41.252673
[11:59:09.744] <TB0> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 51 (20) hits flags = 16 (plus default)
[11:59:09.753] <TB0> INFO: dacScan step from 1 .. 20
[11:59:24.088] <TB0> INFO: Test took 14335ms.
[11:59:24.107] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:59:24.107] <TB0> INFO: dacScan step from 21 .. 40
[11:59:38.491] <TB0> INFO: Test took 14383ms.
[11:59:38.566] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[11:59:38.584] <TB0> INFO: dacScan step from 41 .. 51
[11:59:49.144] <TB0> INFO: Test took 10559ms.
[11:59:49.227] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:05.016] <TB0> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[12:00:05.016] <TB0> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[12:00:05.024] <TB0> INFO: dacScan step from 15 .. 34
[12:00:29.331] <TB0> INFO: Test took 24307ms.
[12:00:29.398] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:00:29.409] <TB0> INFO: dacScan step from 35 .. 54


[12:01:01.842] <TB0> INFO: Test took 32433ms.
[12:01:02.144] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:01:02.195] <TB0> INFO: dacScan step from 55 .. 55
[12:01:06.917] <TB0> INFO: Test took 4722ms.
[12:01:06.937] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:01:22.026] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C0.dat
[12:01:22.027] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C1.dat
[12:01:22.027] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C2.dat
[12:01:22.027] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C3.dat
[12:01:22.027] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C4.dat
[12:01:22.028] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C5.dat
[12:01:22.028] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C6.dat
[12:01:22.028] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C7.dat
[12:01:22.028] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C8.dat
[12:01:22.028] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C9.dat
[12:01:22.029] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C10.dat
[12:01:22.029] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C11.dat
[12:01:22.029] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C12.dat
[12:01:22.029] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C13.dat
[12:01:22.030] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C14.dat
[12:01:22.030] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C15.dat
[12:01:22.030] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C0.dat
[12:01:22.039] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C1.dat
[12:01:22.046] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C2.dat
[12:01:22.052] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C3.dat
[12:01:22.058] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C4.dat
[12:01:22.065] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C5.dat
[12:01:22.071] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C6.dat
[12:01:22.077] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C7.dat
[12:01:22.083] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C8.dat
[12:01:22.090] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C9.dat
[12:01:22.096] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C10.dat
[12:01:22.103] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C11.dat
[12:01:22.110] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C12.dat
[12:01:22.117] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C13.dat
[12:01:22.125] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C14.dat
[12:01:22.131] <TB0> INFO: write trim parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//trimParameters35_C15.dat
[12:01:22.138] <TB0> INFO: PixTestTrim::trimTest() done
[12:01:22.138] <TB0> INFO: vtrim: 96 94 92 121 115 105 121 110 118 98 110 87 101 96 106 103
[12:01:22.138] <TB0> INFO: vthrcomp: 82 89 100 89 95 97 89 81 99 82 91 87 82 99 85 82
[12:01:22.138] <TB0> INFO: vcal mean: 35.02 35.05 35.02 35.03 35.01 35.06 35.05 35.00 35.00 35.02 35.01 35.09 34.99 35.00 35.04 35.01
[12:01:22.138] <TB0> INFO: vcal RMS: 1.00 1.04 1.03 1.14 1.16 1.32 1.09 1.04 1.10 0.98 1.07 0.97 1.02 1.07 1.04 1.01
[12:01:22.138] <TB0> INFO: bits mean: 9.38 9.83 9.26 9.85 10.05 10.18 9.71 10.31 9.93 10.54 9.93 9.71 9.95 9.50 9.99 10.06
[12:01:22.138] <TB0> INFO: bits RMS: 2.72 2.47 2.87 2.37 2.47 2.46 2.52 2.32 2.49 2.25 2.42 2.53 2.57 2.90 2.56 2.46
[12:01:22.146] <TB0> INFO: ----------------------------------------------------------------------
[12:01:22.146] <TB0> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[12:01:22.146] <TB0> INFO: ----------------------------------------------------------------------
[12:01:22.149] <TB0> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[12:01:22.160] <TB0> INFO: dacScan step from 0 .. 19
[12:01:46.007] <TB0> INFO: Test took 23847ms.
[12:01:46.050] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:01:46.050] <TB0> INFO: dacScan step from 20 .. 39
[12:02:08.244] <TB0> INFO: Test took 22194ms.
[12:02:08.288] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:02:08.288] <TB0> INFO: dacScan step from 40 .. 59
[12:02:32.001] <TB0> INFO: Test took 23713ms.
[12:02:32.037] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:02:32.037] <TB0> INFO: dacScan step from 60 .. 79
[12:02:56.003] <TB0> INFO: Test took 23966ms.
[12:02:56.039] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:02:56.039] <TB0> INFO: dacScan step from 80 .. 99
[12:03:20.567] <TB0> INFO: Test took 24527ms.
[12:03:20.651] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:03:20.657] <TB0> INFO: dacScan step from 100 .. 119
[12:03:51.350] <TB0> INFO: Test took 30693ms.
[12:03:51.604] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:03:51.631] <TB0> INFO: dacScan step from 120 .. 139



[12:04:23.347] <TB0> INFO: Test took 31716ms.
[12:04:23.650] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:04:23.702] <TB0> INFO: dacScan step from 140 .. 159





[12:04:58.012] <TB0> INFO: Test took 34310ms.
[12:04:58.300] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:04:58.356] <TB0> INFO: dacScan step from 160 .. 179
[12:05:34.206] <TB0> INFO: Test took 35850ms.
[12:05:34.488] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:05:34.534] <TB0> INFO: dacScan step from 180 .. 199
[12:06:11.612] <TB0> INFO: Test took 37078ms.
[12:06:11.891] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:06:40.993] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 166 (20) hits flags = 16 (plus default)
[12:06:41.003] <TB0> INFO: dacScan step from 0 .. 19
[12:07:02.433] <TB0> INFO: Test took 21430ms.
[12:07:02.467] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:02.467] <TB0> INFO: dacScan step from 20 .. 39
[12:07:24.216] <TB0> INFO: Test took 21749ms.
[12:07:24.256] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:24.256] <TB0> INFO: dacScan step from 40 .. 59
[12:07:47.299] <TB0> INFO: Test took 23043ms.
[12:07:47.333] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:07:47.333] <TB0> INFO: dacScan step from 60 .. 79
[12:08:11.827] <TB0> INFO: Test took 24494ms.
[12:08:11.865] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:11.865] <TB0> INFO: dacScan step from 80 .. 99
[12:08:39.766] <TB0> INFO: Test took 27901ms.
[12:08:39.908] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:08:39.925] <TB0> INFO: dacScan step from 100 .. 119


[12:09:10.555] <TB0> INFO: Test took 30630ms.
[12:09:10.821] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:09:10.856] <TB0> INFO: dacScan step from 120 .. 139
[12:09:46.393] <TB0> INFO: Test took 35537ms.
[12:09:46.692] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:09:46.742] <TB0> INFO: dacScan step from 140 .. 159


[12:10:22.125] <TB0> INFO: Test took 35382ms.
[12:10:22.405] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:10:22.458] <TB0> INFO: dacScan step from 160 .. 166
[12:10:36.583] <TB0> INFO: Test took 14125ms.
[12:10:36.678] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:03.021] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 152 (20) hits flags = 16 (plus default)
[12:11:03.030] <TB0> INFO: dacScan step from 0 .. 19
[12:11:24.658] <TB0> INFO: Test took 21628ms.
[12:11:24.698] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:24.698] <TB0> INFO: dacScan step from 20 .. 39
[12:11:49.766] <TB0> INFO: Test took 25068ms.
[12:11:49.806] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:11:49.806] <TB0> INFO: dacScan step from 40 .. 59
[12:12:14.891] <TB0> INFO: Test took 25085ms.
[12:12:14.928] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:14.928] <TB0> INFO: dacScan step from 60 .. 79
[12:12:39.711] <TB0> INFO: Test took 24783ms.
[12:12:39.752] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:12:39.752] <TB0> INFO: dacScan step from 80 .. 99
[12:13:06.739] <TB0> INFO: Test took 26987ms.
[12:13:06.893] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:06.908] <TB0> INFO: dacScan step from 100 .. 119





[12:13:41.865] <TB0> INFO: Test took 34957ms.
[12:13:42.204] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:13:42.246] <TB0> INFO: dacScan step from 120 .. 139

[12:14:18.478] <TB0> INFO: Test took 36231ms.
[12:14:18.799] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:14:18.857] <TB0> INFO: dacScan step from 140 .. 152
[12:14:42.030] <TB0> INFO: Test took 23173ms.
[12:14:42.206] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:03.628] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 152 (20) hits flags = 16 (plus default)
[12:15:03.637] <TB0> INFO: dacScan step from 0 .. 19
[12:15:25.831] <TB0> INFO: Test took 22194ms.
[12:15:25.871] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:25.871] <TB0> INFO: dacScan step from 20 .. 39
[12:15:49.749] <TB0> INFO: Test took 23878ms.
[12:15:49.786] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:15:49.786] <TB0> INFO: dacScan step from 40 .. 59
[12:16:13.616] <TB0> INFO: Test took 23830ms.
[12:16:13.653] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:13.653] <TB0> INFO: dacScan step from 60 .. 79
[12:16:36.800] <TB0> INFO: Test took 23147ms.
[12:16:36.839] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:16:36.839] <TB0> INFO: dacScan step from 80 .. 99
[12:17:02.215] <TB0> INFO: Test took 25376ms.
[12:17:02.372] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:02.390] <TB0> INFO: dacScan step from 100 .. 119





[12:17:36.279] <TB0> INFO: Test took 33889ms.
[12:17:36.568] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:17:36.617] <TB0> INFO: dacScan step from 120 .. 139


[12:18:08.516] <TB0> INFO: Test took 31899ms.
[12:18:08.792] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:08.846] <TB0> INFO: dacScan step from 140 .. 152
[12:18:31.180] <TB0> INFO: Test took 22334ms.
[12:18:31.383] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:18:54.451] <TB0> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 151 (20) hits flags = 16 (plus default)
[12:18:54.459] <TB0> INFO: dacScan step from 0 .. 19
[12:19:15.847] <TB0> INFO: Test took 21387ms.
[12:19:15.882] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:15.882] <TB0> INFO: dacScan step from 20 .. 39
[12:19:37.548] <TB0> INFO: Test took 21666ms.
[12:19:37.589] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:19:37.589] <TB0> INFO: dacScan step from 40 .. 59
[12:20:00.290] <TB0> INFO: Test took 22700ms.
[12:20:00.331] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:00.331] <TB0> INFO: dacScan step from 60 .. 79
[12:20:23.020] <TB0> INFO: Test took 22689ms.
[12:20:23.058] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:23.058] <TB0> INFO: dacScan step from 80 .. 99
[12:20:47.170] <TB0> INFO: Test took 24112ms.
[12:20:47.321] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:20:47.335] <TB0> INFO: dacScan step from 100 .. 119





[12:21:21.834] <TB0> INFO: Test took 34498ms.
[12:21:22.115] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:22.159] <TB0> INFO: dacScan step from 120 .. 139


[12:21:57.216] <TB0> INFO: Test took 35057ms.
[12:21:57.499] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:21:57.553] <TB0> INFO: dacScan step from 140 .. 151
[12:22:19.216] <TB0> INFO: Test took 21663ms.
[12:22:19.394] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:42.993] <TB0> INFO: PixTestTrim::trimBitTest() done
[12:22:42.995] <TB0> INFO: PixTestTrim::doTest() done, duration: 2589 seconds
[12:22:43.687] <TB0> INFO: ######################################################################
[12:22:43.687] <TB0> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[12:22:43.687] <TB0> INFO: ######################################################################
[12:22:47.015] <TB0> INFO: Test took 3326ms.
[12:22:47.032] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:50.685] <TB0> INFO: Test took 3456ms.
[12:22:50.770] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:54.227] <TB0> INFO: Test took 3445ms.
[12:22:54.291] <TB0> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:22:54.297] <TB0> INFO: The DUT currently contains the following objects:
[12:22:54.297] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:22:54.297] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:22:54.297] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:22:54.297] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:22:54.297] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:54.297] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:54.297] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:54.297] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:54.297] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:54.297] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:54.297] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:54.297] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:54.297] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:54.297] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:54.297] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:54.297] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:54.297] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:54.298] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:54.298] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:54.298] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:55.405] <TB0> INFO: Test took 1107ms.
[12:22:55.406] <TB0> INFO: The DUT currently contains the following objects:
[12:22:55.406] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:22:55.406] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:22:55.406] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:22:55.406] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:22:55.406] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:55.406] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:55.406] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:55.407] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:55.407] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:55.407] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:55.407] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:55.407] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:55.407] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:55.407] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:55.407] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:55.407] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:55.407] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:55.407] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:55.407] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:55.407] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:56.509] <TB0> INFO: Test took 1102ms.
[12:22:56.510] <TB0> INFO: The DUT currently contains the following objects:
[12:22:56.510] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:22:56.510] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:22:56.510] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:22:56.510] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:22:56.510] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:56.510] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:56.510] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:56.510] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:56.510] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:56.510] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:56.510] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:56.510] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:56.510] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:56.510] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:56.510] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:56.510] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:56.510] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:56.510] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:56.510] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:56.510] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:57.616] <TB0> INFO: Test took 1106ms.
[12:22:57.617] <TB0> INFO: The DUT currently contains the following objects:
[12:22:57.617] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:22:57.617] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:22:57.617] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:22:57.617] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:22:57.617] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:57.617] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:57.617] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:57.617] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:57.617] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:57.617] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:57.617] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:57.617] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:57.618] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:57.618] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:57.618] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:57.618] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:57.618] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:57.618] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:57.618] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:57.618] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:58.724] <TB0> INFO: Test took 1106ms.
[12:22:58.725] <TB0> INFO: The DUT currently contains the following objects:
[12:22:58.725] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:22:58.725] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:22:58.725] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:22:58.725] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:22:58.725] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:58.725] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:58.725] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:58.725] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:58.726] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:58.726] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:58.726] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:58.726] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:58.726] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:58.726] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:58.726] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:58.726] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:58.726] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:58.726] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:58.726] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:58.726] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:59.835] <TB0> INFO: Test took 1109ms.
[12:22:59.836] <TB0> INFO: The DUT currently contains the following objects:
[12:22:59.836] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:22:59.836] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:22:59.836] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:22:59.836] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:22:59.836] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:59.836] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:59.836] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:59.836] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:59.836] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:59.836] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:59.836] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:59.836] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:59.836] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:59.836] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:59.837] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:59.837] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:59.837] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:59.837] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:59.837] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:22:59.837] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:00.945] <TB0> INFO: Test took 1108ms.
[12:23:00.946] <TB0> INFO: The DUT currently contains the following objects:
[12:23:00.946] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:23:00.946] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:23:00.946] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:23:00.946] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:23:00.946] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:00.946] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:00.946] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:00.946] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:00.946] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:00.946] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:00.946] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:00.946] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:00.946] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:00.946] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:00.946] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:00.946] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:00.946] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:00.946] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:00.947] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:00.947] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:02.053] <TB0> INFO: Test took 1106ms.
[12:23:02.054] <TB0> INFO: The DUT currently contains the following objects:
[12:23:02.054] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:23:02.054] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:23:02.054] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:23:02.054] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:23:02.054] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:02.054] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:02.054] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:02.054] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:02.054] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:02.054] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:02.054] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:02.054] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:02.054] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:02.054] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:02.054] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:02.055] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:02.055] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:02.055] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:02.055] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:02.055] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:03.162] <TB0> INFO: Test took 1107ms.
[12:23:03.163] <TB0> INFO: The DUT currently contains the following objects:
[12:23:03.163] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:23:03.163] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:23:03.163] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:23:03.163] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:23:03.163] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:03.163] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:03.163] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:03.163] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:03.163] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:03.163] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:03.163] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:03.163] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:03.163] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:03.163] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:03.163] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:03.163] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:03.163] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:03.163] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:03.163] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:03.163] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:04.285] <TB0> INFO: Test took 1122ms.
[12:23:04.286] <TB0> INFO: The DUT currently contains the following objects:
[12:23:04.286] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:23:04.286] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:23:04.286] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:23:04.286] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:23:04.287] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:04.287] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:04.287] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:04.287] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:04.287] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:04.287] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:04.287] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:04.287] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:04.287] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:04.287] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:04.287] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:04.287] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:04.287] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:04.287] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:04.287] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:04.287] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:05.395] <TB0> INFO: Test took 1108ms.
[12:23:05.396] <TB0> INFO: The DUT currently contains the following objects:
[12:23:05.396] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:23:05.396] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:23:05.396] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:23:05.396] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:23:05.396] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:05.396] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:05.396] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:05.397] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:05.397] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:05.397] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:05.397] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:05.397] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:05.397] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:05.397] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:05.397] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:05.397] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:05.397] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:05.397] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:05.397] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:05.397] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:06.506] <TB0> INFO: Test took 1109ms.
[12:23:06.507] <TB0> INFO: The DUT currently contains the following objects:
[12:23:06.507] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:23:06.507] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:23:06.507] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:23:06.507] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:23:06.507] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:06.507] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:06.507] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:06.507] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:06.507] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:06.507] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:06.507] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:06.507] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:06.507] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:06.507] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:06.507] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:06.507] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:06.508] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:06.508] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:06.508] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:06.508] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:07.616] <TB0> INFO: Test took 1108ms.
[12:23:07.617] <TB0> INFO: The DUT currently contains the following objects:
[12:23:07.617] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:23:07.617] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:23:07.617] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:23:07.617] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:23:07.617] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:07.618] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:07.618] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:07.618] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:07.618] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:07.618] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:07.618] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:07.618] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:07.618] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:07.618] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:07.618] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:07.618] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:07.618] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:07.618] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:07.618] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:07.618] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:08.723] <TB0> INFO: Test took 1105ms.
[12:23:08.724] <TB0> INFO: The DUT currently contains the following objects:
[12:23:08.724] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:23:08.724] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:23:08.724] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:23:08.724] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:23:08.724] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:08.724] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:08.725] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:08.725] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:08.725] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:08.725] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:08.725] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:08.725] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:08.725] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:08.725] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:08.725] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:08.725] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:08.725] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:08.725] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:08.725] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:08.725] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:09.833] <TB0> INFO: Test took 1108ms.
[12:23:09.834] <TB0> INFO: The DUT currently contains the following objects:
[12:23:09.834] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:23:09.834] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:23:09.834] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:23:09.834] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:23:09.834] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:09.834] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:09.834] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:09.835] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:09.835] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:09.835] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:09.835] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:09.835] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:09.835] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:09.835] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:09.835] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:09.835] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:09.835] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:09.835] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:09.835] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:09.835] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:10.942] <TB0> INFO: Test took 1107ms.
[12:23:10.943] <TB0> INFO: The DUT currently contains the following objects:
[12:23:10.943] <TB0> INFO: 2 TBM Cores tbm09c (2 ON)
[12:23:10.943] <TB0> INFO: TBM Core alpha (0): 7 registers set
[12:23:10.943] <TB0> INFO: TBM Core beta (1): 7 registers set
[12:23:10.943] <TB0> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[12:23:10.943] <TB0> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:10.943] <TB0> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:10.943] <TB0> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:10.943] <TB0> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:10.943] <TB0> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:10.943] <TB0> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:10.943] <TB0> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:10.943] <TB0> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:10.943] <TB0> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:10.943] <TB0> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:10.943] <TB0> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:10.943] <TB0> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:10.943] <TB0> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:10.943] <TB0> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:10.943] <TB0> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:10.943] <TB0> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[12:23:12.051] <TB0> INFO: Test took 1107ms.
[12:23:12.056] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:27:16.010] <TB0> INFO: Test took 243954ms.
[12:27:17.667] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:12.206] <TB0> INFO: Test took 234539ms.
[12:31:13.915] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:31:13.922] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:31:13.929] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:31:13.937] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:31:13.944] <TB0> INFO: safety margin for low PH: adding 1, margin is now 21
[12:31:13.954] <TB0> INFO: safety margin for low PH: adding 2, margin is now 22
[12:31:13.961] <TB0> INFO: safety margin for low PH: adding 3, margin is now 23
[12:31:13.968] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:31:13.975] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:31:13.982] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:31:13.989] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:31:13.996] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:31:14.003] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:31:14.010] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:31:14.017] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:31:14.024] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:31:14.031] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:31:14.038] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:31:14.045] <TB0> INFO: safety margin for low PH: adding 0, margin is now 20
[12:31:14.085] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C0.dat
[12:31:14.086] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C1.dat
[12:31:14.086] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C2.dat
[12:31:14.086] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C3.dat
[12:31:14.086] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C4.dat
[12:31:14.087] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C5.dat
[12:31:14.087] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C6.dat
[12:31:14.087] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C7.dat
[12:31:14.087] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C8.dat
[12:31:14.088] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C9.dat
[12:31:14.088] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C10.dat
[12:31:14.088] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C11.dat
[12:31:14.088] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C12.dat
[12:31:14.088] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C13.dat
[12:31:14.089] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C14.dat
[12:31:14.089] <TB0> INFO: write dac parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//dacParameters35_C15.dat
[12:31:17.908] <TB0> INFO: Test took 3815ms.
[12:31:21.497] <TB0> INFO: Test took 3307ms.
[12:31:25.303] <TB0> INFO: Test took 3539ms.
[12:31:25.585] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:26.497] <TB0> INFO: Test took 912ms.
[12:31:26.500] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:27.607] <TB0> INFO: Test took 1107ms.
[12:31:27.612] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:28.717] <TB0> INFO: Test took 1105ms.
[12:31:28.720] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:29.843] <TB0> INFO: Test took 1123ms.
[12:31:29.846] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:30.954] <TB0> INFO: Test took 1108ms.
[12:31:30.959] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:32.066] <TB0> INFO: Test took 1107ms.
[12:31:32.070] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:33.235] <TB0> INFO: Test took 1165ms.
[12:31:33.239] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:34.345] <TB0> INFO: Test took 1107ms.
[12:31:34.349] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:35.457] <TB0> INFO: Test took 1108ms.
[12:31:35.461] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:36.567] <TB0> INFO: Test took 1107ms.
[12:31:36.570] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:37.676] <TB0> INFO: Test took 1106ms.
[12:31:37.680] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:38.788] <TB0> INFO: Test took 1109ms.
[12:31:38.792] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:39.900] <TB0> INFO: Test took 1109ms.
[12:31:39.904] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:41.010] <TB0> INFO: Test took 1107ms.
[12:31:41.014] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:42.121] <TB0> INFO: Test took 1107ms.
[12:31:42.124] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:43.233] <TB0> INFO: Test took 1109ms.
[12:31:43.236] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:44.347] <TB0> INFO: Test took 1111ms.
[12:31:44.350] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:45.460] <TB0> INFO: Test took 1110ms.
[12:31:45.464] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:46.571] <TB0> INFO: Test took 1108ms.
[12:31:46.575] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:47.684] <TB0> INFO: Test took 1109ms.
[12:31:47.688] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:48.795] <TB0> INFO: Test took 1108ms.
[12:31:48.798] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:49.907] <TB0> INFO: Test took 1109ms.
[12:31:49.911] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:51.018] <TB0> INFO: Test took 1107ms.
[12:31:51.021] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:52.127] <TB0> INFO: Test took 1106ms.
[12:31:52.131] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:53.237] <TB0> INFO: Test took 1107ms.
[12:31:53.241] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:54.347] <TB0> INFO: Test took 1107ms.
[12:31:54.351] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:55.451] <TB0> INFO: Test took 1100ms.
[12:31:55.453] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:56.554] <TB0> INFO: Test took 1101ms.
[12:31:56.556] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:57.657] <TB0> INFO: Test took 1101ms.
[12:31:57.660] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:58.760] <TB0> INFO: Test took 1101ms.
[12:31:58.763] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:31:59.863] <TB0> INFO: Test took 1100ms.
[12:31:59.865] <TB0> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[12:32:00.966] <TB0> INFO: Test took 1101ms.
[12:32:01.473] <TB0> INFO: PixTestPhOptimization::doTest() done, duration: 557 seconds
[12:32:01.473] <TB0> INFO: PH scale (per ROC): 85 87 84 78 75 83 84 92 94 81 89 80 92 80 83 83
[12:32:01.473] <TB0> INFO: PH offset (per ROC): 167 151 161 176 173 141 145 149 157 140 153 145 144 174 160 155
[12:32:01.663] <TB0> INFO: ######################################################################
[12:32:01.663] <TB0> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[12:32:01.663] <TB0> INFO: ######################################################################
[12:32:01.673] <TB0> INFO: scanning low vcal = 10
[12:32:05.435] <TB0> INFO: Test took 3762ms.
[12:32:05.438] <TB0> INFO: scanning low vcal = 20
[12:32:09.251] <TB0> INFO: Test took 3813ms.
[12:32:09.254] <TB0> INFO: scanning low vcal = 30
[12:32:13.082] <TB0> INFO: Test took 3828ms.
[12:32:13.089] <TB0> INFO: scanning low vcal = 40
[12:32:17.284] <TB0> INFO: Test took 4195ms.
[12:32:17.342] <TB0> INFO: scanning low vcal = 50
[12:32:21.661] <TB0> INFO: Test took 4319ms.
[12:32:21.716] <TB0> INFO: scanning low vcal = 60
[12:32:25.956] <TB0> INFO: Test took 4240ms.
[12:32:26.029] <TB0> INFO: scanning low vcal = 70
[12:32:30.631] <TB0> INFO: Test took 4602ms.
[12:32:30.686] <TB0> INFO: scanning low vcal = 80
[12:32:35.282] <TB0> INFO: Test took 4595ms.
[12:32:35.342] <TB0> INFO: scanning low vcal = 90
[12:32:40.021] <TB0> INFO: Test took 4679ms.
[12:32:40.102] <TB0> INFO: scanning low vcal = 100
[12:32:44.783] <TB0> INFO: Test took 4681ms.
[12:32:44.845] <TB0> INFO: scanning low vcal = 110
[12:32:49.503] <TB0> INFO: Test took 4658ms.
[12:32:49.559] <TB0> INFO: scanning low vcal = 120
[12:32:54.348] <TB0> INFO: Test took 4789ms.
[12:32:54.440] <TB0> INFO: scanning low vcal = 130
[12:32:59.111] <TB0> INFO: Test took 4670ms.
[12:32:59.167] <TB0> INFO: scanning low vcal = 140
[12:33:03.790] <TB0> INFO: Test took 4623ms.
[12:33:03.879] <TB0> INFO: scanning low vcal = 150
[12:33:08.648] <TB0> INFO: Test took 4769ms.
[12:33:08.702] <TB0> INFO: scanning low vcal = 160
[12:33:13.303] <TB0> INFO: Test took 4601ms.
[12:33:13.364] <TB0> INFO: scanning low vcal = 170
[12:33:18.225] <TB0> INFO: Test took 4861ms.
[12:33:18.288] <TB0> INFO: scanning low vcal = 180
[12:33:23.009] <TB0> INFO: Test took 4721ms.
[12:33:23.064] <TB0> INFO: scanning low vcal = 190
[12:33:27.906] <TB0> INFO: Test took 4842ms.
[12:33:27.960] <TB0> INFO: scanning low vcal = 200
[12:33:32.557] <TB0> INFO: Test took 4597ms.
[12:33:32.613] <TB0> INFO: scanning low vcal = 210
[12:33:37.349] <TB0> INFO: Test took 4736ms.
[12:33:37.411] <TB0> INFO: scanning low vcal = 220
[12:33:42.013] <TB0> INFO: Test took 4602ms.
[12:33:42.067] <TB0> INFO: scanning low vcal = 230
[12:33:46.794] <TB0> INFO: Test took 4727ms.
[12:33:46.847] <TB0> INFO: scanning low vcal = 240
[12:33:51.605] <TB0> INFO: Test took 4758ms.
[12:33:51.665] <TB0> INFO: scanning low vcal = 250
[12:33:56.233] <TB0> INFO: Test took 4568ms.
[12:33:56.289] <TB0> INFO: scanning high vcal = 30 (= 210 in low range)
[12:34:00.958] <TB0> INFO: Test took 4669ms.
[12:34:01.012] <TB0> INFO: scanning high vcal = 50 (= 350 in low range)
[12:34:05.556] <TB0> INFO: Test took 4544ms.
[12:34:05.610] <TB0> INFO: scanning high vcal = 70 (= 490 in low range)
[12:34:10.218] <TB0> INFO: Test took 4608ms.
[12:34:10.272] <TB0> INFO: scanning high vcal = 90 (= 630 in low range)
[12:34:14.946] <TB0> INFO: Test took 4673ms.
[12:34:15.001] <TB0> INFO: scanning high vcal = 200 (= 1400 in low range)
[12:34:19.608] <TB0> INFO: Test took 4607ms.
[12:34:20.180] <TB0> INFO: PixTestGainPedestal::measure() done
[12:34:52.242] <TB0> INFO: PixTestGainPedestal::fit() done
[12:34:52.242] <TB0> INFO: non-linearity mean: 0.952 0.955 0.957 0.960 0.951 0.951 0.958 0.957 0.960 0.953 0.964 0.957 0.958 0.951 0.955 0.952
[12:34:52.242] <TB0> INFO: non-linearity RMS: 0.006 0.005 0.005 0.004 0.009 0.006 0.006 0.004 0.006 0.006 0.005 0.006 0.006 0.006 0.006 0.005
[12:34:52.242] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[12:34:52.261] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[12:34:52.279] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[12:34:52.298] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[12:34:52.316] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[12:34:52.335] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[12:34:52.353] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[12:34:52.372] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[12:34:52.390] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[12:34:52.410] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[12:34:52.429] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[12:34:52.448] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[12:34:52.467] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[12:34:52.486] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[12:34:52.504] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[12:34:52.523] <TB0> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2041_FullQualification_2015-08-19_10h30m_1439973003//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[12:34:52.542] <TB0> INFO: PixTestGainPedestal::doTest() done, duration: 170 seconds
[12:34:52.548] <TB0> INFO: enter test to run
[12:34:52.548] <TB0> INFO: test: exit no parameter change
[12:34:53.145] <TB0> QUIET: Connection to board 126 closed.
[12:34:53.225] <TB0> INFO: pXar: this is the end, my friend