[12:56:09.807] <TB3> INFO: *** Welcome to pxar ***
[12:56:09.807] <TB3> INFO: *** Today: 2015/07/09
[12:56:09.807] <TB3> INFO: readRocDacs: /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C15.dat
[12:56:09.809] <TB3> INFO: readTbmDacs: /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//tbmParameters_C0b.dat
[12:56:09.809] <TB3> INFO: readMaskFile: /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//defaultMaskFile.dat
[12:56:09.809] <TB3> INFO: readTrimFile: /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters_C15.dat
[12:56:09.895] <TB3> INFO: clk: 4
[12:56:09.895] <TB3> INFO: ctr: 4
[12:56:09.895] <TB3> INFO: sda: 19
[12:56:09.895] <TB3> INFO: tin: 9
[12:56:09.895] <TB3> INFO: level: 15
[12:56:09.895] <TB3> INFO: triggerdelay: 0
[12:56:09.895] <TB3> QUIET: Instanciating API for pxar v2.2.5+45~gbf85984
[12:56:09.895] <TB3> INFO: Log level: INFO
[12:56:09.902] <TB3> INFO: Found DTB DTB_WZ4I6J
[12:56:09.915] <TB3> QUIET: Connection to board DTB_WZ4I6J opened.
[12:56:09.918] <TB3> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 170
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WZ4I6J
MAC address: 40D8551180AA
Hostname: pixelDTB170
Comment:
------------------------------------------------------
[12:56:09.921] <TB3> INFO: RPC call hashes of host and DTB match: 447413373
[12:56:11.477] <TB3> INFO: DUT info:
[12:56:11.477] <TB3> INFO: The DUT currently contains the following objects:
[12:56:11.477] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[12:56:11.477] <TB3> INFO: TBM Core alpha (0): 7 registers set
[12:56:11.477] <TB3> INFO: TBM Core beta (1): 7 registers set
[12:56:11.477] <TB3> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[12:56:11.478] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:11.478] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:11.478] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:11.478] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:11.478] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:11.478] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:11.478] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:11.478] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:11.478] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:11.478] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:11.478] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:11.478] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:11.478] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:11.478] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:11.478] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:11.478] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[12:56:11.879] <TB3> INFO: enter 'restricted' command line mode
[12:56:11.879] <TB3> INFO: enter test to run
[12:56:11.879] <TB3> INFO: test: pretest no parameter change
[12:56:11.879] <TB3> INFO: running: pretest
[12:56:11.888] <TB3> INFO: ######################################################################
[12:56:11.888] <TB3> INFO: PixTestPretest::doTest()
[12:56:11.888] <TB3> INFO: ######################################################################
[12:56:11.890] <TB3> INFO: ----------------------------------------------------------------------
[12:56:11.890] <TB3> INFO: PixTestPretest::programROC()
[12:56:11.890] <TB3> INFO: ----------------------------------------------------------------------
[12:56:29.907] <TB3> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[12:56:29.907] <TB3> INFO: IA differences per ROC: 16.9 18.5 16.9 19.3 19.3 20.1 18.5 20.1 16.9 19.3 16.9 18.5 19.3 18.5 18.5 19.3
[12:56:29.995] <TB3> INFO: ----------------------------------------------------------------------
[12:56:29.995] <TB3> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[12:56:29.995] <TB3> INFO: ----------------------------------------------------------------------
[12:56:49.556] <TB3> INFO: PixTestPretest::setVana() done, Module Ia 384.3 mA = 24.0187 mA/ROC
[12:56:49.559] <TB3> INFO: ----------------------------------------------------------------------
[12:56:49.559] <TB3> INFO: PixTestPretest::findWorkingPixel()
[12:56:49.559] <TB3> INFO: ----------------------------------------------------------------------
[12:56:57.712] <TB3> INFO: Test took 8149ms.
[12:56:58.010] <TB3> INFO: Found working pixel in all ROCs: col/row = 12/22
[12:56:58.049] <TB3> INFO: ----------------------------------------------------------------------
[12:56:58.049] <TB3> INFO: PixTestPretest::setVthrCompCalDel()
[12:56:58.049] <TB3> INFO: ----------------------------------------------------------------------
[12:57:06.316] <TB3> INFO: Test took 8261ms.
[12:57:06.626] <TB3> INFO: PixTestPretest::setVthrCompCalDel() done
[12:57:06.626] <TB3> INFO: CalDel: 148 157 127 142 145 155 145 168 132 133 140 130 129 126 131 142
[12:57:06.626] <TB3> INFO: VthrComp: 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51 51
[12:57:06.631] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C0.dat
[12:57:06.631] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C1.dat
[12:57:06.631] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C2.dat
[12:57:06.632] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C3.dat
[12:57:06.632] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C4.dat
[12:57:06.632] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C5.dat
[12:57:06.632] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C6.dat
[12:57:06.633] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C7.dat
[12:57:06.633] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C8.dat
[12:57:06.633] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C9.dat
[12:57:06.633] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C10.dat
[12:57:06.633] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C11.dat
[12:57:06.634] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C12.dat
[12:57:06.634] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C13.dat
[12:57:06.634] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C14.dat
[12:57:06.634] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters_C15.dat
[12:57:06.634] <TB3> INFO: PixTestPretest::doTest() done, duration: 54 seconds
[12:57:06.721] <TB3> INFO: enter test to run
[12:57:06.721] <TB3> INFO: test: fulltest no parameter change
[12:57:06.721] <TB3> INFO: running: fulltest
[12:57:06.721] <TB3> INFO: ######################################################################
[12:57:06.721] <TB3> INFO: PixTestFullTest::doTest()
[12:57:06.721] <TB3> INFO: ######################################################################
[12:57:06.722] <TB3> INFO: ######################################################################
[12:57:06.722] <TB3> INFO: PixTestAlive::doTest()
[12:57:06.722] <TB3> INFO: ######################################################################
[12:57:06.724] <TB3> INFO: ----------------------------------------------------------------------
[12:57:06.724] <TB3> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:57:06.724] <TB3> INFO: ----------------------------------------------------------------------
[12:57:10.127] <TB3> INFO: Test took 3402ms.
[12:57:10.157] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:10.384] <TB3> INFO: PixTestAlive::aliveTest() done
[12:57:10.384] <TB3> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:57:10.385] <TB3> INFO: ----------------------------------------------------------------------
[12:57:10.386] <TB3> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:57:10.386] <TB3> INFO: ----------------------------------------------------------------------
[12:57:13.124] <TB3> INFO: Test took 2737ms.
[12:57:13.127] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:13.128] <TB3> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[12:57:13.353] <TB3> INFO: PixTestAlive::maskTest() done
[12:57:13.353] <TB3> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:57:13.355] <TB3> INFO: ----------------------------------------------------------------------
[12:57:13.355] <TB3> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[12:57:13.355] <TB3> INFO: ----------------------------------------------------------------------
[12:57:16.774] <TB3> INFO: Test took 3417ms.
[12:57:16.795] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:17.029] <TB3> INFO: PixTestAlive::addressDecodingTest() done
[12:57:17.029] <TB3> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[12:57:17.029] <TB3> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[12:57:17.042] <TB3> INFO: ######################################################################
[12:57:17.042] <TB3> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[12:57:17.042] <TB3> INFO: ######################################################################
[12:57:17.045] <TB3> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[12:57:17.059] <TB3> INFO: dacScan step from 0 .. 29
[12:57:38.395] <TB3> INFO: Test took 21335ms.
[12:57:38.428] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:57:38.428] <TB3> INFO: dacScan step from 30 .. 59
[12:58:02.207] <TB3> INFO: Test took 23779ms.
[12:58:02.332] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:02.352] <TB3> INFO: dacScan step from 60 .. 89
[12:58:31.330] <TB3> INFO: Test took 28978ms.
[12:58:31.598] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:31.686] <TB3> INFO: dacScan step from 90 .. 119
[12:58:58.546] <TB3> INFO: Test took 26860ms.
[12:58:58.813] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:58:58.899] <TB3> INFO: dacScan step from 120 .. 149
[12:59:22.552] <TB3> INFO: Test took 23653ms.
[12:59:22.742] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[12:59:45.396] <TB3> INFO: PixTestBBMap::doTest() done, duration: 148 seconds
[12:59:45.396] <TB3> INFO: number of dead bumps (per ROC): 4 0 0 0 0 0 0 0 0 0 0 2 1 0 30 8
[12:59:45.396] <TB3> INFO: separation cut (per ROC): 77 71 100 91 92 75 82 83 79 70 71 99 88 78 66 72
[12:59:45.480] <TB3> INFO: ######################################################################
[12:59:45.480] <TB3> INFO: PixTestScurves::fullTest() ntrig = 50
[12:59:45.480] <TB3> INFO: ######################################################################
[12:59:45.480] <TB3> INFO: ----------------------------------------------------------------------
[12:59:45.480] <TB3> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[12:59:45.481] <TB3> INFO: ----------------------------------------------------------------------
[12:59:45.481] <TB3> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[12:59:45.489] <TB3> INFO: dacScan step from 0 .. 3
[13:00:03.356] <TB3> INFO: Test took 17867ms.
[13:00:03.384] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:03.390] <TB3> INFO: dacScan step from 4 .. 7
[13:00:22.147] <TB3> INFO: Test took 18757ms.
[13:00:22.172] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:22.176] <TB3> INFO: dacScan step from 8 .. 11
[13:00:41.001] <TB3> INFO: Test took 18825ms.
[13:00:41.038] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:41.038] <TB3> INFO: dacScan step from 12 .. 15
[13:00:59.885] <TB3> INFO: Test took 18847ms.
[13:00:59.920] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:00:59.920] <TB3> INFO: dacScan step from 16 .. 19
[13:01:18.801] <TB3> INFO: Test took 18881ms.
[13:01:18.831] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:18.835] <TB3> INFO: dacScan step from 20 .. 23
[13:01:37.664] <TB3> INFO: Test took 18829ms.
[13:01:37.693] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:37.693] <TB3> INFO: dacScan step from 24 .. 27
[13:01:56.580] <TB3> INFO: Test took 18887ms.
[13:01:56.613] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:01:56.616] <TB3> INFO: dacScan step from 28 .. 31
[13:02:15.490] <TB3> INFO: Test took 18874ms.
[13:02:15.522] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:15.522] <TB3> INFO: dacScan step from 32 .. 35
[13:02:34.313] <TB3> INFO: Test took 18791ms.
[13:02:34.345] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:34.345] <TB3> INFO: dacScan step from 36 .. 39
[13:02:53.222] <TB3> INFO: Test took 18877ms.
[13:02:53.254] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:02:53.254] <TB3> INFO: dacScan step from 40 .. 43
[13:03:12.173] <TB3> INFO: Test took 18919ms.
[13:03:12.212] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:12.212] <TB3> INFO: dacScan step from 44 .. 47
[13:03:31.221] <TB3> INFO: Test took 19009ms.
[13:03:31.258] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:31.258] <TB3> INFO: dacScan step from 48 .. 51
[13:03:50.089] <TB3> INFO: Test took 18831ms.
[13:03:50.123] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:03:50.123] <TB3> INFO: dacScan step from 52 .. 55
[13:04:08.948] <TB3> INFO: Test took 18825ms.
[13:04:08.981] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:08.981] <TB3> INFO: dacScan step from 56 .. 59
[13:04:27.864] <TB3> INFO: Test took 18882ms.
[13:04:27.904] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:27.904] <TB3> INFO: dacScan step from 60 .. 63
[13:04:46.888] <TB3> INFO: Test took 18983ms.
[13:04:46.928] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:04:46.929] <TB3> INFO: dacScan step from 64 .. 67
[13:05:06.216] <TB3> INFO: Test took 19287ms.
[13:05:06.275] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:06.276] <TB3> INFO: dacScan step from 68 .. 71
[13:05:26.283] <TB3> INFO: Test took 20007ms.
[13:05:26.363] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:26.365] <TB3> INFO: dacScan step from 72 .. 75
[13:05:47.737] <TB3> INFO: Test took 21372ms.
[13:05:47.846] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:05:47.851] <TB3> INFO: dacScan step from 76 .. 79
[13:06:11.477] <TB3> INFO: Test took 23626ms.
[13:06:11.638] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:11.645] <TB3> INFO: dacScan step from 80 .. 83
[13:06:38.375] <TB3> INFO: Test took 26730ms.
[13:06:38.589] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:06:38.600] <TB3> INFO: dacScan step from 84 .. 87
[13:07:06.744] <TB3> INFO: Test took 28144ms.
[13:07:06.980] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:06.990] <TB3> INFO: dacScan step from 88 .. 91


[13:07:35.724] <TB3> INFO: Test took 28733ms.
[13:07:35.968] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:07:35.981] <TB3> INFO: dacScan step from 92 .. 95



[13:08:05.253] <TB3> INFO: Test took 29272ms.
[13:08:05.497] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:05.510] <TB3> INFO: dacScan step from 96 .. 99



[13:08:34.495] <TB3> INFO: Test took 28985ms.
[13:08:34.783] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:08:34.796] <TB3> INFO: dacScan step from 100 .. 103



[13:09:03.970] <TB3> INFO: Test took 29173ms.
[13:09:04.219] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:04.232] <TB3> INFO: dacScan step from 104 .. 107




[13:09:33.717] <TB3> INFO: Test took 29485ms.
[13:09:34.049] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:09:34.061] <TB3> INFO: dacScan step from 108 .. 111






[13:10:03.286] <TB3> INFO: Test took 29225ms.
[13:10:03.533] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:03.546] <TB3> INFO: dacScan step from 112 .. 115
[13:10:32.477] <TB3> INFO: Test took 28931ms.
[13:10:32.724] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:10:32.736] <TB3> INFO: dacScan step from 116 .. 119
[13:11:01.812] <TB3> INFO: Test took 29075ms.
[13:11:02.039] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:02.051] <TB3> INFO: dacScan step from 120 .. 123
[13:11:30.989] <TB3> INFO: Test took 28937ms.
[13:11:31.254] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:11:31.267] <TB3> INFO: dacScan step from 124 .. 127
[13:12:00.205] <TB3> INFO: Test took 28938ms.
[13:12:00.453] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:00.466] <TB3> INFO: dacScan step from 128 .. 131
[13:12:29.748] <TB3> INFO: Test took 29282ms.
[13:12:30.001] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:30.016] <TB3> INFO: dacScan step from 132 .. 135
[13:12:58.997] <TB3> INFO: Test took 28981ms.
[13:12:59.236] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:12:59.249] <TB3> INFO: dacScan step from 136 .. 139
[13:13:28.388] <TB3> INFO: Test took 29139ms.
[13:13:28.646] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:28.658] <TB3> INFO: dacScan step from 140 .. 143
[13:13:57.467] <TB3> INFO: Test took 28809ms.
[13:13:57.706] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:13:57.719] <TB3> INFO: dacScan step from 144 .. 147
[13:14:24.073] <TB3> INFO: Test took 26354ms.
[13:14:24.345] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:24.357] <TB3> INFO: dacScan step from 148 .. 149
[13:14:38.747] <TB3> INFO: Test took 14390ms.
[13:14:38.859] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:14:38.866] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:14:40.370] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:14:41.941] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:14:43.295] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:14:44.679] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:14:46.182] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:14:47.620] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:14:49.028] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:14:50.457] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:14:51.891] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:14:53.432] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:14:54.946] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:14:56.427] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:14:57.934] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:14:59.489] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:15:00.961] <TB3> INFO: dumping ASCII scurve output file: SCurveData
[13:15:02.376] <TB3> INFO: PixTestScurves::scurves() done
[13:15:02.376] <TB3> INFO: Vcal mean: 82.08 71.24 88.89 79.35 75.68 72.90 78.76 78.02 88.69 76.82 80.73 92.81 83.66 74.28 80.84 80.48
[13:15:02.376] <TB3> INFO: Vcal RMS: 5.02 4.53 5.55 5.22 4.30 5.02 4.22 4.26 5.46 3.75 4.43 5.09 4.90 4.62 4.32 5.01
[13:15:02.376] <TB3> INFO: PixTestScurves::fullTest() done, duration: 916 seconds
[13:15:02.447] <TB3> INFO: ######################################################################
[13:15:02.447] <TB3> INFO: PixTestTrim::doTest()
[13:15:02.447] <TB3> INFO: ######################################################################
[13:15:02.448] <TB3> INFO: ----------------------------------------------------------------------
[13:15:02.448] <TB3> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[13:15:02.448] <TB3> INFO: ----------------------------------------------------------------------
[13:15:02.534] <TB3> INFO: ---> VthrComp thr map (minimal VthrComp)
[13:15:02.534] <TB3> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:15:02.542] <TB3> INFO: dacScan step from 0 .. 19
[13:15:17.526] <TB3> INFO: Test took 14984ms.
[13:15:17.553] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:17.553] <TB3> INFO: dacScan step from 20 .. 39
[13:15:32.570] <TB3> INFO: Test took 15017ms.
[13:15:32.596] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:32.596] <TB3> INFO: dacScan step from 40 .. 59
[13:15:47.682] <TB3> INFO: Test took 15086ms.
[13:15:47.709] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:15:47.709] <TB3> INFO: dacScan step from 60 .. 79
[13:16:02.821] <TB3> INFO: Test took 15112ms.
[13:16:02.847] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:02.847] <TB3> INFO: dacScan step from 80 .. 99
[13:16:19.419] <TB3> INFO: Test took 16572ms.
[13:16:19.521] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:19.534] <TB3> INFO: dacScan step from 100 .. 119
[13:16:37.836] <TB3> INFO: Test took 18302ms.
[13:16:38.087] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:38.138] <TB3> INFO: dacScan step from 120 .. 139
[13:16:55.709] <TB3> INFO: Test took 17571ms.
[13:16:55.862] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:16:55.893] <TB3> INFO: dacScan step from 140 .. 159
[13:17:10.872] <TB3> INFO: Test took 14979ms.
[13:17:10.928] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:32.443] <TB3> INFO: ROC 0 VthrComp = 86
[13:17:32.443] <TB3> INFO: ROC 1 VthrComp = 77
[13:17:32.444] <TB3> INFO: ROC 2 VthrComp = 95
[13:17:32.444] <TB3> INFO: ROC 3 VthrComp = 84
[13:17:32.444] <TB3> INFO: ROC 4 VthrComp = 84
[13:17:32.444] <TB3> INFO: ROC 5 VthrComp = 78
[13:17:32.444] <TB3> INFO: ROC 6 VthrComp = 82
[13:17:32.444] <TB3> INFO: ROC 7 VthrComp = 86
[13:17:32.444] <TB3> INFO: ROC 8 VthrComp = 94
[13:17:32.444] <TB3> INFO: ROC 9 VthrComp = 85
[13:17:32.444] <TB3> INFO: ROC 10 VthrComp = 87
[13:17:32.445] <TB3> INFO: ROC 11 VthrComp = 100
[13:17:32.445] <TB3> INFO: ROC 12 VthrComp = 91
[13:17:32.445] <TB3> INFO: ROC 13 VthrComp = 82
[13:17:32.445] <TB3> INFO: ROC 14 VthrComp = 85
[13:17:32.445] <TB3> INFO: ROC 15 VthrComp = 84
[13:17:32.445] <TB3> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[13:17:32.445] <TB3> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[13:17:32.454] <TB3> INFO: dacScan step from 0 .. 19
[13:17:47.529] <TB3> INFO: Test took 15075ms.
[13:17:47.556] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:17:47.556] <TB3> INFO: dacScan step from 20 .. 39
[13:18:02.759] <TB3> INFO: Test took 15202ms.
[13:18:02.796] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:02.799] <TB3> INFO: dacScan step from 40 .. 59
[13:18:21.743] <TB3> INFO: Test took 18944ms.
[13:18:21.907] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:21.947] <TB3> INFO: dacScan step from 60 .. 79
[13:18:42.078] <TB3> INFO: Test took 20130ms.
[13:18:42.232] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:18:42.285] <TB3> INFO: dacScan step from 80 .. 99
[13:19:02.323] <TB3> INFO: Test took 20037ms.
[13:19:02.496] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:02.554] <TB3> INFO: dacScan step from 100 .. 119
[13:19:22.458] <TB3> INFO: Test took 19904ms.
[13:19:22.631] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:22.689] <TB3> INFO: dacScan step from 120 .. 139
[13:19:41.668] <TB3> INFO: Test took 18979ms.
[13:19:41.844] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:19:41.898] <TB3> INFO: dacScan step from 140 .. 159
[13:20:00.683] <TB3> INFO: Test took 18785ms.
[13:20:00.871] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:20:28.450] <TB3> INFO: roc 0 with ID = 0 has maximal Vcal 58.5556 for pixel 7/69 mean/min/max = 45.2645/31.7354/58.7936
[13:20:28.450] <TB3> INFO: roc 1 with ID = 1 has maximal Vcal 57.9864 for pixel 8/0 mean/min/max = 46.5605/35.038/58.0829
[13:20:28.451] <TB3> INFO: roc 2 with ID = 2 has maximal Vcal 59.1875 for pixel 11/1 mean/min/max = 45.6075/31.8133/59.4017
[13:20:28.451] <TB3> INFO: roc 3 with ID = 3 has maximal Vcal 59.432 for pixel 5/24 mean/min/max = 45.4878/31.5371/59.4385
[13:20:28.451] <TB3> INFO: roc 4 with ID = 4 has maximal Vcal 55.5765 for pixel 0/3 mean/min/max = 44.1126/32.6404/55.5849
[13:20:28.452] <TB3> INFO: roc 5 with ID = 5 has maximal Vcal 57.923 for pixel 22/78 mean/min/max = 46.0547/34.087/58.0224
[13:20:28.452] <TB3> INFO: roc 6 with ID = 6 has maximal Vcal 56.9223 for pixel 51/5 mean/min/max = 44.7708/32.5754/56.9663
[13:20:28.452] <TB3> INFO: roc 7 with ID = 7 has maximal Vcal 56.9129 for pixel 20/2 mean/min/max = 44.5225/32.1191/56.926
[13:20:28.453] <TB3> INFO: roc 8 with ID = 8 has maximal Vcal 58.7545 for pixel 5/3 mean/min/max = 45.1614/31.5336/58.7892
[13:20:28.453] <TB3> INFO: roc 9 with ID = 9 has maximal Vcal 54.6905 for pixel 37/79 mean/min/max = 43.4575/32.0422/54.8728
[13:20:28.453] <TB3> INFO: roc 10 with ID = 10 has maximal Vcal 57.1267 for pixel 11/17 mean/min/max = 44.7988/32.3846/57.213
[13:20:28.453] <TB3> INFO: roc 11 with ID = 11 has maximal Vcal 58.2464 for pixel 6/1 mean/min/max = 45.4171/32.4754/58.3589
[13:20:28.454] <TB3> INFO: roc 12 with ID = 12 has maximal Vcal 57.112 for pixel 11/62 mean/min/max = 44.9367/32.4499/57.4235
[13:20:28.454] <TB3> INFO: roc 13 with ID = 13 has maximal Vcal 56.4356 for pixel 2/22 mean/min/max = 44.3913/32.0729/56.7098
[13:20:28.454] <TB3> INFO: roc 14 with ID = 14 has maximal Vcal 57.0688 for pixel 10/9 mean/min/max = 44.47/31.7208/57.2192
[13:20:28.455] <TB3> INFO: roc 15 with ID = 15 has maximal Vcal 60.0357 for pixel 0/69 mean/min/max = 46.1005/31.9753/60.2257
[13:20:28.455] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:22:03.513] <TB3> INFO: Test took 95058ms.
[13:22:05.089] <TB3> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:22:05.097] <TB3> INFO: dacScan step from 0 .. 19
[13:22:27.727] <TB3> INFO: Test took 22629ms.
[13:22:27.770] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:27.771] <TB3> INFO: dacScan step from 20 .. 39
[13:22:54.192] <TB3> INFO: Test took 26421ms.
[13:22:54.408] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:22:54.447] <TB3> INFO: dacScan step from 40 .. 59



[13:23:26.088] <TB3> INFO: Test took 31641ms.
[13:23:26.459] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:26.519] <TB3> INFO: dacScan step from 60 .. 79



[13:23:59.395] <TB3> INFO: Test took 32876ms.
[13:23:59.687] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:23:59.744] <TB3> INFO: dacScan step from 80 .. 99



[13:24:32.599] <TB3> INFO: Test took 32855ms.
[13:24:32.877] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:24:32.933] <TB3> INFO: dacScan step from 100 .. 119


[13:25:05.632] <TB3> INFO: Test took 32699ms.
[13:25:05.916] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:05.977] <TB3> INFO: dacScan step from 120 .. 139




[13:25:38.774] <TB3> INFO: Test took 32797ms.
[13:25:39.048] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:25:39.104] <TB3> INFO: dacScan step from 140 .. 159



[13:26:11.974] <TB3> INFO: Test took 32870ms.
[13:26:12.248] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:12.301] <TB3> INFO: dacScan step from 160 .. 179



[13:26:44.695] <TB3> INFO: Test took 32394ms.
[13:26:45.139] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:26:45.208] <TB3> INFO: dacScan step from 180 .. 199



[13:27:16.435] <TB3> INFO: Test took 31227ms.
[13:27:16.878] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:43.812] <TB3> INFO: ---> TrimStepCorr4 extremal thresholds: 0.003710 .. 255.000000
[13:27:43.897] <TB3> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[13:27:43.906] <TB3> INFO: dacScan step from 0 .. 19
[13:27:56.881] <TB3> INFO: Test took 12975ms.
[13:27:56.900] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:27:56.900] <TB3> INFO: dacScan step from 20 .. 39
[13:28:11.150] <TB3> INFO: Test took 14250ms.
[13:28:11.225] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:11.242] <TB3> INFO: dacScan step from 40 .. 59
[13:28:28.935] <TB3> INFO: Test took 17693ms.
[13:28:29.084] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:29.142] <TB3> INFO: dacScan step from 60 .. 79
[13:28:46.732] <TB3> INFO: Test took 17589ms.
[13:28:46.868] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:28:46.927] <TB3> INFO: dacScan step from 80 .. 99
[13:29:03.751] <TB3> INFO: Test took 16824ms.
[13:29:03.968] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:04.019] <TB3> INFO: dacScan step from 100 .. 119
[13:29:21.686] <TB3> INFO: Test took 17667ms.
[13:29:21.848] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:21.920] <TB3> INFO: dacScan step from 120 .. 139
[13:29:39.544] <TB3> INFO: Test took 17624ms.
[13:29:39.696] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:39.772] <TB3> INFO: dacScan step from 140 .. 159
[13:29:56.562] <TB3> INFO: Test took 16790ms.
[13:29:56.708] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:29:56.768] <TB3> INFO: dacScan step from 160 .. 179
[13:30:14.632] <TB3> INFO: Test took 17864ms.
[13:30:14.773] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:14.827] <TB3> INFO: dacScan step from 180 .. 199
[13:30:32.133] <TB3> INFO: Test took 17306ms.
[13:30:32.275] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:32.333] <TB3> INFO: dacScan step from 200 .. 219
[13:30:50.062] <TB3> INFO: Test took 17729ms.
[13:30:50.200] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:30:50.255] <TB3> INFO: dacScan step from 220 .. 239
[13:31:07.626] <TB3> INFO: Test took 17371ms.
[13:31:07.760] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:07.812] <TB3> INFO: dacScan step from 240 .. 255
[13:31:21.500] <TB3> INFO: Test took 13688ms.
[13:31:21.607] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:31:55.074] <TB3> INFO: ---> TrimStepCorr2 extremal thresholds: 12.710522 .. 44.326015
[13:31:55.153] <TB3> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 2 .. 54 (20) hits flags = 16 (plus default)
[13:31:55.160] <TB3> INFO: dacScan step from 2 .. 21
[13:32:08.682] <TB3> INFO: Test took 13521ms.
[13:32:08.705] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:08.705] <TB3> INFO: dacScan step from 22 .. 41
[13:32:23.255] <TB3> INFO: Test took 14550ms.
[13:32:23.341] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:23.363] <TB3> INFO: dacScan step from 42 .. 54
[13:32:35.195] <TB3> INFO: Test took 11832ms.
[13:32:35.309] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:32:51.289] <TB3> INFO: ---> TrimStepCorr1a extremal thresholds: 1.831633 .. 42.112820
[13:32:51.384] <TB3> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 1 .. 52 (20) hits flags = 16 (plus default)
[13:32:51.392] <TB3> INFO: dacScan step from 1 .. 20
[13:33:04.803] <TB3> INFO: Test took 13411ms.
[13:33:04.825] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:04.825] <TB3> INFO: dacScan step from 21 .. 40
[13:33:18.831] <TB3> INFO: Test took 14006ms.
[13:33:18.910] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:18.929] <TB3> INFO: dacScan step from 41 .. 52
[13:33:30.219] <TB3> INFO: Test took 11290ms.
[13:33:30.340] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:33:47.732] <TB3> INFO: ---> TrimStepCorr1b extremal thresholds: 1.831633 .. 41.326548
[13:33:47.828] <TB3> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 1 .. 51 (20) hits flags = 16 (plus default)
[13:33:47.838] <TB3> INFO: dacScan step from 1 .. 20
[13:34:01.439] <TB3> INFO: Test took 13601ms.
[13:34:01.464] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:01.464] <TB3> INFO: dacScan step from 21 .. 40
[13:34:15.619] <TB3> INFO: Test took 14155ms.
[13:34:15.713] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:15.737] <TB3> INFO: dacScan step from 41 .. 51
[13:34:26.372] <TB3> INFO: Test took 10635ms.
[13:34:26.451] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:34:42.097] <TB3> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[13:34:42.097] <TB3> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[13:34:42.105] <TB3> INFO: dacScan step from 15 .. 34
[13:35:05.110] <TB3> INFO: Test took 23005ms.
[13:35:05.170] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:05.182] <TB3> INFO: dacScan step from 35 .. 54




[13:35:36.024] <TB3> INFO: Test took 30842ms.
[13:35:36.330] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:36.387] <TB3> INFO: dacScan step from 55 .. 55
[13:35:40.595] <TB3> INFO: Test took 4208ms.
[13:35:40.610] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:35:53.686] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:35:53.686] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:35:53.686] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:35:53.686] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:35:53.686] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:35:53.686] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:35:53.686] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:35:53.686] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:35:53.687] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:35:53.687] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:35:53.687] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:35:53.687] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:35:53.687] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:35:53.687] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:35:53.687] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:35:53.687] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:35:53.687] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C0.dat
[13:35:53.693] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C1.dat
[13:35:53.699] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C2.dat
[13:35:53.704] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C3.dat
[13:35:53.710] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C4.dat
[13:35:53.716] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C5.dat
[13:35:53.721] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C6.dat
[13:35:53.727] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C7.dat
[13:35:53.733] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C8.dat
[13:35:53.739] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C9.dat
[13:35:53.744] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C10.dat
[13:35:53.750] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C11.dat
[13:35:53.756] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C12.dat
[13:35:53.761] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C13.dat
[13:35:53.767] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C14.dat
[13:35:53.773] <TB3> INFO: write trim parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//trimParameters35_C15.dat
[13:35:53.778] <TB3> INFO: PixTestTrim::trimTest() done
[13:35:53.778] <TB3> INFO: vtrim: 111 120 108 126 99 101 98 106 111 105 93 116 101 103 105 100
[13:35:53.778] <TB3> INFO: vthrcomp: 86 77 95 84 84 78 82 86 94 85 87 100 91 82 85 84
[13:35:53.778] <TB3> INFO: vcal mean: 35.04 35.06 35.05 34.98 34.99 35.04 35.02 35.01 35.07 34.98 34.98 35.01 35.02 35.00 35.01 35.00
[13:35:53.778] <TB3> INFO: vcal RMS: 0.97 0.92 0.96 0.97 0.86 0.92 0.89 0.96 1.09 0.96 1.05 1.01 0.95 0.96 1.05 1.00
[13:35:53.778] <TB3> INFO: bits mean: 9.75 9.24 9.64 10.02 9.87 9.59 9.51 10.16 9.98 10.15 9.76 9.70 9.76 10.05 10.32 9.36
[13:35:53.778] <TB3> INFO: bits RMS: 2.62 2.31 2.67 2.47 2.46 2.31 2.65 2.43 2.56 2.47 2.56 2.53 2.55 2.45 2.42 2.71
[13:35:53.783] <TB3> INFO: ----------------------------------------------------------------------
[13:35:53.783] <TB3> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 240 150 100
[13:35:53.783] <TB3> INFO: ----------------------------------------------------------------------
[13:35:53.786] <TB3> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[13:35:53.794] <TB3> INFO: dacScan step from 0 .. 19
[13:36:15.979] <TB3> INFO: Test took 22185ms.
[13:36:16.021] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:16.021] <TB3> INFO: dacScan step from 20 .. 39
[13:36:39.095] <TB3> INFO: Test took 23074ms.
[13:36:39.148] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:36:39.152] <TB3> INFO: dacScan step from 40 .. 59
[13:37:07.153] <TB3> INFO: Test took 28001ms.
[13:37:07.399] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:07.440] <TB3> INFO: dacScan step from 60 .. 79






[13:37:40.397] <TB3> INFO: Test took 32957ms.
[13:37:40.681] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:37:40.731] <TB3> INFO: dacScan step from 80 .. 99
[13:38:11.576] <TB3> INFO: Test took 30844ms.
[13:38:11.843] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:11.897] <TB3> INFO: dacScan step from 100 .. 119
[13:38:44.744] <TB3> INFO: Test took 32847ms.
[13:38:45.027] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:38:45.080] <TB3> INFO: dacScan step from 120 .. 139
[13:39:15.261] <TB3> INFO: Test took 30181ms.
[13:39:15.540] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:15.598] <TB3> INFO: dacScan step from 140 .. 159
[13:39:48.445] <TB3> INFO: Test took 32847ms.
[13:39:48.762] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:39:48.820] <TB3> INFO: dacScan step from 160 .. 179
[13:40:20.773] <TB3> INFO: Test took 31953ms.
[13:40:21.081] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:40:21.137] <TB3> INFO: dacScan step from 180 .. 199
[13:40:53.625] <TB3> INFO: Test took 32488ms.
[13:40:54.072] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:19.170] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 77 (20) hits flags = 16 (plus default)
[13:41:19.178] <TB3> INFO: dacScan step from 0 .. 19
[13:41:41.758] <TB3> INFO: Test took 22580ms.
[13:41:41.793] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:41:41.793] <TB3> INFO: dacScan step from 20 .. 39
[13:42:05.619] <TB3> INFO: Test took 23826ms.
[13:42:05.709] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:05.718] <TB3> INFO: dacScan step from 40 .. 59



[13:42:37.615] <TB3> INFO: Test took 31896ms.
[13:42:37.914] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:42:37.963] <TB3> INFO: dacScan step from 60 .. 77
[13:43:05.866] <TB3> INFO: Test took 27903ms.
[13:43:06.152] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:23.269] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 73 (20) hits flags = 16 (plus default)
[13:43:23.277] <TB3> INFO: dacScan step from 0 .. 19
[13:43:45.995] <TB3> INFO: Test took 22718ms.
[13:43:46.032] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:43:46.032] <TB3> INFO: dacScan step from 20 .. 39
[13:44:11.392] <TB3> INFO: Test took 25360ms.
[13:44:11.535] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:11.551] <TB3> INFO: dacScan step from 40 .. 59



[13:44:43.563] <TB3> INFO: Test took 32012ms.
[13:44:43.833] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:44:43.883] <TB3> INFO: dacScan step from 60 .. 73
[13:45:06.986] <TB3> INFO: Test took 23102ms.
[13:45:07.176] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:23.600] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 68 (20) hits flags = 16 (plus default)
[13:45:23.608] <TB3> INFO: dacScan step from 0 .. 19
[13:45:46.003] <TB3> INFO: Test took 22395ms.
[13:45:46.048] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:45:46.048] <TB3> INFO: dacScan step from 20 .. 39
[13:46:12.204] <TB3> INFO: Test took 26156ms.
[13:46:12.387] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:12.408] <TB3> INFO: dacScan step from 40 .. 59



[13:46:42.398] <TB3> INFO: Test took 29990ms.
[13:46:42.665] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:46:42.716] <TB3> INFO: dacScan step from 60 .. 68
[13:46:58.856] <TB3> INFO: Test took 16140ms.
[13:46:58.987] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:14.692] <TB3> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 65 (20) hits flags = 16 (plus default)
[13:47:14.701] <TB3> INFO: dacScan step from 0 .. 19
[13:47:35.835] <TB3> INFO: Test took 21134ms.
[13:47:35.879] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:47:35.879] <TB3> INFO: dacScan step from 20 .. 39
[13:48:03.642] <TB3> INFO: Test took 27763ms.
[13:48:03.857] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:03.885] <TB3> INFO: dacScan step from 40 .. 59



[13:48:36.968] <TB3> INFO: Test took 33083ms.
[13:48:37.241] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:48:37.292] <TB3> INFO: dacScan step from 60 .. 65
[13:48:49.098] <TB3> INFO: Test took 11805ms.
[13:48:49.185] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:06.471] <TB3> INFO: PixTestTrim::trimBitTest() done
[13:49:06.472] <TB3> INFO: PixTestTrim::doTest() done, duration: 2044 seconds
[13:49:07.166] <TB3> INFO: ######################################################################
[13:49:07.166] <TB3> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[13:49:07.166] <TB3> INFO: ######################################################################
[13:49:10.429] <TB3> INFO: Test took 3261ms.
[13:49:10.446] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:13.924] <TB3> INFO: Test took 3282ms.
[13:49:13.990] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:17.300] <TB3> INFO: Test took 3299ms.
[13:49:17.361] <TB3> INFO: Fetched DAQ statistics. Counters are being reset now.
[13:49:17.369] <TB3> INFO: The DUT currently contains the following objects:
[13:49:17.369] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:49:17.369] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:49:17.369] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:49:17.369] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:49:17.369] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:17.369] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:17.369] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:17.369] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:17.369] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:17.369] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:17.369] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:17.369] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:17.369] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:17.369] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:17.369] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:17.369] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:17.369] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:17.369] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:17.369] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:17.369] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:18.472] <TB3> INFO: Test took 1103ms.
[13:49:18.472] <TB3> INFO: The DUT currently contains the following objects:
[13:49:18.472] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:49:18.472] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:49:18.472] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:49:18.472] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:49:18.472] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:18.472] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:18.473] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:18.473] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:18.473] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:18.473] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:18.473] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:18.473] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:18.473] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:18.473] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:18.473] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:18.473] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:18.473] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:18.473] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:18.473] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:18.473] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:19.575] <TB3> INFO: Test took 1102ms.
[13:49:19.576] <TB3> INFO: The DUT currently contains the following objects:
[13:49:19.576] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:49:19.576] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:49:19.576] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:49:19.576] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:49:19.576] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:19.576] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:19.576] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:19.576] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:19.576] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:19.576] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:19.576] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:19.576] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:19.576] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:19.576] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:19.576] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:19.576] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:19.576] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:19.576] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:19.576] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:19.576] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:20.679] <TB3> INFO: Test took 1103ms.
[13:49:20.680] <TB3> INFO: The DUT currently contains the following objects:
[13:49:20.680] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:49:20.680] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:49:20.680] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:49:20.680] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:49:20.680] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:20.680] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:20.680] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:20.680] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:20.680] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:20.680] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:20.680] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:20.680] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:20.680] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:20.680] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:20.680] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:20.680] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:20.680] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:20.680] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:20.680] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:20.680] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:21.781] <TB3> INFO: Test took 1101ms.
[13:49:21.781] <TB3> INFO: The DUT currently contains the following objects:
[13:49:21.781] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:49:21.781] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:49:21.781] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:49:21.781] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:49:21.781] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:21.781] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:21.781] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:21.781] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:21.781] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:21.781] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:21.781] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:21.781] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:21.781] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:21.782] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:21.782] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:21.782] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:21.782] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:21.782] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:21.782] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:21.782] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:22.882] <TB3> INFO: Test took 1100ms.
[13:49:22.883] <TB3> INFO: The DUT currently contains the following objects:
[13:49:22.883] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:49:22.883] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:49:22.883] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:49:22.883] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:49:22.883] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:22.883] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:22.883] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:22.883] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:22.883] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:22.883] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:22.883] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:22.883] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:22.883] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:22.883] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:22.883] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:22.883] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:22.883] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:22.883] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:22.883] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:22.883] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:23.984] <TB3> INFO: Test took 1101ms.
[13:49:23.984] <TB3> INFO: The DUT currently contains the following objects:
[13:49:23.984] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:49:23.984] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:49:23.984] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:49:23.984] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:49:23.984] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:23.984] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:23.984] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:23.984] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:23.984] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:23.984] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:23.984] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:23.984] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:23.984] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:23.984] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:23.984] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:23.984] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:23.984] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:23.984] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:23.984] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:23.984] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:25.085] <TB3> INFO: Test took 1101ms.
[13:49:25.086] <TB3> INFO: The DUT currently contains the following objects:
[13:49:25.086] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:49:25.086] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:49:25.086] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:49:25.086] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:49:25.086] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:25.086] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:25.086] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:25.086] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:25.086] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:25.086] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:25.086] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:25.086] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:25.086] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:25.086] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:25.086] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:25.086] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:25.086] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:25.086] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:25.086] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:25.086] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:26.187] <TB3> INFO: Test took 1101ms.
[13:49:26.188] <TB3> INFO: The DUT currently contains the following objects:
[13:49:26.188] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:49:26.188] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:49:26.188] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:49:26.188] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:49:26.188] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:26.188] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:26.188] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:26.188] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:26.188] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:26.188] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:26.188] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:26.188] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:26.188] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:26.188] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:26.188] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:26.188] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:26.188] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:26.188] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:26.188] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:26.188] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:27.289] <TB3> INFO: Test took 1101ms.
[13:49:27.289] <TB3> INFO: The DUT currently contains the following objects:
[13:49:27.289] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:49:27.289] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:49:27.289] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:49:27.289] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:49:27.289] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:27.290] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:27.290] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:27.290] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:27.290] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:27.290] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:27.290] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:27.290] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:27.290] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:27.290] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:27.290] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:27.290] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:27.290] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:27.290] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:27.290] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:27.290] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:28.390] <TB3> INFO: Test took 1100ms.
[13:49:28.391] <TB3> INFO: The DUT currently contains the following objects:
[13:49:28.391] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:49:28.391] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:49:28.391] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:49:28.391] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:49:28.391] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:28.391] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:28.391] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:28.391] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:28.391] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:28.391] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:28.391] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:28.391] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:28.391] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:28.391] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:28.391] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:28.391] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:28.391] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:28.391] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:28.391] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:28.391] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:29.491] <TB3> INFO: Test took 1100ms.
[13:49:29.492] <TB3> INFO: The DUT currently contains the following objects:
[13:49:29.492] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:49:29.492] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:49:29.492] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:49:29.492] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:49:29.492] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:29.492] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:29.492] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:29.492] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:29.492] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:29.492] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:29.492] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:29.492] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:29.492] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:29.492] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:29.492] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:29.492] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:29.492] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:29.492] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:29.492] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:29.492] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:30.593] <TB3> INFO: Test took 1101ms.
[13:49:30.593] <TB3> INFO: The DUT currently contains the following objects:
[13:49:30.593] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:49:30.593] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:49:30.593] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:49:30.593] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:49:30.593] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:30.593] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:30.593] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:30.593] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:30.593] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:30.593] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:30.593] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:30.593] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:30.593] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:30.593] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:30.593] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:30.593] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:30.593] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:30.593] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:30.593] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:30.593] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:31.694] <TB3> INFO: Test took 1101ms.
[13:49:31.695] <TB3> INFO: The DUT currently contains the following objects:
[13:49:31.695] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:49:31.695] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:49:31.695] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:49:31.695] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:49:31.695] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:31.695] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:31.695] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:31.695] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:31.695] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:31.695] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:31.695] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:31.695] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:31.695] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:31.695] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:31.695] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:31.695] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:31.695] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:31.695] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:31.695] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:31.695] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:32.810] <TB3> INFO: Test took 1115ms.
[13:49:32.810] <TB3> INFO: The DUT currently contains the following objects:
[13:49:32.810] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:49:32.810] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:49:32.810] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:49:32.810] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:49:32.810] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:32.811] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:32.811] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:32.811] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:32.811] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:32.811] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:32.811] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:32.811] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:32.811] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:32.811] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:32.811] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:32.811] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:32.811] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:32.811] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:32.811] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:32.811] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:33.911] <TB3> INFO: Test took 1100ms.
[13:49:33.912] <TB3> INFO: The DUT currently contains the following objects:
[13:49:33.912] <TB3> INFO: 2 TBM Cores tbm09c (2 ON)
[13:49:33.912] <TB3> INFO: TBM Core alpha (0): 7 registers set
[13:49:33.912] <TB3> INFO: TBM Core beta (1): 7 registers set
[13:49:33.912] <TB3> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[13:49:33.912] <TB3> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:33.912] <TB3> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:33.912] <TB3> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:33.912] <TB3> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:33.912] <TB3> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:33.912] <TB3> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:33.912] <TB3> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:33.912] <TB3> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:33.912] <TB3> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:33.912] <TB3> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:33.912] <TB3> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:33.912] <TB3> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:33.912] <TB3> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:33.912] <TB3> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:33.912] <TB3> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:33.912] <TB3> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[13:49:35.013] <TB3> INFO: Test took 1101ms.
[13:49:35.016] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:53:19.114] <TB3> INFO: Test took 224098ms.
[13:53:20.881] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:00.492] <TB3> INFO: Test took 219611ms.
[13:57:02.210] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:57:02.220] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:57:02.229] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:57:02.238] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:57:02.247] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:57:02.257] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:57:02.266] <TB3> INFO: safety margin for low PH: adding 1, margin is now 21
[13:57:02.276] <TB3> INFO: safety margin for low PH: adding 2, margin is now 22
[13:57:02.282] <TB3> INFO: safety margin for low PH: adding 3, margin is now 23
[13:57:02.292] <TB3> INFO: safety margin for low PH: adding 4, margin is now 24
[13:57:02.298] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:57:02.305] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:57:02.311] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:57:02.318] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:57:02.325] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:57:02.331] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:57:02.338] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:57:02.344] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:57:02.351] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:57:02.358] <TB3> INFO: safety margin for low PH: adding 0, margin is now 20
[13:57:02.399] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C0.dat
[13:57:02.400] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C1.dat
[13:57:02.436] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C2.dat
[13:57:02.437] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C3.dat
[13:57:02.437] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C4.dat
[13:57:02.437] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C5.dat
[13:57:02.438] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C6.dat
[13:57:02.438] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C7.dat
[13:57:02.438] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C8.dat
[13:57:02.438] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C9.dat
[13:57:02.439] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C10.dat
[13:57:02.439] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C11.dat
[13:57:02.439] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C12.dat
[13:57:02.439] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C13.dat
[13:57:02.439] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C14.dat
[13:57:02.439] <TB3> INFO: write dac parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//dacParameters35_C15.dat
[13:57:05.926] <TB3> INFO: Test took 3483ms.
[13:57:09.679] <TB3> INFO: Test took 3452ms.
[13:57:13.407] <TB3> INFO: Test took 3454ms.
[13:57:13.684] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:14.604] <TB3> INFO: Test took 920ms.
[13:57:14.607] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:15.715] <TB3> INFO: Test took 1108ms.
[13:57:15.719] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:16.840] <TB3> INFO: Test took 1121ms.
[13:57:16.844] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:17.952] <TB3> INFO: Test took 1108ms.
[13:57:17.956] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:19.064] <TB3> INFO: Test took 1108ms.
[13:57:19.068] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:20.179] <TB3> INFO: Test took 1111ms.
[13:57:20.184] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:21.293] <TB3> INFO: Test took 1110ms.
[13:57:21.296] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:22.406] <TB3> INFO: Test took 1110ms.
[13:57:22.410] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:23.519] <TB3> INFO: Test took 1109ms.
[13:57:23.523] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:24.630] <TB3> INFO: Test took 1107ms.
[13:57:24.633] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:25.741] <TB3> INFO: Test took 1108ms.
[13:57:25.744] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:26.853] <TB3> INFO: Test took 1109ms.
[13:57:26.857] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:27.966] <TB3> INFO: Test took 1109ms.
[13:57:27.969] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:29.081] <TB3> INFO: Test took 1112ms.
[13:57:29.085] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:30.192] <TB3> INFO: Test took 1108ms.
[13:57:30.195] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:31.304] <TB3> INFO: Test took 1109ms.
[13:57:31.307] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:32.419] <TB3> INFO: Test took 1112ms.
[13:57:32.424] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:33.525] <TB3> INFO: Test took 1102ms.
[13:57:33.527] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:34.629] <TB3> INFO: Test took 1102ms.
[13:57:34.632] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:35.742] <TB3> INFO: Test took 1110ms.
[13:57:35.747] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:36.855] <TB3> INFO: Test took 1109ms.
[13:57:36.858] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:37.967] <TB3> INFO: Test took 1109ms.
[13:57:37.970] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:39.074] <TB3> INFO: Test took 1104ms.
[13:57:39.076] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:40.187] <TB3> INFO: Test took 1111ms.
[13:57:40.192] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:41.302] <TB3> INFO: Test took 1111ms.
[13:57:41.307] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:42.418] <TB3> INFO: Test took 1112ms.
[13:57:42.422] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:43.532] <TB3> INFO: Test took 1111ms.
[13:57:43.537] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:44.647] <TB3> INFO: Test took 1110ms.
[13:57:44.651] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:45.757] <TB3> INFO: Test took 1107ms.
[13:57:45.761] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:46.870] <TB3> INFO: Test took 1109ms.
[13:57:46.875] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:47.986] <TB3> INFO: Test took 1112ms.
[13:57:47.989] <TB3> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[13:57:49.097] <TB3> INFO: Test took 1108ms.
[13:57:49.644] <TB3> INFO: PixTestPhOptimization::doTest() done, duration: 522 seconds
[13:57:49.644] <TB3> INFO: PH scale (per ROC): 96 87 96 77 105 89 89 85 91 94 84 80 98 88 80 82
[13:57:49.644] <TB3> INFO: PH offset (per ROC): 150 154 150 158 141 144 137 151 169 147 141 146 143 146 166 145
[13:57:49.821] <TB3> INFO: ######################################################################
[13:57:49.821] <TB3> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[13:57:49.821] <TB3> INFO: ######################################################################
[13:57:49.831] <TB3> INFO: scanning low vcal = 50
[13:57:54.218] <TB3> INFO: Test took 4387ms.
[13:57:54.273] <TB3> INFO: scanning low vcal = 100
[13:57:58.646] <TB3> INFO: Test took 4373ms.
[13:57:58.707] <TB3> INFO: scanning low vcal = 150
[13:58:03.115] <TB3> INFO: Test took 4407ms.
[13:58:03.207] <TB3> INFO: scanning low vcal = 200
[13:58:07.592] <TB3> INFO: Test took 4385ms.
[13:58:07.683] <TB3> INFO: scanning low vcal = 250
[13:58:12.080] <TB3> INFO: Test took 4397ms.
[13:58:12.154] <TB3> INFO: scanning high vcal = 30 (= 210 in low range)
[13:58:16.546] <TB3> INFO: Test took 4392ms.
[13:58:16.610] <TB3> INFO: scanning high vcal = 50 (= 350 in low range)
[13:58:20.945] <TB3> INFO: Test took 4335ms.
[13:58:21.010] <TB3> INFO: scanning high vcal = 70 (= 490 in low range)
[13:58:25.385] <TB3> INFO: Test took 4375ms.
[13:58:25.448] <TB3> INFO: scanning high vcal = 90 (= 630 in low range)
[13:58:29.814] <TB3> INFO: Test took 4366ms.
[13:58:29.871] <TB3> INFO: scanning high vcal = 200 (= 1400 in low range)
[13:58:34.261] <TB3> INFO: Test took 4390ms.
[13:58:34.774] <TB3> INFO: PixTestGainPedestal::measure() done
[13:59:02.929] <TB3> INFO: PixTestGainPedestal::fit() done
[13:59:02.929] <TB3> INFO: non-linearity mean: 0.956 0.955 0.956 0.942 0.959 0.960 0.956 0.963 0.956 0.955 0.953 0.953 0.957 0.951 0.956 0.959
[13:59:02.929] <TB3> INFO: non-linearity RMS: 0.006 0.006 0.005 0.008 0.005 0.004 0.005 0.004 0.005 0.006 0.005 0.007 0.005 0.005 0.006 0.005
[13:59:02.929] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C0.dat
[13:59:02.948] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C1.dat
[13:59:02.966] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C2.dat
[13:59:02.984] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C3.dat
[13:59:03.002] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C4.dat
[13:59:03.020] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C5.dat
[13:59:03.038] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C6.dat
[13:59:03.057] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C7.dat
[13:59:03.075] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C8.dat
[13:59:03.093] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C9.dat
[13:59:03.112] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C10.dat
[13:59:03.130] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C11.dat
[13:59:03.148] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C12.dat
[13:59:03.170] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C13.dat
[13:59:03.189] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C14.dat
[13:59:03.215] <TB3> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2033_FullQualification_2015-07-09_11h22m_1436433757//002_FulltestPxar_m20//phCalibrationFitErr35_C15.dat
[13:59:03.234] <TB3> INFO: PixTestGainPedestal::doTest() done, duration: 73 seconds
[13:59:03.240] <TB3> INFO: enter test to run
[13:59:03.240] <TB3> INFO: test: exit no parameter change
[13:59:03.675] <TB3> QUIET: Connection to board 170 closed.
[13:59:03.754] <TB3> INFO: pXar: this is the end, my friend