[14:09:50.430] <TB1> INFO: *** Welcome to pxar ***
[14:09:50.430] <TB1> INFO: *** Today: 2015/08/18
[14:09:50.430] <TB1> INFO: readRocDacs: /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C0.dat .. /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C15.dat
[14:09:50.431] <TB1> INFO: readTbmDacs: /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//tbmParameters_C0a.dat .. /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//tbmParameters_C0b.dat
[14:09:50.431] <TB1> INFO: readMaskFile: /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//defaultMaskFile.dat
[14:09:50.431] <TB1> INFO: readTrimFile: /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters_C0.dat .. /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters_C15.dat
[14:09:50.512] <TB1> INFO: clk: 4
[14:09:50.512] <TB1> INFO: ctr: 4
[14:09:50.512] <TB1> INFO: sda: 19
[14:09:50.512] <TB1> INFO: tin: 9
[14:09:50.512] <TB1> INFO: level: 15
[14:09:50.512] <TB1> INFO: triggerdelay: 0
[14:09:50.512] <TB1> QUIET: Instanciating API for pxar v2.2.5+88~g694c14c
[14:09:50.512] <TB1> INFO: Log level: INFO
[14:09:50.519] <TB1> INFO: Found DTB DTB_WXBYFL
[14:09:50.533] <TB1> QUIET: Connection to board DTB_WXBYFL opened.
[14:09:50.536] <TB1> INFO: DTB startup information
--- DTB info------------------------------------------
Board id: 153
HW version: DTB1.2
FW version: 4.0
SW version: 4.0
USB id: DTB_WXBYFL
MAC address: 40D855118099
Hostname: pixelDTB153
Comment:
------------------------------------------------------
[14:09:50.539] <TB1> INFO: RPC call hashes of host and DTB match: 447413373
[14:09:52.079] <TB1> INFO: DUT info:
[14:09:52.079] <TB1> INFO: The DUT currently contains the following objects:
[14:09:52.079] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[14:09:52.079] <TB1> INFO: TBM Core alpha (0): 7 registers set
[14:09:52.079] <TB1> INFO: TBM Core beta (1): 7 registers set
[14:09:52.079] <TB1> INFO: 16 ROCs psi46digv21respin (16 ON) with 4160 pixelConfigs
[14:09:52.079] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 0 masked, 0 active.
[14:09:52.079] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 0 masked, 0 active.
[14:09:52.079] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 0 masked, 0 active.
[14:09:52.080] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 0 masked, 0 active.
[14:09:52.080] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 0 masked, 0 active.
[14:09:52.080] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 0 masked, 0 active.
[14:09:52.080] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 0 masked, 0 active.
[14:09:52.080] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 0 masked, 0 active.
[14:09:52.080] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 0 masked, 0 active.
[14:09:52.080] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 0 masked, 0 active.
[14:09:52.080] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 0 masked, 0 active.
[14:09:52.080] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 0 masked, 0 active.
[14:09:52.080] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 0 masked, 0 active.
[14:09:52.080] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 0 masked, 0 active.
[14:09:52.080] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 0 masked, 0 active.
[14:09:52.080] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 0 masked, 0 active.
[14:09:52.481] <TB1> INFO: enter 'restricted' command line mode
[14:09:52.481] <TB1> INFO: enter test to run
[14:09:52.481] <TB1> INFO: test: pretest no parameter change
[14:09:52.481] <TB1> INFO: running: pretest
[14:09:52.488] <TB1> INFO: ######################################################################
[14:09:52.488] <TB1> INFO: PixTestPretest::doTest()
[14:09:52.488] <TB1> INFO: ######################################################################
[14:09:52.490] <TB1> INFO: ----------------------------------------------------------------------
[14:09:52.490] <TB1> INFO: PixTestPretest::programROC()
[14:09:52.490] <TB1> INFO: ----------------------------------------------------------------------
[14:10:10.511] <TB1> INFO: PixTestPretest::programROC() done: ROCs are all programmable
[14:10:10.534] <TB1> INFO: IA differences per ROC: 19.3 16.1 17.7 16.1 16.1 19.3 20.1 18.5 18.5 20.1 18.5 19.3 19.3 20.1 19.3 19.3
[14:10:10.628] <TB1> INFO: ----------------------------------------------------------------------
[14:10:10.628] <TB1> INFO: PixTestPretest::setVana() target Ia = 24 mA/ROC
[14:10:10.628] <TB1> INFO: ----------------------------------------------------------------------
[14:10:15.123] <TB1> INFO: PixTestPretest::setVana() done, Module Ia 382.7 mA = 23.9187 mA/ROC
[14:10:15.128] <TB1> INFO: ----------------------------------------------------------------------
[14:10:15.128] <TB1> INFO: PixTestPretest::findWorkingPixel()
[14:10:15.128] <TB1> INFO: ----------------------------------------------------------------------



































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































[14:11:49.760] <TB1> INFO: Test took 8230ms.
[14:11:50.068] <TB1> INFO: Found working pixel in all ROCs: col/row = 5/5
[14:11:50.122] <TB1> INFO: ----------------------------------------------------------------------
[14:11:50.123] <TB1> INFO: PixTestPretest::setVthrCompCalDel()
[14:11:50.123] <TB1> INFO: ----------------------------------------------------------------------
[14:11:58.422] <TB1> INFO: Test took 8293ms.
[14:11:58.756] <TB1> INFO: PixTestPretest::setVthrCompCalDel() done
[14:11:58.756] <TB1> INFO: CalDel: 153 139 140 146 128 135 131 150 119 138 114 127 143 143 125 122
[14:11:58.756] <TB1> INFO: VthrComp: 51 51 51 51 52 51 51 51 51 51 51 51 51 51 51 55
[14:11:58.760] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C0.dat
[14:11:58.761] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C1.dat
[14:11:58.761] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C2.dat
[14:11:58.761] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C3.dat
[14:11:58.761] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C4.dat
[14:11:58.762] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C5.dat
[14:11:58.762] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C6.dat
[14:11:58.762] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C7.dat
[14:11:58.762] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C8.dat
[14:11:58.762] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C9.dat
[14:11:58.763] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C10.dat
[14:11:58.763] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C11.dat
[14:11:58.763] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C12.dat
[14:11:58.763] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C13.dat
[14:11:58.764] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C14.dat
[14:11:58.764] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters_C15.dat
[14:11:58.764] <TB1> INFO: PixTestPretest::doTest() done, duration: 126 seconds
[14:11:58.853] <TB1> INFO: enter test to run
[14:11:58.853] <TB1> INFO: test: fulltest no parameter change
[14:11:58.853] <TB1> INFO: running: fulltest
[14:11:58.853] <TB1> INFO: ######################################################################
[14:11:58.853] <TB1> INFO: PixTestFullTest::doTest()
[14:11:58.853] <TB1> INFO: ######################################################################
[14:11:58.854] <TB1> INFO: ######################################################################
[14:11:58.854] <TB1> INFO: PixTestAlive::doTest()
[14:11:58.854] <TB1> INFO: ######################################################################
[14:11:58.856] <TB1> INFO: ----------------------------------------------------------------------
[14:11:58.856] <TB1> INFO: PixTestAlive::aliveTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:11:58.856] <TB1> INFO: ----------------------------------------------------------------------
[14:12:02.306] <TB1> INFO: Test took 3448ms.
[14:12:02.329] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:02.572] <TB1> INFO: PixTestAlive::aliveTest() done
[14:12:02.576] <TB1> INFO: number of dead pixels (per ROC): 0 0 0 0 0 0 0 3 0 0 0 0 0 0 0 0
[14:12:02.578] <TB1> INFO: ----------------------------------------------------------------------
[14:12:02.578] <TB1> INFO: PixTestAlive::maskTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:12:02.578] <TB1> INFO: ----------------------------------------------------------------------
[14:12:05.275] <TB1> INFO: Test took 2695ms.
[14:12:05.280] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:05.281] <TB1> INFO: mask vs. old pixelAlive PixelAlive_C0_V0 .. PixelAlive_C15_V0
[14:12:05.522] <TB1> INFO: PixTestAlive::maskTest() done
[14:12:05.522] <TB1> INFO: number of mask-defect pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:12:05.526] <TB1> INFO: ----------------------------------------------------------------------
[14:12:05.526] <TB1> INFO: PixTestAlive::addressDecodingTest() ntrig = 10, vcal = 200 (ctrlreg = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0)
[14:12:05.526] <TB1> INFO: ----------------------------------------------------------------------
[14:12:08.968] <TB1> INFO: Test took 3440ms.
[14:12:08.994] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:09.237] <TB1> INFO: PixTestAlive::addressDecodingTest() done
[14:12:09.237] <TB1> INFO: number of address-decoding pixels (per ROC): 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
[14:12:09.237] <TB1> INFO: PixTestAlive::doTest() done, duration: 10 seconds
[14:12:09.249] <TB1> INFO: ######################################################################
[14:12:09.249] <TB1> INFO: PixTestBBMap::doTest() Ntrig = 5, VcalS = 250 (high range)
[14:12:09.249] <TB1> INFO: ######################################################################
[14:12:09.254] <TB1> INFO: ---> dac: VthrComp name: calSMap ntrig: 5 dacrange: 0 .. 149 (30) hits flags = 2 (plus default)
[14:12:09.266] <TB1> INFO: dacScan step from 0 .. 29
[14:12:31.090] <TB1> INFO: Test took 21824ms.
[14:12:31.141] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:31.144] <TB1> INFO: dacScan step from 30 .. 59
[14:12:55.466] <TB1> INFO: Test took 24322ms.
[14:12:55.603] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:12:55.621] <TB1> INFO: dacScan step from 60 .. 89
[14:13:22.528] <TB1> INFO: Test took 26907ms.
[14:13:22.826] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:22.903] <TB1> INFO: dacScan step from 90 .. 119
[14:13:52.064] <TB1> INFO: Test took 29161ms.
[14:13:52.352] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:13:52.432] <TB1> INFO: dacScan step from 120 .. 149
[14:14:18.609] <TB1> INFO: Test took 26177ms.
[14:14:18.810] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:14:42.273] <TB1> INFO: PixTestBBMap::doTest() done, duration: 153 seconds
[14:14:42.273] <TB1> INFO: number of dead bumps (per ROC): 2 2 1 4 0 1 0 0 3 1 0 1 1 3 2 2
[14:14:42.273] <TB1> INFO: separation cut (per ROC): 85 83 100 74 114 82 127 132 80 83 79 87 87 81 81 98
[14:14:42.347] <TB1> INFO: ######################################################################
[14:14:42.347] <TB1> INFO: PixTestScurves::fullTest() ntrig = 50
[14:14:42.347] <TB1> INFO: ######################################################################
[14:14:42.348] <TB1> INFO: ----------------------------------------------------------------------
[14:14:42.348] <TB1> INFO: PixTestScurves::scurves(Vcal), ntrig = 50
[14:14:42.348] <TB1> INFO: ----------------------------------------------------------------------
[14:14:42.348] <TB1> INFO: ---> dac: Vcal name: scurveVcal ntrig: 50 dacrange: 0 .. 149 (4) hits flags = 16 (plus default)
[14:14:42.356] <TB1> INFO: dacScan step from 0 .. 3
[14:15:01.406] <TB1> INFO: Test took 19050ms.
[14:15:01.438] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:01.438] <TB1> INFO: dacScan step from 4 .. 7
[14:15:20.645] <TB1> INFO: Test took 19207ms.
[14:15:20.674] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:20.674] <TB1> INFO: dacScan step from 8 .. 11
[14:15:39.682] <TB1> INFO: Test took 19008ms.
[14:15:39.710] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:39.710] <TB1> INFO: dacScan step from 12 .. 15
[14:15:58.864] <TB1> INFO: Test took 19154ms.
[14:15:58.893] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:15:58.893] <TB1> INFO: dacScan step from 16 .. 19
[14:16:17.982] <TB1> INFO: Test took 19089ms.
[14:16:18.010] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:18.010] <TB1> INFO: dacScan step from 20 .. 23
[14:16:37.159] <TB1> INFO: Test took 19149ms.
[14:16:37.197] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:37.197] <TB1> INFO: dacScan step from 24 .. 27
[14:16:56.295] <TB1> INFO: Test took 19098ms.
[14:16:56.323] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:16:56.323] <TB1> INFO: dacScan step from 28 .. 31
[14:17:15.512] <TB1> INFO: Test took 19189ms.
[14:17:15.541] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:15.541] <TB1> INFO: dacScan step from 32 .. 35
[14:17:34.745] <TB1> INFO: Test took 19204ms.
[14:17:34.778] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:34.778] <TB1> INFO: dacScan step from 36 .. 39
[14:17:54.061] <TB1> INFO: Test took 19283ms.
[14:17:54.091] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:17:54.091] <TB1> INFO: dacScan step from 40 .. 43
[14:18:12.261] <TB1> INFO: Test took 18170ms.
[14:18:12.293] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:12.293] <TB1> INFO: dacScan step from 44 .. 47
[14:18:30.373] <TB1> INFO: Test took 18080ms.
[14:18:30.401] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:30.401] <TB1> INFO: dacScan step from 48 .. 51
[14:18:48.321] <TB1> INFO: Test took 17920ms.
[14:18:48.356] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:18:48.356] <TB1> INFO: dacScan step from 52 .. 55
[14:19:06.253] <TB1> INFO: Test took 17896ms.
[14:19:06.289] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:06.289] <TB1> INFO: dacScan step from 56 .. 59
[14:19:24.155] <TB1> INFO: Test took 17866ms.
[14:19:24.189] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:24.189] <TB1> INFO: dacScan step from 60 .. 63
[14:19:42.537] <TB1> INFO: Test took 18348ms.
[14:19:42.563] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:19:42.563] <TB1> INFO: dacScan step from 64 .. 67
[14:20:01.845] <TB1> INFO: Test took 19281ms.
[14:20:01.881] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:01.882] <TB1> INFO: dacScan step from 68 .. 71
[14:20:21.103] <TB1> INFO: Test took 19221ms.
[14:20:21.132] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:21.133] <TB1> INFO: dacScan step from 72 .. 75
[14:20:40.311] <TB1> INFO: Test took 19178ms.
[14:20:40.342] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:40.342] <TB1> INFO: dacScan step from 76 .. 79
[14:20:59.707] <TB1> INFO: Test took 19365ms.
[14:20:59.751] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:20:59.752] <TB1> INFO: dacScan step from 80 .. 83
[14:21:20.087] <TB1> INFO: Test took 20335ms.
[14:21:20.165] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:20.168] <TB1> INFO: dacScan step from 84 .. 87
[14:21:41.999] <TB1> INFO: Test took 21831ms.
[14:21:42.100] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:21:42.104] <TB1> INFO: dacScan step from 88 .. 91
[14:22:05.196] <TB1> INFO: Test took 23092ms.
[14:22:05.326] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:05.333] <TB1> INFO: dacScan step from 92 .. 95
[14:22:30.506] <TB1> INFO: Test took 25173ms.
[14:22:30.676] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:30.686] <TB1> INFO: dacScan step from 96 .. 99
[14:22:57.623] <TB1> INFO: Test took 26937ms.
[14:22:57.837] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:22:57.849] <TB1> INFO: dacScan step from 100 .. 103
[14:23:26.084] <TB1> INFO: Test took 28235ms.
[14:23:26.315] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:26.329] <TB1> INFO: dacScan step from 104 .. 107
[14:23:55.055] <TB1> INFO: Test took 28726ms.
[14:23:55.288] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:23:55.300] <TB1> INFO: dacScan step from 108 .. 111



[14:24:24.582] <TB1> INFO: Test took 29282ms.
[14:24:24.825] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:24.838] <TB1> INFO: dacScan step from 112 .. 115

[14:24:54.394] <TB1> INFO: Test took 29556ms.
[14:24:54.631] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:24:54.644] <TB1> INFO: dacScan step from 116 .. 119



[14:25:24.290] <TB1> INFO: Test took 29646ms.
[14:25:24.537] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:24.551] <TB1> INFO: dacScan step from 120 .. 123

[14:25:54.141] <TB1> INFO: Test took 29590ms.
[14:25:54.383] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:25:54.396] <TB1> INFO: dacScan step from 124 .. 127
[14:26:23.886] <TB1> INFO: Test took 29490ms.
[14:26:24.120] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:24.133] <TB1> INFO: dacScan step from 128 .. 131


[14:26:53.727] <TB1> INFO: Test took 29594ms.
[14:26:53.964] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:26:53.978] <TB1> INFO: dacScan step from 132 .. 135





[14:27:23.422] <TB1> INFO: Test took 29444ms.
[14:27:23.650] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:23.662] <TB1> INFO: dacScan step from 136 .. 139
[14:27:53.108] <TB1> INFO: Test took 29445ms.
[14:27:53.350] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:27:53.364] <TB1> INFO: dacScan step from 140 .. 143
[14:28:20.214] <TB1> INFO: Test took 26850ms.
[14:28:20.468] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:20.480] <TB1> INFO: dacScan step from 144 .. 147
[14:28:49.936] <TB1> INFO: Test took 29456ms.
[14:28:50.191] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:28:50.202] <TB1> INFO: dacScan step from 148 .. 149
[14:29:06.292] <TB1> INFO: Test took 16090ms.
[14:29:06.407] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:06.414] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:29:07.989] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:29:09.462] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:29:11.194] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:29:12.864] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:29:14.488] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:29:15.998] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:29:17.531] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:29:19.121] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:29:20.596] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:29:22.097] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:29:23.575] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:29:25.047] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:29:26.585] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:29:28.124] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:29:29.637] <TB1> INFO: dumping ASCII scurve output file: SCurveData
[14:29:31.124] <TB1> INFO: PixTestScurves::scurves() done
[14:29:31.124] <TB1> INFO: Vcal mean: 94.81 99.92 83.20 84.72 100.52 92.54 89.66 94.17 94.87 90.52 95.54 104.55 99.73 90.80 90.93 108.37
[14:29:31.124] <TB1> INFO: Vcal RMS: 5.57 5.84 4.40 5.21 6.24 5.26 5.70 5.75 5.92 5.46 5.23 6.08 6.23 5.40 5.68 5.54
[14:29:31.124] <TB1> INFO: PixTestScurves::fullTest() done, duration: 888 seconds
[14:29:31.204] <TB1> INFO: ######################################################################
[14:29:31.204] <TB1> INFO: PixTestTrim::doTest()
[14:29:31.204] <TB1> INFO: ######################################################################
[14:29:31.206] <TB1> INFO: ----------------------------------------------------------------------
[14:29:31.206] <TB1> INFO: PixTestTrim::trimTest() ntrig = 10, vcal = 35
[14:29:31.206] <TB1> INFO: ----------------------------------------------------------------------
[14:29:31.294] <TB1> INFO: ---> VthrComp thr map (minimal VthrComp)
[14:29:31.294] <TB1> INFO: ---> dac: vthrcomp name: TrimThr0 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[14:29:31.303] <TB1> INFO: dacScan step from 0 .. 19
[14:29:46.502] <TB1> INFO: Test took 15199ms.
[14:29:46.525] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:29:46.525] <TB1> INFO: dacScan step from 20 .. 39
[14:30:01.712] <TB1> INFO: Test took 15187ms.
[14:30:01.737] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:01.737] <TB1> INFO: dacScan step from 40 .. 59
[14:30:16.829] <TB1> INFO: Test took 15092ms.
[14:30:16.853] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:16.853] <TB1> INFO: dacScan step from 60 .. 79
[14:30:31.329] <TB1> INFO: Test took 14476ms.
[14:30:31.350] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:31.350] <TB1> INFO: dacScan step from 80 .. 99
[14:30:46.111] <TB1> INFO: Test took 14761ms.
[14:30:46.150] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:30:46.155] <TB1> INFO: dacScan step from 100 .. 119
[14:31:04.935] <TB1> INFO: Test took 18780ms.
[14:31:05.093] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:05.121] <TB1> INFO: dacScan step from 120 .. 139
[14:31:24.364] <TB1> INFO: Test took 19242ms.
[14:31:24.529] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:31:24.563] <TB1> INFO: dacScan step from 140 .. 159
[14:31:40.838] <TB1> INFO: Test took 16275ms.
[14:31:40.904] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:03.379] <TB1> INFO: ROC 0 VthrComp = 98
[14:32:03.379] <TB1> INFO: ROC 1 VthrComp = 98
[14:32:03.379] <TB1> INFO: ROC 2 VthrComp = 85
[14:32:03.380] <TB1> INFO: ROC 3 VthrComp = 85
[14:32:03.381] <TB1> INFO: ROC 4 VthrComp = 96
[14:32:03.381] <TB1> INFO: ROC 5 VthrComp = 95
[14:32:03.382] <TB1> INFO: ROC 6 VthrComp = 93
[14:32:03.382] <TB1> INFO: ROC 7 VthrComp = 95
[14:32:03.382] <TB1> INFO: ROC 8 VthrComp = 94
[14:32:03.382] <TB1> INFO: ROC 9 VthrComp = 93
[14:32:03.382] <TB1> INFO: ROC 10 VthrComp = 94
[14:32:03.383] <TB1> INFO: ROC 11 VthrComp = 100
[14:32:03.383] <TB1> INFO: ROC 12 VthrComp = 100
[14:32:03.385] <TB1> INFO: ROC 13 VthrComp = 91
[14:32:03.386] <TB1> INFO: ROC 14 VthrComp = 90
[14:32:03.387] <TB1> INFO: ROC 15 VthrComp = 106
[14:32:03.388] <TB1> INFO: ---> Vcal thr map (pixel with maximum Vcal thr)
[14:32:03.388] <TB1> INFO: ---> dac: vcal name: TrimThr1 ntrig: 5 dacrange: 0 .. 159 (20) hits flags = 16 (plus default)
[14:32:03.398] <TB1> INFO: dacScan step from 0 .. 19
[14:32:18.648] <TB1> INFO: Test took 15250ms.
[14:32:18.674] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:18.674] <TB1> INFO: dacScan step from 20 .. 39
[14:32:33.745] <TB1> INFO: Test took 15071ms.
[14:32:33.781] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:33.783] <TB1> INFO: dacScan step from 40 .. 59
[14:32:52.588] <TB1> INFO: Test took 18805ms.
[14:32:52.731] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:32:52.763] <TB1> INFO: dacScan step from 60 .. 79
[14:33:12.943] <TB1> INFO: Test took 20180ms.
[14:33:13.108] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:13.155] <TB1> INFO: dacScan step from 80 .. 99
[14:33:32.346] <TB1> INFO: Test took 19191ms.
[14:33:32.611] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:32.679] <TB1> INFO: dacScan step from 100 .. 119
[14:33:51.781] <TB1> INFO: Test took 19102ms.
[14:33:51.955] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:33:52.002] <TB1> INFO: dacScan step from 120 .. 139
[14:34:12.389] <TB1> INFO: Test took 20387ms.
[14:34:12.549] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:12.594] <TB1> INFO: dacScan step from 140 .. 159
[14:34:33.025] <TB1> INFO: Test took 20431ms.
[14:34:33.195] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:34:59.918] <TB1> INFO: roc 0 with ID = 0 has maximal Vcal 58.3737 for pixel 4/74 mean/min/max = 44.8993/31.3424/58.4562
[14:34:59.919] <TB1> INFO: roc 1 with ID = 1 has maximal Vcal 61.9591 for pixel 16/1 mean/min/max = 47.0056/32.0427/61.9686
[14:34:59.919] <TB1> INFO: roc 2 with ID = 2 has maximal Vcal 57.4592 for pixel 11/7 mean/min/max = 45.4281/33.3206/57.5355
[14:34:59.919] <TB1> INFO: roc 3 with ID = 3 has maximal Vcal 58.297 for pixel 6/1 mean/min/max = 45.5426/32.7819/58.3033
[14:34:59.920] <TB1> INFO: roc 4 with ID = 4 has maximal Vcal 63.4073 for pixel 0/8 mean/min/max = 47.4055/31.2843/63.5267
[14:34:59.920] <TB1> INFO: roc 5 with ID = 5 has maximal Vcal 58.3802 for pixel 51/79 mean/min/max = 45.3605/32.2529/58.468
[14:34:59.921] <TB1> INFO: roc 6 with ID = 6 has maximal Vcal 58.7951 for pixel 0/2 mean/min/max = 46.0135/32.9502/59.0769
[14:34:59.921] <TB1> INFO: roc 7 with ID = 7 has maximal Vcal 58.1276 for pixel 21/76 mean/min/max = 45.3161/32.4539/58.1784
[14:34:59.921] <TB1> INFO: roc 8 with ID = 8 has maximal Vcal 62.1029 for pixel 0/9 mean/min/max = 47.2291/32.2582/62.2
[14:34:59.922] <TB1> INFO: roc 9 with ID = 9 has maximal Vcal 59.5097 for pixel 0/8 mean/min/max = 46.3208/33.1141/59.5274
[14:34:59.922] <TB1> INFO: roc 10 with ID = 10 has maximal Vcal 59.9699 for pixel 24/31 mean/min/max = 46.3995/32.819/59.9801
[14:34:59.922] <TB1> INFO: roc 11 with ID = 11 has maximal Vcal 64.8792 for pixel 7/3 mean/min/max = 48.3102/31.6423/64.9781
[14:34:59.923] <TB1> INFO: roc 12 with ID = 12 has maximal Vcal 61.0439 for pixel 27/73 mean/min/max = 46.3227/31.4825/61.1628
[14:34:59.923] <TB1> INFO: roc 13 with ID = 13 has maximal Vcal 59.2572 for pixel 11/78 mean/min/max = 46.3716/33.4373/59.3058
[14:34:59.924] <TB1> INFO: roc 14 with ID = 14 has maximal Vcal 61.4486 for pixel 3/23 mean/min/max = 47.1046/32.5009/61.7084
[14:34:59.924] <TB1> INFO: roc 15 with ID = 15 has maximal Vcal 65.7127 for pixel 0/74 mean/min/max = 50.036/34.2375/65.8346
[14:34:59.924] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[14:36:34.296] <TB1> INFO: Test took 94372ms.
[14:36:35.628] <TB1> INFO: ---> dac: vcal name: TrimThr2 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:36:35.636] <TB1> INFO: dacScan step from 0 .. 19
[14:36:58.627] <TB1> INFO: Test took 22991ms.
[14:36:58.680] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:36:58.682] <TB1> INFO: dacScan step from 20 .. 39
[14:37:27.737] <TB1> INFO: Test took 29055ms.
[14:37:28.022] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:37:28.051] <TB1> INFO: dacScan step from 40 .. 59





[14:38:01.563] <TB1> INFO: Test took 33512ms.
[14:38:01.877] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:38:01.986] <TB1> INFO: dacScan step from 60 .. 79



[14:38:35.586] <TB1> INFO: Test took 33600ms.
[14:38:35.883] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:38:35.931] <TB1> INFO: dacScan step from 80 .. 99


[14:39:09.543] <TB1> INFO: Test took 33611ms.
[14:39:09.864] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:09.916] <TB1> INFO: dacScan step from 100 .. 119





[14:39:43.605] <TB1> INFO: Test took 33689ms.
[14:39:43.887] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:39:43.929] <TB1> INFO: dacScan step from 120 .. 139

[14:40:17.558] <TB1> INFO: Test took 33628ms.
[14:40:17.840] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:40:17.886] <TB1> INFO: dacScan step from 140 .. 159
[14:40:50.263] <TB1> INFO: Test took 32377ms.
[14:40:50.555] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:40:50.609] <TB1> INFO: dacScan step from 160 .. 179
[14:41:21.315] <TB1> INFO: Test took 30706ms.
[14:41:21.585] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:41:21.632] <TB1> INFO: dacScan step from 180 .. 199
[14:41:55.757] <TB1> INFO: Test took 34125ms.
[14:41:56.035] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:42:20.548] <TB1> INFO: ---> TrimStepCorr4 extremal thresholds: 0.010966 .. 255.000000
[14:42:20.622] <TB1> INFO: ---> dac: vcal name: trimStepCorr4 ntrig: 4 dacrange: 0 .. 255 (20) hits flags = 16 (plus default)
[14:42:20.631] <TB1> INFO: dacScan step from 0 .. 19
[14:42:34.159] <TB1> INFO: Test took 13528ms.
[14:42:34.188] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:42:34.188] <TB1> INFO: dacScan step from 20 .. 39
[14:42:49.258] <TB1> INFO: Test took 15070ms.
[14:42:49.352] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:42:49.371] <TB1> INFO: dacScan step from 40 .. 59
[14:43:07.073] <TB1> INFO: Test took 17702ms.
[14:43:07.220] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:07.263] <TB1> INFO: dacScan step from 60 .. 79
[14:43:24.940] <TB1> INFO: Test took 17677ms.
[14:43:25.125] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:25.177] <TB1> INFO: dacScan step from 80 .. 99
[14:43:42.907] <TB1> INFO: Test took 17730ms.
[14:43:43.071] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:43:43.117] <TB1> INFO: dacScan step from 100 .. 119
[14:44:00.888] <TB1> INFO: Test took 17771ms.
[14:44:01.062] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:01.112] <TB1> INFO: dacScan step from 120 .. 139
[14:44:18.968] <TB1> INFO: Test took 17856ms.
[14:44:19.110] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:19.157] <TB1> INFO: dacScan step from 140 .. 159
[14:44:36.979] <TB1> INFO: Test took 17822ms.
[14:44:37.186] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:37.238] <TB1> INFO: dacScan step from 160 .. 179
[14:44:54.683] <TB1> INFO: Test took 17445ms.
[14:44:54.852] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:44:54.908] <TB1> INFO: dacScan step from 180 .. 199
[14:45:12.850] <TB1> INFO: Test took 17942ms.
[14:45:13.081] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:13.152] <TB1> INFO: dacScan step from 200 .. 219
[14:45:30.019] <TB1> INFO: Test took 16867ms.
[14:45:30.179] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:30.236] <TB1> INFO: dacScan step from 220 .. 239
[14:45:48.025] <TB1> INFO: Test took 17789ms.
[14:45:48.167] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:45:48.208] <TB1> INFO: dacScan step from 240 .. 255
[14:46:03.102] <TB1> INFO: Test took 14894ms.
[14:46:03.223] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:34.421] <TB1> INFO: ---> TrimStepCorr2 extremal thresholds: 1.074093 .. 46.331937
[14:46:34.502] <TB1> INFO: ---> dac: vcal name: trimStepCorr2 ntrig: 4 dacrange: 1 .. 56 (20) hits flags = 16 (plus default)
[14:46:34.511] <TB1> INFO: dacScan step from 1 .. 20
[14:46:48.195] <TB1> INFO: Test took 13684ms.
[14:46:48.218] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:46:48.218] <TB1> INFO: dacScan step from 21 .. 40
[14:47:02.546] <TB1> INFO: Test took 14328ms.
[14:47:02.640] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:02.659] <TB1> INFO: dacScan step from 41 .. 56
[14:47:16.982] <TB1> INFO: Test took 14323ms.
[14:47:17.111] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:33.269] <TB1> INFO: ---> TrimStepCorr1a extremal thresholds: 9.500000 .. 46.331937
[14:47:33.347] <TB1> INFO: ---> dac: vcal name: trimStepCorr1a ntrig: 4 dacrange: 9 .. 56 (20) hits flags = 16 (plus default)
[14:47:33.356] <TB1> INFO: dacScan step from 9 .. 28
[14:47:47.009] <TB1> INFO: Test took 13653ms.
[14:47:47.033] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:47:47.033] <TB1> INFO: dacScan step from 29 .. 48
[14:48:02.699] <TB1> INFO: Test took 15666ms.
[14:48:02.836] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:02.876] <TB1> INFO: dacScan step from 49 .. 56
[14:48:11.342] <TB1> INFO: Test took 8465ms.
[14:48:11.429] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:30.311] <TB1> INFO: ---> TrimStepCorr1b extremal thresholds: 2.798700 .. 46.331937
[14:48:30.394] <TB1> INFO: ---> dac: vcal name: trimStepCorr1b ntrig: 4 dacrange: 2 .. 56 (20) hits flags = 16 (plus default)
[14:48:30.403] <TB1> INFO: dacScan step from 2 .. 21
[14:48:43.592] <TB1> INFO: Test took 13189ms.
[14:48:43.618] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:43.618] <TB1> INFO: dacScan step from 22 .. 41
[14:48:58.160] <TB1> INFO: Test took 14542ms.
[14:48:58.299] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:48:58.323] <TB1> INFO: dacScan step from 42 .. 56
[14:49:11.761] <TB1> INFO: Test took 13438ms.
[14:49:11.935] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:30.363] <TB1> INFO: ---> TrimThrFinal extremal thresholds: 15 .. 55
[14:49:30.363] <TB1> INFO: ---> dac: vcal name: TrimThrFinal ntrig: 10 dacrange: 15 .. 55 (20) hits flags = 16 (plus default)
[14:49:30.373] <TB1> INFO: dacScan step from 15 .. 34
[14:49:53.675] <TB1> INFO: Test took 23302ms.
[14:49:53.744] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:49:53.753] <TB1> INFO: dacScan step from 35 .. 54





[14:50:25.769] <TB1> INFO: Test took 32016ms.
[14:50:26.117] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:26.163] <TB1> INFO: dacScan step from 55 .. 55
[14:50:30.476] <TB1> INFO: Test took 4313ms.
[14:50:30.498] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:50:45.598] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C0.dat
[14:50:45.598] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C1.dat
[14:50:45.598] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C2.dat
[14:50:45.599] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C3.dat
[14:50:45.599] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C4.dat
[14:50:45.599] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C5.dat
[14:50:45.600] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C6.dat
[14:50:45.600] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C7.dat
[14:50:45.600] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C8.dat
[14:50:45.601] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C9.dat
[14:50:45.601] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C10.dat
[14:50:45.601] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C11.dat
[14:50:45.601] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C12.dat
[14:50:45.602] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C13.dat
[14:50:45.602] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C14.dat
[14:50:45.602] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C15.dat
[14:50:45.603] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C0.dat
[14:50:45.612] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C1.dat
[14:50:45.620] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C2.dat
[14:50:45.627] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C3.dat
[14:50:45.635] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C4.dat
[14:50:45.642] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C5.dat
[14:50:45.650] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C6.dat
[14:50:45.657] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C7.dat
[14:50:45.664] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C8.dat
[14:50:45.672] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C9.dat
[14:50:45.680] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C10.dat
[14:50:45.689] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C11.dat
[14:50:45.695] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C12.dat
[14:50:45.702] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C13.dat
[14:50:45.709] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C14.dat
[14:50:45.717] <TB1> INFO: write trim parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//trimParameters35_C15.dat
[14:50:45.724] <TB1> INFO: PixTestTrim::trimTest() done
[14:50:45.724] <TB1> INFO: vtrim: 107 117 106 174 113 108 109 102 109 110 118 116 126 111 115 146
[14:50:45.724] <TB1> INFO: vthrcomp: 98 98 85 85 96 95 93 95 94 93 94 100 100 91 90 106
[14:50:45.724] <TB1> INFO: vcal mean: 35.09 35.07 35.07 35.00 35.07 35.07 35.09 35.04 35.08 35.06 35.07 35.10 35.06 35.12 35.08 35.14
[14:50:45.724] <TB1> INFO: vcal RMS: 1.05 1.08 1.04 4.08 1.20 1.01 1.02 1.41 1.04 0.99 1.04 1.11 1.31 1.04 1.02 1.12
[14:50:45.724] <TB1> INFO: bits mean: 10.17 9.49 9.88 11.76 9.64 9.33 9.54 9.82 9.26 9.57 9.68 9.58 10.10 9.75 9.23 8.84
[14:50:45.724] <TB1> INFO: bits RMS: 2.53 2.64 2.43 1.61 2.60 2.83 2.60 2.58 2.69 2.54 2.48 2.54 2.42 2.39 2.68 2.42
[14:50:45.733] <TB1> INFO: ----------------------------------------------------------------------
[14:50:45.733] <TB1> INFO: PixTestTrim::trimBitTest() ntrig = 10, vtrims = 254 126 63 32
[14:50:45.733] <TB1> INFO: ----------------------------------------------------------------------
[14:50:45.738] <TB1> INFO: ---> dac: Vcal name: TrimBitsThr0 ntrig: 10 dacrange: 0 .. 199 (20) hits flags = 16 (plus default)
[14:50:45.748] <TB1> INFO: dacScan step from 0 .. 19
[14:51:08.634] <TB1> INFO: Test took 22886ms.
[14:51:08.668] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:08.668] <TB1> INFO: dacScan step from 20 .. 39
[14:51:31.442] <TB1> INFO: Test took 22774ms.
[14:51:31.485] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:31.485] <TB1> INFO: dacScan step from 40 .. 59
[14:51:54.303] <TB1> INFO: Test took 22817ms.
[14:51:54.339] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:51:54.339] <TB1> INFO: dacScan step from 60 .. 79
[14:52:16.945] <TB1> INFO: Test took 22606ms.
[14:52:16.980] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:16.980] <TB1> INFO: dacScan step from 80 .. 99
[14:52:39.951] <TB1> INFO: Test took 22971ms.
[14:52:39.992] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:52:39.992] <TB1> INFO: dacScan step from 100 .. 119
[14:53:04.992] <TB1> INFO: Test took 25000ms.
[14:53:05.113] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:05.124] <TB1> INFO: dacScan step from 120 .. 139
[14:53:36.689] <TB1> INFO: Test took 31565ms.
[14:53:36.982] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:53:37.013] <TB1> INFO: dacScan step from 140 .. 159





[14:54:07.492] <TB1> INFO: Test took 30478ms.
[14:54:07.772] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:07.821] <TB1> INFO: dacScan step from 160 .. 179
[14:54:38.478] <TB1> INFO: Test took 30657ms.
[14:54:38.759] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:54:38.809] <TB1> INFO: dacScan step from 180 .. 199
[14:55:13.180] <TB1> INFO: Test took 34371ms.
[14:55:13.472] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:55:40.342] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim14 ntrig: 10 dacrange: 0 .. 188 (20) hits flags = 16 (plus default)
[14:55:40.358] <TB1> INFO: dacScan step from 0 .. 19
[14:56:03.235] <TB1> INFO: Test took 22877ms.
[14:56:03.274] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:03.274] <TB1> INFO: dacScan step from 20 .. 39
[14:56:26.155] <TB1> INFO: Test took 22881ms.
[14:56:26.196] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:26.196] <TB1> INFO: dacScan step from 40 .. 59
[14:56:49.116] <TB1> INFO: Test took 22920ms.
[14:56:49.155] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:56:49.155] <TB1> INFO: dacScan step from 60 .. 79
[14:57:11.804] <TB1> INFO: Test took 22649ms.
[14:57:11.850] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:11.850] <TB1> INFO: dacScan step from 80 .. 99
[14:57:34.960] <TB1> INFO: Test took 23109ms.
[14:57:35.019] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:57:35.022] <TB1> INFO: dacScan step from 100 .. 119
[14:58:01.825] <TB1> INFO: Test took 26803ms.
[14:58:02.109] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:02.142] <TB1> INFO: dacScan step from 120 .. 139



[14:58:33.722] <TB1> INFO: Test took 31580ms.
[14:58:34.003] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:58:34.044] <TB1> INFO: dacScan step from 140 .. 159
[14:59:07.190] <TB1> INFO: Test took 33145ms.
[14:59:07.472] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:07.511] <TB1> INFO: dacScan step from 160 .. 179
[14:59:39.515] <TB1> INFO: Test took 32003ms.
[14:59:39.788] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[14:59:39.836] <TB1> INFO: dacScan step from 180 .. 188
[14:59:55.242] <TB1> INFO: Test took 15406ms.
[14:59:55.365] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:20.568] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim13 ntrig: 10 dacrange: 0 .. 178 (20) hits flags = 16 (plus default)
[15:00:20.577] <TB1> INFO: dacScan step from 0 .. 19
[15:00:43.401] <TB1> INFO: Test took 22824ms.
[15:00:43.442] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:00:43.442] <TB1> INFO: dacScan step from 20 .. 39
[15:01:06.366] <TB1> INFO: Test took 22923ms.
[15:01:06.405] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:06.405] <TB1> INFO: dacScan step from 40 .. 59
[15:01:29.190] <TB1> INFO: Test took 22785ms.
[15:01:29.228] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:29.228] <TB1> INFO: dacScan step from 60 .. 79
[15:01:50.818] <TB1> INFO: Test took 21590ms.
[15:01:50.864] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:01:50.864] <TB1> INFO: dacScan step from 80 .. 99
[15:02:13.931] <TB1> INFO: Test took 23067ms.
[15:02:13.982] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:13.984] <TB1> INFO: dacScan step from 100 .. 119
[15:02:42.117] <TB1> INFO: Test took 28133ms.
[15:02:42.323] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:02:42.345] <TB1> INFO: dacScan step from 120 .. 139

[15:03:15.625] <TB1> INFO: Test took 33280ms.
[15:03:15.930] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:15.977] <TB1> INFO: dacScan step from 140 .. 159


[15:03:49.373] <TB1> INFO: Test took 33396ms.
[15:03:49.657] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:03:49.703] <TB1> INFO: dacScan step from 160 .. 178
[15:04:21.834] <TB1> INFO: Test took 32131ms.
[15:04:22.123] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:04:48.222] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim11 ntrig: 10 dacrange: 0 .. 178 (20) hits flags = 16 (plus default)
[15:04:48.231] <TB1> INFO: dacScan step from 0 .. 19
[15:05:11.110] <TB1> INFO: Test took 22879ms.
[15:05:11.148] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:11.148] <TB1> INFO: dacScan step from 20 .. 39
[15:05:32.620] <TB1> INFO: Test took 21471ms.
[15:05:32.659] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:32.659] <TB1> INFO: dacScan step from 40 .. 59
[15:05:55.101] <TB1> INFO: Test took 22442ms.
[15:05:55.142] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:05:55.142] <TB1> INFO: dacScan step from 60 .. 79
[15:06:18.076] <TB1> INFO: Test took 22934ms.
[15:06:18.121] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:18.121] <TB1> INFO: dacScan step from 80 .. 99
[15:06:41.246] <TB1> INFO: Test took 23125ms.
[15:06:41.305] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:06:41.309] <TB1> INFO: dacScan step from 100 .. 119
[15:07:09.437] <TB1> INFO: Test took 28128ms.
[15:07:09.653] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:09.677] <TB1> INFO: dacScan step from 120 .. 139
[15:07:42.818] <TB1> INFO: Test took 33141ms.
[15:07:43.101] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:07:43.143] <TB1> INFO: dacScan step from 140 .. 159

[15:08:16.734] <TB1> INFO: Test took 33591ms.
[15:08:17.018] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:08:17.066] <TB1> INFO: dacScan step from 160 .. 178
[15:08:46.828] <TB1> INFO: Test took 29762ms.
[15:08:47.087] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:12.856] <TB1> INFO: ---> dac: Vcal name: TrimThr_trim7 ntrig: 10 dacrange: 0 .. 179 (20) hits flags = 16 (plus default)
[15:09:12.866] <TB1> INFO: dacScan step from 0 .. 19
[15:09:35.046] <TB1> INFO: Test took 22180ms.
[15:09:35.088] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:35.088] <TB1> INFO: dacScan step from 20 .. 39
[15:09:57.961] <TB1> INFO: Test took 22873ms.
[15:09:57.997] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:09:57.997] <TB1> INFO: dacScan step from 40 .. 59
[15:10:20.965] <TB1> INFO: Test took 22968ms.
[15:10:21.006] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:21.006] <TB1> INFO: dacScan step from 60 .. 79
[15:10:43.892] <TB1> INFO: Test took 22886ms.
[15:10:43.928] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:10:43.928] <TB1> INFO: dacScan step from 80 .. 99
[15:11:07.193] <TB1> INFO: Test took 23265ms.
[15:11:07.253] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:07.255] <TB1> INFO: dacScan step from 100 .. 119
[15:11:35.391] <TB1> INFO: Test took 28136ms.
[15:11:35.605] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:11:35.627] <TB1> INFO: dacScan step from 120 .. 139
[15:12:08.832] <TB1> INFO: Test took 33204ms.
[15:12:09.103] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:09.144] <TB1> INFO: dacScan step from 140 .. 159

[15:12:41.969] <TB1> INFO: Test took 32824ms.
[15:12:42.246] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:12:42.296] <TB1> INFO: dacScan step from 160 .. 179
[15:13:14.587] <TB1> INFO: Test took 32291ms.
[15:13:14.885] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:41.380] <TB1> INFO: PixTestTrim::trimBitTest() done
[15:13:41.382] <TB1> INFO: PixTestTrim::doTest() done, duration: 2650 seconds
[15:13:42.108] <TB1> INFO: ######################################################################
[15:13:42.108] <TB1> INFO: PixTestPhOptimization::doTest() Ntrig = 10
[15:13:42.108] <TB1> INFO: ######################################################################
[15:13:45.534] <TB1> INFO: Test took 3424ms.
[15:13:45.560] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:49.253] <TB1> INFO: Test took 3494ms.
[15:13:49.329] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:52.814] <TB1> INFO: Test took 3471ms.
[15:13:52.880] <TB1> INFO: Fetched DAQ statistics. Counters are being reset now.
[15:13:52.888] <TB1> INFO: The DUT currently contains the following objects:
[15:13:52.888] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[15:13:52.888] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:13:52.888] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:13:52.888] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:13:52.888] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:52.888] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:52.888] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:52.888] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:52.888] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:52.888] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:52.888] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:52.888] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:52.888] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:52.888] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:52.888] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:52.888] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:52.888] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:52.888] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:52.888] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:52.888] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:53.999] <TB1> INFO: Test took 1111ms.
[15:13:54.002] <TB1> INFO: The DUT currently contains the following objects:
[15:13:54.002] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[15:13:54.002] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:13:54.002] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:13:54.002] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:13:54.003] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:54.003] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:54.003] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:54.003] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:54.003] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:54.003] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:54.003] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:54.003] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:54.003] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:54.003] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:54.003] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:54.003] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:54.003] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:54.003] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:54.003] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:54.003] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:55.111] <TB1> INFO: Test took 1108ms.
[15:13:55.113] <TB1> INFO: The DUT currently contains the following objects:
[15:13:55.114] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[15:13:55.114] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:13:55.114] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:13:55.114] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:13:55.114] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:55.114] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:55.114] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:55.114] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:55.114] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:55.114] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:55.114] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:55.114] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:55.114] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:55.114] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:55.114] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:55.114] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:55.114] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:55.115] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:55.115] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:55.115] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:56.224] <TB1> INFO: Test took 1109ms.
[15:13:56.225] <TB1> INFO: The DUT currently contains the following objects:
[15:13:56.225] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[15:13:56.225] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:13:56.225] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:13:56.225] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:13:56.225] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:56.225] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:56.225] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:56.225] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:56.225] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:56.225] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:56.226] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:56.226] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:56.226] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:56.226] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:56.226] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:56.226] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:56.226] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:56.226] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:56.226] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:56.226] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:57.336] <TB1> INFO: Test took 1110ms.
[15:13:57.338] <TB1> INFO: The DUT currently contains the following objects:
[15:13:57.338] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[15:13:57.338] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:13:57.338] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:13:57.339] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:13:57.339] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:57.339] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:57.339] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:57.339] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:57.339] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:57.339] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:57.339] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:57.339] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:57.339] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:57.339] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:57.339] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:57.339] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:57.339] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:57.339] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:57.339] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:57.339] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:58.449] <TB1> INFO: Test took 1110ms.
[15:13:58.451] <TB1> INFO: The DUT currently contains the following objects:
[15:13:58.451] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[15:13:58.451] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:13:58.451] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:13:58.451] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:13:58.451] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:58.451] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:58.451] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:58.451] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:58.451] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:58.451] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:58.451] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:58.451] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:58.451] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:58.452] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:58.452] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:58.452] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:58.452] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:58.452] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:58.452] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:58.452] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:59.563] <TB1> INFO: Test took 1111ms.
[15:13:59.564] <TB1> INFO: The DUT currently contains the following objects:
[15:13:59.564] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[15:13:59.564] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:13:59.564] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:13:59.564] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:13:59.564] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:59.564] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:59.564] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:59.564] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:59.564] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:59.564] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:59.564] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:59.564] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:59.565] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:59.565] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:59.565] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:59.565] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:59.565] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:59.565] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:59.565] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:13:59.565] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:00.675] <TB1> INFO: Test took 1110ms.
[15:14:00.676] <TB1> INFO: The DUT currently contains the following objects:
[15:14:00.676] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[15:14:00.676] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:14:00.676] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:14:00.676] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:14:00.676] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:00.676] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:00.677] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:00.677] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:00.677] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:00.677] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:00.677] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:00.677] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:00.677] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:00.677] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:00.677] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:00.677] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:00.677] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:00.677] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:00.677] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:00.677] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:01.786] <TB1> INFO: Test took 1109ms.
[15:14:01.788] <TB1> INFO: The DUT currently contains the following objects:
[15:14:01.788] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[15:14:01.788] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:14:01.788] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:14:01.788] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:14:01.788] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:01.788] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:01.788] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:01.788] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:01.788] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:01.788] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:01.788] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:01.788] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:01.788] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:01.788] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:01.788] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:01.788] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:01.788] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:01.788] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:01.788] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:01.788] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:02.899] <TB1> INFO: Test took 1111ms.
[15:14:02.901] <TB1> INFO: The DUT currently contains the following objects:
[15:14:02.901] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[15:14:02.901] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:14:02.901] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:14:02.901] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:14:02.901] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:02.901] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:02.901] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:02.901] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:02.901] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:02.901] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:02.901] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:02.901] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:02.901] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:02.901] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:02.901] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:02.901] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:02.901] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:02.901] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:02.901] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:02.901] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:04.014] <TB1> INFO: Test took 1113ms.
[15:14:04.015] <TB1> INFO: The DUT currently contains the following objects:
[15:14:04.015] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[15:14:04.015] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:14:04.015] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:14:04.015] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:14:04.015] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:04.015] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:04.015] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:04.015] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:04.015] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:04.016] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:04.016] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:04.016] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:04.016] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:04.016] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:04.016] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:04.016] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:04.016] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:04.016] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:04.016] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:04.016] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:05.127] <TB1> INFO: Test took 1111ms.
[15:14:05.129] <TB1> INFO: The DUT currently contains the following objects:
[15:14:05.129] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[15:14:05.129] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:14:05.129] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:14:05.129] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:14:05.129] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:05.129] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:05.129] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:05.129] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:05.129] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:05.129] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:05.129] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:05.129] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:05.129] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:05.129] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:05.130] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:05.130] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:05.130] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:05.130] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:05.130] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:05.130] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:06.244] <TB1> INFO: Test took 1114ms.
[15:14:06.245] <TB1> INFO: The DUT currently contains the following objects:
[15:14:06.245] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[15:14:06.245] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:14:06.245] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:14:06.245] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:14:06.245] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:06.245] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:06.245] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:06.245] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:06.245] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:06.246] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:06.246] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:06.246] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:06.246] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:06.246] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:06.246] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:06.246] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:06.246] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:06.246] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:06.246] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:06.246] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:07.358] <TB1> INFO: Test took 1112ms.
[15:14:07.359] <TB1> INFO: The DUT currently contains the following objects:
[15:14:07.359] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[15:14:07.359] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:14:07.359] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:14:07.359] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:14:07.359] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:07.359] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:07.359] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:07.360] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:07.360] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:07.360] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:07.360] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:07.360] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:07.360] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:07.360] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:07.360] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:07.360] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:07.360] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:07.360] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:07.360] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:07.360] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:08.474] <TB1> INFO: Test took 1114ms.
[15:14:08.475] <TB1> INFO: The DUT currently contains the following objects:
[15:14:08.475] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[15:14:08.475] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:14:08.475] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:14:08.475] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:14:08.475] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:08.475] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:08.475] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:08.475] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:08.475] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:08.475] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:08.475] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:08.476] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:08.476] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:08.476] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:08.476] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:08.476] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:08.476] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:08.476] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:08.476] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:08.476] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:09.587] <TB1> INFO: Test took 1111ms.
[15:14:09.589] <TB1> INFO: The DUT currently contains the following objects:
[15:14:09.589] <TB1> INFO: 2 TBM Cores tbm09c (2 ON)
[15:14:09.589] <TB1> INFO: TBM Core alpha (0): 7 registers set
[15:14:09.589] <TB1> INFO: TBM Core beta (1): 7 registers set
[15:14:09.589] <TB1> INFO: 16 ROCs psi46digv21respin (1 ON) with 4160 pixelConfigs
[15:14:09.589] <TB1> INFO: ROC 0: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:09.589] <TB1> INFO: ROC 1: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:09.589] <TB1> INFO: ROC 2: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:09.589] <TB1> INFO: ROC 3: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:09.589] <TB1> INFO: ROC 4: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:09.589] <TB1> INFO: ROC 5: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:09.589] <TB1> INFO: ROC 6: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:09.589] <TB1> INFO: ROC 7: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:09.589] <TB1> INFO: ROC 8: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:09.590] <TB1> INFO: ROC 9: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:09.590] <TB1> INFO: ROC 10: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:09.590] <TB1> INFO: ROC 11: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:09.590] <TB1> INFO: ROC 12: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:09.590] <TB1> INFO: ROC 13: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:09.590] <TB1> INFO: ROC 14: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:09.590] <TB1> INFO: ROC 15: 19 DACs set, Pixels: 4159 masked, 1 active.
[15:14:10.700] <TB1> INFO: Test took 1110ms.
[15:14:10.707] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:18:00.387] <TB1> INFO: Test took 229680ms.
[15:18:01.959] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:21:36.516] <TB1> INFO: Test took 214558ms.
[15:21:38.217] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:21:38.227] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[15:21:38.237] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[15:21:38.246] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:21:38.256] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:21:38.265] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:21:38.275] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:21:38.282] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:21:38.289] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:21:38.296] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:21:38.303] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:21:38.310] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:21:38.317] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[15:21:38.324] <TB1> INFO: safety margin for low PH: adding 2, margin is now 22
[15:21:38.331] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:21:38.338] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:21:38.348] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:21:38.357] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:21:38.366] <TB1> INFO: safety margin for low PH: adding 1, margin is now 21
[15:21:38.375] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:21:38.384] <TB1> INFO: safety margin for low PH: adding 0, margin is now 20
[15:21:38.443] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C0.dat
[15:21:38.443] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C1.dat
[15:21:38.443] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C2.dat
[15:21:38.443] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C3.dat
[15:21:38.444] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C4.dat
[15:21:38.444] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C5.dat
[15:21:38.444] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C6.dat
[15:21:38.444] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C7.dat
[15:21:38.445] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C8.dat
[15:21:38.445] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C9.dat
[15:21:38.445] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C10.dat
[15:21:38.445] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C11.dat
[15:21:38.445] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C12.dat
[15:21:38.445] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C13.dat
[15:21:38.445] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C14.dat
[15:21:38.446] <TB1> INFO: write dac parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//dacParameters35_C15.dat
[15:21:41.881] <TB1> INFO: Test took 3431ms.
[15:21:45.604] <TB1> INFO: Test took 3445ms.
[15:21:49.373] <TB1> INFO: Test took 3478ms.
[15:21:49.663] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:21:50.585] <TB1> INFO: Test took 922ms.
[15:21:50.589] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:21:51.698] <TB1> INFO: Test took 1109ms.
[15:21:51.702] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:21:52.814] <TB1> INFO: Test took 1112ms.
[15:21:52.818] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:21:53.921] <TB1> INFO: Test took 1103ms.
[15:21:53.924] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:21:55.034] <TB1> INFO: Test took 1110ms.
[15:21:55.038] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:21:56.146] <TB1> INFO: Test took 1109ms.
[15:21:56.151] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:21:57.260] <TB1> INFO: Test took 1110ms.
[15:21:57.265] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:21:58.375] <TB1> INFO: Test took 1110ms.
[15:21:58.379] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:21:59.488] <TB1> INFO: Test took 1109ms.
[15:21:59.492] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:00.601] <TB1> INFO: Test took 1109ms.
[15:22:00.605] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:01.709] <TB1> INFO: Test took 1104ms.
[15:22:01.713] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:02.822] <TB1> INFO: Test took 1109ms.
[15:22:02.826] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:03.937] <TB1> INFO: Test took 1111ms.
[15:22:03.942] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:05.053] <TB1> INFO: Test took 1111ms.
[15:22:05.058] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:06.161] <TB1> INFO: Test took 1103ms.
[15:22:06.165] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:07.275] <TB1> INFO: Test took 1110ms.
[15:22:07.280] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:08.390] <TB1> INFO: Test took 1111ms.
[15:22:08.394] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:09.506] <TB1> INFO: Test took 1112ms.
[15:22:09.512] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:10.614] <TB1> INFO: Test took 1102ms.
[15:22:10.617] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:11.730] <TB1> INFO: Test took 1113ms.
[15:22:11.735] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:12.844] <TB1> INFO: Test took 1109ms.
[15:22:12.848] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:13.959] <TB1> INFO: Test took 1111ms.
[15:22:13.964] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:15.068] <TB1> INFO: Test took 1105ms.
[15:22:15.071] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:16.182] <TB1> INFO: Test took 1111ms.
[15:22:16.187] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:17.299] <TB1> INFO: Test took 1113ms.
[15:22:17.303] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:18.415] <TB1> INFO: Test took 1112ms.
[15:22:18.420] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:19.525] <TB1> INFO: Test took 1106ms.
[15:22:19.527] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:20.640] <TB1> INFO: Test took 1113ms.
[15:22:20.645] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:21.758] <TB1> INFO: Test took 1113ms.
[15:22:21.762] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:22.871] <TB1> INFO: Test took 1109ms.
[15:22:22.876] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:23.981] <TB1> INFO: Test took 1105ms.
[15:22:23.984] <TB1> INFO: Not all ROCs have their pixels configured the same way. Running in FLAG_FORCE_SERIAL mode.
[15:22:25.097] <TB1> INFO: Test took 1113ms.
[15:22:25.682] <TB1> INFO: PixTestPhOptimization::doTest() done, duration: 523 seconds
[15:22:25.683] <TB1> INFO: PH scale (per ROC): 71 76 71 78 72 74 69 76 76 76 74 68 74 73 62 66
[15:22:25.683] <TB1> INFO: PH offset (per ROC): 176 173 171 160 187 176 166 176 181 192 173 187 184 160 182 188
[15:22:25.866] <TB1> INFO: ######################################################################
[15:22:25.866] <TB1> INFO: PixTestGainPedestal::fullTest() ntrig = 10
[15:22:25.866] <TB1> INFO: ######################################################################
[15:22:25.877] <TB1> INFO: scanning low vcal = 10
[15:22:29.742] <TB1> INFO: Test took 3865ms.
[15:22:29.748] <TB1> INFO: scanning low vcal = 20
[15:22:33.604] <TB1> INFO: Test took 3856ms.
[15:22:33.611] <TB1> INFO: scanning low vcal = 30
[15:22:37.499] <TB1> INFO: Test took 3888ms.
[15:22:37.508] <TB1> INFO: scanning low vcal = 40
[15:22:41.865] <TB1> INFO: Test took 4357ms.
[15:22:41.935] <TB1> INFO: scanning low vcal = 50
[15:22:46.310] <TB1> INFO: Test took 4375ms.
[15:22:46.402] <TB1> INFO: scanning low vcal = 60
[15:22:50.848] <TB1> INFO: Test took 4446ms.
[15:22:50.912] <TB1> INFO: scanning low vcal = 70
[15:22:55.282] <TB1> INFO: Test took 4370ms.
[15:22:55.363] <TB1> INFO: scanning low vcal = 80
[15:22:59.807] <TB1> INFO: Test took 4444ms.
[15:22:59.889] <TB1> INFO: scanning low vcal = 90
[15:23:04.307] <TB1> INFO: Test took 4418ms.
[15:23:04.396] <TB1> INFO: scanning low vcal = 100
[15:23:08.777] <TB1> INFO: Test took 4381ms.
[15:23:08.839] <TB1> INFO: scanning low vcal = 110
[15:23:13.170] <TB1> INFO: Test took 4331ms.
[15:23:13.238] <TB1> INFO: scanning low vcal = 120
[15:23:17.626] <TB1> INFO: Test took 4388ms.
[15:23:17.690] <TB1> INFO: scanning low vcal = 130
[15:23:22.040] <TB1> INFO: Test took 4350ms.
[15:23:22.122] <TB1> INFO: scanning low vcal = 140
[15:23:26.506] <TB1> INFO: Test took 4384ms.
[15:23:26.571] <TB1> INFO: scanning low vcal = 150
[15:23:30.936] <TB1> INFO: Test took 4365ms.
[15:23:31.002] <TB1> INFO: scanning low vcal = 160
[15:23:35.361] <TB1> INFO: Test took 4359ms.
[15:23:35.428] <TB1> INFO: scanning low vcal = 170
[15:23:39.787] <TB1> INFO: Test took 4359ms.
[15:23:39.851] <TB1> INFO: scanning low vcal = 180
[15:23:44.214] <TB1> INFO: Test took 4363ms.
[15:23:44.278] <TB1> INFO: scanning low vcal = 190
[15:23:48.770] <TB1> INFO: Test took 4491ms.
[15:23:48.831] <TB1> INFO: scanning low vcal = 200
[15:23:53.202] <TB1> INFO: Test took 4371ms.
[15:23:53.268] <TB1> INFO: scanning low vcal = 210
[15:23:57.654] <TB1> INFO: Test took 4386ms.
[15:23:57.718] <TB1> INFO: scanning low vcal = 220
[15:24:02.080] <TB1> INFO: Test took 4362ms.
[15:24:02.141] <TB1> INFO: scanning low vcal = 230
[15:24:06.434] <TB1> INFO: Test took 4293ms.
[15:24:06.499] <TB1> INFO: scanning low vcal = 240
[15:24:10.728] <TB1> INFO: Test took 4229ms.
[15:24:10.788] <TB1> INFO: scanning low vcal = 250
[15:24:14.995] <TB1> INFO: Test took 4207ms.
[15:24:15.062] <TB1> INFO: scanning high vcal = 30 (= 210 in low range)
[15:24:19.286] <TB1> INFO: Test took 4224ms.
[15:24:19.347] <TB1> INFO: scanning high vcal = 50 (= 350 in low range)
[15:24:23.554] <TB1> INFO: Test took 4207ms.
[15:24:23.612] <TB1> INFO: scanning high vcal = 70 (= 490 in low range)
[15:24:27.834] <TB1> INFO: Test took 4222ms.
[15:24:27.892] <TB1> INFO: scanning high vcal = 90 (= 630 in low range)
[15:24:32.114] <TB1> INFO: Test took 4222ms.
[15:24:32.173] <TB1> INFO: scanning high vcal = 200 (= 1400 in low range)
[15:24:36.419] <TB1> INFO: Test took 4246ms.
[15:24:37.003] <TB1> INFO: PixTestGainPedestal::measure() done
[15:25:10.532] <TB1> INFO: PixTestGainPedestal::fit() done
[15:25:10.532] <TB1> INFO: non-linearity mean: 0.962 0.961 0.958 0.961 0.960 0.959 0.950 0.959 0.958 0.958 0.957 0.956 0.961 0.956 0.952 0.959
[15:25:10.532] <TB1> INFO: non-linearity RMS: 0.006 0.006 0.006 0.009 0.007 0.006 0.006 0.007 0.008 0.006 0.007 0.008 0.008 0.007 0.008 0.006
[15:25:10.532] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C0.dat
[15:25:10.551] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C1.dat
[15:25:10.570] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C2.dat
[15:25:10.588] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C3.dat
[15:25:10.607] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C4.dat
[15:25:10.625] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C5.dat
[15:25:10.644] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C6.dat
[15:25:10.662] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C7.dat
[15:25:10.680] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C8.dat
[15:25:10.698] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C9.dat
[15:25:10.716] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C10.dat
[15:25:10.736] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C11.dat
[15:25:10.754] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C12.dat
[15:25:10.772] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C13.dat
[15:25:10.790] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C14.dat
[15:25:10.809] <TB1> INFO: write gain/ped parameters into /usr/local/coldboxDATA/M2028_FullQualification_2015-08-18_11h20m_1439889632//004_FulltestPxar_p17//phCalibrationFitErr35_C15.dat
[15:25:10.827] <TB1> INFO: PixTestGainPedestal::doTest() done, duration: 164 seconds
[15:25:10.833] <TB1> INFO: enter test to run
[15:25:10.833] <TB1> INFO: test: exit no parameter change
[15:25:11.314] <TB1> QUIET: Connection to board 153 closed.
[15:25:11.394] <TB1> INFO: pXar: this is the end, my friend